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authorJani Nikula <jani.nikula@intel.com>2023-09-21 18:53:25 +0300
committerJani Nikula <jani.nikula@intel.com>2023-09-26 12:52:38 +0300
commitf067976e4939133e656ce4532995ba96bfe68366 (patch)
treef0008d8ea17e6badcfcb3261449e37ee4e4d86d6 /drivers/gpu/drm/i915/display/intel_cx0_phy.h
parent690391777f4d81a0877c98e0492c245c2aa7b10d (diff)
drm/i915/cx0: prefer forward declarations over includes
Avoid including the world from headers when forward declarations suffice. Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230921155325.3851197-1-jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_cx0_phy.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_cx0_phy.h14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.h b/drivers/gpu/drm/i915/display/intel_cx0_phy.h
index 4c4db5cdcbd0..912e0eeb0be3 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.h
@@ -10,14 +10,15 @@
#include <linux/bitfield.h>
#include <linux/bits.h>
-#include "i915_drv.h"
-#include "intel_display_types.h"
-
-struct drm_i915_private;
-struct intel_encoder;
-struct intel_crtc_state;
enum icl_port_dpll_id;
enum phy;
+struct drm_i915_private;
+struct intel_atomic_state;
+struct intel_c10pll_state;
+struct intel_c20pll_state;
+struct intel_crtc_state;
+struct intel_encoder;
+struct intel_hdmi;
bool intel_is_c10phy(struct drm_i915_private *dev_priv, enum phy phy);
void intel_mtl_pll_enable(struct intel_encoder *encoder,
@@ -44,4 +45,5 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock);
int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder);
+
#endif /* __INTEL_CX0_PHY_H__ */