diff options
author | Eric Huang <JinHuiEric.Huang@amd.com> | 2016-04-15 17:23:14 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-05-04 20:30:02 -0400 |
commit | a72d5604ead32d282fefbc018ca63a3bf878e2c2 (patch) | |
tree | e6ce16351b114c8d0f177914793d945b05a526bb /drivers/gpu/drm/amd/powerplay | |
parent | 92dea67dd682e56c7a5deebeb7d99de5f4ffcedf (diff) |
drm/amd/powerplay: revise reading/writing pptable on Polaris10
Change the way we store pptables in the driver to better
facilitate eventual runtime updates for debugging.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 31 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.h | 3 |
2 files changed, 30 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c index 79192c301d78..b146ec8a69bb 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c @@ -2560,6 +2560,13 @@ int polaris10_reset_asic_tasks(struct pp_hwmgr *hwmgr) int polaris10_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) { + struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); + + if (data->soft_pp_table) { + kfree(data->soft_pp_table); + data->soft_pp_table = NULL; + } + return phm_hwmgr_backend_fini(hwmgr); } @@ -4750,18 +4757,34 @@ static int polaris10_get_pp_table(struct pp_hwmgr *hwmgr, char **table) { struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); - *table = (char *)&data->smc_state_table; + if (!data->soft_pp_table) { + data->soft_pp_table = kzalloc(hwmgr->soft_pp_table_size, GFP_KERNEL); + if (!data->soft_pp_table) + return -ENOMEM; + memcpy(data->soft_pp_table, hwmgr->soft_pp_table, + hwmgr->soft_pp_table_size); + } - return sizeof(struct SMU74_Discrete_DpmTable); + *table = (char *)&data->soft_pp_table; + + return hwmgr->soft_pp_table_size; } static int polaris10_set_pp_table(struct pp_hwmgr *hwmgr, const char *buf, size_t size) { struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); - void *table = (void *)&data->smc_state_table; + if (!data->soft_pp_table) { + data->soft_pp_table = kzalloc(hwmgr->soft_pp_table_size, GFP_KERNEL); + if (!data->soft_pp_table) + return -ENOMEM; + } + + memcpy(data->soft_pp_table, buf, size); + + hwmgr->soft_pp_table = data->soft_pp_table; - memcpy(table, buf, size); + /* TODO: re-init powerplay to implement modified pptable */ return 0; } diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.h index 2507404fd51e..b02296444f2f 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.h @@ -309,6 +309,9 @@ struct polaris10_hwmgr { uint32_t up_hyst; uint32_t disable_dpm_mask; bool apply_optimized_settings; + + /* soft pptable for re-uploading into smu */ + void *soft_pp_table; }; /* To convert to Q8.8 format for firmware */ |