diff options
| author | Thor Thayer <thor.thayer@linux.intel.com> | 2018-05-11 18:00:10 -0500 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2018-05-12 12:29:41 +0200 |
| commit | e9918d7fafae2ec5365b193654960f6158751f8c (patch) | |
| tree | b17e0df16f20521df19240b02facab73dac300fa /drivers/edac/altera_edac.h | |
| parent | f8eb0edeb8c19aba667a087b80706bf4f61f8256 (diff) | |
EDAC, altera: Handle SDRAM Uncorrectable Errors on Stratix10
On Stratix10, uncorrectable errors are routed to the SError exception
instead of the IRQ exceptions. In Stratix10, uncorrectable SErrors
must be treated as fatal and will cause a panic. Older Altera/Intel
parts printed out a message for UE so do that here using the notifier
framework.
Record the UE in sticky registers that retain the state through a reset.
Check these registers on probe and printout the error on startup.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mark.rutland@arm.com
Cc: mchehab@kernel.org
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1526079610-5527-1-git-send-email-thor.thayer@linux.intel.com
[ Remove unused var in s10_edac_dberr_handler(), reorder args. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac/altera_edac.h')
| -rw-r--r-- | drivers/edac/altera_edac.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h index 747481081072..81f0554e09de 100644 --- a/drivers/edac/altera_edac.h +++ b/drivers/edac/altera_edac.h @@ -180,6 +180,10 @@ /* SDRAM Single Bit Error Count Compare Set Register */ #define S10_SERRCNTREG_OFST 0xF801113C +/* Sticky registers for Uncorrected Errors */ +#define S10_SYSMGR_UE_VAL_OFST 0xFFD12220 +#define S10_SYSMGR_UE_ADDR_OFST 0xFFD12224 + struct altr_sdram_prv_data { int ecc_ctrl_offset; int ecc_ctl_en_mask; @@ -322,6 +326,8 @@ struct altr_sdram_mc_data { #define S10_SYSMGR_ECC_INTSTAT_SERR_OFST 0xFFD1209C #define S10_SYSMGR_ECC_INTSTAT_DERR_OFST 0xFFD120A0 +#define S10_DDR0_IRQ_MASK BIT(16) + struct altr_edac_device_dev; struct edac_device_prv_data { @@ -434,10 +440,10 @@ struct altr_arria10_edac { struct altr_stratix10_edac { struct device *dev; int sb_irq; - int db_irq; struct irq_domain *domain; struct irq_chip irq_chip; struct list_head s10_ecc_devices; + struct notifier_block panic_notifier; }; #endif /* #ifndef _ALTERA_EDAC_H */ |