diff options
| author | Dave Jiang <dave.jiang@intel.com> | 2023-02-14 11:41:30 -0800 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-02-14 15:45:21 -0800 |
| commit | 4474ce565ee4490fb4e6d8443b617a9d98ae10ff (patch) | |
| tree | 6e95405cb64326700e8af5863425cc9e4ce494d7 /drivers/cxl/port.c | |
| parent | b777e9bec960a29374dc486d47784c73b7ac4cef (diff) | |
cxl/hdm: Create emulated cxl_hdm for devices that do not have HDM decoders
CXL rev3 spec 8.1.3
RCDs may not have HDM register blocks. Create a fake HDM with information
from the CXL PCIe DVSEC registers. The decoder count will be set to the
HDM count retrieved from the DVSEC cap register.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/167640368994.935665.15831225724059704620.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/port.c')
| -rw-r--r-- | drivers/cxl/port.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c index d3a708e32565..9f9cc268b597 100644 --- a/drivers/cxl/port.c +++ b/drivers/cxl/port.c @@ -54,7 +54,7 @@ static int cxl_port_probe(struct device *dev) return devm_cxl_add_passthrough_decoder(port); } - cxlhdm = devm_cxl_setup_hdm(port); + cxlhdm = devm_cxl_setup_hdm(port, &info); if (IS_ERR(cxlhdm)) return PTR_ERR(cxlhdm); |