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| author | Chris Metcalf <cmetcalf@tilera.com> | 2010-08-13 19:59:15 -0400 |
|---|---|---|
| committer | Chris Metcalf <cmetcalf@tilera.com> | 2010-08-13 19:59:15 -0400 |
| commit | 7d72e6fa56c4100b9669efe0044f77ed9eb785a1 (patch) | |
| tree | 5e90bf4969809a1ab20b97432b85be20ccfaa1f4 /arch/frv/include/asm/mem-layout.h | |
| parent | ba00376b0b13f234d839541a7b36a5bf5c2a4036 (diff) | |
| parent | 2be1f3a73dd02e38e181cf5abacb3d45a6a2d6b8 (diff) | |
Merge branch 'master' into for-linus
Diffstat (limited to 'arch/frv/include/asm/mem-layout.h')
| -rw-r--r-- | arch/frv/include/asm/mem-layout.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/frv/include/asm/mem-layout.h b/arch/frv/include/asm/mem-layout.h index ccae981876fa..e9a0ec85a402 100644 --- a/arch/frv/include/asm/mem-layout.h +++ b/arch/frv/include/asm/mem-layout.h @@ -35,7 +35,7 @@ * the slab must be aligned such that load- and store-double instructions don't * fault if used */ -#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES +#define ARCH_DMA_MINALIGN L1_CACHE_BYTES #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES /*****************************************************************************/ |