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authorGuo Ren <ren_guo@c-sky.com>2018-12-31 15:17:48 +0800
committerGuo Ren <ren_guo@c-sky.com>2018-12-31 22:57:27 +0800
commit789154c2ad74c29c3c60c5136c1785745abe4897 (patch)
treef844b0a765ac5d5d2b027fc5b7e7ed9b4936db0b /arch/csky/kernel
parent31295a72b525721d10737260aea6918fb34607be (diff)
csky: fixup save hi,lo,dspcr regs in switch_stack.
HI, LO, DSPCR registers are 807/810 related regs and no need for 610/860. All of the regs must be saved in pt_regs and switch_stack. This patch fixup saving dspcr reg in switch_stack and pt_regs. Signed-off-by: Guo Ren <ren_guo@c-sky.com>
Diffstat (limited to 'arch/csky/kernel')
-rw-r--r--arch/csky/kernel/asm-offsets.c2
-rw-r--r--arch/csky/kernel/entry.S22
-rw-r--r--arch/csky/kernel/ptrace.c4
3 files changed, 3 insertions, 25 deletions
diff --git a/arch/csky/kernel/asm-offsets.c b/arch/csky/kernel/asm-offsets.c
index 8d3ed811321f..2f07670ac65f 100644
--- a/arch/csky/kernel/asm-offsets.c
+++ b/arch/csky/kernel/asm-offsets.c
@@ -24,8 +24,6 @@ int main(void)
DEFINE(THREAD_FESR, offsetof(struct thread_struct, user_fp.fesr));
DEFINE(THREAD_FCR, offsetof(struct thread_struct, user_fp.fcr));
DEFINE(THREAD_FPREG, offsetof(struct thread_struct, user_fp.vr));
- DEFINE(THREAD_DSPHI, offsetof(struct thread_struct, hi));
- DEFINE(THREAD_DSPLO, offsetof(struct thread_struct, lo));
/* offsets into the thread_info struct */
DEFINE(TINFO_FLAGS, offsetof(struct thread_info, flags));
diff --git a/arch/csky/kernel/entry.S b/arch/csky/kernel/entry.S
index 2b4a8515f7e5..de378e479dee 100644
--- a/arch/csky/kernel/entry.S
+++ b/arch/csky/kernel/entry.S
@@ -346,34 +346,12 @@ ENTRY(__switch_to)
stw sp, (a3, THREAD_KSP)
-#ifdef CONFIG_CPU_HAS_HILO
- lrw r10, THREAD_DSPHI
- add r10, a3
- mfhi r6
- mflo r7
- stw r6, (r10, 0) /* THREAD_DSPHI */
- stw r7, (r10, 4) /* THREAD_DSPLO */
- mfcr r6, cr14
- stw r6, (r10, 8) /* THREAD_DSPCSR */
-#endif
-
/* Set up next process to run */
lrw a3, TASK_THREAD
addu a3, a1
ldw sp, (a3, THREAD_KSP) /* Set next kernel sp */
-#ifdef CONFIG_CPU_HAS_HILO
- lrw r10, THREAD_DSPHI
- add r10, a3
- ldw r6, (r10, 8) /* THREAD_DSPCSR */
- mtcr r6, cr14
- ldw r6, (r10, 0) /* THREAD_DSPHI */
- ldw r7, (r10, 4) /* THREAD_DSPLO */
- mthi r6
- mtlo r7
-#endif
-
ldw a2, (a3, THREAD_SR) /* Set next PSR */
mtcr a2, psr
diff --git a/arch/csky/kernel/ptrace.c b/arch/csky/kernel/ptrace.c
index 34b30257298f..a76d466e1d0a 100644
--- a/arch/csky/kernel/ptrace.c
+++ b/arch/csky/kernel/ptrace.c
@@ -95,7 +95,9 @@ static int gpr_set(struct task_struct *target,
return ret;
regs.sr = task_pt_regs(target)->sr;
-
+#ifdef CONFIG_CPU_HAS_HILO
+ regs.dcsr = task_pt_regs(target)->dcsr;
+#endif
task_thread_info(target)->tp_value = regs.tls;
*task_pt_regs(target) = regs;