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authorBen Dooks <ben.dooks@codethink.co.uk>2015-03-25 11:27:47 +0000
committerDinh Nguyen <dinguyen@opensource.altera.com>2015-05-11 13:59:23 -0500
commitbf55e0a48f8ee086c71d1a9de1f0eeee7501b1c4 (patch)
tree6e203408bdcde217a8d975e1d596d2ef65876c3b /arch/arm/mach-socfpga
parent6ef4e47926b2008c6a1736fe4e3b2817e3b95463 (diff)
ARM: socfpga: enable big endian for secondary core(s)
Update the secondary code to allow the secondary boot to work when the system is running big endian. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/mach-socfpga')
-rw-r--r--arch/arm/mach-socfpga/headsmp.S5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S
index f65ea0af4af3..a580dcdec526 100644
--- a/arch/arm/mach-socfpga/headsmp.S
+++ b/arch/arm/mach-socfpga/headsmp.S
@@ -10,6 +10,7 @@
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/memory.h>
+#include <asm/assembler.h>
.arch armv7-a
@@ -18,12 +19,14 @@ ENTRY(secondary_trampoline)
* Thus, we can just subtract the PAGE_OFFSET to get the physical
* address of &cpu1start_addr. This would not work for platforms
* where the physical memory does not start at 0x0.
- */
+ */
+ARM_BE8(setend be)
adr r0, 1f
ldmia r0, {r1, r2}
sub r2, r2, #PAGE_OFFSET
ldr r3, [r2]
ldr r4, [r3]
+ARM_BE8(rev r4, r4)
bx r4
.align