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authorJon Hunter <jon-hunter@ti.com>2013-02-21 12:42:22 -0600
committerJon Hunter <jon-hunter@ti.com>2013-04-01 14:53:42 -0500
commit3aef65ee5d28df4e1415be2c83fb3eb90e9cfc3f (patch)
tree973c9471f956ac57d6fcb769ad8a97937a819ae4 /arch/arm/mach-omap2/gpmc-onenand.c
parentaa8d4767da2a2a29a628dc0dadb59a010f0ec18e (diff)
ARM: OMAP2+: Convert ONENAND to use gpmc_cs_program_settings()
Convert the OMAP2+ ONENAND code to use the gpmc_cs_program_settings() function for configuring the various GPMC options instead of directly programming the CONFIG1 register. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Diffstat (limited to 'arch/arm/mach-omap2/gpmc-onenand.c')
-rw-r--r--arch/arm/mach-omap2/gpmc-onenand.c61
1 files changed, 25 insertions, 36 deletions
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index e175ceb0dc05..46aac83d73d4 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -48,18 +48,22 @@ static struct platform_device gpmc_onenand_device = {
};
static struct gpmc_settings onenand_async = {
+ .device_width = GPMC_DEVWIDTH_16BIT,
.mux_add_data = GPMC_MUX_AD,
};
static struct gpmc_settings onenand_sync = {
.burst_read = true,
+ .burst_wrap = true,
+ .burst_len = GPMC_BURST_16,
+ .device_width = GPMC_DEVWIDTH_16BIT,
.mux_add_data = GPMC_MUX_AD,
+ .wait_pin = 0,
};
static void omap2_onenand_calc_async_timings(struct gpmc_timings *t)
{
struct gpmc_device_timings dev_t;
-
const int t_cer = 15;
const int t_avdp = 12;
const int t_aavdh = 7;
@@ -86,16 +90,6 @@ static void omap2_onenand_calc_async_timings(struct gpmc_timings *t)
gpmc_calc_timings(t, &onenand_async, &dev_t);
}
-static int gpmc_set_async_mode(int cs, struct gpmc_timings *t)
-{
- /* Configure GPMC for asynchronous read */
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
- GPMC_CONFIG1_DEVICESIZE_16 |
- GPMC_CONFIG1_MUXADDDATA);
-
- return gpmc_cs_set_timings(cs, t);
-}
-
static void omap2_onenand_set_async_mode(void __iomem *onenand_base)
{
u32 reg;
@@ -243,8 +237,11 @@ static void omap2_onenand_calc_sync_timings(struct gpmc_timings *t,
/* Set synchronous read timings */
memset(&dev_t, 0, sizeof(dev_t));
+ if (onenand_flags & ONENAND_FLAG_SYNCREAD)
+ onenand_sync.sync_read = true;
if (onenand_flags & ONENAND_FLAG_SYNCWRITE) {
onenand_sync.sync_write = true;
+ onenand_sync.burst_write = true;
} else {
dev_t.t_avdp_w = max(t_avdp, t_cer) * 1000;
dev_t.t_wpl = t_wpl * 1000;
@@ -270,29 +267,6 @@ static void omap2_onenand_calc_sync_timings(struct gpmc_timings *t,
gpmc_calc_timings(t, &onenand_sync, &dev_t);
}
-static int gpmc_set_sync_mode(int cs, struct gpmc_timings *t)
-{
- unsigned sync_read = onenand_flags & ONENAND_FLAG_SYNCREAD;
- unsigned sync_write = onenand_flags & ONENAND_FLAG_SYNCWRITE;
-
- /* Configure GPMC for synchronous read */
- gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
- GPMC_CONFIG1_WRAPBURST_SUPP |
- GPMC_CONFIG1_READMULTIPLE_SUPP |
- (sync_read ? GPMC_CONFIG1_READTYPE_SYNC : 0) |
- (sync_write ? GPMC_CONFIG1_WRITEMULTIPLE_SUPP : 0) |
- (sync_write ? GPMC_CONFIG1_WRITETYPE_SYNC : 0) |
- GPMC_CONFIG1_PAGE_LEN(2) |
- (cpu_is_omap34xx() ? 0 :
- (GPMC_CONFIG1_WAIT_READ_MON |
- GPMC_CONFIG1_WAIT_PIN_SEL(0))) |
- GPMC_CONFIG1_DEVICESIZE_16 |
- GPMC_CONFIG1_DEVICETYPE_NOR |
- GPMC_CONFIG1_MUXADDDATA);
-
- return gpmc_cs_set_timings(cs, t);
-}
-
static int omap2_onenand_setup_async(void __iomem *onenand_base)
{
struct gpmc_timings t;
@@ -302,7 +276,11 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
omap2_onenand_calc_async_timings(&t);
- ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t);
+ ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async);
+ if (ret < 0)
+ return ret;
+
+ ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t);
if (ret < 0)
return ret;
@@ -322,9 +300,20 @@ static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr)
set_onenand_cfg(onenand_base);
}
+ /*
+ * FIXME: Appears to be legacy code from initial ONENAND commit.
+ * Unclear what boards this is for and if this can be removed.
+ */
+ if (!cpu_is_omap34xx())
+ onenand_sync.wait_on_read = true;
+
omap2_onenand_calc_sync_timings(&t, gpmc_onenand_data->flags, freq);
- ret = gpmc_set_sync_mode(gpmc_onenand_data->cs, &t);
+ ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_sync);
+ if (ret < 0)
+ return ret;
+
+ ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t);
if (ret < 0)
return ret;