diff options
| author | Grygorii Strashko <grygorii.strashko@ti.com> | 2016-08-30 17:58:01 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2016-08-31 07:37:40 -0700 |
| commit | c097338ebd3f7a0920dbe1a5d9bf276207f7b024 (patch) | |
| tree | a1ce6866656760d583a79351d6be0c0e54aa6cab /arch/arm/boot/dts/dra7xx-clocks.dtsi | |
| parent | dbb9c1963285d5d1d3a8c12ad72ddacbd46fc845 (diff) | |
ARM: dts: dra7: cpsw: fix clocks tree
Current clocks tree definition for CPSW/CPTS doesn't
correspond TRM for dra7/am57 SoCs.
CPTS: has to be sourced from gmac_rft_clk_mux clock
CPSW: DPLL_GMAC -> CLKOUT_M2 -> GMAC_250M_CLK -> 1/2 ->
-> GMAC_MAIN_CLK (125 MHZ)
Hence, correct clock tree for GMAC_MAIN_CLK and use proper
clock for CPTS. This also require updating of CPTS clock
multiplier.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra7xx-clocks.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/dra7xx-clocks.dtsi | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index 3f0c61dcd8eb..3330738e4c6e 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -1003,6 +1003,14 @@ ti,index-power-of-two; }; + gmac_main_clk: gmac_main_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&gmac_250m_dclk_div>; + clock-mult = <1>; + clock-div = <2>; + }; + l3init_480m_dclk_div: l3init_480m_dclk_div@1ac { #clock-cells = <0>; compatible = "ti,divider-clock"; @@ -1726,14 +1734,6 @@ reg = <0x13d0>; }; - gmac_gmii_ref_clk_div: gmac_gmii_ref_clk_div { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&dpll_gmac_m2_ck>; - clock-mult = <1>; - clock-div = <2>; - }; - gmac_rft_clk_mux: gmac_rft_clk_mux@13d0 { #clock-cells = <0>; compatible = "ti,mux-clock"; |