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authorRalf Baechle <ralf@linux-mips.org>2013-05-21 14:05:27 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-05-22 01:34:26 +0200
commitfb40bc3e94933007d3e42e96daf1ec8044821cb8 (patch)
tree417d3c2cbd639aa3ccc3f77cd019d962f7be08df
parentc9b6869dbb3c6edb24e3cc76d3655067cfa7b802 (diff)
MIPS: Idle: Re-enable irqs at the end of r3081, au1k and loongson2 cpu_wait.
Without this, the WARN_ON_ONCE(irqs_disabled()); in the idle loop will be triggered. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/kernel/idle.c2
-rw-r--r--drivers/cpufreq/loongson2_cpufreq.c1
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index 36e79f528e89..78cc7d6fc845 100644
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -34,6 +34,7 @@ static void r3081_wait(void)
{
unsigned long cfg = read_c0_conf();
write_c0_conf(cfg | R30XX_CONF_HALT);
+ local_irq_enable();
}
static void r39xx_wait(void)
@@ -109,6 +110,7 @@ static void au1k_wait(void)
" nop \n"
" .set mips0 \n"
: : "r" (au1k_wait));
+ local_irq_enable();
}
static int __initdata nowait;
diff --git a/drivers/cpufreq/loongson2_cpufreq.c b/drivers/cpufreq/loongson2_cpufreq.c
index 84889573b566..868976d443a6 100644
--- a/drivers/cpufreq/loongson2_cpufreq.c
+++ b/drivers/cpufreq/loongson2_cpufreq.c
@@ -200,6 +200,7 @@ static void loongson2_cpu_wait(void)
LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */
spin_unlock_irqrestore(&loongson2_wait_lock, flags);
+ local_irq_enable();
}
static int __init cpufreq_init(void)