diff options
| author | Jayachandran C <jayachandranc@netlogicmicro.com> | 2011-08-23 13:35:51 +0530 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2011-12-07 22:04:54 +0000 |
| commit | b66f953cd00e7c309c33ea35acd95b13a027050f (patch) | |
| tree | ea1e3d5cb030044b536d53d086b4ae6ba6abff89 | |
| parent | 11d48aace2e47617eeb1fe8a4a073e40e6d480aa (diff) | |
MIPS: Netlogic: Avoid unnecessary cache flushes
XLR dcache is fully coherent across CPUs, so avoid unnecessary dcache
flushes.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2729/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h b/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h index 3b728275b9b0..3780743a74b2 100644 --- a/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h @@ -25,13 +25,12 @@ #define cpu_has_llsc 1 #define cpu_has_vtag_icache 0 #define cpu_has_dc_aliases 0 -#define cpu_has_ic_fills_f_dc 0 +#define cpu_has_ic_fills_f_dc 1 #define cpu_has_dsp 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 -#define cpu_icache_snoops_remote_store 0 +#define cpu_icache_snoops_remote_store 1 -#define cpu_has_nofpuex 0 #define cpu_has_64bits 1 #define cpu_has_mips32r1 1 |