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authorrander.wang <rander.wang@intel.com>2017-06-15 09:47:35 +0800
committerYang Rong <rong.r.yang@intel.com>2017-06-16 16:34:32 +0800
commit21af2ef495dd51924a238d3fce1bd7e8eb09c491 (patch)
treeffcff2c9a120ff63d9c85eb1d71bb55354a707de
parent79b8dd9ac8af9edaf65659d8ee95ba09a34fcd51 (diff)
backend: refine the local copy propagation.
src modifier is not supported by some instructions. so return false when it exists. This fix piglit % scalar-arithmetic-int failed V2: (1)add hadd rhadd (2)confirmed math functions support midifer except IDIV/Mod Signed-off-by: rander.wang <rander.wang@intel.com> Reviewed-by: Yang Rong <rong.r.yang@intel.com>
-rw-r--r--backend/src/backend/gen_insn_selection_optimize.cpp34
1 files changed, 34 insertions, 0 deletions
diff --git a/backend/src/backend/gen_insn_selection_optimize.cpp b/backend/src/backend/gen_insn_selection_optimize.cpp
index 07547ec4..af5ecc2b 100644
--- a/backend/src/backend/gen_insn_selection_optimize.cpp
+++ b/backend/src/backend/gen_insn_selection_optimize.cpp
@@ -189,6 +189,40 @@ namespace gbe
if (insn.opcode == SEL_OP_BSWAP) //should remove once bswap issue is fixed
return false;
+ //the src modifier is not supported by the following instructions
+ if(info->replacement.negation || info->replacement.absolute)
+ {
+ switch(insn.opcode)
+ {
+ case SEL_OP_MATH:
+ {
+ switch(insn.extra.function)
+ {
+ case GEN_MATH_FUNCTION_INT_DIV_QUOTIENT:
+ case GEN_MATH_FUNCTION_INT_DIV_REMAINDER:
+ case GEN_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER:
+ return false;
+ default:
+ break;
+ }
+
+ break;
+ }
+ case SEL_OP_CBIT:
+ case SEL_OP_FBH:
+ case SEL_OP_FBL:
+ case SEL_OP_BRC:
+ case SEL_OP_BRD:
+ case SEL_OP_BFREV:
+ case SEL_OP_LZD:
+ case SEL_OP_HADD:
+ case SEL_OP_RHADD:
+ return false;
+ default:
+ break;
+ }
+ }
+
if (insn.isWrite() || insn.isRead()) //register in selection vector
return false;