| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2006-03-27 | [IA64] optimize flush_tlb_range on large numa box | Chen, Kenneth W | 1 | -5/+7 |
| 2006-01-13 | [IA64] Hole in IA64 TLB flushing from system threads | Jack Steiner | 1 | -1/+1 |
| 2005-11-03 | [IA64] make mmu_context.h and tlb.c 80-column friendly | Chen, Kenneth W | 1 | -15/+18 |
| 2005-10-31 | [IA64] Use bitmaps for efficient context allocation/free | Peter Keilty | 1 | -29/+27 |
| 2005-10-29 | [PATCH] mm: flush_tlb_range outside ptlock | Hugh Dickins | 1 | -0/+2 |
| 2005-10-28 | Pull fix-slow-tlb-purge into release branch | Tony Luck | 1 | -7/+9 |
| 2005-10-27 | [IA64] - Avoid slow TLB purges on SGI Altix systems | Dean Roe | 1 | -7/+9 |
| 2005-10-25 | [IA64] wider use of for_each_cpu_mask() in arch/ia64 | hawkes@sgi.com | 1 | -2/+3 |
| 2005-04-16 | Linux-2.6.12-rc2 | Linus Torvalds | 1 | -0/+190 |
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index : amd/drm-amd | |
| Kernel display support for AMD GPUs | agd5f |
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