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authorAndre Przywara <andre.przywara@arm.com>2014-11-13 16:21:35 +0000
committerChristoffer Dall <christoffer.dall@linaro.org>2015-01-20 18:25:30 +0100
commit9fedf146778e6d1c26319ebaf56131a4f3a6be03 (patch)
treee573eca5d001e396134f2bd2afd596ebbc4f479f /virt/kvm/arm
parent1d916229e348c628ddc9cf97528e76d13f52c122 (diff)
arm/arm64: KVM: add opaque private pointer to MMIO data
For a GICv2 there is always only one (v)CPU involved: the one that does the access. On a GICv3 the access to a CPU redistributor is memory-mapped, but not banked, so the (v)CPU affected is determined by looking at the MMIO address region being accessed. To allow passing the affected CPU into the accessors later, extend struct kvm_exit_mmio to add an opaque private pointer parameter. The current GICv2 emulation just does not use it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'virt/kvm/arm')
-rw-r--r--virt/kvm/arm/vgic.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 0e84292c2197..b6e17c886ce2 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm/vgic.c
@@ -709,6 +709,7 @@ static bool call_range_handler(struct kvm_vcpu *vcpu,
mmio32.len = 4;
mmio32.is_write = mmio->is_write;
+ mmio32.private = mmio->private;
mmio32.phys_addr = mmio->phys_addr + 4;
if (mmio->is_write)