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author | Chris Metcalf <cmetcalf@tilera.com> | 2013-08-09 16:09:41 -0400 |
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committer | Chris Metcalf <cmetcalf@tilera.com> | 2013-08-30 11:56:34 -0400 |
commit | abe3265a6d2e5e805361e0fea3346622f3199d68 (patch) | |
tree | ff4c4463c2715fc06a62916a4a9d5fa28c996214 /arch/tile/include/asm/fixmap.h | |
parent | 6f0142d501b35468d910b9f36b6853dbd8dc5ad5 (diff) |
tile: do less L1 I-cache eviction
We had been doing an automatic full eviction of the L1 I$
everywhere whenever we did a kernel-space TLB flush. It turns
out this isn't necessary, since all the callers already handle
doing a flush if necessary.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include/asm/fixmap.h')
0 files changed, 0 insertions, 0 deletions