diff options
| author | Liu Yu <yu.liu@freescale.com> | 2011-09-05 17:01:22 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-10-06 23:36:44 -0500 |
| commit | d5755e6f3a412f012377e28b655d89eff3311f1c (patch) | |
| tree | 5e0cf2e457508c34bee70418d05b3cebcdb9c686 /arch/powerpc/math-emu | |
| parent | b430abc4d10537992a5ba38eff6c46b3c9009a19 (diff) | |
powerpc/math_emu/efp: No need to round if the result is exact
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/math-emu')
| -rw-r--r-- | arch/powerpc/math-emu/math_efp.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/powerpc/math-emu/math_efp.c b/arch/powerpc/math-emu/math_efp.c index 10fda0f13a00..96dbbae1a590 100644 --- a/arch/powerpc/math-emu/math_efp.c +++ b/arch/powerpc/math-emu/math_efp.c @@ -676,13 +676,20 @@ int speround_handler(struct pt_regs *regs) type = insn_type(speinsn & 0x7ff); if (type == XCR) return -ENOSYS; + __FPU_FPSCR = mfspr(SPRN_SPEFSCR); + pr_debug("speinsn:%08lx spefscr:%08lx\n", speinsn, __FPU_FPSCR); + + /* No need to round if the result is exact */ + if (!(__FPU_FPSCR & FP_EX_INEXACT)) + return 0; + fc = (speinsn >> 21) & 0x1f; s_lo = regs->gpr[fc] & SIGN_BIT_S; s_hi = current->thread.evr[fc] & SIGN_BIT_S; fgpr.wp[0] = current->thread.evr[fc]; fgpr.wp[1] = regs->gpr[fc]; - __FPU_FPSCR = mfspr(SPRN_SPEFSCR); + pr_debug("round fgpr: %08x %08x\n", fgpr.wp[0], fgpr.wp[1]); switch ((speinsn >> 5) & 0x7) { /* Since SPE instructions on E500 core can handle round to nearest @@ -722,6 +729,8 @@ int speround_handler(struct pt_regs *regs) current->thread.evr[fc] = fgpr.wp[0]; regs->gpr[fc] = fgpr.wp[1]; + pr_debug(" to fgpr: %08x %08x\n", fgpr.wp[0], fgpr.wp[1]); + return 0; } |