Revert "i965: initialize all states on sandybridge"sandybridge-with-anholt

This reverts commit 89757e82f81aedf4820d61e33a9e3f20b67a5ca0.

1 files changed, 0 insertions, 282 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 20fb060eb82..b1a7cd3e155 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -483,284 +483,6 @@ const struct brw_tracked_state brw_line_stipple = {
 };
 
 
-/* Try to init all states... */
-static void gen6_init_state(struct brw_context *brw)
-{
-   struct intel_context *intel = &brw->intel;
-   int i;
-
-   intel_batchbuffer_emit_mi_flush(intel->batch);
-
-   {
-      /* 0x61040000  Pipeline Select */
-      /*     PipelineSelect            : 0 */
-      struct brw_pipeline_select ps;
-
-      memset(&ps, 0, sizeof(ps));
-      ps.header.opcode = brw->CMD_PIPELINE_SELECT;
-      ps.header.pipeline_select = 0;
-      BRW_BATCH_STRUCT(brw, &ps);
-   }
-
-   {
-       BEGIN_BATCH(10);
-       OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (10 - 2));
-       OUT_BATCH(1); /* General state base address */
-       OUT_RELOC(intel->batch->buf, I915_GEM_DOMAIN_SAMPLER, 0,
-		 1); /* Surface state base address */
-       OUT_BATCH(1); /* Dynamic state base address */
-       OUT_BATCH(1); /* Indirect object base address */
-       OUT_BATCH(1); /* Instruction base address */
-       OUT_BATCH(1); /* General state upper bound */
-       OUT_BATCH(1); /* Dynamic state upper bound */
-       OUT_BATCH(1); /* Indirect object upper bound */
-       OUT_BATCH(1); /* Instruction access upper bound */
-       ADVANCE_BATCH();
-   }
-   
-   /* 0x61020000  State Instruction Pointer */
-   {
-      struct brw_system_instruction_pointer sip;
-      memset(&sip, 0, sizeof(sip));
-
-      sip.header.opcode = CMD_STATE_INSN_POINTER;
-      sip.header.length = 0;
-      sip.bits0.pad = 0;
-      sip.bits0.system_instruction_pointer = 0;
-      BRW_BATCH_STRUCT(brw, &sip);
-   }
-
-   {
-      BEGIN_BATCH(7);
-      OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (7 - 2));
-      OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) |
-		(BRW_SURFACE_NULL << 29));
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(4);
-       OUT_BATCH(_3DSTATE_DRAWRECT_INFO_I965);
-       OUT_BATCH(0); /* xmin, ymin */
-       OUT_BATCH(((8192 - 1) & 0xffff) |
-	         ((8192 - 1) << 16));
-       OUT_BATCH(0);
-       ADVANCE_BATCH();
-   }
-
-   {
-      for (i = 0; i < 4; i++) {
-	 BEGIN_BATCH(4);
-	 OUT_BATCH(CMD_GS_SVB_INDEX << 16 | (4 - 2));
-	 OUT_BATCH(i << SVB_INDEX_SHIFT);
-	 OUT_BATCH(0);
-	 OUT_BATCH(0xffffffff);
-	 ADVANCE_BATCH();
-      }
-   }
-
-   {
-      BEGIN_BATCH(3);
-      OUT_BATCH(CMD_3D_MULTISAMPLE << 16 | (3 - 2));
-      OUT_BATCH(MS_PIXEL_LOCATION_CENTER |
-		MS_NUMSAMPLES_1);
-      OUT_BATCH(0); /* positions for 4/8-sample */
-      ADVANCE_BATCH();
-   }
-
-   {
-      BEGIN_BATCH(2);
-      OUT_BATCH(CMD_3D_SAMPLE_MASK << 16 | (2 - 2));
-      OUT_BATCH(1);
-      ADVANCE_BATCH();
-   }
-
-   {
-	BEGIN_BATCH(3);
-	OUT_BATCH(CMD_INDEX_BUFFER << 16 | 1);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	ADVANCE_BATCH();
-   }
-
-   {
-	BEGIN_BATCH(4*33 + 1);
-	OUT_BATCH(CMD_VERTEX_BUFFER << 16 | (4 * 33 - 1));
-	for (i = 0; i < 33; i++) {
-		OUT_BATCH(i << GEN6_VB0_INDEX_SHIFT);
-		OUT_BATCH(0);
-		OUT_BATCH(0);
-		OUT_BATCH(0);
-	}
-	ADVANCE_BATCH();
-   }
-
-   {	
-        BEGIN_BATCH(6);
-	OUT_BATCH(CMD_3D_VS_STATE << 16 | 4);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	ADVANCE_BATCH();
-   }
-
-   {
-	BEGIN_BATCH(5);
-	OUT_BATCH(CMD_3D_CONSTANT_VS_STATE << 16 | 3);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	ADVANCE_BATCH();
-   }
-
-   {
-	BEGIN_BATCH(7);
-	OUT_BATCH(CMD_3D_GS_STATE << 16 | 5);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-	ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(5);
-       OUT_BATCH(CMD_3D_CONSTANT_GS_STATE << 16 | (5 - 2));
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(4);
-       OUT_BATCH(CMD_3D_CLIP_STATE << 16 | (4 - 2));
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(20);
-       OUT_BATCH(CMD_3D_SF_STATE << 16 | (20 - 2));
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-
-       OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
-       OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
-       OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(9);
-       OUT_BATCH(CMD_3D_WM_STATE << 16 | (9 - 2));
-       OUT_BATCH(0); /* scratch space base offset */
-       OUT_BATCH(0);
-       OUT_BATCH(0); /* scratch space base offset */
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0); /* kernel 1 pointer */
-       OUT_BATCH(0); /* kernel 2 pointer */
-       ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(5);
-       OUT_BATCH(CMD_3D_CONSTANT_PS_STATE << 16 |
-	       (5 - 2));
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(4);
-       OUT_BATCH(CMD_3D_CC_STATE_POINTERS << 16 | (4 - 2));
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(4);
-       OUT_BATCH(CMD_3D_SAMPLER_STATE_POINTERS << 16 |
-	       (4 - 2));
-       OUT_BATCH(0); /* VS */
-       OUT_BATCH(0); /* GS */
-       OUT_BATCH(0);
-       ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(4);
-       OUT_BATCH(CMD_VIEWPORT_STATE_POINTERS << 16 | (4 - 2));
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       OUT_BATCH(0);
-       ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(2);
-       OUT_BATCH(CMD_3D_SCISSOR_STATE_POINTERS << 16 | (2 - 2));
-       OUT_BATCH(0);
-       ADVANCE_BATCH();
-   }
-
-   {
-       BEGIN_BATCH(4);
-       OUT_BATCH(CMD_BINDING_TABLE_PTRS << 16 |
-	       (4 - 2));
-       OUT_BATCH(0); /* vs */
-       OUT_BATCH(0); /* gs */
-       OUT_BATCH(0); /* must be zero? */ 
-       ADVANCE_BATCH(); 
-   }
-
-   {
-       BEGIN_BATCH(3);
-       OUT_BATCH(CMD_URB << 16 | (3 - 2));
-       OUT_BATCH(0); /* must be zero? */ 
-       OUT_BATCH(0); /* must be zero? */ 
-       ADVANCE_BATCH();
-   }
-
-   intel_batchbuffer_emit_mi_flush(intel->batch);
-}
-
 /***********************************************************************
  * Misc invarient state packets
  */
@@ -769,10 +491,6 @@ static void upload_invarient_state( struct brw_context *brw )
 {
    struct intel_context *intel = &brw->intel;
 
-   /* XXX need to find out which state needs to be initialized...*/
-   if (intel->gen >= 6)
-	gen6_init_state(brw);
-
    {
       /* 0x61040000  Pipeline Select */
       /*     PipelineSelect            : 0 */