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authorXiang, Haihao <haihao.xiang@intel.com>2013-09-11 11:05:03 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2013-09-23 10:43:52 +0800
commitd2512dededcc45e27957b597a9379450aa755cab (patch)
treeca6f9f3820590ee15fd118133b802a26ae5f7f58
parent2de479ab5fc1bd03e3669da66311368d370c43f2 (diff)
VPP: move the BO for STMM into sub-contexts
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit 6ce827df0a9d6cb841308813ec54a019e3c63d37)
-rwxr-xr-xsrc/i965_post_processing.c65
-rwxr-xr-xsrc/i965_post_processing.h6
2 files changed, 36 insertions, 35 deletions
diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index 6a2bafe..4bd0a4b 100755
--- a/src/i965_post_processing.c
+++ b/src/i965_post_processing.c
@@ -3217,12 +3217,12 @@ pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_contex
w = obj_surface->width;
h = obj_surface->height;
- if (pp_context->stmm.bo == NULL) {
- pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr,
- "STMM surface",
- w * h,
- 4096);
- assert(pp_context->stmm.bo);
+ if (pp_dndi_context->stmm_bo == NULL) {
+ pp_dndi_context->stmm_bo = dri_bo_alloc(i965->intel.bufmgr,
+ "STMM surface",
+ w * h,
+ 4096);
+ assert(pp_dndi_context->stmm_bo);
}
/* source UV surface index 2 */
@@ -3241,7 +3241,7 @@ pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_contex
/* source STMM surface index 20 */
i965_pp_set_surface_state(ctx, pp_context,
- pp_context->stmm.bo, 0,
+ pp_dndi_context->stmm_bo, 0,
orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
20, 1);
@@ -3424,12 +3424,12 @@ pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context
w = obj_surface->width;
h = obj_surface->height;
- if (pp_context->stmm.bo == NULL) {
- pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr,
- "STMM surface",
- w * h,
- 4096);
- assert(pp_context->stmm.bo);
+ if (pp_dn_context->stmm_bo == NULL) {
+ pp_dn_context->stmm_bo = dri_bo_alloc(i965->intel.bufmgr,
+ "STMM surface",
+ w * h,
+ 4096);
+ assert(pp_dn_context->stmm_bo);
}
/* source UV surface index 2 */
@@ -3448,7 +3448,7 @@ pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context
/* source STMM surface index 20 */
i965_pp_set_surface_state(ctx, pp_context,
- pp_context->stmm.bo, 0,
+ pp_dn_context->stmm_bo, 0,
orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
20, 1);
@@ -3616,12 +3616,12 @@ gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_c
w = obj_surface->width;
h = obj_surface->height;
- if (pp_context->stmm.bo == NULL) {
- pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr,
- "STMM surface",
- w * h,
- 4096);
- assert(pp_context->stmm.bo);
+ if (pp_dndi_context->stmm_bo == NULL) {
+ pp_dndi_context->stmm_bo = dri_bo_alloc(i965->intel.bufmgr,
+ "STMM surface",
+ w * h,
+ 4096);
+ assert(pp_dndi_context->stmm_bo);
}
/* source UV surface index 1 */
@@ -3648,7 +3648,7 @@ gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_c
/* STMM / History Statistics input surface, index 5 */
gen7_pp_set_surface_state(ctx, pp_context,
- pp_context->stmm.bo, 0,
+ pp_dndi_context->stmm_bo, 0,
orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
5, 1);
@@ -3685,7 +3685,7 @@ gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_c
/* STMM output surface, index 33 */
gen7_pp_set_surface_state(ctx, pp_context,
- pp_context->stmm.bo, 0,
+ pp_dndi_context->stmm_bo, 0,
orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
33, 1);
@@ -3863,12 +3863,12 @@ gen7_pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_con
w = obj_surface->width;
h = obj_surface->height;
- if (pp_context->stmm.bo == NULL) {
- pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr,
- "STMM surface",
- w * h,
- 4096);
- assert(pp_context->stmm.bo);
+ if (pp_dn_context->stmm_bo == NULL) {
+ pp_dn_context->stmm_bo= dri_bo_alloc(i965->intel.bufmgr,
+ "STMM surface",
+ w * h,
+ 4096);
+ assert(pp_dn_context->stmm_bo);
}
/* source UV surface index 1 */
@@ -3895,7 +3895,7 @@ gen7_pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_con
/* STMM / History Statistics input surface, index 5 */
gen7_pp_set_surface_state(ctx, pp_context,
- pp_context->stmm.bo, 0,
+ pp_dn_context->stmm_bo, 0,
orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
33, 1);
@@ -5255,8 +5255,11 @@ i965_post_processing_context_finalize(struct i965_post_processing_context *pp_co
dri_bo_unreference(pp_context->vfe_state.bo);
pp_context->vfe_state.bo = NULL;
- dri_bo_unreference(pp_context->stmm.bo);
- pp_context->stmm.bo = NULL;
+ dri_bo_unreference(pp_context->pp_dndi_context.stmm_bo);
+ pp_context->pp_dndi_context.stmm_bo = NULL;
+
+ dri_bo_unreference(pp_context->pp_dn_context.stmm_bo);
+ pp_context->pp_dn_context.stmm_bo = NULL;
for (i = 0; i < NUM_PP_MODULES; i++) {
struct pp_module *pp_module = &pp_context->pp_modules[i];
diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h
index 60e040f..fbe684c 100755
--- a/src/i965_post_processing.h
+++ b/src/i965_post_processing.h
@@ -94,12 +94,14 @@ struct pp_dndi_context
{
int dest_w;
int dest_h;
+ dri_bo *stmm_bo;
};
struct pp_dn_context
{
int dest_w;
int dest_h;
+ dri_bo *stmm_bo;
};
struct i965_post_processing_context;
@@ -472,10 +474,6 @@ struct i965_post_processing_context
unsigned int size_cs_entry;
} urb;
- struct {
- dri_bo *bo;
- } stmm;
-
struct pp_load_save_context pp_load_save_context;
struct pp_scaling_context pp_scaling_context;
struct pp_avs_context pp_avs_context;