Fix several typo in code comments

13 files changed, 21 insertions, 21 deletions

diff --git a/src/via.h b/src/via.h
index 5f74a8e..9d886d5 100644
--- a/src/via.h
+++ b/src/via.h
@@ -34,7 +34,7 @@
 
 /* Video Engines */
 #define VIDEO_ENGINE_UNK	0 /* Unknown video engine */
-#define VIDEO_ENGINE_CLE	1 /* CLE First generaion video engine */
+#define VIDEO_ENGINE_CLE	1 /* CLE First generation video engine */
 #define VIDEO_ENGINE_CME	2 /* CME Second generation video engine */
 
 /* Video status flag */
diff --git a/src/via_accel.c b/src/via_accel.c
index 44c0cfa..f61e142 100644
--- a/src/via_accel.c
+++ b/src/via_accel.c
@@ -2372,7 +2372,7 @@ viaInitExa(ScreenPtr pScreen)
 
 
 /*
- * Acceleration initializatuon function. Sets up offscreen memory disposition,
+ * Acceleration initialization function. Sets up offscreen memory disposition,
  * and initializes engines and acceleration method.
  */
 Bool
diff --git a/src/via_crtc.c b/src/via_crtc.c
index 65c1db8..bd5edb3 100644
--- a/src/via_crtc.c
+++ b/src/via_crtc.c
@@ -341,7 +341,7 @@ ViaFirstCRTCSetStartingAddress(ScrnInfoPtr pScrn, int x, int y)
     /* FIXME The proper starting address for CR48 is 0x1F - Bits[28:24] */
     if (!(pVia->Chipset == VIA_CLE266 && CLE266_REV_IS_AX(pVia->ChipRev)))
         ViaCrtcMask(hwp, 0x48, Base >> 24, 0x0F);
-    /* CR34 are fire bits. Must be writed after CR0C CR0D CR48.  */
+    /* CR34 are fire bits. Must be written after CR0C CR0D CR48.  */
     hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16);
 
 
diff --git a/src/via_cursor.c b/src/via_cursor.c
index c1d010b..2e3ab6f 100644
--- a/src/via_cursor.c
+++ b/src/via_cursor.c
@@ -324,7 +324,7 @@ viaShowCursor(ScrnInfoPtr pScrn)
             /* Duoview */
 	    if (pVia->CursorPipe) {
                 /* Mono Cursor Display Path [bit31]: Secondary */
-                /* FIXME For CLE266 nad KM400 try to enable 32x32 cursor size [bit1] */
+                /* FIXME For CLE266 and KM400 try to enable 32x32 cursor size [bit1] */
                 VIASETREG(VIA_REG_ALPHA_CONTROL, 0xF6000005);
             } else {
                 /* Mono Cursor Display Path [bit31]: Primary */
@@ -500,7 +500,7 @@ viaLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
 
 /*
     Set the cursor foreground and background colors.  In 8bpp, fg and
-    bg are indicies into the current colormap unless the 
+    bg are indices into the current colormap unless the 
     HARDWARE_CURSOR_TRUECOLOR_AT_8BPP flag is set.  In that case
     and in all other bpps the fg and bg are in 8-8-8 RGB format.
 */
diff --git a/src/via_dri.c b/src/via_dri.c
index 24aa4a7..e9a40cd 100644
--- a/src/via_dri.c
+++ b/src/via_dri.c
@@ -187,7 +187,7 @@ VIADRIRingBufferInit(ScrnInfoPtr pScrn)
             return FALSE;
 
         /*
-         * Info frome code-snippet on DRI-DEVEL list; Erdi Chen.
+         * Info from code-snippet on DRI-DEVEL list; Erdi Chen.
          */
 
         switch (pVia->ChipId) {
diff --git a/src/via_driver.c b/src/via_driver.c
index 77f938c..71dd52a 100644
--- a/src/via_driver.c
+++ b/src/via_driver.c
@@ -657,7 +657,7 @@ VIAProbeDDC(ScrnInfoPtr pScrn, int index)
     vbeInfoPtr pVbe;
 
     if (xf86LoadSubModule(pScrn, "vbe")) {
-        /* FIXME This line should be replaced to:
+        /* FIXME This line should be replaced with:
 
            pVbe = VBEExtendedInit(NULL, index, 0);
 
@@ -2056,7 +2056,7 @@ VIASave(ScrnInfoPtr pScrn)
         Regs->CR0D = hwp->readCrtc(hwp, 0x0D);
         /* Starting Address Overflow Bits[28:24] */
         Regs->CR48 = hwp->readCrtc(hwp, 0x48);
-        /* CR34 are fire bits. Must be writed after CR0C CR0D CR48.  */
+        /* CR34 are fire bits. Must be written after CR0C CR0D CR48.  */
         /* Starting Address Overflow Bits[23:16] */
         Regs->CR34 = hwp->readCrtc(hwp, 0x34);
 
@@ -2121,15 +2121,15 @@ VIARestore(ScrnInfoPtr pScrn)
     /* Unlock extended registers. */
     hwp->writeSeq(hwp, 0x10, 0x01);
 
-    /*=* CR6A, CR6B, CR6C must be reset before restore
-         standard vga regs, or system will be hang. *=*/
+    /*=* CR6A, CR6B, CR6C must be reset before restoring
+         standard vga regs, or system will hang. *=*/
     /*=* TODO Check is reset IGA2 channel before disable IGA2 channel
-         is neccesery or it may cause some line garbage. *=*/
+         is necessary or it may cause some line garbage. *=*/
     hwp->writeCrtc(hwp, 0x6A, 0x00);
     hwp->writeCrtc(hwp, 0x6B, 0x00);
     hwp->writeCrtc(hwp, 0x6C, 0x00);
     
-    /* Gamma must disable before restore pallette */
+    /* Gamma must be disabled before restoring palette */
     ViaGammaDisable(pScrn);
 
     if (pBIOSInfo->TVI2CDev)
@@ -2227,7 +2227,7 @@ VIARestore(ScrnInfoPtr pScrn)
     hwp->writeCrtc(hwp, 0x0D, Regs->CR0D);
     /* Starting Address Overflow Bits[28:24] */
     hwp->writeCrtc(hwp, 0x48, Regs->CR48);
-    /* CR34 are fire bits. Must be writed after CR0C CR0D CR48.  */
+    /* CR34 are fire bits. Must be written after CR0C CR0D CR48.  */
     /* Starting Address Overflow Bits[23:16] */
     hwp->writeCrtc(hwp, 0x34, Regs->CR34);
     
diff --git a/src/via_driver.h b/src/via_driver.h
index 1f6d441..4c99cf9 100644
--- a/src/via_driver.h
+++ b/src/via_driver.h
@@ -143,7 +143,7 @@ typedef struct {
 } VIARegRec, *VIARegPtr;
 
 /*
- * varables that need to be shared among different screens.
+ * variables that need to be shared among different screens.
  */
 typedef struct {
     Bool b3DRegsInitialized;
@@ -437,7 +437,7 @@ typedef struct
     Bool HasSecondary;
     Bool BypassSecondary;
     /*These two registers are used to make sure the CRTC2 is
-      retored before CRTC_EXT, otherwise it could lead to blank screen.*/
+      restored before CRTC_EXT, otherwise it could lead to blank screen.*/
     Bool IsSecondaryRestored;
     Bool RestorePrimary;
 
diff --git a/src/via_lvds.c b/src/via_lvds.c
index 90c089a..03a79b3 100644
--- a/src/via_lvds.c
+++ b/src/via_lvds.c
@@ -42,7 +42,7 @@
             2^13 X 0.0698uSec [1/14.318MHz] = 8192 X 0.0698uSec =572.1uSec
             Timer = Counter x 572 uSec
         2. Note:
-            0.0698 uSec is too small to compute for hardware. So we multify a 
+            0.0698 uSec is too small to compute for hardware. So we multiply a 
             reference value(2^13) to make it big enough to compute for hardware.
         3. Note:
             The meaning of the TD0~TD3 are count of the clock. 
diff --git a/src/via_mode.c b/src/via_mode.c
index 7b84562..37ef7ba 100644
--- a/src/via_mode.c
+++ b/src/via_mode.c
@@ -1078,7 +1078,7 @@ VIASetLCDMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
             pBIOSInfo->Clock = Table.InitTb.LCDClk_12Bit;
         else {
             pBIOSInfo->Clock = Table.InitTb.VClk_12Bit;
-            /* for some reason still to be defined this is neccessary */
+            /* for some reason still to be defined this is necessary */
             ViaSetSecondaryDotclock(pScrn, Table.InitTb.LCDClk_12Bit);
         }
     } else {
diff --git a/src/via_panel.c b/src/via_panel.c
index de75f10..2df00c7 100644
--- a/src/via_panel.c
+++ b/src/via_panel.c
@@ -356,7 +356,7 @@ ViaPanelCenterMode(DisplayModePtr centerMode, DisplayModePtr panelMode,
 
 
 /*
- * Try to interprete EDID ourselves.
+ * Try to interpret EDID ourselves.
  */
 Bool
 ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon,
diff --git a/src/via_swov.h b/src/via_swov.h
index 1441a18..5d735a7 100644
--- a/src/via_swov.h
+++ b/src/via_swov.h
@@ -53,7 +53,7 @@ typedef struct __VIAHWDiff
 {
     unsigned long dwThreeHQVBuffer;    /* Use Three HQV Buffers */
     /* unsigned long dwV3SrcHeightSetting; *//* Set Video Source Width and Height */
-    /* unsigned long dwSupportExtendFIFO; *//* Support Extand FIFO */
+    /* unsigned long dwSupportExtendFIFO; *//* Support Extend FIFO */
     unsigned long dwHQVFetchByteUnit;  /* HQV Fetch Count unit is byte */
     unsigned long dwHQVInitPatch;      /* Initialize HQV Engine 2 times */
     /*unsigned long dwSupportV3Gamma; *//* Support V3 Gamma */
diff --git a/src/via_timing.h b/src/via_timing.h
index 85c1da4..33f90a4 100644
--- a/src/via_timing.h
+++ b/src/via_timing.h
@@ -40,7 +40,7 @@
 #define TIMING_CVT_WARN_REFRESH_RATE_NOT_RB 1 << 3
 
 /**
- * Geneartes a CVT modeline
+ * Generates a CVT modeline
  * mode must not be null, if mode->name is null a new char* will be allocated. 
  * 
  */
diff --git a/src/via_xvmc.c b/src/via_xvmc.c
index a35a44a..a0c54e2 100644
--- a/src/via_xvmc.c
+++ b/src/via_xvmc.c
@@ -270,7 +270,7 @@ static XF86ImagePtr Via_subpicture_list[2] = {
 /* 
  * Filling in the device dependent adaptor record. 
  * This is named "VIA Video Overlay" because this code falls under the
- * XV extenstion, the name must match or it won't be used.
+ * XV extension, the name must match or it won't be used.
  *
  * For surface and subpicture, see above.
  * The function pointers point to functions below.