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authorBartosz Kosiorek <gang65@poczta.onet.pl>2010-12-15 23:45:59 +0000
committerBartosz Kosiorek <gang65@poczta.onet.pl>2010-12-15 23:45:59 +0000
commitad887ddc9b638b87de474884b2477fdfbc59579e (patch)
tree9f13b5f02f4adb31195b96127b3162c5561f09e8
parentb9f239eac6e87139e8882b65cded51da96902cce (diff)
Merge VX900 branch to add basic VX900 support
-rw-r--r--ChangeLog28
-rw-r--r--src/via_accel.c32
-rw-r--r--src/via_bandwidth.c25
-rw-r--r--src/via_bios.h4
-rw-r--r--src/via_crtc.c5
-rw-r--r--src/via_cursor.c15
-rw-r--r--src/via_driver.c42
-rw-r--r--src/via_driver.h2
-rw-r--r--src/via_id.c3
-rw-r--r--src/via_id.h2
-rw-r--r--src/via_mode.c23
-rw-r--r--src/via_mode.h1
-rw-r--r--src/via_panel.c24
-rw-r--r--src/via_video.c10
-rw-r--r--src/via_xvmc.c5
15 files changed, 189 insertions, 32 deletions
diff --git a/ChangeLog b/ChangeLog
index c597424..194a41a 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,31 @@
+2010-12-16 Bartosz Kosiorek <gang65@poczta.onet.pl>
+
+ Merge vx900_branch - initial VX900 support
+
+ * src/via_accel.c: (viaFlushPCI), (viaDisableVQ),
+ (viaInitialize2DEngine), (viaAccelSync), (viaPitchHelper),
+ (viaInitXAA):
+ * src/via_bandwidth.c: (ViaSetPrimaryFIFO), (ViaSetSecondaryFIFO):
+ * src/via_bios.h:
+ * src/via_crtc.c: (ViaFirstCRTCSetMode), (ViaSecondCRTCSetMode):
+ * src/via_cursor.c: (viaHWCursorInit), (viaCursorStore),
+ (viaCursorRestore), (viaShowCursor), (viaHideCursor),
+ (viaSetCursorPosition), (viaLoadCursorImage), (viaSetCursorColors):
+ * src/via_driver.c: (VIASetupDefaultOptions), (VIAPreInit),
+ (VIALeaveVT), (VIASave), (VIARestore), (ViaMMIOEnable),
+ (ViaMMIODisable), (VIAMapFB), (VIAWriteMode), (VIACloseScreen):
+ * src/via_driver.h:
+ * src/via_id.c:
+ * src/via_id.h:
+ * src/via_mode.c: (ViaDFPDetect), (ViaOutputsDetect),
+ (ViaOutputsSelect), (ViaGetMemoryBandwidth), (ViaSetDotclock),
+ (ViaModeSet):
+ * src/via_mode.h:
+ * src/via_panel.c: (ViaPanelScaleDisable), (ViaPanelPreInit),
+ (ViaPanelGetSizeFromDDC):
+ * src/via_video.c: (DecideOverlaySupport):
+ * src/via_xvmc.c: (ViaInitXVMC):
+
2010-12-15 Bartosz Kosiorek <gang65@poczta.onet.pl>
Enable the new mode switch and panel support on K8M800 and VM800 chipsets
diff --git a/src/via_accel.c b/src/via_accel.c
index 2b02254..60f307d 100644
--- a/src/via_accel.c
+++ b/src/via_accel.c
@@ -196,6 +196,7 @@ viaFlushPCI(ViaCommandBuffer * buf)
switch (pVia->Chipset) {
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
while ((VIAGETREG(VIA_REG_STATUS) &
(VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5))
&& (loop++ < MAXLOOP)) ;
@@ -419,6 +420,7 @@ viaDisableVQ(ScrnInfoPtr pScrn)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
VIASETREG(0x41c, 0x00100000);
VIASETREG(0x420, 0x74301000);
break;
@@ -474,16 +476,25 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
VIASETREG(i, 0x0);
}
- if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) {
- for (i = 0x44; i < 0x5c; i += 4) {
+ if (pVia->Chipset == VIA_VX800 ||
+ pVia->Chipset == VIA_VX855 ||
+ pVia->Chipset == VIA_VX900) {
+ for (i = 0x44; i <= 0x5c; i += 4) {
VIASETREG(i, 0x0);
}
}
+ if (pVia->Chipset == VIA_VX900)
+ {
+ /*410 redefine 0x30 34 38*/
+ VIASETREG(0x60, 0x0); /*already useable here*/
+ }
+
/* Make the VIA_REG() macro magic work */
switch (pVia->Chipset) {
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
pVia->TwodRegs = via_2d_regs_m1;
break;
default:
@@ -496,6 +507,7 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
viaInitPCIe(pVia);
break;
default:
@@ -509,6 +521,7 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
viaEnablePCIeVQ(pVia);
break;
default:
@@ -536,6 +549,7 @@ viaAccelSync(ScrnInfoPtr pScrn)
switch (pVia->Chipset) {
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
while ((VIAGETREG(VIA_REG_STATUS) &
(VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5 | VIA_3D_ENG_BUSY_H5))
&& (loop++ < MAXLOOP)) ;
@@ -596,7 +610,9 @@ viaPitchHelper(VIAPtr pVia, unsigned dstPitch, unsigned srcPitch)
unsigned val = (dstPitch >> 3) << 16 | (srcPitch >> 3);
RING_VARS;
- if (pVia->Chipset != VIA_VX800 && pVia->Chipset != VIA_VX855) {
+ if (pVia->Chipset != VIA_VX800 &&
+ pVia->Chipset != VIA_VX855 &&
+ pVia->Chipset != VIA_VX900) {
val |= VIA_PITCH_ENABLE;
}
OUT_RING_H1(VIA_REG(pVia, PITCH), val);
@@ -1236,7 +1252,7 @@ viaInitXAA(ScreenPtr pScreen)
HARDWARE_CLIP_COLOR_8x8_FILL |
HARDWARE_CLIP_SCREEN_TO_SCREEN_COLOR_EXPAND | 0);
- if (pVia->Chipset != VIA_VX855)
+ if (pVia->Chipset != VIA_VX855 || pVia->Chipset != VIA_VX900)
xaaptr->ClippingFlags |= (HARDWARE_CLIP_SOLID_FILL |
HARDWARE_CLIP_SOLID_LINE |
HARDWARE_CLIP_DASHED_LINE);
@@ -1300,7 +1316,9 @@ viaInitXAA(ScreenPtr pScreen)
xaaptr->SubsequentScanlineCPUToScreenColorExpandFill =
viaSubsequentScanlineCPUToScreenColorExpandFill;
xaaptr->ColorExpandBase = pVia->BltBase;
- if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855)
+ if (pVia->Chipset == VIA_VX800 ||
+ pVia->Chipset == VIA_VX855 ||
+ pVia->Chipset == VIA_VX900)
xaaptr->ColorExpandRange = VIA_MMIO_BLTSIZE;
else
xaaptr->ColorExpandRange = (64 * 1024);
@@ -1326,7 +1344,9 @@ viaInitXAA(ScreenPtr pScreen)
xaaptr->SubsequentImageWriteRect = viaSubsequentImageWriteRect;
xaaptr->ImageWriteBase = pVia->BltBase;
- if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855)
+ if (pVia->Chipset == VIA_VX800 ||
+ pVia->Chipset == VIA_VX855 ||
+ pVia->Chipset == VIA_VX900)
xaaptr->ImageWriteRange = VIA_MMIO_BLTSIZE;
else
xaaptr->ImageWriteRange = (64 * 1024);
diff --git a/src/via_bandwidth.c b/src/via_bandwidth.c
index 82b9bef..2b413b8 100644
--- a/src/via_bandwidth.c
+++ b/src/via_bandwidth.c
@@ -263,6 +263,14 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
hwp->writeSeq(hwp, 0x18, 0x90); /* 320/4 = 80 = 0x50 */
hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4 = 40 = 0x28 */
break;
+ case VIA_VX900:
+ hwp->writeSeq(hwp, 0x17, 0xC7); /* 400/2-1 = 199 = 0xC7 */
+ /* Formula for {SR16,0,5},{SR16,7,7} is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
+ hwp->writeSeq(hwp, 0x16, 0x90); /* 320/4 = 80 = 0x50 */
+ /* Formula for {SR18,0,5},{SR18,7,7} is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
+ hwp->writeSeq(hwp, 0x18, 0x90); /* 320/4 = 80 = 0x50 */
+ hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4 = 40 = 0x28 */
+ break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetPrimaryFIFO: "
"Chipset %d not implemented\n", pVia->Chipset);
@@ -479,6 +487,23 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
else
ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
break;
+ case VIA_VX900:
+ /* {CR68,4,7},{CR94,7,7},{CR95,7,7} : 192/8-1 = 23 = 0x17 */
+ ViaCrtcMask(hwp, 0x68, 0x70, 0xF0); /* ((0x17 & 0x0F) << 4)) = 0x70 */
+ ViaCrtcMask(hwp, 0x94, 0x80, 0x80); /* ((0x17 & 0x10) << 3)) = 0x80 */
+ ViaCrtcMask(hwp, 0x95, 0x00, 0x80); /* ((0x17 & 0x20) << 2)) = 0x00 */
+ /* {CR68,0,3},{CR95,4,6} : 160/4 = 0x28 */
+ ViaCrtcMask(hwp, 0x68, 0x08, 0x0F); /* (0x28 & 0x0F) = 0x08 */
+ ViaCrtcMask(hwp, 0x95, 0x20, 0x70); /* (0x28 & 0x70) = 0x20 */
+ /* {CR92,0,3},{CR95,0,2} : 160/4 = 0x28 */
+ ViaCrtcMask(hwp, 0x92, 0x08, 0x08); /* (0x28 & 0x0F) = 0x08 */
+ ViaCrtcMask(hwp, 0x95, 0x02, 0x07); /* ((0x28 & 0x70) >> 4)) = 0x2 */
+ /* {CR94,0,6} : 320/4 = 0x50 */
+ if ((mode->HDisplay >= 1400) && (pScrn->bitsPerPixel == 32))
+ ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
+ else
+ ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
+ break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetSecondaryFIFO: "
"Chipset %d not implemented\n", pVia->Chipset);
diff --git a/src/via_bios.h b/src/via_bios.h
index cf8ba88..6d945f7 100644
--- a/src/via_bios.h
+++ b/src/via_bios.h
@@ -97,7 +97,9 @@
#define VIA_MEM_DDR400 0x06
#define VIA_MEM_DDR533 0x07
#define VIA_MEM_DDR667 0x08
-#define VIA_MEM_END 0x09
+#define VIA_MEM_DDR800 0x09
+#define VIA_MEM_DDR1066 0x0A
+#define VIA_MEM_END 0x0B
#define VIA_MEM_NONE 0xFF
/* Digital Output Bus Width */
diff --git a/src/via_crtc.c b/src/via_crtc.c
index bd5edb3..df5ffd7 100644
--- a/src/via_crtc.c
+++ b/src/via_crtc.c
@@ -174,6 +174,7 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
break;
default:
ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
@@ -278,6 +279,7 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
break;
default:
/* some leftovers */
@@ -314,6 +316,7 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
break;
default:
/* some leftovers */
@@ -439,6 +442,7 @@ ViaSecondCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
break;
default:
ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
@@ -523,6 +527,7 @@ ViaSecondCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
break;
default:
/* some leftovers */
diff --git a/src/via_cursor.c b/src/via_cursor.c
index 2e3ab6f..8e70cd2 100644
--- a/src/via_cursor.c
+++ b/src/via_cursor.c
@@ -72,6 +72,12 @@ viaHWCursorInit(ScreenPtr pScreen)
pVia->CursorMaxHeight = 32;
pVia->CursorSize = ((pVia->CursorMaxWidth * pVia->CursorMaxHeight) / 8) * 2;
break;
+ case VIA_VX900:
+ pVia->CursorARGBSupported = FALSE;
+ pVia->CursorMaxWidth = 64;
+ pVia->CursorMaxHeight = 64;
+ pVia->CursorSize = pVia->CursorMaxWidth * (pVia->CursorMaxHeight + 1) << 2;
+ break;
default:
pVia->CursorARGBSupported = TRUE;
pVia->CursorMaxWidth = 64;
@@ -98,6 +104,7 @@ viaHWCursorInit(ScreenPtr pScreen)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
pVia->CursorRegControl = VIA_REG_HI_CONTROL0;
pVia->CursorRegBase = VIA_REG_HI_BASE0;
@@ -169,6 +176,7 @@ viaHWCursorInit(ScreenPtr pScreen)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, 0x00FFFFFF);
VIASETREG(VIA_REG_V327_HI_INVTCOLOR, 0x00FFFFFF);
@@ -228,6 +236,7 @@ viaCursorStore(ScrnInfoPtr pScrn)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
pVia->CursorPrimHiInvtColor = VIAGETREG(VIA_REG_PRIM_HI_INVTCOLOR);
pVia->CursorV327HiInvtColor = VIAGETREG(VIA_REG_V327_HI_INVTCOLOR);
@@ -268,6 +277,7 @@ viaCursorRestore(ScrnInfoPtr pScrn)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, pVia->CursorPrimHiInvtColor);
VIASETREG(VIA_REG_V327_HI_INVTCOLOR, pVia->CursorV327HiInvtColor);
@@ -301,6 +311,7 @@ viaShowCursor(ScrnInfoPtr pScrn)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
VIASETREG(VIA_REG_HI_CONTROL0, 0x36000005);
}
@@ -347,6 +358,7 @@ viaHideCursor(ScrnInfoPtr pScrn)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
temp = VIAGETREG(VIA_REG_HI_CONTROL0);
VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFA);
@@ -395,6 +407,7 @@ viaSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
VIASETREG(VIA_REG_HI_POS0, ((x << 16) | (y & 0x07ff)));
VIASETREG(VIA_REG_HI_OFFSET0, ((xoff << 16) | (yoff & 0x07ff)));
@@ -482,6 +495,7 @@ viaLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
temp = VIAGETREG(VIA_REG_HI_CONTROL0);
VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE);
@@ -538,6 +552,7 @@ viaSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
temp = VIAGETREG(VIA_REG_HI_CONTROL0);
VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE);
diff --git a/src/via_driver.c b/src/via_driver.c
index ec62102..28ef7bd 100644
--- a/src/via_driver.c
+++ b/src/via_driver.c
@@ -143,6 +143,7 @@ static const struct pci_id_match via_device_match[] = {
VIA_DEVICE_MATCH (PCI_CHIP_VT3327, 0 ),
VIA_DEVICE_MATCH (PCI_CHIP_VT3353, 0 ),
VIA_DEVICE_MATCH (PCI_CHIP_VT3409, 0 ),
+ VIA_DEVICE_MATCH (PCI_CHIP_VT3410, 0 ),
{ 0, 0, 0 },
};
@@ -180,6 +181,7 @@ static SymTabRec VIAChipsets[] = {
{VIA_P4M900, "P4M900/VN896/CN896"},
{VIA_VX800, "VX800/VX820"},
{VIA_VX855, "VX855/VX875"},
+ {VIA_VX900, "VX900"},
{-1, NULL }
};
@@ -196,6 +198,7 @@ static PciChipsets VIAPciChipsets[] = {
{VIA_P4M900, PCI_CHIP_VT3364, VIA_RES_SHARED},
{VIA_VX800, PCI_CHIP_VT3353, VIA_RES_SHARED},
{VIA_VX855, PCI_CHIP_VT3409, VIA_RES_SHARED},
+ {VIA_VX900, PCI_CHIP_VT3410, VIA_RES_SHARED},
{-1, -1, VIA_RES_UNDEF}
};
@@ -760,6 +763,7 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
pVia->VideoEngine = VIDEO_ENGINE_CME;
pVia->agpEnable = FALSE;
pVia->dmaXV = FALSE;
@@ -865,6 +869,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
pVIAEnt->HasSecondary = FALSE;
pVIAEnt->RestorePrimary = FALSE;
pVIAEnt->IsSecondaryRestored = FALSE;
+
}
} else {
pVia->sharedData = xnfcalloc(sizeof(ViaSharedRec), 1);
@@ -1034,6 +1039,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
case VIA_CX700:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
#ifdef XSERVER_LIBPCIACCESS
pci_device_cfg_read_u8(vgaDevice, &videoRam, 0xA1);
#else
@@ -1591,10 +1597,13 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
} else {
if (pVia->pI2CBus1) {
- pVia->DDC1 = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus1);
+ pVia->DDC1 = xf86DoEEDID(pScrn->scrnIndex, pVia->pI2CBus1, TRUE);
if (pVia->DDC1) {
xf86PrintEDID(pVia->DDC1);
xf86SetDDCproperties(pScrn, pVia->DDC1);
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+ "DDC pI2CBus1 detected a %s\n", DIGITAL(pVia->DDC1->features.input_type) ?
+ "DFP" : "CRT"));
}
}
}
@@ -1897,6 +1906,7 @@ VIALeaveVT(int scrnIndex, int flags)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
break;
default:
hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
@@ -2054,6 +2064,9 @@ VIASave(ScrnInfoPtr pScrn)
Regs->SR4C = hwp->readSeq(hwp, 0x4C);
break;
}
+
+ /* Save Preemptive Arbiter Control Register */
+ Regs->SR4C = hwp->readSeq(hwp, 0x4D);
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Crtc...\n"));
Regs->CR13 = hwp->readCrtc(hwp, 0x13);
@@ -2111,6 +2124,7 @@ VIASave(ScrnInfoPtr pScrn)
case VIA_CX700:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
Regs->CRD2 = hwp->readCrtc(hwp, 0xD2);
break;
}
@@ -2220,6 +2234,15 @@ VIARestore(ScrnInfoPtr pScrn)
break;
}
+ /* Restore Preemptive Arbiter Control Register
+ * VX800 and VX855 should restore this register too,
+ * but I don't do that for I don't want to affect any
+ * chips now.
+ */
+ if (pVia->Chipset == VIA_VX900) {
+ hwp->writeSeq(hwp, 0x4D, Regs->SR4D);
+ }
+
/* Reset dotclocks. */
ViaSeqMask(hwp, 0x40, 0x06, 0x06);
ViaSeqMask(hwp, 0x40, 0x00, 0x06);
@@ -2274,6 +2297,7 @@ VIARestore(ScrnInfoPtr pScrn)
case VIA_CX700:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
/* LVDS Control Register */
hwp->writeCrtc(hwp, 0xD2, Regs->CRD2);
break;
@@ -2303,6 +2327,7 @@ ViaMMIOEnable(ScrnInfoPtr pScrn)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
ViaSeqMask(hwp, 0x1A, 0x08, 0x08);
break;
default:
@@ -2326,6 +2351,7 @@ ViaMMIODisable(ScrnInfoPtr pScrn)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
ViaSeqMask(hwp, 0x1A, 0x00, 0x08);
break;
default:
@@ -2442,10 +2468,18 @@ VIAMapFB(ScrnInfoPtr pScrn)
VIAPtr pVia = VIAPTR(pScrn);
#ifdef XSERVER_LIBPCIACCESS
- pVia->FrameBufferBase = pVia->PciInfo->regions[0].base_addr;
+ if (pVia->Chipset == VIA_VX900) {
+ pVia->FrameBufferBase = pVia->PciInfo->regions[2].base_addr;
+ } else {
+ pVia->FrameBufferBase = pVia->PciInfo->regions[0].base_addr;
+ }
int err;
#else
- pVia->FrameBufferBase = pVia->PciInfo->memBase[0];
+ if (pVia->Chipset == VIA_VX900) {
+ pVia->FrameBufferBase = pVia->PciInfo->memBase[2];
+ } else {
+ pVia->FrameBufferBase = pVia->PciInfo->memBase[0];
+ }
#endif
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAMapFB\n"));
@@ -3029,6 +3063,7 @@ VIAWriteMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
/*
* Since we are using virtual, we need to adjust
* the offset to match the framebuffer alignment.
@@ -3075,6 +3110,7 @@ VIACloseScreen(int scrnIndex, ScreenPtr pScreen)
case VIA_P4M900:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
break;
default :
hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
diff --git a/src/via_driver.h b/src/via_driver.h
index 4c99cf9..891cccb 100644
--- a/src/via_driver.h
+++ b/src/via_driver.h
@@ -127,7 +127,7 @@ typedef struct {
CARD8 SR27, SR28, SR29, SR2A,SR2B,SR2C,SR2D,SR2E;
CARD8 SR2F, SR30, SR31, SR32,SR33,SR34,SR40,SR41;
CARD8 SR42, SR43, SR44, SR45,SR46,SR47,SR48,SR49;
- CARD8 SR4A, SR4B, SR4C;
+ CARD8 SR4A, SR4B, SR4C, SR4D;
/* extended CRTC registers */
CARD8 CR0C, CR0D;
diff --git a/src/via_id.c b/src/via_id.c
index 0d24221..b5b9000 100644
--- a/src/via_id.c
+++ b/src/via_id.c
@@ -239,6 +239,9 @@ static struct ViaCardIdStruct ViaCardId[] = {
{"VIA VT8562C", VIA_VX855, 0x1106, 0x5122, VIA_DEVICE_CRT},
{"OLPC XO 1.5", VIA_VX855, 0x152D, 0x0833, VIA_DEVICE_LCD},
+ /*** VX900 ***/
+ {"Foxconn L740", VIA_VX900, 0x105B, 0x0CFD, VIA_DEVICE_LCD | VIA_DEVICE_CRT},
+
/* keep this */
{NULL, VIA_UNKNOWN, 0x0000, 0x0000, VIA_DEVICE_NONE}
};
diff --git a/src/via_id.h b/src/via_id.h
index d941cf2..4db321d 100644
--- a/src/via_id.h
+++ b/src/via_id.h
@@ -39,6 +39,7 @@ enum VIACHIPTAGS {
VIA_P4M890,
VIA_VX800,
VIA_VX855,
+ VIA_VX900,
VIA_LAST
};
@@ -56,6 +57,7 @@ enum VIACHIPTAGS {
#define PCI_CHIP_VT3327 0x3343 /* P4M890 */
#define PCI_CHIP_VT3353 0x1122 /* VX800 */
#define PCI_CHIP_VT3409 0x5122 /* VX855/VX875 */
+#define PCI_CHIP_VT3410 0x7122 /* VX900 */
/* There is some conflicting information about the two major revisions of
* the CLE266, often labelled Ax and Cx. The dividing line seems to be
diff --git a/src/via_mode.c b/src/via_mode.c
index ca1f0f2..c307239 100644
--- a/src/via_mode.c
+++ b/src/via_mode.c
@@ -308,11 +308,14 @@ ViaDFPDetect(ScrnInfoPtr pScrn)
xf86MonPtr monPtr = NULL;
if (pVia->pI2CBus2)
- monPtr = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2);
+ monPtr = xf86DoEEDID(pScrn->scrnIndex, pVia->pI2CBus2, TRUE);
if (monPtr) {
xf86PrintEDID(monPtr);
xf86SetDDCproperties(pScrn, monPtr);
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+ "DDC pI2CBus2 detected a %s\n", DIGITAL(monPtr->features.input_type) ?
+ "DFP" : "CRT"));
return TRUE;
} else {
return FALSE;
@@ -380,6 +383,7 @@ ViaOutputsDetect(ScrnInfoPtr pScrn)
case VIA_CX700:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
if (ViaDFPDetect(pScrn)) {
pBIOSInfo->DfpPresent = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -514,6 +518,7 @@ ViaOutputsSelect(ScrnInfoPtr pScrn)
case VIA_CX700:
case VIA_VX800:
case VIA_VX855:
+ case VIA_VX900:
pVia->pBIOSInfo->Lvds->IsActive = TRUE ;
break;
}
@@ -859,6 +864,9 @@ ViaGetMemoryBandwidth(ScrnInfoPtr pScrn)
case VIA_MEM_DDR533:
case VIA_MEM_DDR667:
return VIA_BW_DDR667;
+ case VIA_MEM_DDR800:
+ case VIA_MEM_DDR1066:
+ return VIA_BW_DDR1066;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"ViaBandwidthAllowed: Unknown memory type: %d\n", pVia->MemClk);
@@ -999,8 +1007,8 @@ ViaSetDotclock(ScrnInfoPtr pScrn, CARD32 clock, int base, int probase)
dn = pll.params.dn;
dm = pll.params.dm;
- /* The VX855 does not modify dm/dn, but earlier chipsets do. */
- if (pVia->Chipset != VIA_VX855) {
+ /* The VX855 and VX900 do not modify dm/dn, but earlier chipsets do. */
+ if ((pVia->Chipset != VIA_VX855) && (pVia->Chipset != VIA_VX900)) {
dm -= 2;
dn -= 2;
}
@@ -1708,7 +1716,7 @@ ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode)
ViaModeSecondCRTC(pScrn, mode);
ViaSecondDisplayChannelEnable(pScrn);
}
-
+
if (pBIOSInfo->FirstCRTC->IsActive) {
if (pBIOSInfo->CrtActive) {
/* CRT on FirstCRTC */
@@ -1734,11 +1742,12 @@ ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode)
ViaDisplayDisableCRT(pScrn);
}
- // Enable panel support on K8M800 and VM800 chipset
+ // Enable panel support on VM800, K8M800 and VX900 chipset
// See: https://bugs.launchpad.net/openchrome/+bug/186103
if (pBIOSInfo->Panel->IsActive &&
- ((pVia->Chipset == VIA_K8M800) ||
- (pVia->Chipset == VIA_VM800)))
+ ((pVia->Chipset == VIA_VM800) ||
+ (pVia->Chipset == VIA_K8M800) ||
+ (pVia->Chipset == VIA_VX900) ))
ViaModeFirstCRTC(pScrn, mode);
if (pBIOSInfo->Simultaneous->IsActive) {
diff --git a/src/via_mode.h b/src/via_mode.h
index a7ade8b..4df3e23 100644
--- a/src/via_mode.h
+++ b/src/via_mode.h
@@ -34,6 +34,7 @@
#define VIA_BW_DDR200 394000000
#define VIA_BW_DDR400 553000000 /* > 1920x1200@60Hz@32bpp */
#define VIA_BW_DDR667 922000000
+#define VIA_BW_DDR1066 922000000
union pllparams {
struct {
diff --git a/src/via_panel.c b/src/via_panel.c
index 2df00c7..d9ad742 100644
--- a/src/via_panel.c
+++ b/src/via_panel.c
@@ -45,17 +45,17 @@ static ViaPanelModeRec ViaPanelNativeModes[] = {
{1280, 768},
{1280, 1024},
{1400, 1050},
- {1600, 1200}, /* 0x6 Resolution 1440x900 */
+ {1440, 900}, /* 0x6 Resolution 1440x900 */
{1280, 800}, /* 0x7 Resolution 1280x800 (Samsung NC20) */
{800, 480}, /* 0x8 For Quanta 800x480 */
{1024, 600}, /* 0x9 Resolution 1024x600 (for HP 2133) */
{1366, 768}, /* 0xA Resolution 1366x768 */
- {1920, 1080},
- {1920, 1200},
- {1280, 1024}, /* 0xD Need to be fixed to 1920x1200 */
- {1440, 900}, /* 0xE Need to be fixed to 640x240 */
- {1280, 720}, /* 0xF 480x640 */
- {1200, 900}, /* 0x10 For Panasonic 1280x768 18bit Dual-Channel Panel */
+ {1600, 1200}, /* 0xB Resolution 1600x1200 */
+ {1680, 1050},
+ {1920, 1200}, /* 0xD Resolution 1920x1200 */
+ {640, 240}, /* 0xE Resolution 640x240 */
+ {480, 640}, /* 0xF Resolution 480x640 */
+ {1280, 768}, /* 0x10 For Panasonic 1280x768 18bit Dual-Channel Panel */
{1360, 768}, /* 0x11 Resolution 1360X768 */
{1024, 768}, /* 0x12 Resolution 1024x768 */
{800, 480} /* 0x13 General 8x4 panel use this setting */
@@ -147,6 +147,9 @@ ViaPanelScaleDisable(ScrnInfoPtr pScrn)
vgaHWPtr hwp = VGAHWPTR(pScrn);
ViaCrtcMask(hwp, 0x79, 0x00, 0x01);
+ /* Disable VX900 down scaling */
+ if (pVia->Chipset == VIA_VX900)
+ ViaCrtcMask(hwp, 0x89, 0x00, 0x01);
if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400)
ViaCrtcMask(hwp, 0xA2, 0x00, 0xC8);
}
@@ -304,7 +307,7 @@ ViaPanelPreInit(ScrnInfoPtr pScrn)
int width, height;
Bool ret;
- ret = ViaPanelGetSizeFromDDCv1(pScrn, &width, &height);
+ ret = ViaPanelGetSizeFromDDC(pScrn, &width, &height);
/*
if (!ret)
ret = ViaPanelGetSizeFromDDCv2(pScrn, &width);
@@ -408,8 +411,7 @@ ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon,
}
Bool
-ViaPanelGetSizeFromDDCv1(ScrnInfoPtr pScrn, int *width, int *height)
-
+ViaPanelGetSizeFromDDC(ScrnInfoPtr pScrn, int *width, int *height)
{
VIAPtr pVia = VIAPTR(pScrn);
xf86MonPtr pMon;
@@ -419,7 +421,7 @@ ViaPanelGetSizeFromDDCv1(ScrnInfoPtr pScrn, int *width, int *height)
if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA0))
return FALSE;
- pMon = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2);
+ pMon = xf86DoEEDID(pScrn->scrnIndex, pVia->pI2CBus2, TRUE);
if (!pMon)
return FALSE;
diff --git a/src/via_video.c b/src/via_video.c
index 94c5a77..6687e82 100644
--- a/src/via_video.c
+++ b/src/via_video.c
@@ -354,6 +354,14 @@ DecideOverlaySupport(ScrnInfoPtr pScrn)
mClock = 333;
memEfficiency = (float)SINGLE_3205_133;
break;
+ case VIA_MEM_DDR800:
+ mClock = 400;
+ memEfficiency = (float)SINGLE_3205_133;
+ break;
+ case VIA_MEM_DDR1066:
+ mClock = 533;
+ memEfficiency = (float)SINGLE_3205_133;
+ break;
default:
/*Unknow DRAM Type */
DBG_DD(ErrorF("Unknow DRAM Type!\n"));
@@ -426,7 +434,7 @@ DecideOverlaySupport(ScrnInfoPtr pScrn)
DBG_DD(ErrorF(" via_video.c : totalBandwidth= %f : \n",
totalBandWidth));
if (needBandWidth < totalBandWidth)
- return TRUE;
+ return TRUE;
}
return FALSE;
}
diff --git a/src/via_xvmc.c b/src/via_xvmc.c
index ada4853..37ff514 100644
--- a/src/via_xvmc.c
+++ b/src/via_xvmc.c
@@ -325,10 +325,11 @@ ViaInitXVMC(ScreenPtr pScreen)
if ((pVia->Chipset == VIA_KM400) ||
(pVia->Chipset == VIA_CX700) ||
+ (pVia->Chipset == VIA_K8M890) ||
+ (pVia->Chipset == VIA_P4M900) ||
(pVia->Chipset == VIA_VX800) ||
(pVia->Chipset == VIA_VX855) ||
- (pVia->Chipset == VIA_K8M890) ||
- (pVia->Chipset == VIA_P4M900)) {
+ (pVia->Chipset == VIA_VX900)) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"[XvMC] XvMC is not supported on this chipset.\n");
return;