diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2012-11-15 19:15:53 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2012-11-16 13:02:42 -0500 |
| commit | ce17964fe50d36dd13a0688bc59bfe6878142b74 (patch) | |
| tree | cf5f483376a29d3660dbd36f1e556d820d1ef1de | |
| parent | 4f0537e645f9c34e305f2808c70eafbbc1c7689c (diff) | |
radeonsi: emit PA_SC_RASTER_CONFIG
Use per asic golden values.
Programming this register doesn't seem to be strictly
necessary on SI, but programming it wrong leads to
rendering issues or reduced performance so just
go ahead and program the golden values explicitly
to avoid any potential problems down the road.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index db305d40bf..2bd55bbb6f 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -2665,5 +2665,16 @@ void si_init_config(struct r600_context *rctx) si_pm4_set_reg(pm4, R_02882C_PA_SU_PRIM_FILTER_CNTL, 0); + switch (rctx->screen->family) { + case CHIP_TAHITI: + case CHIP_PITCAIRN: + si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x2a00126a); + break; + case CHIP_VERDE: + default: + si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x0000124a); + break; + } + si_pm4_set_state(rctx, init, pm4); } |