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AgeCommit message (Expand)AuthorFilesLines
2013-10-14wipsi_schedVadim Girlin6-16/+64
2013-10-14R600/SI: Define a schedule model and enable the converging schedulerTom Stellard4-16/+146
2013-10-13fix attemptVincent Lejeune2-6/+7
2013-10-13Patch suggestion to fix SS3 BFEVincent Lejeune1-1/+1
2013-10-13R600: improve dump of S_WAITCNTVincent Lejeune4-1/+58
2013-10-13R600/SI: Add SinkingPass before ISelVincent Lejeune1-0/+1
2013-10-13R600/SI: Support byval argumentsVincent Lejeune2-2/+8
2013-10-13R600: Use masked read sel for texture instructionsVincent Lejeune2-8/+12
2013-10-13R600: fix swizzle exportVincent Lejeune3-6/+156
2013-10-13R600: Clear the VPM bit of export instructions.Vincent Lejeune1-4/+4
2013-10-13Windows: Use GetModuleHandleEx instead of LoadLibraryDavid Majnemer1-2/+2
2013-10-13TargetLowering: Don't index into empty string.Will Dietz1-1/+1
2013-10-12yaml2coff/elf: Touchup for compatibility.Will Dietz2-8/+10
2013-10-12SLPVectorizer: Sort PHINodes based on their opcodeArnold Schwaighofer2-25/+78
2013-10-12LoopVectorize: Add missing INITIALIZE_PASS_DEPENDENCY macrosTobias Grosser1-0/+3
2013-10-12Force a CPU on test so it doesn't depend on microarchitectural scheduling dec...Benjamin Kramer1-2/+2
2013-10-12Update so that it uses the `-V' command line option and supports Python 3.x.Bill Wendling2-6/+8
2013-10-12Remove more filters from the disassembler. Mark some AVX512 instructions as C...Craig Topper2-5/+6
2013-10-12R600: Store disassembly in a special ELF section when feature +DumpCode is en...Tom Stellard3-14/+83
2013-10-12Mark some more instructions as CodeGenOnly. Remove filters from the disassemb...Craig Topper2-21/+19
2013-10-12For Mips16, start to consolidate all forms of 32 bit literal loading so thatReed Kotler2-9/+14
2013-10-12Add missing #include's to cctype when using isdigit/alpha/etc.Will Dietz22-0/+23
2013-10-11Debug Info: remove form from function addDIEEntry.Manman Ren3-26/+17
2013-10-11Fixing problems in lli's RemoteMemoryManager.Andrew Kaylor4-9/+11
2013-10-11Adding multiple object support to MCJIT EH frame handlingAndrew Kaylor15-88/+210
2013-10-11R600: Add scalar i32 add testMatt Arsenault1-0/+16
2013-10-11Use CHECK-LABELMatt Arsenault1-8/+8
2013-10-11Fix typoMatt Arsenault1-1/+1
2013-10-11fConversion: Attempt #2 at fixing the MSVC build.Benjamin Kramer1-2/+2
2013-10-11IfConversion: Try to unbreak the MSVC build.Benjamin Kramer1-1/+1
2013-10-11Mips: Disassemble sign-extended 64 bit immediates properly.Benjamin Kramer2-1/+6
2013-10-11Remove kill flags after if conversion if necessaryMatthias Braun2-66/+119
2013-10-11Introduce ad hoc liveness tracking utility: LiveRegUnitsMatthias Braun1-0/+156
2013-10-11[DAGCombiner] Load slicing test case: attempt to really fix the buildbots (us...Quentin Colombet1-2/+2
2013-10-11Add warning about CHECK-DAG with variable definitionRenato Golin1-9/+37
2013-10-11Debug Info Testing Case: check for the name of a structure.Manman Ren1-0/+1
2013-10-11Really fix CHECK-LABEL and CHECK-DAG interaction. This actually just restores...Stephen Lin2-9/+28
2013-10-11[DAGCombiner] Reapply load slicing (192471) with a test that explicitly set s...Quentin Colombet3-2/+743
2013-10-11[DAGCombiner] Revert load slicing (r192471), until I figure out why it fails ...Quentin Colombet3-743/+2
2013-10-11Revert "Tests: Be less dependent on a specific schedule/regalloc"Matthias Braun10-53/+55
2013-10-11[DAGCombiner] Slice a big load in two loads when the element are next to eachQuentin Colombet3-2/+743
2013-10-11Fix handling of CHECK-DAG inside of CHECK-LABEL.Rafael Espindola2-6/+15
2013-10-11Better info when debugging vectorizerRenato Golin1-6/+5
2013-10-11[ARM] Fix FP ABI attributes with no VFP enabled.Amara Emerson4-26/+19
2013-10-11fix typo in commentMatthias Braun1-1/+1
2013-10-11Tests: Be less dependent on a specific schedule/regallocMatthias Braun10-55/+53
2013-10-11This reverts 192447 because of compiler warning generated on darwin build.Matheus Almeida4-189/+14
2013-10-11This reverts r192449 because of compiler warning generated on darwin build.Matheus Almeida3-157/+31
2013-10-11[mips][msa] Direct Object Emission for the majority of the ELM instructions.Matheus Almeida3-31/+157
2013-10-11[mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction.Matheus Almeida4-14/+189
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