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authorCraig Topper <craig.topper@gmail.com>2012-12-27 03:01:18 +0000
committerCraig Topper <craig.topper@gmail.com>2012-12-27 03:01:18 +0000
commit766cbae4b1abcaf451949370c2fae8b339a4dca8 (patch)
tree0be3560fe28978ab6f4287c90acfb24ea578f8b4
parent64f824c9d181c8ee78cba5b00fa7be0e5a0900a5 (diff)
Mark the divide instructions as hasSideEffects=0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171136 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86InstrArithmetic.td2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrArithmetic.td b/lib/Target/X86/X86InstrArithmetic.td
index 693815d42f..d56763ea9d 100644
--- a/lib/Target/X86/X86InstrArithmetic.td
+++ b/lib/Target/X86/X86InstrArithmetic.td
@@ -266,6 +266,7 @@ def IMUL64rmi8 : RIi8<0x6B, MRMSrcMem, // GR64 = [mem64]*I8
// unsigned division/remainder
+let hasSideEffects = 0 in {
let Defs = [AL,EFLAGS,AX], Uses = [AX] in
def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH
"div{b}\t$src", [], IIC_DIV8_REG>;
@@ -325,6 +326,7 @@ let Defs = [RAX,RDX,EFLAGS], Uses = [RAX,RDX] in // RDX:RAX/[mem64] = RAX,RDX
def IDIV64m: RI<0xF7, MRM7m, (outs), (ins i64mem:$src),
"idiv{q}\t$src", [], IIC_IDIV64>;
}
+} // hasSideEffects = 0
//===----------------------------------------------------------------------===//
// Two address Instructions.