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2012-01-05tgsi_llvm: Reuse base for elem_type in soa contextr600g-llvm-shaderTom Stellard1-2/+7
2012-01-05gallivm: Allow target specific intrinsics in lp_declare_intrinsic()Tom Stellard1-7/+0
2012-01-05tgsi_llvm: Add include guard to tgsi_llvm.hTom Stellard1-0/+6
2012-01-05gallium/radeon: Fix build with --enable-debugTom Stellard1-0/+2
2011-12-19gallium/radeon: Replace llvm_unreachable() with abort()Tom Stellard8-13/+13
2011-12-19gallium/radeon: Implement tgsi_llvm fetch_constant callbackTom Stellard2-1/+13
2011-12-19tgsi_llvm: Replace load_const intrinsic with a callbackTom Stellard2-7/+7
2011-12-19gallium/radeon: Add AMDISALowerShaderInstructionsPass classTom Stellard4-4/+48
2011-12-16gallium/radeon: Update to LLVM 3.0Tom Stellard126-48147/+48093
2011-12-16gallium/radeon: rework R600LowerShaderInstructionsPassVadim Girlin3-43/+24
2011-12-16gallium/radeon: disable NEG propagationVadim Girlin1-8/+5
2011-12-16r600g: fix gpr number calculationVadim Girlin1-0/+3
2011-12-15gallium/radeon: Use AMDISA.td for tblgenTom Stellard5-15/+17
2011-12-14tgsi: support output reads in the tgsi->llvm converterVadim Girlin1-9/+35
2011-12-14gallivm: increase visibility of the get_output_ptrVadim Girlin2-4/+9
2011-12-14gallium/radeon: Mask writes when lowering KILPTom Stellard6-2/+22
2011-12-13gallium/radeon: KILLGT needs two source operandsTom Stellard1-3/+3
2011-12-13radeon/gallium: Fix TGSI_OPCODE_KILP -> KILGT translationTom Stellard4-7/+12
2011-12-13gallium/radeon: Split AMDISALowerShaderInstructions pass in twoTom Stellard12-32/+130
2011-12-13r600g: Add an extra dependency to default targetTom Stellard1-0/+4
2011-12-13gallium/Makefile.template: Allow drivers to specify extra deps for defaultTom Stellard1-1/+1
2011-12-13gallium/radeon: Correctly disable extract vector loweringTom Stellard1-13/+7
2011-12-13This actually breaks r600.Tom Stellard2-2/+16
2011-12-13gallium/radeon: Let LLVM manage vector extract elementTom Stellard2-16/+2
2011-12-13gallium/radeon: Dump LLVM assembly before emitting machine codeTom Stellard6-6/+26
2011-12-12gallium/radeon: Generate code emitter from AMDIL.tdTom Stellard2-2/+1
2011-12-12r600g: Make sure to clean radeon directory if LLVM is enabledTom Stellard1-0/+5
2011-12-12gallium/Makefile.template: Allow drivers to specify extra deps for cleanTom Stellard1-1/+1
2011-12-09gallium/radeon: Don't hardcode tablegen include pathTom Stellard3-2/+4
2011-12-09 r600g: Add LLVM shader backendTom Stellard153-25/+85947
2011-12-09tgsi: Add GPU-centric TGSI->LLVM converterTom Stellard5-0/+1477
2011-12-09gallivm: Move tgsi_soa helper macros to header fileTom Stellard2-14/+12
2011-12-09gallivm: Allow user to define the load_store() functionTom Stellard3-2/+13
2011-12-09gallivm: Refactor identical code out of lp_bld_tgsi_{aos,soa}.cTom Stellard5-65/+99
2011-12-09gallivm: Allow user to supply the swizzle function to lp_bld_tgsi_aosTom Stellard2-2/+5
2011-12-09gallivm: Move duplicate LP_MAX_INSTRUCTIONS def into common headersTom Stellard3-5/+2
2011-12-09gallivm: Increase visibility of some lp_bld_tgsi_soa functionsTom Stellard2-132/+169
2011-12-09gallivm: Add userdata field to struct lp_build_tgsi_soa_contextTom Stellard1-0/+4
2011-12-09 gallivm: Allow user to configure behavior of emit_fetch() -> soaTom Stellard2-17/+33
2011-12-09gallivm: Move struct lp_build_tgsi_soa_context to header fileTom Stellard2-92/+95
2011-12-09gallivm: Increase visibility of some lp_bld_tgsi_aos functionsTom Stellard2-69/+103
2011-12-09gallivm: Add userdata field to struct lp_build_tgsi_aos_contextTom Stellard1-0/+4
2011-12-09gallivm: Allow user to configure behavior of emit_fetch() -> aosTom Stellard2-14/+30
2011-12-09gallivm: Move struct lp_build_tgsi_aos_context to header fileTom Stellard2-45/+44
2011-12-08mesa,intel: use _mesa_image_offset() for PBOsnobled2-15/+19
2011-12-08mesa: add _mesa_image_offset()nobled2-17/+57
2011-12-08mesa/image: assert on bad formatnobled1-11/+9
2011-12-08mesa/image: delete dead storenobled1-7/+0
2011-12-08glsl_to_tgsi: fix a bug in eliminate_dead_code_advanced()Bryan Cain1-10/+8
2011-12-08llvmpipe: Trim the fragment shader cached based on LLVM IR instruction count.José Fonseca6-11/+62
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