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AgeCommit message (Expand)AuthorFilesLines
2012-09-21r600g: Re-enable growing of the compute memory poolSep24-ComputeTom Stellard2-18/+4
2012-09-21r600g: Fix bug when adding new items to the compute memory poolTom Stellard1-6/+23
2012-09-21r600g: Use a RAT buffer as the backing bo for the compute memory poolTom Stellard1-4/+3
2012-09-21r600g: Make sure to init the compute memory pool with enough memoryTom Stellard1-1/+1
2012-09-21r600g: Add r600_rat_buffer_create()Tom Stellard4-9/+69
2012-09-21r600g: Handle PIPE_BUFFER target in r600_init_surface()Tom Stellard1-1/+1
2012-09-21clover: Query device for CL_DEVICE_MAX_MEM_ALLOC_SIZETom Stellard3-1/+11
2012-09-21gallium: Add PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZETom Stellard2-1/+12
2012-09-21clover: Handle NULL value for clEnqueueNDRangeKernel local_work_sizeTom Stellard1-5/+8
2012-09-21r600g: Handle multiple kernels in the same program v2Tom Stellard5-21/+82
2012-09-21clover: Handle multiple kernels in the same program v2Blaž Tomažič2-33/+37
2012-09-21clover: Initialize height and depth to 1 for transfersTom Stellard1-1/+1
2012-09-21pipe-loader: Remove a few debug_printfsTom Stellard2-4/+0
2012-09-21radeon/llvm: Handle loads from the constants address space.Tom Stellard2-0/+10
2012-09-21radeon/llvm: Add support for v4f32 stores on R600Tom Stellard3-9/+27
2012-09-21radeon/llvm: Add support for i8 reads on R600Tom Stellard3-0/+25
2012-09-21radeon/llvm: Expand vector fadd and fmul on R600Tom Stellard1-0/+3
2012-09-21radeon/llvm: Add optimization for FP_ROUNDTom Stellard2-0/+27
2012-09-21radeon/llvm: Replace AMDGPU pow intrinsic with the llvm versionTom Stellard4-7/+26
2012-09-21i965/blorp: Fix narrowing warnings.Paul Berry1-3/+3
2012-09-21i965: Remove brw_set_predicate_inverse(p, true) from scratch offset codeKenneth Graunke1-1/+0
2012-09-20mesa: Don't override S3TC internalFormat if data is pre-compressed.Kenneth Graunke1-1/+1
2012-09-20i965/blorp: Add support for blits between SRGB and linear formats.Kenneth Graunke2-4/+8
2012-09-20mesa: Ignore SRGB when determining compatible resolve formats.Kenneth Graunke1-1/+2
2012-09-20docs: update some more FAQsAndreas Boll1-14/+18
2012-09-20docs: remove utility.htmlAndreas Boll2-44/+0
2012-09-20docs: remove science.htmlAndreas Boll2-79/+0
2012-09-20docs: remove modelers.htmlAndreas Boll2-73/+0
2012-09-20docs: remove libraries.htmlAndreas Boll2-66/+0
2012-09-20docs: remove games.htmlAndreas Boll2-73/+0
2012-09-20docs/contents: add autoconf.html linkAndreas Boll1-0/+4
2012-09-20docs: convert last traces of progs to mesa/demos repositoryAndreas Boll2-6/+5
2012-09-20docs: add IRC infoAndreas Boll1-1/+6
2012-09-20docs/egl: improve markupAndreas Boll1-36/+52
2012-09-20docs/autoconf: improve markupAndreas Boll1-41/+65
2012-09-20docs/autoconf: remove obsolete demo optionsAndreas Boll1-21/+0
2012-09-20docs: improve quality of gears.pngAndreas Boll1-0/+0
2012-09-20gallium: mention PIPE_TIMEOUT_INFINITE in the fence_finish() commentBrian Paul1-1/+1
2012-09-20llvmpipe: fix overflow bug in total texture size computationBrian Paul1-2/+16
2012-09-20r600g/llvm: rs780/rs880 are r600 asicsAlex Deucher1-2/+2
2012-09-20mesa: Allow glGetTexParameter of GL_TEXTURE_SRGB_DECODE_EXTIan Romanick1-0/+12
2012-09-19r300/compiler: Use precomputed q values in the register allocatorTom Stellard1-1/+69
2012-09-19r300g: Init regalloc state during context creationTom Stellard8-155/+204
2012-09-19r300/compiler: Don't create register classes for inputsTom Stellard1-14/+1
2012-09-19ra: Add q_values parameter to ra_set_finalize()Tom Stellard5-5/+18
2012-09-19ra: Clarify usage of ra_set_node_reg()Tom Stellard1-0/+2
2012-09-19r600g: Invalidate texture cache when creating vertex buffers for compute v2Tom Stellard1-1/+3
2012-09-19r600g: Use LOOP_START_DX10 for loopsTom Stellard3-2/+11
2012-09-19r600g: Set the correct value of COLOR*_DIM for RATsTom Stellard1-2/+2
2012-09-19r600g: Make sure to initialize DB_DEPTH_CONTROL register for computeTom Stellard1-1/+3
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