index
:
~tstellar/llvm
9.1-abi-fix
Nov13-test
Oct18-backup
assembler
assembler-Jan-06-2015
assembler-push
backup-Oct15
backup-Oct18
bfgminer
bfgminer-perf
cayman-only-bfgminer
clover-elf
clover-elf-v2
hazard-rec
hsa
image-support
indirect-addressing
indirect-wip
indirect-wip-2
indirect-wip-3
indirect-wip-4
indirect-wip-5
kernel-args-WIP
lds
lds-v2
long-alu
madk
master
master-testing
master-testing-patches
master-testing-patches-v2
master-testing-si
master-testing-v2
mi-sched-experimental
native
opencv-Sep18-patches
perf-Dec31-2014
perf-Jan-08-2015
push-jan16
r600
r600-May09
r600-alu-encoding
r600-final-push
r600-gen-fixes
r600-imm-flags
r600-initial-review
r600-initial-review-May11
r600-master
r600-private-mem-fixes
r600-private-memory
r600-review-v10
r600-review-v3
r600-review-v7
r600-review-v8
r600-review-v9
r600-rewrite-pats
r600-structurizer
r600-structurizer-v2
r600-tablegen-hwreg
r600-tablegen-reg-encoding
r600-vliw
remove-fold-operands
sched-fixes
sched-perf-Mar-27-2015
si-compute
si-compute-v3
si-fold
si-lowercase
si-scheduler
si-scheduler-v2
si-scheduler-v3
si-sgpr-copies
si-spill-fixes
si-spill-fixes-v2
si-spill-fixes-v3
si-spill-fixes-v4
smrd-cluster
struct-divergence
struct-divergence-v1
vgpr-spilling-Jan07-2014
vinterp-fix
vliw5-rebase
vlj-bottom-up
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tstellar
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Author
Files
Lines
2016-03-30
AMDGPU: Implement SIRegisterInfo::getRegPressureSetScore()
hazard-rec
Tom Stellard
2
-0
/
+22
2016-03-30
AMDGPU/SI: Use hazard recognizer to detect DPP hazards
Tom Stellard
4
-57
/
+33
2016-03-30
AMDGPU/SI: Enable the post-ra scheduler
Tom Stellard
29
-100
/
+397
2016-03-30
AMDGPU/SI: Optimize adjacent s_nop instructions
Matt Arsenault
1
-0
/
+24
2016-03-30
AMDGPU/SI: Move post regalloc run of SIShrinkInstructions
Matt Arsenault
1
-5
/
+1
2016-03-30
CodeGen: Add a stand-alone hazard recognizer pass
Tom Stellard
7
-0
/
+113
2016-03-30
AMDGPU/SI: Add latency for export instructions
Tom Stellard
2
-5
/
+5
2016-03-29
AMDGPU/SI: Add MachineBasicBlock parameter to SIInstrInfo::insertWaitStates
Tom Stellard
4
-6
/
+8
2016-03-29
AMDGPU/SI: Improve MachineSchedModel definition
Tom Stellard
10
-182
/
+196
2016-03-24
AMDGPU/SI: Enable lanemask tracking in misched
Tom Stellard
31
-139
/
+128
2016-03-24
AMDGPU/SI: Limit load clustering to 16 bytes instead of 4 instructions
Tom Stellard
4
-16
/
+43
2016-03-24
Fix resolution of linkonce symbols in comdats.
Rafael Espindola
3
-2
/
+23
2016-03-24
[mips] Range check vsplat_simm5 and vsplat_simm10
Daniel Sanders
3
-213
/
+262
2016-03-24
Remove unsafe AssertZext after promoting result of FP_TO_FP16
Pirama Arumuga Nainar
2
-4
/
+13
2016-03-24
[PowerPC] Disable direct moves for extractelement and bitcast in 32-bit mode
Nemanja Ivanovic
2
-2
/
+17
2016-03-24
Recommitted r263424 "Supporting all entities declared in lexical scope in LLV...
Amjad Aboud
21
-91
/
+916
2016-03-24
[mips] Range check simm10
Daniel Sanders
4
-4
/
+17
2016-03-24
[X86][XOP] Support for VPPERM byte shuffle instruction
Simon Pilgrim
6
-5
/
+60
2016-03-24
[mips] Tidy up cnMIPS tablegen definitions. NFC.
Daniel Sanders
2
-51
/
+58
2016-03-24
Fix sequence point warning. NFC.
Vasileios Kalintiris
1
-1
/
+1
2016-03-24
[llvm-nm] Fix r264247
James Molloy
1
-1
/
+1
2016-03-24
[mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, D...
Zlatko Buljan
15
-59
/
+655
2016-03-24
[llvm-nm] Correct -P ELF output
James Molloy
2
-0
/
+4
2016-03-24
[mips][microMIPS] Implement MTC*, MTHC* and DMTC* instructions
Hrvoje Varga
15
-11
/
+248
2016-03-24
[mips][microMIPS] Fix for "Cannot copy registers" assertion
Hrvoje Varga
6
-9
/
+26
2016-03-24
[LAA] Formatting fix in previous change
Adam Nemet
1
-2
/
+1
2016-03-24
[LAA] Support memchecks involving loop-invariant addresses
Adam Nemet
2
-17
/
+69
2016-03-24
[Support] Add conversions between Expected<T> and ErrorOr<T>.
Lang Hames
2
-1
/
+40
2016-03-24
[libFuzzer] don't report memory leaks if we are dying due to a timeout (just ...
Kostya Serebryany
5
-5
/
+25
2016-03-24
[libFuzzer] use fdopen+vfprintf instead of fsnprintf+write
Kostya Serebryany
1
-11
/
+10
2016-03-24
[X86][SSE] Added tests to ensure that consecutive loads including any/all vol...
Simon Pilgrim
3
-0
/
+275
2016-03-24
[PS4] Guarantee an instruction after a 'noreturn' call.
Paul Robinson
3
-1
/
+45
2016-03-24
Fix lazy linking of comdat members.
Rafael Espindola
2
-15
/
+17
2016-03-24
[sancov] -print-coverage-stats option to print various coverage statistics.
Mike Aizatsky
2
-4
/
+59
2016-03-23
[Support] Make all Errors convertible to std::error_code.
Lang Hames
5
-5
/
+68
2016-03-23
APFloat: Fix signalling nans for scalbn
Matt Arsenault
2
-1
/
+18
2016-03-23
AMDGPU: Remove atomic inc/dec patterns
Matt Arsenault
3
-139
/
+116
2016-03-23
AMDGPU: Promote alloca should skip volatiles
Matt Arsenault
2
-0
/
+39
2016-03-23
[sancov] code readability improvement.
Mike Aizatsky
1
-11
/
+26
2016-03-23
docs: Fix a missing language in a code-block
Justin Bogner
1
-1
/
+1
2016-03-23
[CUDA] Update docs to reflect that we no longer define __NVCC__.
Justin Lebar
1
-4
/
+5
2016-03-23
StringRef::copy shouldn't allocate anything for length 0 strings.
Pete Cooper
2
-0
/
+12
2016-03-23
AMDGPU: Insert moves of frame index to value operands
Matt Arsenault
3
-6
/
+204
2016-03-23
Allow X86::COND_NE_OR_P and X86::COND_NP_OR_E to be reversed.
Cong Hou
8
-107
/
+179
2016-03-23
Fix a cut-and-paste error in the changes for r264187 which I think is
Kevin Enderby
1
-1
/
+1
2016-03-23
reorganize llc checks script to allow more flexibility; NFCI
Sanjay Patel
1
-28
/
+31
2016-03-23
More more change need as part of r264187 where ErrorOr<> was added
Kevin Enderby
1
-1
/
+5
2016-03-23
Fix logic for which symbols to keep with comdats.
Rafael Espindola
4
-5
/
+97
2016-03-23
Fix a crash in running llvm-objdump -t with an invalid Mach-O file already
Kevin Enderby
15
-24
/
+75
2016-03-23
[x86] make peekThroughBitcasts() a helper function
Sanjay Patel
1
-60
/
+31
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