diff options
| author | ckoenig <ckoenig@91177308-0d34-0410-b5e6-96231b3b80d8> | 2013-02-16 11:27:56 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-02-19 15:01:41 +0000 |
| commit | 22b6e35cdd44a9f8ca67cc5d2b35e332805f8ffc (patch) | |
| tree | 21435a884f7b70ee5c49afa831cea7b99215f99f | |
| parent | 12fa80635f08a62b5fec5b5ade245373ae28567e (diff) | |
R600/SI: remove some more unused code
This is a candidate for the stable branch.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175350 91177308-0d34-0410-b5e6-96231b3b80d8
(cherry picked from commit 5946c6fae4b708179782f04afb151a8fc1a0f632)
| -rw-r--r-- | lib/Target/R600/AMDGPUCodeEmitter.h | 45 | ||||
| -rw-r--r-- | lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h | 7 |
2 files changed, 0 insertions, 52 deletions
diff --git a/lib/Target/R600/AMDGPUCodeEmitter.h b/lib/Target/R600/AMDGPUCodeEmitter.h deleted file mode 100644 index 5d61cd0de62..00000000000 --- a/lib/Target/R600/AMDGPUCodeEmitter.h +++ /dev/null @@ -1,45 +0,0 @@ -//===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -/// \file -/// \brief CodeEmitter interface for R600 and SI codegen. -// -//===----------------------------------------------------------------------===// - -#ifndef AMDGPUCODEEMITTER_H -#define AMDGPUCODEEMITTER_H - -namespace llvm { - -class AMDGPUCodeEmitter { -public: - uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const; - virtual uint64_t getMachineOpValue(const MachineInstr &MI, - const MachineOperand &MO) const { return 0; } - virtual unsigned GPR4AlignEncode(const MachineInstr &MI, - unsigned OpNo) const { - return 0; - } - virtual unsigned GPR2AlignEncode(const MachineInstr &MI, - unsigned OpNo) const { - return 0; - } - virtual uint64_t VOPPostEncode(const MachineInstr &MI, - uint64_t Value) const { - return Value; - } - virtual uint64_t i32LiteralEncode(const MachineInstr &MI, - unsigned OpNo) const { - return 0; - } -}; - -} // End namespace llvm - -#endif // AMDGPUCODEEMITTER_H diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h b/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h index 3b3816a5107..8721f8084d6 100644 --- a/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h +++ b/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h @@ -42,13 +42,6 @@ public: SmallVectorImpl<MCFixup> &Fixups) const { return 0; } - virtual uint64_t VOPPostEncode(const MCInst &MI, uint64_t Value) const { - return Value; - } - virtual uint64_t i32LiteralEncode(const MCInst &MI, unsigned OpNo, - SmallVectorImpl<MCFixup> &Fixups) const { - return 0; - } }; } // End namespace llvm |