diff options
| author | Christian Konig <christian.koenig@amd.com> | 2013-02-21 15:16:49 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-04-03 12:00:38 -0700 |
| commit | 1e58fb2522f6b22eb7234018f3836a7840a86602 (patch) | |
| tree | fabc1e396afc085f47156bd0749343f745339a2b | |
| parent | 0da69b7c6229a82b3213f15616af997efa5979d4 (diff) | |
R600/SI: add constant for inline zero operand
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175747 91177308-0d34-0410-b5e6-96231b3b80d8
(cherry picked from commit 7fa9957b16ee314b294da8abbec70bd2f1dfa608)
| -rw-r--r-- | lib/Target/R600/SIInstrInfo.td | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td index cf0d5b936ae..8b90d45645c 100644 --- a/lib/Target/R600/SIInstrInfo.td +++ b/lib/Target/R600/SIInstrInfo.td @@ -49,9 +49,8 @@ class InlineImm <ValueType vt> : ImmLeaf <vt, [{ // SI assembler operands //===----------------------------------------------------------------------===// -class SIOperand <ValueType vt, dag opInfo>: Operand <vt> { - let EncoderMethod = "encodeOperand"; - let MIOperandInfo = opInfo; +def SIOperand { + int ZERO = 0x80; } class GPR4Align <RegisterClass rc> : Operand <vAny> { @@ -201,7 +200,7 @@ multiclass VOPC_Helper <bits<8> op, RegisterClass vrc, RegisterClass arc, InstFlag:$omod, InstFlag:$neg), opName, pattern > { - let SRC2 = 0x80; + let SRC2 = SIOperand.ZERO; } } |