diff options
| author | Tom Stellard <thomas.stellard@amd.com> | 2015-01-07 16:36:22 -0500 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-01-07 16:36:22 -0500 |
| commit | 2ae335f62fa69aa6865257ff1610301ab4fb4a6d (patch) | |
| tree | 9f315520dd241d6cae82374d9b464258c2c25d9f | |
| parent | 4c942b7c49dc73bffbd8bdc38a05ed035898cd57 (diff) | |
XXX: Clear some kill flags.vgpr-spilling-Jan07-2014
| -rw-r--r-- | lib/Target/R600/SIPrepareScratchRegs.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/R600/SIRegisterInfo.cpp | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/R600/SIPrepareScratchRegs.cpp b/lib/Target/R600/SIPrepareScratchRegs.cpp index ea505a1ca9c..29a2432b854 100644 --- a/lib/Target/R600/SIPrepareScratchRegs.cpp +++ b/lib/Target/R600/SIPrepareScratchRegs.cpp @@ -192,12 +192,12 @@ bool SIPrepareScratchRegs::runOnMachineFunction(MachineFunction &MF) { MI.getOperand(2).setIsUndef(false); MI.getOperand(3).setReg(ScratchOffsetReg); MI.getOperand(3).setIsUndef(false); + MI.getOperand(3).setIsKill(false); MI.addOperand(MachineOperand::CreateReg(Rsrc0, false, true, true)); MI.addOperand(MachineOperand::CreateReg(Rsrc1, false, true, true)); MI.addOperand(MachineOperand::CreateReg(Rsrc2, false, true, true)); MI.addOperand(MachineOperand::CreateReg(Rsrc3, false, true, true)); - MI.dump(); break; } } diff --git a/lib/Target/R600/SIRegisterInfo.cpp b/lib/Target/R600/SIRegisterInfo.cpp index b4c7cb29b02..787fef46b7a 100644 --- a/lib/Target/R600/SIRegisterInfo.cpp +++ b/lib/Target/R600/SIRegisterInfo.cpp @@ -142,7 +142,7 @@ void SIRegisterInfo::buildScratchLoadStore(MachineBasicBlock::iterator MI, .addReg(SubReg, getDefRegState(IsLoad)) .addReg(ScratchRsrcReg, getKillRegState(IsKill)) .addImm(Offset) - .addReg(SOffset, getKillRegState(IsKill)) + .addReg(SOffset) .addImm(0) // glc .addImm(0) // slc .addImm(0) // tfe |