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authorTom Stellard <thomas.stellard@amd.com>2015-10-16 23:45:21 +0000
committerTom Stellard <thomas.stellard@amd.com>2015-10-16 23:45:21 +0000
commitb945cd84ac3b6c20973bbda08c3097749704b000 (patch)
tree96b5653969bf45776563fcd4e127e7ac99263c7c
parent02c93c7153fa0e99aeb95971f98cc060a940bf4a (diff)
XXX: remove debug prints.struct-divergence
-rw-r--r--lib/Target/AMDGPU/SIInstrInfo.cpp2
1 files changed, 0 insertions, 2 deletions
diff --git a/lib/Target/AMDGPU/SIInstrInfo.cpp b/lib/Target/AMDGPU/SIInstrInfo.cpp
index cdd41e21b7f..52a23c8180a 100644
--- a/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -1708,7 +1708,6 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr *MI, unsigned OpIdx,
}
void SIInstrInfo::legalizeOperands(MachineInstr *MI) const {
- dbgs() << "legalzing: " ; MI->dump();
MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo();
int Src0Idx = AMDGPU::getNamedOperandIdx(MI->getOpcode(),
@@ -2220,7 +2219,6 @@ void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const {
MachineBasicBlock *MBB = Inst->getParent();
MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
- Inst->dump();
unsigned Opcode = Inst->getOpcode();
unsigned NewOpcode = getVALUOp(*Inst);