diff options
author | Tom Stellard <thomas.stellard@amd.com> | 2015-05-05 22:08:52 +0000 |
---|---|---|
committer | Tom Stellard <thomas.stellard@amd.com> | 2015-05-21 20:13:00 +0000 |
commit | e56bb2888044aed42ac1b88dffd0c3c6f7873971 (patch) | |
tree | b222eebc6ac71a41c8e063cfa494cd57c253899c | |
parent | c9134db005116e856d0aebb81243aa780a8f495e (diff) |
R600/SI: Enable post-ra machine schedulersmrd-cluster
-rw-r--r-- | lib/Target/R600/AMDGPUSubtarget.h | 4 | ||||
-rw-r--r-- | lib/Target/R600/AMDGPUTargetMachine.cpp | 16 |
2 files changed, 13 insertions, 7 deletions
diff --git a/lib/Target/R600/AMDGPUSubtarget.h b/lib/Target/R600/AMDGPUSubtarget.h index 57a084e6b3e..31758d1864f 100644 --- a/lib/Target/R600/AMDGPUSubtarget.h +++ b/lib/Target/R600/AMDGPUSubtarget.h @@ -230,6 +230,10 @@ public: unsigned getAmdKernelCodeChipID() const; + bool enablePostMachineScheduler() const override { + return true; + } + bool enableMachineScheduler() const override { return true; } diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp index 44c2abd294f..e04bf15d060 100644 --- a/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/lib/Target/R600/AMDGPUTargetMachine.cpp @@ -143,13 +143,11 @@ public: class GCNPassConfig : public AMDGPUPassConfig { public: - GCNPassConfig(TargetMachine *TM, PassManagerBase &PM) - : AMDGPUPassConfig(TM, PM) { } + GCNPassConfig(TargetMachine *TM, PassManagerBase &PM); bool addPreISel() override; bool addInstSelector() override; void addPreRegAlloc() override; void addPostRegAlloc() override; - void addPreSched2() override; void addPreEmitPass() override; }; @@ -234,6 +232,13 @@ TargetPassConfig *R600TargetMachine::createPassConfig(PassManagerBase &PM) { // GCN Pass Setup //===----------------------------------------------------------------------===// +GCNPassConfig::GCNPassConfig(TargetMachine *TM, PassManagerBase &PM) : + AMDGPUPassConfig(TM, PM) { + + // Enable the post-RA machine scheduler + substitutePass(&PostRASchedulerID, &PostMachineSchedulerID); +} + bool GCNPassConfig::addPreISel() { AMDGPUPassConfig::addPreISel(); addPass(createSinkingPass()); @@ -279,11 +284,8 @@ void GCNPassConfig::addPostRegAlloc() { addPass(createSIShrinkInstructionsPass(), false); } -void GCNPassConfig::addPreSched2() { - addPass(createSIInsertWaits(*TM), false); -} - void GCNPassConfig::addPreEmitPass() { + addPass(createSIInsertWaits(*TM), false); addPass(createSILowerControlFlowPass(*TM), false); } |