diff options
| author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2014-11-14 12:46:09 +0200 |
|---|---|---|
| committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2014-11-14 14:27:08 +0200 |
| commit | 9e0b221b2b76b079345b24a4f4fdd6794243a755 (patch) | |
| tree | 48e60383da9003807b96faba67fa86baa2eeb3de | |
| parent | 5057be6e1458884d3d065b9f9b6d2e8b2c2b70bb (diff) | |
i965: Use df uniform loading for hsw alsofp64_lower_df_hsw
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.cpp | 3 |
3 files changed, 0 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 83cfa64e8f..25ed4e7ea1 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -2902,8 +2902,6 @@ void brw_copy_double_float_scalar(struct brw_compile *p, const struct brw_context *brw = p->brw; brw_inst *insn = brw_alu1(p, BRW_OPCODE_MOV, dst, src); - assert(brw->gen == 7); - /* Double precision float scalar isn't supported by IVB. Is has to be * loaded into a vector manually. In SIMD8 mode it is possible to treat the * double precision float as a pair of single precision floats using diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index e9aa071ba8..04ededd427 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -1566,8 +1566,6 @@ fs_generator::generate_uniform_double_float_load(const fs_inst *inst, struct brw_reg dst, struct brw_reg src) { - assert(p->brw->gen == 7); - dst.type = BRW_REGISTER_TYPE_UD; dst.width = BRW_WIDTH_8; dst.hstride = BRW_HORIZONTAL_STRIDE_1; diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 58d6e77c37..94765d6b7c 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -957,8 +957,5 @@ bool backend_visitor::is_df_uniform_and_needs_separate_load( const struct backend_reg& reg) const { - if (brw->gen >= 8 || brw->is_haswell) - return false; - return reg.file == UNIFORM && reg.type == BRW_REGISTER_TYPE_DF; } |