intel/blorp: Use push constantsdbg/blorp_push_const

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

6 files changed, 59 insertions, 6 deletions

diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index e348cafb2e..d6ff0eba34 100644
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -172,9 +172,11 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
 
    memset(wm_prog_data, 0, sizeof(*wm_prog_data));
 
-   assert(exec_list_is_empty(&nir->uniforms));
-   wm_prog_data->base.nr_params = 0;
-   wm_prog_data->base.param = NULL;
+   wm_prog_data->base.param = ralloc_array(NULL, uint32_t, 4);
+   for (unsigned i = 0; i < 4; i++)
+      wm_prog_data->base.param[i] = (2 << 24) | i;
+
+   wm_prog_data->base.nr_params = 4;
 
    /* BLORP always uses the first two binding table entries:
     * - Surface 0 is the render target (which always start from 0)
@@ -193,6 +195,10 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
       wm_key->input_slots_valid = nir->info.inputs_read | VARYING_BIT_POS;
    }
 
+   nir_assign_var_locations(&nir->uniforms, &nir->num_uniforms,
+                            type_size_scalar_bytes);
+   nir_lower_io(nir, nir_var_uniform, type_size_scalar_bytes, 0);
+
    const unsigned *program =
       brw_compile_fs(compiler, blorp->driver_ctx, mem_ctx, wm_key,
                      wm_prog_data, nir, NULL, -1, -1, false, use_repclear,
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 832e8ee26f..13285b91bd 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -62,7 +62,8 @@ blorp_params_get_clear_kernel(struct blorp_context *blorp,
    b.shader->info.name = ralloc_strdup(b.shader, "BLORP-clear");
 
    nir_variable *v_color =
-      BLORP_CREATE_NIR_INPUT(b.shader, clear_color, glsl_vec4_type());
+      nir_variable_create(b.shader, nir_var_uniform, glsl_vec4_type(),
+			  "clear_color");
 
    nir_variable *frag_color = nir_variable_create(b.shader, nir_var_shader_out,
                                                   glsl_vec4_type(),
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 593521b95c..990b5cd3ab 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -60,6 +60,10 @@ static void *
 blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
                           struct blorp_address *addr);
 
+static struct blorp_address
+blorp_emit_wm_constants(struct blorp_batch *batch,
+                        const struct blorp_params *params);
+
 #if GEN_GEN >= 8
 static struct blorp_address
 blorp_get_workaround_page(struct blorp_batch *batch);
@@ -758,6 +762,8 @@ blorp_emit_ps_config(struct blorp_batch *batch,
          ps.BindingTableEntryCount = 1;
       }
 
+      ps.PushConstantEnable = true;
+
       if (prog_data) {
          ps.DispatchGRFStartRegisterForConstantSetupData0 =
             prog_data->base.dispatch_grf_start_reg;
@@ -1194,13 +1200,22 @@ blorp_emit_pipeline(struct blorp_batch *batch,
    (void)depth_stencil_state_offset;
 #endif
 
+#if GEN_GEN >= 9
+   struct blorp_address ps_const = blorp_emit_wm_constants(batch, params);
+#endif
    blorp_emit(batch, GENX(3DSTATE_CONSTANT_VS), vs);
 #if GEN_GEN >= 7
    blorp_emit(batch, GENX(3DSTATE_CONSTANT_HS), hs);
    blorp_emit(batch, GENX(3DSTATE_CONSTANT_DS), DS);
 #endif
    blorp_emit(batch, GENX(3DSTATE_CONSTANT_GS), gs);
-   blorp_emit(batch, GENX(3DSTATE_CONSTANT_PS), ps);
+
+   blorp_emit(batch, GENX(3DSTATE_CONSTANT_PS), ps) {
+#if GEN_GEN >= 9
+      ps.ConstantBody.ReadLength[3] = 1;
+      ps.ConstantBody.Buffer[3] = ps_const;
+#endif
+   };
 
    if (params->src.enabled)
       blorp_emit_sampler_state(batch);
diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c
index 9023269d61..113e162ad1 100644
--- a/src/intel/vulkan/genX_blorp_exec.c
+++ b/src/intel/vulkan/genX_blorp_exec.c
@@ -91,6 +91,13 @@ blorp_alloc_dynamic_state(struct blorp_batch *batch,
    return state.map;
 }
 
+static struct blorp_address
+blorp_emit_wm_constants(struct blorp_batch *batch,
+                        const struct blorp_params *params)
+{
+   return (struct blorp_address) {};
+}
+
 static void
 blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries,
                           unsigned state_size, unsigned state_alignment,
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index ba14136edc..19adcf93b2 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -1175,7 +1175,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
    if (x0 == x1 || y0 == y1)
       return;
 
-   bool can_fast_clear = !partial_clear;
+   bool can_fast_clear = false;
 
    bool color_write_disable[4] = { false, false, false, false };
    if (set_write_disables(irb, GET_COLORMASK(ctx->Color.ColorMask, buf),
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index 581438966e..cdd835a080 100644
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -119,6 +119,28 @@ blorp_alloc_dynamic_state(struct blorp_batch *batch,
    return brw_state_batch(brw, size, alignment, offset);
 }
 
+static struct blorp_address
+blorp_emit_wm_constants(struct blorp_batch *batch,
+                        const struct blorp_params *params)
+{  
+   assert(batch->blorp->driver_ctx == batch->driver_batch);
+   struct brw_context *brw = batch->driver_batch;
+   uint32_t offset = 0;
+
+   uint32_t *constants = brw_state_batch(brw, 4 * sizeof(float), 32, &offset);
+
+   const uint32_t *push_consts = (const uint32_t *)&params->wm_inputs;
+   for (unsigned i = 0; i < 4; i++)
+      constants[i] = push_consts[i];
+   
+   struct blorp_address addr = {
+      .buffer = brw->batch.state.bo,
+      .offset = offset
+   };
+
+   return addr;
+}
+
 static void
 blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries,
                           unsigned state_size, unsigned state_alignment,
@@ -301,6 +323,8 @@ retry:
    gen8_write_pma_stall_bits(brw, 0);
 #endif
 
+   gen7_emit_push_constant_state(brw, 16, 0, 0, 0, 16);
+
    blorp_emit(batch, GENX(3DSTATE_DRAWING_RECTANGLE), rect) {
       rect.ClippedDrawingRectangleXMax = MAX2(params->x1, params->x0) - 1;
       rect.ClippedDrawingRectangleYMax = MAX2(params->y1, params->y0) - 1;