diff options
| author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2017-11-23 11:29:40 +0200 |
|---|---|---|
| committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2018-01-10 12:33:51 +0200 |
| commit | 205d39140ef218ded4dfcf412612ced849d7c6ce (patch) | |
| tree | e144d94bd1660075a6b8c7468e2c2a975d7a0c06 | |
| parent | b7a50d8cd44ba0a8bbc3d593ab31a0a0931bae75 (diff) | |
i965/fs: Lower gles mediump floats into 16-bits16_bit_gles
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_link.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp index 64267671c0..ac0ad90a24 100644 --- a/src/mesa/drivers/dri/i965/brw_link.cpp +++ b/src/mesa/drivers/dri/i965/brw_link.cpp @@ -134,6 +134,9 @@ process_glsl_ir(struct brw_context *brw, lower_noise(shader->ir); lower_quadop_vector(shader->ir, false); + if (shader_prog->IsES && shader->Stage == MESA_SHADER_FRAGMENT) + lower_mediump(shader); + validate_ir_tree(shader->ir); /* Now that we've finished altering the linked IR, reparent any live IR back |