diff options
author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2015-06-25 14:35:26 +0300 |
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committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2015-08-13 13:37:49 +0300 |
commit | 12a66d91f6b0beff123fb6fd8a4f3c3796379532 (patch) | |
tree | 86f057174969ea3b3faf7c42fcfea7233e2a1ec6 | |
parent | b4897eb70a994c4630b0fde4a66dd6ace833c33a (diff) |
i965: Only write program to cache when it doesn't exist yet
Current logic re-writes the same data when existing data is found.
Not that this actually matters at the moment in practice, the
contraint for finding matching data is too severe to ever allow
data to be shared between two items in the cache.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_cache.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index 50c02432e8..61439a89f8 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -314,6 +314,13 @@ brw_upload_cache(struct brw_cache *cache, */ if (!brw_try_upload_using_copy(cache, item, data, aux)) { item->offset = brw_alloc_item_data(cache, data_size); + + /* Copy data to the buffer */ + if (brw->has_llc) { + memcpy((char *)cache->bo->virtual + item->offset, data, data_size); + } else { + drm_intel_bo_subdata(cache->bo, item->offset, data_size, data); + } } /* Set up the memory containing the key and aux_data */ @@ -332,13 +339,6 @@ brw_upload_cache(struct brw_cache *cache, cache->items[hash] = item; cache->n_items++; - /* Copy data to the buffer */ - if (brw->has_llc) { - memcpy((char *) cache->bo->virtual + item->offset, data, data_size); - } else { - drm_intel_bo_subdata(cache->bo, item->offset, data_size, data); - } - *out_offset = item->offset; *(void **)out_aux = (void *)((char *)item->key + item->key_size); cache->brw->ctx.NewDriverState |= 1 << cache_id; |