Add some comments from EDID spec.

1 files changed, 175 insertions, 4 deletions

diff --git a/testedid.c b/testedid.c
index 0bc0ef5..92d6b99 100755
--- a/testedid.c
+++ b/testedid.c
@@ -184,6 +184,50 @@ int parse_edid(char edid[])
     printf("\tProductWeek/year: %d/%d\n",edid[0x10],edid[0x11]+1990);
     printf("\tEdidVersion: %hhx.%hhx\n",edid[0x12],edid[0x13]);
 
+/*
+Address Bit Definitions Description
+7 _ _ _ _ _ _ _ Video Signal Interface: Bit 7
+0 _ _ _ _ _ _ _ Input is an Analog Video Signal Interface:
+7 6 5 _ _ _ _ _ Signal Level Standard: Video : Sync : Total Bits 6 & 5
+0 0 0 _ _ _ _ _ 0.700 : 0.300 : 1.000 V p-p
+0 0 1 _ _ _ _ _ 0.714 : 0.286 : 1.000 V p-p
+0 1 0 _ _ _ _ _ 1.000 : 0.400 : 1.400 V p-p
+0 1 1 _ _ _ _ _ 0.700 : 0.000 : 0.700 V p-p
+7 _ _ 4 _ _ _ _ Video Setup: Bit 4
+0 _ _ 0 _ _ _ _ Video Setup: Blank Level = Black Level
+0 _ _ 1 _ _ _ _ Video Setup: Blank-to-Black setup or pedestal (see Note 1)
+7 _ _ _ 3 2 1 _ Synchronization Types: Bits 3 → 1
+0 _ _ _ 0 _ _ _ Separate Sync H & V Signals are not supported
+0 _ _ _ 1 _ _ _ Separate Sync H & V Signals are supported
+0 _ _ _ _ 0 _ _ Composite Sync Signal on Horizontal is not supported
+0 _ _ _ _ 1 _ _ Composite Sync Signal on Horizontal is supported
+0 _ _ _ _ _ 0 _ Composite Sync Signal on Green Video is not supported
+0 _ _ _ _ _ 1 _ Composite Sync Signal on Green Video is supported
+7 _ _ _ _ _ _ 0 Serrations: Bit 0
+0 _ _ _ _ _ _ 0 Serration on the Vertical Sync is not supported
+14h
+0 _ _ _ _ _ _ 1 Serration on the Vertical Sync is supported (see Note 2)
+7 _ _ _ _ _ _ _ Video Signal Interface: Bit 7
+1 _ _ _ _ _ _ _ Input is a Digital Video Signal Interface: (see Note 3)
+7 6 5 4 _ _ _ _ Color Bit Depth: Bits 6 → 4
+1 0 0 0 _ _ _ _ Color Bit Depth is undefined
+1 0 0 1 _ _ _ _ 6 Bits per Primary Color
+1 0 1 0 _ _ _ _ 8 Bits per Primary Color
+1 0 1 1 _ _ _ _ 10 Bits per Primary Color
+1 1 0 0 _ _ _ _ 12 Bits per Primary Color
+1 1 0 1 _ _ _ _ 14 Bits per Primary Color
+1 1 1 0 _ _ _ _ 16 Bits per Primary Color
+1 1 1 1 _ _ _ _ Reserved (Do Not Use)
+7 _ _ _ 3 2 1 0 Digital Video Interface Standard Supported: Bits 3 → 0
+1 _ _ _ 0 0 0 0 Digital Interface is not defined (see Note 4)
+1 _ _ _ 0 0 0 1 DVI is supported
+1 _ _ _ 0 0 1 0 HDMI-a is supported
+1 _ _ _ 0 0 1 1 HDMI-b is supported
+1 _ _ _ 0 1 0 0 MDDI is supported
+1 _ _ _ 0 1 0 1 DisplayPort is supported
+14h
+1 _ _ _ → → → → All remaining values for Bits 3 → 0 are Reserved: Do Not Use
+*/
 	union VideoInputDefinition
 	{
 	    struct
@@ -219,6 +263,35 @@ int parse_edid(char edid[])
 	    printf("\tMaxImagesize: %hhdcm x %hhdcm\n",edid[0x15],edid[0x16]);
 	    printf("\tMonitorGamma: %.2f\n",((edid[0x17]+100)*1.0/100.0));
 	}
+/*
+Address Bits Definitions Description
+7 6 5 _ _ _ _ _ Display Power Management: (See Note 1) Bits 7 → 5
+1 _ _ _ _ _ _ _ Standby Mode is supported. Bit 7
+0 _ _ _ _ _ _ _ Standby Mode is not supported. Bit 7
+_ 1 _ _ _ _ _ _ Suspend Mode is supported. Bit 6
+_ 0 _ _ _ _ _ _ Suspend Mode is not supported. Bit 6
+_ _ 1 _ _ _ _ _ Active Off = Very Low Power is supported. Bit 5
+_ _ 0 _ _ _ _ _ Active Off = Very Low Power is not supported. Bit 5
+4 3 _ _ _ If bit 7 at address 14h = ‘0’ then bits 4 & 3 at address 18h defines the
+Display Color Type: (See Note 2) Bits 4 & 3
+0 0 _ _ _ Monochrome or Grayscale display
+0 1 _ _ _ RGB color display
+1 0 _ _ _ Non-RGB color display
+1 1 _ _ _ Display Color Type is Undefined
+4 3 _ _ _ If bit 7 at address 14h = ‘1’ then bits 4 & 3 at address 18h defines the
+Supported Color Encoding Format/s: (See Note 2) Bits 4 & 3
+0 0 _ _ _ RGB 4:4:4
+0 1 _ _ _ RGB 4:4:4 & YCrCb 4:4:4
+1 0 _ _ _ RGB 4:4:4 & YCrCb 4:2:2
+1 1 _ _ _ RGB 4:4:4 & YCrCb 4:4:4 & YCrCb 4:2:2
+2 1 0 Other Feature Support Flags: Bits 2 → 0
+1 _ _ sRGB Standard is the default color space. (See Note 3) Bit 2
+0 _ _ sRGB Standard is not the default color space. Bit 2
+_ 1 _ Preferred Timing Mode includes the native pixel format and preferred refresh rate of the display device. (See Note 4) Bit 1
+_ 0 _ Preferred Timing Mode does not include the native pixel format and preferred refresh rate of the display device. Bit 1
+_ _ 1 Display is continuous frequency. (See Note 5) Bit 0
+_ _ 0 Display is non-continuous frequency (multi-mode). Bit 0
+*/
     struct
     {
         char GTFSupport:1;
@@ -265,6 +338,28 @@ int parse_edid(char edid[])
 //    if(edid[0x23] & 64) strcat(estiming,"720x400 @ 88 \t");
 //    if(edid[0x23] & 128) strcat(estiming,"720x400 @ 70 \t");
 
+/*
+23h 1 Established Timing I
+7 720 x 400 @ 70Hz IBM, VGA
+6 720 x 400 @ 88Hz IBM, XGA2
+5 640 x 480 @ 60Hz IBM, VGA
+4 640 x 480 @ 67Hz Apple, Mac II
+3 640 x 480 @ 72Hz VESA
+2 640 x 480 @ 75Hz VESA
+1 800 x 600 @ 56Hz VESA
+0 800 x 600 @ 60Hz VESA
+24h 1 Established Timing II
+7 800 x 600 @ 72Hz VESA
+6 800 x 600 @ 75Hz VESA
+5 832 x 624 @ 75Hz Apple, Mac II
+4 1024 x 768 @ 87Hz(I) IBM - Interlaced
+3 1024 x 768 @ 60Hz VESA
+2 1024 x 768 @ 70Hz VESA
+1 1024 x 768 @ 75Hz VESA
+0 1280 x 1024 @ 75Hz VESA
+25h 1 Manufacturer's Timings
+7 1152 x 870 @ 75Hz Apple, Mac II
+*/
     struct mode_line estmode[]={ 
      {"1280x1024",75} , {"1024x768",75} , {"1024x768",70} , {"1024x768",60} , {"1024x768",87} , {"832x624",75} , {"800x600",75} , {"800x600",72} , {"800x600",60} , {"800x600",56} , {"640x480",75} , {"640x480",72} , {"640x480",67} , {"640x480",60} , {"720x400",88} , {"720x400",70}};
     struct mode_line curestmode[80];
@@ -297,6 +392,21 @@ int parse_edid(char edid[])
         printf("\t\t%s @ %d %d %d %d\n",rmodeline.name,rmodeline.freq,rmodeline.pclock, rmodeline.htot,rmodeline.vtot);
     }
 
+/*
+26h 1 256 pixels → 2288 pixels, in increments of 8 pixels
+00h Reserved: Do not use.
+Bit Definitions Description
+7 6 _ _ _ _ _ _ Image Aspect Ratio: bits 7 & 6
+0 0 _ _ _ _ _ _ 16 : 10 AR
+0 1 _ _ _ _ _ _ 4 : 3 AR
+1 0 _ _ _ _ _ _ 5 : 4 AR
+1 1 _ _ _ _ _ _ 16 : 9 AR
+5 4 3 2 1 0 Field Refresh Rate: bits 5 → 0
+Value Stored (in binary) = Field Refresh Rate (in Hz) – 60
+27h 1
+n n n n n n
+Range: 60 Hz → 123Hz
+*/
     char stdtiming[8][256];
     struct
     {
@@ -333,7 +443,6 @@ int parse_edid(char edid[])
             memset(&tdmtmode,0,sizeof(struct mode_line));
             memset(tmod,0,20);
             sprintf(tmod,"%dx%d",tem*8+248, (int)(((tem*8+248)*1.0*vratio+0.5)/hratio),stdtiminginfo.vertfrequency+60);
-
             strcat(tdmtmode.mode,tmod);
             tdmtmode.freq=stdtiminginfo.vertfrequency+60;
             
@@ -343,6 +452,67 @@ int parse_edid(char edid[])
             printf("\t\t%s @ %d %d %d %d (%s)\n",rmodeline.name, rmodeline.freq, rmodeline.pclock, rmodeline.htot, rmodeline.vtot, msg);
         }
     }
+/*
+Value Detailed Timing Definitions
+(00 01)h → (FF FF)h
+Stored Value = Pixel clock ÷ 10,000
+LSB stored in byte 0 and MSB stored in byte 1
+0, 1 2 Range: 10 kHz to 655.35 MHz in 10 kHz steps
+(00 00)h Reserved: Do not use for Detailed Timing Descriptor
+2 1 00h → FFh Horizontal Addressable Video in pixels --- contains lower 8 bits
+3 1 00h → FFh Horizontal Blanking in pixels --- contains lower 8 bits
+({HA}h, {HB}h)
+where
+Horizontal Addressable Video in pixels –
+4 1 -- stored in Upper Nibble : contains upper 4 bits
+0h ≤ HA ≤ Fh and
+0h ≤ HB ≤ Fh
+Horizontal Blanking in pixels --- stored in Lower Nibble : contains
+upper 4 bits
+5 1 00h → FFh Vertical Addressable Video in lines --- contains lower 8 bits
+6 1 00h → FFh Vertical Blanking in lines --- contains lower 8 bits
+({VA}h, {VB}h)
+where
+Vertical Addressable Video in lines -- stored in Upper Nibble :
+7 1 contains upper 4 bits
+0h ≤ VA ≤ Fh and
+0h ≤ VB ≤ Fh
+Vertical Blanking in lines --- stored in Lower Nibble : contains
+upper 4 bits
+8 1 00h → FFh Horizontal Front Porch in pixels --- contains lower 8 bits
+9 1 00h → FFh Horizontal Sync Pulse Width in pixels --- contains lower 8 bits
+({VF}h, {VS}h)
+where
+Vertical Front Porch in Lines --- stored in Upper Nibble : contains
+10 1 lower 4 bits
+0h ≤ VF ≤ Fh and
+0h ≤ VS ≤ Fh
+Vertical Sync Pulse Width in Lines --- stored in Lower Nibble :
+contains lower 4 bits
+7 6 5 4 3 2 1 0 Bit Definitions
+n n _ _ _ _ _ _ Horizontal Front Porch in pixels --- contains upper 2 bits
+_ _ n n _ _ _ _ Horizontal Sync Pulse Width in Pixels --- contains upper 2 bits
+_ _ _ _ n n _ _ Vertical Front Porch in lines --- contains upper 2 bits
+11 1
+_ _ _ _ _ _ n n Vertical Sync Pulse Width in lines --- contains upper 2 bits
+Value Video Image Size & Border Definitions
+12 1 00h → FFh Horizontal Addressable Video Image Size in mm --- contains lower
+8 bits
+13 1 00h → FFh Vertical Addressable Video Image Size in mm --- contains lower 8
+bits
+({HI}h, {VI}h)
+where
+Horizontal Addressable Video Image Size in mm --- stored in Upper
+14 1 Nibble : contains upper 4 bits
+0h ≤ HI ≤ Fh and
+0h ≤ VI ≤ Fh
+Vertical Addressable Video Image Size in mm --- stored in Lower
+Nibble : contains upper 4 bits
+15 1 00h → FFh Right Horizontal Border or Left Horizontal Border in pixels --- refer
+to Section 3.12 – Right Border is equal to Left Border
+16 1 00h → FFh Top Vertical Border or Bottom Vertical Border in Lines --- refer to
+Section 3.12 – Top Border is equal to Bottom Border
+*/
     union
     {
         struct
@@ -441,10 +611,11 @@ int parse_edid(char edid[])
         sync.syncchr.syncl=edid[0x36+i*18+8]; 
         sync.syncchr.synch=h2bit.chr.vsync;
        // printf("VSync: %d\n",sync.value); 
-       
     }
-//////////////////////
-//HDMI 
+
+////////////////
+//For HDMI 
+///////////////
     int phdmiindex = gethdmiblock(edid);
     if(phdmiindex != -1)
     {