diff options
| author | Yi Sun <yi.sun@intel.com> | 2015-03-04 16:51:27 +0800 |
|---|---|---|
| committer | Yi Sun <yi.sun@intel.com> | 2015-03-04 16:51:27 +0800 |
| commit | a2597bf35d1051645e871a5534a6b015de9b5ed3 (patch) | |
| tree | aada9e328ce37f212423d7965c5e6742cc083ac1 | |
| parent | 66d8bae2f7231a2eae7f49ea0953b054a8e0c9fc (diff) | |
Remove un-related folder/files.
Signed-off-by: Yi Sun <yi.sun@intel.com>
271 files changed, 0 insertions, 52848 deletions
diff --git a/CONTRIBUTING b/CONTRIBUTING deleted file mode 100644 index e2c352e7..00000000 --- a/CONTRIBUTING +++ /dev/null @@ -1,45 +0,0 @@ -Patches to intel-gpu-tools are very much welcome, we really want this to be the -universal set of low-level tools and testcases for the Intel kernel gfx driver -on Linux and similar platforms. So please bring on porting patches, bugfixes, -improvements for documentation and new tools and testcases. - -A short list of contribution guidelines: - -- Please submit patches formatted with git send-email/git format-patch or - equivalent to - - Intel GFX discussion <intel-gfx@lists.freedesktop.org> - - Please use --subject-prefix="PATCH i-g-t" so that i-g-t patches are easily - identified in the massive amount mails on intel-gfx. To ensure this is always - done just run - - git config format.subjectprefix "PATCH i-g-t" - - from within your i-g-t git checkout. - -- intel-gpu-tools is MIT lincensed and we require contributions to follow the - developer's certificate of origin: http://developercertificate.org/ - -- When submitting new testcases please follow the naming conventions documented - in the generated documentation. Also please make full use of all the helpers and - convenience macros provided by the igt library. The semantic patch lib/igt.cocci - can help with the more automatic conversions. - -- There is no formal review requirement and regular contributors with commit - access can push patches right after submitting them to the mailing lists. But - invasive changes, new helper libraries and contributions from newcomers should - go through a proper review to ensure overall consistency in the codebase. - -- When patches from new contributors (without commit access) are stuck, for - anything related to the regular releases, issues with packaging and - integrating platform support or any other intel-gpu-tools issues, please - contact one of the maintainers (listed in the MAINTAINERS file) and cc the - intel-gfx mailing list. - -- Especially changes to the testcase should get tested on relevant platforms - before committing. For Intel employees that's best done using PRTS, see the - relevant internal howtos. Everyone else can just run piglit with i-g-t tests - locally. - -Happy hacking! diff --git a/COPYING b/COPYING deleted file mode 100644 index b8f67535..00000000 --- a/COPYING +++ /dev/null @@ -1,108 +0,0 @@ -Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. -All Rights Reserved. - -Permission is hereby granted, free of charge, to any person obtaining a -copy of this software and associated documentation files (the -"Software"), to deal in the Software without restriction, including -without limitation the rights to use, copy, modify, merge, publish, -distribute, sub license, and/or sell copies of the Software, and to -permit persons to whom the Software is furnished to do so, subject to -the following conditions: - -The above copyright notice and this permission notice (including the -next paragraph) shall be included in all copies or substantial portions -of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS -OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. -IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR -ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, -TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE -SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - -Copyright 2003,2006 Tungsten Graphics, Inc., Cedar Park, Texas. -All Rights Reserved. - -Permission is hereby granted, free of charge, to any person obtaining a -copy of this software and associated documentation files (the -"Software"), to deal in the Software without restriction, including -without limitation the rights to use, copy, modify, merge, publish, -distribute, sub license, and/or sell copies of the Software, and to -permit persons to whom the Software is furnished to do so, subject to -the following conditions: - -The above copyright notice and this permission notice (including the -next paragraph) shall be included in all copies or substantial portions -of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS -OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. -IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR -ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, -TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE -SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - -Copyright © 2006-2011 Intel Corporation - -Permission is hereby granted, free of charge, to any person obtaining a -copy of this software and associated documentation files (the "Software"), -to deal in the Software without restriction, including without limitation -the rights to use, copy, modify, merge, publish, distribute, sublicense, -and/or sell copies of the Software, and to permit persons to whom the -Software is furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice (including the next -paragraph) shall be included in all copies or substantial portions of the -Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS -IN THE SOFTWARE. - -Copyright © 2010 Red Hat, Inc. - -Permission is hereby granted, free of charge, to any person obtaining a -copy of this software and associated documentation files (the "Software"), -to deal in the Software without restriction, including without limitation -the rights to use, copy, modify, merge, publish, distribute, sublicense, -and/or sell copies of the Software, and to permit persons to whom the -Software is furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice (including the next -paragraph) shall be included in all copies or substantial portions of the -Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -SOFTWARE. - -Copyright © 2011 Daniel Vetter - -Permission is hereby granted, free of charge, to any person obtaining a -copy of this software and associated documentation files (the "Software"), -to deal in the Software without restriction, including without limitation -the rights to use, copy, modify, merge, publish, distribute, sublicense, -and/or sell copies of the Software, and to permit persons to whom the -Software is furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice (including the next -paragraph) shall be included in all copies or substantial portions of the -Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS -IN THE SOFTWARE. @@ -1,240 +0,0 @@ -Release 1.10 (XXXX-XX-XX) -------------------------- - -- New frequency manipulation tool (intel_gpu_frequency) - -- Adjustments for the Solaris port (Alan Coopersmith). - -- Remove tests/NAMING-CONVENTION since it's all in the docbook now, to avoid - divergent conventions. - -- New CRITICAL log level for really serious stuff (Thomas Wood). - -- Interactive test mode can now be enabled by the shared cmdline option - --interactive-debug=$var (Rodrigo Vivi). - -- Piles of new testcases and improvements to existing ones as usual. - -Release 1.9 (2014-12-12) ------------------------- - -- New test cases added: drm_import_export, gem_gpgpu_fill, gem_ppgtt, - gem_tiled_wb, kms_pwrite_crc. - -- New helper for interactive progress indicators (see igt_print_activity and - igt_progress), which can be disabled by setting the log-level to warn (Thomas - and Daniel). - -- Basic skl support: pci ids, rendercopy & mediafill (Damien, Zhao Yakui). - -- chv support for the iosf sideband tools and a few other improvements (Ville). - -- Fence register support for intel_reg_dumper on bdw+ (Rodrigo). - -- Support for skl in quick_dump (Damien). - -- Golden state generation infrastructure (Mika). - -- New skl watermark tool (Damien). - -- New EDID test block that includes multiple display modes (Thomas). - -- Individual test documentation available in generated documentation and from - the test binaries (Thomas). - -- New logging domains and log filtering (Thomas). - -- Various API documentation fixes and improvements (Thomas). - -Release 1.8 (2014-09-08) ------------------------- - -- Added lib/igt.cocci semantic patch to catch often-seen patterns and convert - them to igt macros/infrastructure. - -- Improvements to the documentation build systems (Thomas). - -- Small fixes and improvements to the igt infrastructure and helpers all over. - -- As usual piles of new tests. - -- Improved plane/pipe handling in the igt_kms library (Damien). - -- Unified option parsing between simple tests and tests with subtests (Thomas). - This will allow us to merge the different Makefile targets once test runners - are converted. - -- New commit functions for igt_kms to support the new universal planes - interfaces (Matt Roper). - -- Polish the debug output when test requirements aren't met a bit and inject the - program name/subtest in dmesg for easier backtrace/oom debugging (Chris). - -- A bit of polish for the framebuffer helper functions (Damien). - -- Robuster option parsing helpers, they now check for conflicts when merging - different option lists (Thomas). - -- MIPI DSI vbt support in intel_bios_read (Gaurav K Singh). - -- Clarify the split between low-level helpers and the high-level library in - igt_kms a bit by renaming some functions and improving and extending the api - documentation. - -- Helper to restore the vt mode, useful to test lastclose/fbdev emulation - behaviour (Thomas). - -- Refactor the support for 64bit relocs. By specifying the number of relocations - explicit a lot of the gen8 checks can be removed from simple testcases which - only use the blitter (Chris). - -Release 1.7 (2014-06-09) ------------------------- - -- Piles of API documentation for the core i-g-t testing libraries. - -- Improved igt loggin, now also with igt_vlog (for va_args printf-style - logging). - -- Polish for the igt_debugfs library. - -- Split out igt_fb library from igt_kms, cleanup of the igt_kms functions. - -- Android porting patches (Tim Gore, Tvrtko Ursulin). - -- Piles more tests as usual. - -- Support for building libcairo based tests on Android. Set ANDROID_HAS_CAIRO=1 - in the build enviroment when you have this (Tim Gore). - -- Timeout support in igt_aux, see igt_set_timeout (Thomas). - -- Documentation for the testrunner interface like exit codes, subtest - enumeration and log output. Should help other people to run the tests in their - own framework. - -- Make swig an optional dependency (Damien). - -- Helpers for runtime pm tests in igt_aux. - -Release 1.6 (2014-03-13) ------------------------- - -- Changes to support Broadwell in the test suite. (Ben, Damien, et al.) - -- Updated (now working again!) Android support from Oscar Mateo. - -- Test coverage through i-g-t is now officially an integral part of any drm/i915 - feature work and also for bugfixes. For more details see: - - http://blog.ffwll.ch/2013/11/testing-requirements-for-drmi915.html - -- Fix the gen4asm build dependency handling, now that the assembler is included in - i-g-t (Ben). - -- Improve the cairo object lifetime management of the kmstest helpers (Chris). - -- Allow register access to succeed if i915 is loaded but debugfs isn't found - (i.e. nomodeset is used) - -- New kernel modesetting helper library for simpler testcases (Damien). - -- New structure logging support for tests. Message at the WARN level be - reflected in the piglit result, also included igt_warn_on macros to simplify - test asserts which should just result in warnings, but not in a test abort. - -- Broadwell support for intel_audio_dump (Mengdong Lin). - -- API documentation support (Thomas) - -Release 1.5 (2013-11-06) ------------------------- - -- Some polishing of the test infrastructure, for details see: - - http://blog.ffwll.ch/2013/09/more-drmi915-testsuite-infrastructure.html - -- Haswell support for the DPF tool (tools/intel_l3_parity) and other - improvements (Ben). - -- Stereo/3D support in testdisplay (Damien). - -- Support for gen7 gpu perf counters in tools/intel_perf_counters (Kenneth). - -- Improvements to the VBT decoder (Jani). - -- New tool to read legacy VGA registers (Ville). - -- New helpers in the test library to help deal with debugfs files and the new - display pipe CRC support (Damien). - -- Introduction of a proper naming convention for all the testcases, see - tests/NAMING-CONVENTION. - -- As usual tons of new testcases and improvements and bugfixes to existing ones. - -- The testsuite framework itself has gained some regression tests which can be - run at compile-time with "make check". - -- New helpers for the drop_cache kernel interface and use drop_caches(RETIRE) to - really make sure the gpu is idle in testcases (Oscar Mateo). - -Release 1.4 (2013-09-16) ------------------------- - -- Integration of the gen4+ assembler (Damien). - -- Start of a new performance analysis tool from Chris Wilson with front-ends for - both X11 and plain kms. This uses the perf subsystem and the gpu performance - counter kernel patches from Chris. - -- New register dumper quick_dump from Ben, with lots of work from Damien. This - will superseed intel_reg_dumper for newer platforms (which are not yet - released) since it will allow us to automatically generate register dumps from - the internal xml register specifications. - -- Tools to access the pletoria of new indirect register access functions on - newer platforms. - -- Framebuffer contents dumper to debug some of the nastier corruption issues. - The advantage here is that this bypasses any userspace drivers and so avoids - that the corruptions get magically fixed when taking an X screenshot. - -- Tons of new testcases. Including subtests we are now at roughly 450 tests! - -- Improvements to the test framework infrastructure. See - http://blog.ffwll.ch/2013/08/recent-drmi915-testsuite-improvements.html - for an overview. - -Release 1.3 (2012-08-27) ------------------------- - -- massive improvements to the testsuite -- dpf tool for handling l3 remapping on gen7 (Ben) -- robustify against wc gtt mappings (Chris) -- improvements to the reg_dumper and register read/write tools -- haswell support - -Release 1.2 (2012-02-09) ------------------------- - -- intel_audio_dump improvements (Wu Fengguang) -- buildsystem improvements (Gaetan Nadon) -- solaris support (Alan Coopersmith) -- massive refactoring of testcases and rendercpy extraction -- new tests -- fixed up intel_reg_read/write for platforms needing forcewake (needs a - kernel patch which from 3.3 to work on ivb - Ben Widawsky) - -Release 1.1 (2011-12-24) ------------------------- - -Improved testsuite, usable for kernel regression testing! - -Release 1.0 (2009-04-27) ------------------------- - -Initial release: -- miscellaneous userland tools that don't really fit into the 2D driver tree -- standalone regression tests for the DRM (make check) -- microbenchmarks of the DRM for kernel performance regression testing diff --git a/README b/README deleted file mode 100644 index f1aab58c..00000000 --- a/README +++ /dev/null @@ -1,154 +0,0 @@ -Intel GPU Tools -=============== - -Description ------------ - -Intel GPU Tools is a collection of tools for development and testing of the -Intel DRM driver. There are many macro-level test suites that get used against -the driver, including xtest, rendercheck, piglit, and oglconform, but failures -from those can be difficult to track down to kernel changes, and many require -complicated build procedures or specific testing environments to get useful -results. Therefore, Intel GPU Tools includes low-level tools and tests -specifically for development and testing of the Intel DRM Driver. - -Intel GPU Tools is split into several sections: - -benchmarks/ - This is a collection of useful microbenchmarks that can be used to tune - DRM code in relevant ways. - - The benchmarks require KMS to be enabled. When run with an X Server - running, they must be run as root to avoid the authentication - requirement. - - Note that a few other microbenchmarks are in tests (like gem_gtt_speed). - -tests/ - This is a set of automated tests to run against the DRM to validate - changes. Many of the tests have subtests, which can be listed by using - the --list-subtests command line option and then run using the - --run-subtest option. If --run-subtest is not used, all subtests will - be run. Some tests have futher options and these are detailed by using - the --help option. - - The test suite can be run using the run-tests.sh script available in - the scripts directory. Piglit is used to run the tests and can either - be installed from your distribution (if available), or can be - downloaded locally for use with the script by running: - - ./scripts/run-tests.sh -d - - run-tests.sh has options for filtering and excluding tests from test - runs: - - -t <regex> only include tests that match the regular expression - -x <regex> exclude tests that match the regular expression - - Useful patterns for test filtering are described in - tests/NAMING-CONVENTION and the full list of tests and subtests can be - produced by passing -l to the run-tests.sh script. - - Results are written to a JSON file and an HTML summary can also be - created by passing -s to the run-tests.sh script. Further options are - are detailed by using the -h option. - - - If not using the script, piglit can be obtained from: - - git://anongit.freedesktop.org/piglit - - There is no need to build and install piglit if it is only going to be - used for running i-g-t tests. - - Set the IGT_TEST_ROOT environment variable to point to the tests - directory, or set the path key in the "igt" section of piglit.conf to - the intel-gpu-tools root directory. - - The tests in the i-g-t sources need to have been built already. Then we - can run the testcases with (as usual as root, no other drm clients - running): - - piglit-sources # ./piglit run igt <results-file> - - The testlist is built at runtime, so no need to update anything in - piglit when adding new tests. See - - piglit-sources $ ./piglit run -h - - for some useful options. - - Piglit only runs a default set of tests and is useful for regression - testing. Other tests not run are: - - tests that might hang the gpu, see HANG in Makefile.am - - gem_stress, a stress test suite. Look at the source for all the - various options. - - testdisplay is only run in the default mode. testdisplay has tons of - options to test different kms functionality, again read the source for - the details. - -lib/ - Common helper functions and headers used by the other tools. - -man/ - Manpages, unfortunately rather incomplete. - -tools/ - This is a collection of debugging tools that had previously been - built with the 2D driver but not shipped. Some distros were hacking - up the 2D build to ship them. Instead, here's a separate package for - people debugging the driver. - - These tools generally must be run as root, safe for the ones that just - decode dumps. - -tools/quick_dump - Quick dumper is a python tool built with SWIG bindings to - important libraries exported by the rest of the tool suite. The tool - itself is quite straight forward, and should also be a useful example - for others wishing to write python based i915 tools. - - Note to package maintainers: It is not recommended to package - this directory, as the tool is not yet designed for wide usage. If the - package is installed via "make install" the users will have to set - their python library path appropriately. Use --disable-dumper - -debugger/ - This tool is to be used to do shader debugging. It acts like a - debug server accepting connections from debug clients such as - mesa. The connections is made with unix domain sockets, and at some - point it would be nice if this directory contained a library for - initiating connections with debug clients.. - - The debugger must be run as root: "sudo debugger/eudb" - -docs/ - Contains the automatically generated intel-gpu-tools libraries - reference documentation in docs/reference/. You need to have the - gtk-doc tools installed and use the "--enable-gtk-doc" configure flag - to generate this API documentation. - - To regenerate the html files when updating documentation, use: - - $ make clean -C docs && make -C docs - - If you've added/changed/removed a symbol or anything else that changes - the overall structure or indexes, this needs to be reflected in - intel-gpu-tools-sections.txt. Entirely new sections will also need to be - added to intel-gpu-tools-docs.xml in the appropriate place. - - -Requirements ------------- - -This is a non-exhaustive list of package dependencies required for -building everything: - - libpciaccess-dev - libdrm-dev - xutils-dev - libcairo2-dev - swig2.0 - libpython3.3-dev - x11proto-dri2-dev - gtk-doc-tools diff --git a/assembler/.gitignore b/assembler/.gitignore deleted file mode 100644 index 796fe290..00000000 --- a/assembler/.gitignore +++ /dev/null @@ -1,19 +0,0 @@ -.deps -Makefile -Makefile.in -aclocal.m4 -autom4te.cache -configure -configure.lineno -config.log -config.status -depcomp -install-sh -missing -*.o - -intel-gen4asm -intel-gen4disasm -gram.c -gram.h -lex.c diff --git a/assembler/Makefile.am b/assembler/Makefile.am deleted file mode 100644 index c285438f..00000000 --- a/assembler/Makefile.am +++ /dev/null @@ -1,54 +0,0 @@ -SUBDIRS = doc test - -noinst_LTLIBRARIES = libbrw.la - -bin_PROGRAMS = intel-gen4asm intel-gen4disasm - -libbrw_la_SOURCES = \ - brw_compat.h \ - brw_context.c \ - brw_context.h \ - brw_disasm.c \ - brw_defines.h \ - brw_eu.h \ - brw_eu.c \ - brw_eu_compact.c \ - brw_eu_debug.c \ - brw_eu_emit.c \ - brw_eu_util.c \ - brw_reg.h \ - brw_structs.h \ - gen8_disasm.c \ - gen8_instruction.h \ - gen8_instruction.c \ - ralloc.c \ - ralloc.h \ - $(NULL) - -AM_YFLAGS = -d --warnings=all -AM_CFLAGS= $(ASSEMBLER_WARN_CFLAGS) - -LEX = flex -i -BUILT_SOURCES = gram.h gram.c lex.c -gram.h: gram.c - -intel_gen4asm_SOURCES = \ - gen4asm.h \ - gram.y \ - lex.l \ - main.c \ - $(NULL) - -intel_gen4asm_LDADD = libbrw.la - -intel_gen4disasm_SOURCES = disasm-main.c -intel_gen4disasm_LDADD = libbrw.la - -pkgconfigdir = $(libdir)/pkgconfig -pkgconfig_DATA = intel-gen4asm.pc - -MAINTAINERCLEANFILES = $(BUILT_SOURCES) -EXTRA_DIST = \ - README \ - TODO \ - intel-gen4asm.pc.in diff --git a/assembler/README b/assembler/README deleted file mode 100644 index bfc95865..00000000 --- a/assembler/README +++ /dev/null @@ -1,9 +0,0 @@ -intel-gen4asm is a program to compile an assembly language for the Intel 965 -Express Chipset. It has been used to construct programs for textured video in -the 2d driver. - -Some examples of gen4 assembly programs are in the doc/examples directory. - -Note that the language parsed by this assembler is not exactly what the final -language is going to look like. In particular, the send instructions need to -be cleaned up and made more reasonable to program with. diff --git a/assembler/TODO b/assembler/TODO deleted file mode 100644 index 59e4abf2..00000000 --- a/assembler/TODO +++ /dev/null @@ -1,14 +0,0 @@ -- Add support for push, pop, msave, and mrest instructions -- Fix up send argument formatting for some send instructions -- Add send arguments for more send instructions -- Fix up the sets of registers allowed for send arguments -- manpage -- binary output? -- check for more error cases. -- boolean types in parser internal structs where appropriate -- replace GL* with non-GL? -- support labels for branch/jump instruction destinations -- support math on immediate operand values -- break/cont syntax should be better -- valgrind it -- do something to allow use as a library? diff --git a/assembler/brw_compat.h b/assembler/brw_compat.h deleted file mode 100644 index e9091821..00000000 --- a/assembler/brw_compat.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/* - * To share code with mesa without having to do big modifications and still be - * able to sync files together at a later point, this file holds macros and - * types defined in mesa's core headers. - */ - -#ifndef __BRW_COMPAT_H__ -#define __BRW_COMPAT_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * * __builtin_expect macros - * */ -#if !defined(__GNUC__) -# define __builtin_expect(x, y) (x) -#endif - -#ifndef likely -# ifdef __GNUC__ -# define likely(x) __builtin_expect(!!(x), 1) -# define unlikely(x) __builtin_expect(!!(x), 0) -# else -# define likely(x) (x) -# define unlikely(x) (x) -# endif -#endif - -#if (__GNUC__ >= 3) -#define PRINTFLIKE(f, a) __attribute__ ((format(__printf__, f, a))) -#else -#define PRINTFLIKE(f, a) -#endif - -#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) -#define Elements(x) ARRAY_SIZE(x) - -typedef union { float f; int i; unsigned u; } fi_type; - -#ifdef __cplusplus -} /* end of extern "C" */ -#endif - -#endif /* __BRW_COMPAT_H__ */ diff --git a/assembler/brw_context.c b/assembler/brw_context.c deleted file mode 100644 index 6f2a964b..00000000 --- a/assembler/brw_context.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <string.h> - -#include "brw_context.h" - -static bool -intel_init_context(struct intel_context *intel, int gen) -{ - memset(intel, 0, sizeof(struct intel_context)); - intel->gen = gen / 10; - intel->is_haswell = gen == 75; - if (intel->gen >= 5) - intel->needs_ff_sync = true; - - return true; -} - -bool -brw_init_context(struct brw_context *brw, int gen) -{ - return intel_init_context(&brw->intel, gen); -} diff --git a/assembler/brw_context.h b/assembler/brw_context.h deleted file mode 100644 index 90e66f71..00000000 --- a/assembler/brw_context.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/* - * To share code with mesa without having to do big modifications and still be - * able to sync files together at a later point, this file stubs the fields - * of struct brw_context used by the code we import. - */ - -#ifndef __BRW_CONTEXT_H__ -#define __BRW_CONTEXT_H__ - -#include <stdbool.h> -#include <stdio.h> - -#include "brw_structs.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#ifndef INTEL_DEBUG -#define INTEL_DEBUG (0) -#endif - -struct intel_context -{ - int gen; - int gt; - bool is_haswell; - bool is_g4x; - bool needs_ff_sync; -}; - -struct brw_context -{ - struct intel_context intel; -}; - -bool -brw_init_context(struct brw_context *brw, int gen); - -/* brw_disasm.c */ -struct opcode_desc { - char *name; - int nsrc; - int ndst; -}; - -extern const struct opcode_desc opcode_descs[128]; - -int brw_disasm (FILE *file, struct brw_instruction *inst, int gen); - -#ifdef __cplusplus -} /* end of extern "C" */ -#endif - -#endif /* __BRW_CONTEXT_H__ */ diff --git a/assembler/brw_defines.h b/assembler/brw_defines.h deleted file mode 100644 index 24e5e303..00000000 --- a/assembler/brw_defines.h +++ /dev/null @@ -1,1652 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#define INTEL_MASK(high, low) (((1<<((high)-(low)+1))-1)<<(low)) -#define SET_FIELD(value, field) (((value) << field ## _SHIFT) & field ## _MASK) -#define GET_FIELD(word, field) (((word) & field ## _MASK) >> field ## _SHIFT) - -#ifndef BRW_DEFINES_H -#define BRW_DEFINES_H - -/* 3D state: - */ -#define PIPE_CONTROL_NOWRITE 0x00 -#define PIPE_CONTROL_WRITEIMMEDIATE 0x01 -#define PIPE_CONTROL_WRITEDEPTH 0x02 -#define PIPE_CONTROL_WRITETIMESTAMP 0x03 - -#define PIPE_CONTROL_GTTWRITE_PROCESS_LOCAL 0x00 -#define PIPE_CONTROL_GTTWRITE_GLOBAL 0x01 - -#define CMD_3D_PRIM 0x7b00 /* 3DPRIMITIVE */ -/* DW0 */ -# define GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT 10 -# define GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 15) -# define GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 15) -/* DW1 */ -# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8) -# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8) - -#define _3DPRIM_POINTLIST 0x01 -#define _3DPRIM_LINELIST 0x02 -#define _3DPRIM_LINESTRIP 0x03 -#define _3DPRIM_TRILIST 0x04 -#define _3DPRIM_TRISTRIP 0x05 -#define _3DPRIM_TRIFAN 0x06 -#define _3DPRIM_QUADLIST 0x07 -#define _3DPRIM_QUADSTRIP 0x08 -#define _3DPRIM_LINELIST_ADJ 0x09 -#define _3DPRIM_LINESTRIP_ADJ 0x0A -#define _3DPRIM_TRILIST_ADJ 0x0B -#define _3DPRIM_TRISTRIP_ADJ 0x0C -#define _3DPRIM_TRISTRIP_REVERSE 0x0D -#define _3DPRIM_POLYGON 0x0E -#define _3DPRIM_RECTLIST 0x0F -#define _3DPRIM_LINELOOP 0x10 -#define _3DPRIM_POINTLIST_BF 0x11 -#define _3DPRIM_LINESTRIP_CONT 0x12 -#define _3DPRIM_LINESTRIP_BF 0x13 -#define _3DPRIM_LINESTRIP_CONT_BF 0x14 -#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 - -#define BRW_ANISORATIO_2 0 -#define BRW_ANISORATIO_4 1 -#define BRW_ANISORATIO_6 2 -#define BRW_ANISORATIO_8 3 -#define BRW_ANISORATIO_10 4 -#define BRW_ANISORATIO_12 5 -#define BRW_ANISORATIO_14 6 -#define BRW_ANISORATIO_16 7 - -#define BRW_BLENDFACTOR_ONE 0x1 -#define BRW_BLENDFACTOR_SRC_COLOR 0x2 -#define BRW_BLENDFACTOR_SRC_ALPHA 0x3 -#define BRW_BLENDFACTOR_DST_ALPHA 0x4 -#define BRW_BLENDFACTOR_DST_COLOR 0x5 -#define BRW_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 -#define BRW_BLENDFACTOR_CONST_COLOR 0x7 -#define BRW_BLENDFACTOR_CONST_ALPHA 0x8 -#define BRW_BLENDFACTOR_SRC1_COLOR 0x9 -#define BRW_BLENDFACTOR_SRC1_ALPHA 0x0A -#define BRW_BLENDFACTOR_ZERO 0x11 -#define BRW_BLENDFACTOR_INV_SRC_COLOR 0x12 -#define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 -#define BRW_BLENDFACTOR_INV_DST_ALPHA 0x14 -#define BRW_BLENDFACTOR_INV_DST_COLOR 0x15 -#define BRW_BLENDFACTOR_INV_CONST_COLOR 0x17 -#define BRW_BLENDFACTOR_INV_CONST_ALPHA 0x18 -#define BRW_BLENDFACTOR_INV_SRC1_COLOR 0x19 -#define BRW_BLENDFACTOR_INV_SRC1_ALPHA 0x1A - -#define BRW_BLENDFUNCTION_ADD 0 -#define BRW_BLENDFUNCTION_SUBTRACT 1 -#define BRW_BLENDFUNCTION_REVERSE_SUBTRACT 2 -#define BRW_BLENDFUNCTION_MIN 3 -#define BRW_BLENDFUNCTION_MAX 4 - -#define BRW_ALPHATEST_FORMAT_UNORM8 0 -#define BRW_ALPHATEST_FORMAT_FLOAT32 1 - -#define BRW_CHROMAKEY_KILL_ON_ANY_MATCH 0 -#define BRW_CHROMAKEY_REPLACE_BLACK 1 - -#define BRW_CLIP_API_OGL 0 -#define BRW_CLIP_API_DX 1 - -#define BRW_CLIPMODE_NORMAL 0 -#define BRW_CLIPMODE_CLIP_ALL 1 -#define BRW_CLIPMODE_CLIP_NON_REJECTED 2 -#define BRW_CLIPMODE_REJECT_ALL 3 -#define BRW_CLIPMODE_ACCEPT_ALL 4 -#define BRW_CLIPMODE_KERNEL_CLIP 5 - -#define BRW_CLIP_NDCSPACE 0 -#define BRW_CLIP_SCREENSPACE 1 - -#define BRW_COMPAREFUNCTION_ALWAYS 0 -#define BRW_COMPAREFUNCTION_NEVER 1 -#define BRW_COMPAREFUNCTION_LESS 2 -#define BRW_COMPAREFUNCTION_EQUAL 3 -#define BRW_COMPAREFUNCTION_LEQUAL 4 -#define BRW_COMPAREFUNCTION_GREATER 5 -#define BRW_COMPAREFUNCTION_NOTEQUAL 6 -#define BRW_COMPAREFUNCTION_GEQUAL 7 - -#define BRW_COVERAGE_PIXELS_HALF 0 -#define BRW_COVERAGE_PIXELS_1 1 -#define BRW_COVERAGE_PIXELS_2 2 -#define BRW_COVERAGE_PIXELS_4 3 - -#define BRW_CULLMODE_BOTH 0 -#define BRW_CULLMODE_NONE 1 -#define BRW_CULLMODE_FRONT 2 -#define BRW_CULLMODE_BACK 3 - -#define BRW_DEFAULTCOLOR_R8G8B8A8_UNORM 0 -#define BRW_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 - -#define BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 -#define BRW_DEPTHFORMAT_D32_FLOAT 1 -#define BRW_DEPTHFORMAT_D24_UNORM_S8_UINT 2 -#define BRW_DEPTHFORMAT_D24_UNORM_X8_UINT 3 /* GEN5 */ -#define BRW_DEPTHFORMAT_D16_UNORM 5 - -#define BRW_FLOATING_POINT_IEEE_754 0 -#define BRW_FLOATING_POINT_NON_IEEE_754 1 - -#define BRW_FRONTWINDING_CW 0 -#define BRW_FRONTWINDING_CCW 1 - -#define BRW_SPRITE_POINT_ENABLE 16 - -#define BRW_CUT_INDEX_ENABLE (1 << 10) - -#define BRW_INDEX_BYTE 0 -#define BRW_INDEX_WORD 1 -#define BRW_INDEX_DWORD 2 - -#define BRW_LOGICOPFUNCTION_CLEAR 0 -#define BRW_LOGICOPFUNCTION_NOR 1 -#define BRW_LOGICOPFUNCTION_AND_INVERTED 2 -#define BRW_LOGICOPFUNCTION_COPY_INVERTED 3 -#define BRW_LOGICOPFUNCTION_AND_REVERSE 4 -#define BRW_LOGICOPFUNCTION_INVERT 5 -#define BRW_LOGICOPFUNCTION_XOR 6 -#define BRW_LOGICOPFUNCTION_NAND 7 -#define BRW_LOGICOPFUNCTION_AND 8 -#define BRW_LOGICOPFUNCTION_EQUIV 9 -#define BRW_LOGICOPFUNCTION_NOOP 10 -#define BRW_LOGICOPFUNCTION_OR_INVERTED 11 -#define BRW_LOGICOPFUNCTION_COPY 12 -#define BRW_LOGICOPFUNCTION_OR_REVERSE 13 -#define BRW_LOGICOPFUNCTION_OR 14 -#define BRW_LOGICOPFUNCTION_SET 15 - -#define BRW_MAPFILTER_NEAREST 0x0 -#define BRW_MAPFILTER_LINEAR 0x1 -#define BRW_MAPFILTER_ANISOTROPIC 0x2 - -#define BRW_MIPFILTER_NONE 0 -#define BRW_MIPFILTER_NEAREST 1 -#define BRW_MIPFILTER_LINEAR 3 - -#define BRW_ADDRESS_ROUNDING_ENABLE_U_MAG 0x20 -#define BRW_ADDRESS_ROUNDING_ENABLE_U_MIN 0x10 -#define BRW_ADDRESS_ROUNDING_ENABLE_V_MAG 0x08 -#define BRW_ADDRESS_ROUNDING_ENABLE_V_MIN 0x04 -#define BRW_ADDRESS_ROUNDING_ENABLE_R_MAG 0x02 -#define BRW_ADDRESS_ROUNDING_ENABLE_R_MIN 0x01 - -#define BRW_POLYGON_FRONT_FACING 0 -#define BRW_POLYGON_BACK_FACING 1 - -#define BRW_PREFILTER_ALWAYS 0x0 -#define BRW_PREFILTER_NEVER 0x1 -#define BRW_PREFILTER_LESS 0x2 -#define BRW_PREFILTER_EQUAL 0x3 -#define BRW_PREFILTER_LEQUAL 0x4 -#define BRW_PREFILTER_GREATER 0x5 -#define BRW_PREFILTER_NOTEQUAL 0x6 -#define BRW_PREFILTER_GEQUAL 0x7 - -#define BRW_PROVOKING_VERTEX_0 0 -#define BRW_PROVOKING_VERTEX_1 1 -#define BRW_PROVOKING_VERTEX_2 2 - -#define BRW_RASTRULE_UPPER_LEFT 0 -#define BRW_RASTRULE_UPPER_RIGHT 1 -/* These are listed as "Reserved, but not seen as useful" - * in Intel documentation (page 212, "Point Rasterization Rule", - * section 7.4 "SF Pipeline State Summary", of document - * "Intel® 965 Express Chipset Family and Intel® G35 Express - * Chipset Graphics Controller Programmer's Reference Manual, - * Volume 2: 3D/Media", Revision 1.0b as of January 2008, - * available at - * http://intellinuxgraphics.org/documentation.html - * at the time of this writing). - * - * These appear to be supported on at least some - * i965-family devices, and the BRW_RASTRULE_LOWER_RIGHT - * is useful when using OpenGL to render to a FBO - * (which has the pixel coordinate Y orientation inverted - * with respect to the normal OpenGL pixel coordinate system). - */ -#define BRW_RASTRULE_LOWER_LEFT 2 -#define BRW_RASTRULE_LOWER_RIGHT 3 - -#define BRW_RENDERTARGET_CLAMPRANGE_UNORM 0 -#define BRW_RENDERTARGET_CLAMPRANGE_SNORM 1 -#define BRW_RENDERTARGET_CLAMPRANGE_FORMAT 2 - -#define BRW_STENCILOP_KEEP 0 -#define BRW_STENCILOP_ZERO 1 -#define BRW_STENCILOP_REPLACE 2 -#define BRW_STENCILOP_INCRSAT 3 -#define BRW_STENCILOP_DECRSAT 4 -#define BRW_STENCILOP_INCR 5 -#define BRW_STENCILOP_DECR 6 -#define BRW_STENCILOP_INVERT 7 - -/* Surface state DW0 */ -#define BRW_SURFACE_RC_READ_WRITE (1 << 8) -#define BRW_SURFACE_MIPLAYOUT_SHIFT 10 -#define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0 -#define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1 -#define BRW_SURFACE_CUBEFACE_ENABLES 0x3f -#define BRW_SURFACE_BLEND_ENABLED (1 << 13) -#define BRW_SURFACE_WRITEDISABLE_B_SHIFT 14 -#define BRW_SURFACE_WRITEDISABLE_G_SHIFT 15 -#define BRW_SURFACE_WRITEDISABLE_R_SHIFT 16 -#define BRW_SURFACE_WRITEDISABLE_A_SHIFT 17 - -#define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 -#define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001 -#define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002 -#define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 -#define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 -#define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005 -#define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 -#define BRW_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 -#define BRW_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 -#define BRW_SURFACEFORMAT_R32G32B32A32_SFIXED 0x020 -#define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040 -#define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041 -#define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042 -#define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043 -#define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044 -#define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045 -#define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046 -#define BRW_SURFACEFORMAT_R32G32B32_SFIXED 0x050 -#define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 -#define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 -#define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082 -#define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083 -#define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 -#define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085 -#define BRW_SURFACEFORMAT_R32G32_SINT 0x086 -#define BRW_SURFACEFORMAT_R32G32_UINT 0x087 -#define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 -#define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 -#define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A -#define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B -#define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C -#define BRW_SURFACEFORMAT_R64_FLOAT 0x08D -#define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E -#define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F -#define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090 -#define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091 -#define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092 -#define BRW_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 -#define BRW_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 -#define BRW_SURFACEFORMAT_R32G32_SSCALED 0x095 -#define BRW_SURFACEFORMAT_R32G32_USCALED 0x096 -#define BRW_SURFACEFORMAT_R32G32_SFIXED 0x0A0 -#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 -#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 -#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 -#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 -#define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 -#define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 -#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 -#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 -#define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 -#define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA -#define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB -#define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC -#define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD -#define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE -#define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF -#define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0 -#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 -#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 -#define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 -#define BRW_SURFACEFORMAT_R32_SINT 0x0D6 -#define BRW_SURFACEFORMAT_R32_UINT 0x0D7 -#define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8 -#define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 -#define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA -#define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF -#define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0 -#define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1 -#define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2 -#define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3 -#define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4 -#define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5 -#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 -#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA -#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB -#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC -#define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED -#define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE -#define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0 -#define BRW_SURFACEFORMAT_R32_UNORM 0x0F1 -#define BRW_SURFACEFORMAT_R32_SNORM 0x0F2 -#define BRW_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 -#define BRW_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 -#define BRW_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 -#define BRW_SURFACEFORMAT_R16G16_SSCALED 0x0F6 -#define BRW_SURFACEFORMAT_R16G16_USCALED 0x0F7 -#define BRW_SURFACEFORMAT_R32_SSCALED 0x0F8 -#define BRW_SURFACEFORMAT_R32_USCALED 0x0F9 -#define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100 -#define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 -#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 -#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 -#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 -#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 -#define BRW_SURFACEFORMAT_R8G8_UNORM 0x106 -#define BRW_SURFACEFORMAT_R8G8_SNORM 0x107 -#define BRW_SURFACEFORMAT_R8G8_SINT 0x108 -#define BRW_SURFACEFORMAT_R8G8_UINT 0x109 -#define BRW_SURFACEFORMAT_R16_UNORM 0x10A -#define BRW_SURFACEFORMAT_R16_SNORM 0x10B -#define BRW_SURFACEFORMAT_R16_SINT 0x10C -#define BRW_SURFACEFORMAT_R16_UINT 0x10D -#define BRW_SURFACEFORMAT_R16_FLOAT 0x10E -#define BRW_SURFACEFORMAT_I16_UNORM 0x111 -#define BRW_SURFACEFORMAT_L16_UNORM 0x112 -#define BRW_SURFACEFORMAT_A16_UNORM 0x113 -#define BRW_SURFACEFORMAT_L8A8_UNORM 0x114 -#define BRW_SURFACEFORMAT_I16_FLOAT 0x115 -#define BRW_SURFACEFORMAT_L16_FLOAT 0x116 -#define BRW_SURFACEFORMAT_A16_FLOAT 0x117 -#define BRW_SURFACEFORMAT_L8A8_UNORM_SRGB 0x118 -#define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 -#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A -#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B -#define BRW_SURFACEFORMAT_R8G8_SSCALED 0x11C -#define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D -#define BRW_SURFACEFORMAT_R16_SSCALED 0x11E -#define BRW_SURFACEFORMAT_R16_USCALED 0x11F -#define BRW_SURFACEFORMAT_R8_UNORM 0x140 -#define BRW_SURFACEFORMAT_R8_SNORM 0x141 -#define BRW_SURFACEFORMAT_R8_SINT 0x142 -#define BRW_SURFACEFORMAT_R8_UINT 0x143 -#define BRW_SURFACEFORMAT_A8_UNORM 0x144 -#define BRW_SURFACEFORMAT_I8_UNORM 0x145 -#define BRW_SURFACEFORMAT_L8_UNORM 0x146 -#define BRW_SURFACEFORMAT_P4A4_UNORM 0x147 -#define BRW_SURFACEFORMAT_A4P4_UNORM 0x148 -#define BRW_SURFACEFORMAT_R8_SSCALED 0x149 -#define BRW_SURFACEFORMAT_R8_USCALED 0x14A -#define BRW_SURFACEFORMAT_L8_UNORM_SRGB 0x14C -#define BRW_SURFACEFORMAT_DXT1_RGB_SRGB 0x180 -#define BRW_SURFACEFORMAT_R1_UINT 0x181 -#define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182 -#define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 -#define BRW_SURFACEFORMAT_BC1_UNORM 0x186 -#define BRW_SURFACEFORMAT_BC2_UNORM 0x187 -#define BRW_SURFACEFORMAT_BC3_UNORM 0x188 -#define BRW_SURFACEFORMAT_BC4_UNORM 0x189 -#define BRW_SURFACEFORMAT_BC5_UNORM 0x18A -#define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B -#define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C -#define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D -#define BRW_SURFACEFORMAT_MONO8 0x18E -#define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F -#define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190 -#define BRW_SURFACEFORMAT_DXT1_RGB 0x191 -#define BRW_SURFACEFORMAT_FXT1 0x192 -#define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193 -#define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194 -#define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195 -#define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196 -#define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 -#define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198 -#define BRW_SURFACEFORMAT_BC4_SNORM 0x199 -#define BRW_SURFACEFORMAT_BC5_SNORM 0x19A -#define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C -#define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D -#define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E -#define BRW_SURFACEFORMAT_R16G16B16_USCALED 0x19F -#define BRW_SURFACEFORMAT_R32_SFIXED 0x1B2 -#define BRW_SURFACEFORMAT_R10G10B10A2_SNORM 0x1B3 -#define BRW_SURFACEFORMAT_R10G10B10A2_USCALED 0x1B4 -#define BRW_SURFACEFORMAT_R10G10B10A2_SSCALED 0x1B5 -#define BRW_SURFACEFORMAT_R10G10B10A2_SINT 0x1B6 -#define BRW_SURFACEFORMAT_B10G10R10A2_SNORM 0x1B7 -#define BRW_SURFACEFORMAT_B10G10R10A2_USCALED 0x1B8 -#define BRW_SURFACEFORMAT_B10G10R10A2_SSCALED 0x1B9 -#define BRW_SURFACEFORMAT_B10G10R10A2_UINT 0x1BA -#define BRW_SURFACEFORMAT_B10G10R10A2_SINT 0x1BB -#define BRW_SURFACE_FORMAT_SHIFT 18 -#define BRW_SURFACE_FORMAT_MASK INTEL_MASK(26, 18) - -#define BRW_SURFACERETURNFORMAT_FLOAT32 0 -#define BRW_SURFACERETURNFORMAT_S1 1 - -#define BRW_SURFACE_TYPE_SHIFT 29 -#define BRW_SURFACE_TYPE_MASK INTEL_MASK(31, 29) -#define BRW_SURFACE_1D 0 -#define BRW_SURFACE_2D 1 -#define BRW_SURFACE_3D 2 -#define BRW_SURFACE_CUBE 3 -#define BRW_SURFACE_BUFFER 4 -#define BRW_SURFACE_NULL 7 - -#define GEN7_SURFACE_IS_ARRAY (1 << 28) -#define GEN7_SURFACE_VALIGN_2 (0 << 16) -#define GEN7_SURFACE_VALIGN_4 (1 << 16) -#define GEN7_SURFACE_HALIGN_4 (0 << 15) -#define GEN7_SURFACE_HALIGN_8 (1 << 15) -#define GEN7_SURFACE_TILING_NONE (0 << 13) -#define GEN7_SURFACE_TILING_X (2 << 13) -#define GEN7_SURFACE_TILING_Y (3 << 13) -#define GEN7_SURFACE_ARYSPC_FULL (0 << 10) -#define GEN7_SURFACE_ARYSPC_LOD0 (1 << 10) - -/* Surface state DW2 */ -#define BRW_SURFACE_HEIGHT_SHIFT 19 -#define BRW_SURFACE_HEIGHT_MASK INTEL_MASK(31, 19) -#define BRW_SURFACE_WIDTH_SHIFT 6 -#define BRW_SURFACE_WIDTH_MASK INTEL_MASK(18, 6) -#define BRW_SURFACE_LOD_SHIFT 2 -#define BRW_SURFACE_LOD_MASK INTEL_MASK(5, 2) -#define GEN7_SURFACE_HEIGHT_SHIFT 16 -#define GEN7_SURFACE_HEIGHT_MASK INTEL_MASK(29, 16) -#define GEN7_SURFACE_WIDTH_SHIFT 0 -#define GEN7_SURFACE_WIDTH_MASK INTEL_MASK(13, 0) - -/* Surface state DW3 */ -#define BRW_SURFACE_DEPTH_SHIFT 21 -#define BRW_SURFACE_DEPTH_MASK INTEL_MASK(31, 21) -#define BRW_SURFACE_PITCH_SHIFT 3 -#define BRW_SURFACE_PITCH_MASK INTEL_MASK(19, 3) -#define BRW_SURFACE_TILED (1 << 1) -#define BRW_SURFACE_TILED_Y (1 << 0) - -/* Surface state DW4 */ -#define BRW_SURFACE_MIN_LOD_SHIFT 28 -#define BRW_SURFACE_MIN_LOD_MASK INTEL_MASK(31, 28) -#define BRW_SURFACE_MULTISAMPLECOUNT_1 (0 << 4) -#define BRW_SURFACE_MULTISAMPLECOUNT_4 (2 << 4) -#define GEN7_SURFACE_MULTISAMPLECOUNT_1 (0 << 3) -#define GEN7_SURFACE_MULTISAMPLECOUNT_4 (2 << 3) -#define GEN7_SURFACE_MULTISAMPLECOUNT_8 (3 << 3) -#define GEN7_SURFACE_MSFMT_MSS (0 << 6) -#define GEN7_SURFACE_MSFMT_DEPTH_STENCIL (1 << 6) - -/* Surface state DW5 */ -#define BRW_SURFACE_X_OFFSET_SHIFT 25 -#define BRW_SURFACE_X_OFFSET_MASK INTEL_MASK(31, 25) -#define BRW_SURFACE_VERTICAL_ALIGN_ENABLE (1 << 24) -#define BRW_SURFACE_Y_OFFSET_SHIFT 20 -#define BRW_SURFACE_Y_OFFSET_MASK INTEL_MASK(23, 20) -#define GEN7_SURFACE_MIN_LOD_SHIFT 4 -#define GEN7_SURFACE_MIN_LOD_MASK INTEL_MASK(7, 4) - -/* Surface state DW6 */ -#define GEN7_SURFACE_MCS_ENABLE (1 << 0) -#define GEN7_SURFACE_MCS_PITCH_SHIFT 3 -#define GEN7_SURFACE_MCS_PITCH_MASK INTEL_MASK(11, 3) - -/* Surface state DW7 */ -#define GEN7_SURFACE_SCS_R_SHIFT 25 -#define GEN7_SURFACE_SCS_R_MASK INTEL_MASK(27, 25) -#define GEN7_SURFACE_SCS_G_SHIFT 22 -#define GEN7_SURFACE_SCS_G_MASK INTEL_MASK(24, 22) -#define GEN7_SURFACE_SCS_B_SHIFT 19 -#define GEN7_SURFACE_SCS_B_MASK INTEL_MASK(21, 19) -#define GEN7_SURFACE_SCS_A_SHIFT 16 -#define GEN7_SURFACE_SCS_A_MASK INTEL_MASK(18, 16) - -/* The actual swizzle values/what channel to use */ -#define HSW_SCS_ZERO 0 -#define HSW_SCS_ONE 1 -#define HSW_SCS_RED 4 -#define HSW_SCS_GREEN 5 -#define HSW_SCS_BLUE 6 -#define HSW_SCS_ALPHA 7 - -#define BRW_TEXCOORDMODE_WRAP 0 -#define BRW_TEXCOORDMODE_MIRROR 1 -#define BRW_TEXCOORDMODE_CLAMP 2 -#define BRW_TEXCOORDMODE_CUBE 3 -#define BRW_TEXCOORDMODE_CLAMP_BORDER 4 -#define BRW_TEXCOORDMODE_MIRROR_ONCE 5 - -#define BRW_THREAD_PRIORITY_NORMAL 0 -#define BRW_THREAD_PRIORITY_HIGH 1 - -#define BRW_TILEWALK_XMAJOR 0 -#define BRW_TILEWALK_YMAJOR 1 - -#define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS 0 -#define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS 1 - -/* Execution Unit (EU) defines - */ - -#define BRW_ALIGN_1 0 -#define BRW_ALIGN_16 1 - -#define BRW_ADDRESS_DIRECT 0 -#define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER 1 - -#define BRW_CHANNEL_X 0 -#define BRW_CHANNEL_Y 1 -#define BRW_CHANNEL_Z 2 -#define BRW_CHANNEL_W 3 - -enum brw_compression { - BRW_COMPRESSION_NONE = 0, - BRW_COMPRESSION_2NDHALF = 1, - BRW_COMPRESSION_COMPRESSED = 2, -}; - -#define GEN6_COMPRESSION_1Q 0 -#define GEN6_COMPRESSION_2Q 1 -#define GEN6_COMPRESSION_3Q 2 -#define GEN6_COMPRESSION_4Q 3 -#define GEN6_COMPRESSION_1H 0 -#define GEN6_COMPRESSION_2H 2 - -#define BRW_CONDITIONAL_NONE 0 -#define BRW_CONDITIONAL_Z 1 -#define BRW_CONDITIONAL_NZ 2 -#define BRW_CONDITIONAL_EQ 1 /* Z */ -#define BRW_CONDITIONAL_NEQ 2 /* NZ */ -#define BRW_CONDITIONAL_G 3 -#define BRW_CONDITIONAL_GE 4 -#define BRW_CONDITIONAL_L 5 -#define BRW_CONDITIONAL_LE 6 -#define BRW_CONDITIONAL_R 7 -#define BRW_CONDITIONAL_O 8 -#define BRW_CONDITIONAL_U 9 - -#define BRW_DEBUG_NONE 0 -#define BRW_DEBUG_BREAKPOINT 1 - -#define BRW_DEPENDENCY_NORMAL 0 -#define BRW_DEPENDENCY_NOTCLEARED 1 -#define BRW_DEPENDENCY_NOTCHECKED 2 -#define BRW_DEPENDENCY_DISABLE 3 - -#define BRW_EXECUTE_1 0 -#define BRW_EXECUTE_2 1 -#define BRW_EXECUTE_4 2 -#define BRW_EXECUTE_8 3 -#define BRW_EXECUTE_16 4 -#define BRW_EXECUTE_32 5 - -#define BRW_HORIZONTAL_STRIDE_0 0 -#define BRW_HORIZONTAL_STRIDE_1 1 -#define BRW_HORIZONTAL_STRIDE_2 2 -#define BRW_HORIZONTAL_STRIDE_4 3 - -#define BRW_INSTRUCTION_NORMAL 0 -#define BRW_INSTRUCTION_SATURATE 1 - -#define BRW_MASK_ENABLE 0 -#define BRW_MASK_DISABLE 1 - -#define BRW_ACCUMULATOR_WRITE_DISABLE 0 -#define BRW_ACCUMULATOR_WRITE_ENABLE 1 - -/** @{ - * - * Gen6 has replaced "mask enable/disable" with WECtrl, which is - * effectively the same but much simpler to think about. Now, there - * are two contributors ANDed together to whether channels are - * executed: The predication on the instruction, and the channel write - * enable. - */ -/** - * This is the default value. It means that a channel's write enable is set - * if the per-channel IP is pointing at this instruction. - */ -#define BRW_WE_NORMAL 0 -/** - * This is used like BRW_MASK_DISABLE, and causes all channels to have - * their write enable set. Note that predication still contributes to - * whether the channel actually gets written. - */ -#define BRW_WE_ALL 1 -/** @} */ - -enum opcode { - /* These are the actual hardware opcodes. */ - BRW_OPCODE_MOV = 1, - BRW_OPCODE_SEL = 2, - BRW_OPCODE_NOT = 4, - BRW_OPCODE_AND = 5, - BRW_OPCODE_OR = 6, - BRW_OPCODE_XOR = 7, - BRW_OPCODE_SHR = 8, - BRW_OPCODE_SHL = 9, - BRW_OPCODE_RSR = 10, - BRW_OPCODE_RSL = 11, - BRW_OPCODE_ASR = 12, - BRW_OPCODE_CMP = 16, - BRW_OPCODE_CMPN = 17, - BRW_OPCODE_F32TO16 = 19, - BRW_OPCODE_F16TO32 = 20, - BRW_OPCODE_BFREV = 23, - BRW_OPCODE_BFE = 24, - BRW_OPCODE_BFI1 = 25, - BRW_OPCODE_BFI2 = 26, - BRW_OPCODE_JMPI = 32, - BRW_OPCODE_BRD = 33, - BRW_OPCODE_IF = 34, - BRW_OPCODE_IFF = 35, - BRW_OPCODE_BRC = 35, - BRW_OPCODE_ELSE = 36, - BRW_OPCODE_ENDIF = 37, - BRW_OPCODE_DO = 38, - BRW_OPCODE_WHILE = 39, - BRW_OPCODE_BREAK = 40, - BRW_OPCODE_CONTINUE = 41, - BRW_OPCODE_HALT = 42, - BRW_OPCODE_MSAVE = 44, - BRW_OPCODE_CALL = 44, - BRW_OPCODE_MRESTORE = 45, - BRW_OPCODE_RET = 45, - BRW_OPCODE_PUSH = 46, - BRW_OPCODE_POP = 47, - BRW_OPCODE_WAIT = 48, - BRW_OPCODE_SEND = 49, - BRW_OPCODE_SENDC = 50, - BRW_OPCODE_MATH = 56, - BRW_OPCODE_ADD = 64, - BRW_OPCODE_MUL = 65, - BRW_OPCODE_AVG = 66, - BRW_OPCODE_FRC = 67, - BRW_OPCODE_RNDU = 68, - BRW_OPCODE_RNDD = 69, - BRW_OPCODE_RNDE = 70, - BRW_OPCODE_RNDZ = 71, - BRW_OPCODE_MAC = 72, - BRW_OPCODE_MACH = 73, - BRW_OPCODE_LZD = 74, - BRW_OPCODE_FBH = 75, - BRW_OPCODE_FBL = 76, - BRW_OPCODE_CBIT = 77, - BRW_OPCODE_ADDC = 78, - BRW_OPCODE_SUBB = 79, - BRW_OPCODE_SAD2 = 80, - BRW_OPCODE_SADA2 = 81, - BRW_OPCODE_DP4 = 84, - BRW_OPCODE_DPH = 85, - BRW_OPCODE_DP3 = 86, - BRW_OPCODE_DP2 = 87, - BRW_OPCODE_DPA2 = 88, - BRW_OPCODE_LINE = 89, - BRW_OPCODE_PLN = 90, - BRW_OPCODE_MAD = 91, - BRW_OPCODE_LRP = 92, - BRW_OPCODE_NOP = 126, - - /* These are compiler backend opcodes that get translated into other - * instructions. - */ - FS_OPCODE_FB_WRITE = 128, - SHADER_OPCODE_RCP, - SHADER_OPCODE_RSQ, - SHADER_OPCODE_SQRT, - SHADER_OPCODE_EXP2, - SHADER_OPCODE_LOG2, - SHADER_OPCODE_POW, - SHADER_OPCODE_INT_QUOTIENT, - SHADER_OPCODE_INT_REMAINDER, - SHADER_OPCODE_SIN, - SHADER_OPCODE_COS, - - SHADER_OPCODE_TEX, - SHADER_OPCODE_TXD, - SHADER_OPCODE_TXF, - SHADER_OPCODE_TXL, - SHADER_OPCODE_TXS, - FS_OPCODE_TXB, - - SHADER_OPCODE_SHADER_TIME_ADD, - - FS_OPCODE_DDX, - FS_OPCODE_DDY, - FS_OPCODE_PIXEL_X, - FS_OPCODE_PIXEL_Y, - FS_OPCODE_CINTERP, - FS_OPCODE_LINTERP, - FS_OPCODE_SPILL, - FS_OPCODE_UNSPILL, - FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD, - FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7, - FS_OPCODE_VARYING_PULL_CONSTANT_LOAD, - FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7, - FS_OPCODE_MOV_DISPATCH_TO_FLAGS, - FS_OPCODE_DISCARD_JUMP, - FS_OPCODE_SET_GLOBAL_OFFSET, - - VS_OPCODE_URB_WRITE, - VS_OPCODE_SCRATCH_READ, - VS_OPCODE_SCRATCH_WRITE, - VS_OPCODE_PULL_CONSTANT_LOAD, -}; - -#define BRW_PREDICATE_NONE 0 -#define BRW_PREDICATE_NORMAL 1 -#define BRW_PREDICATE_ALIGN1_ANYV 2 -#define BRW_PREDICATE_ALIGN1_ALLV 3 -#define BRW_PREDICATE_ALIGN1_ANY2H 4 -#define BRW_PREDICATE_ALIGN1_ALL2H 5 -#define BRW_PREDICATE_ALIGN1_ANY4H 6 -#define BRW_PREDICATE_ALIGN1_ALL4H 7 -#define BRW_PREDICATE_ALIGN1_ANY8H 8 -#define BRW_PREDICATE_ALIGN1_ALL8H 9 -#define BRW_PREDICATE_ALIGN1_ANY16H 10 -#define BRW_PREDICATE_ALIGN1_ALL16H 11 -#define BRW_PREDICATE_ALIGN16_REPLICATE_X 2 -#define BRW_PREDICATE_ALIGN16_REPLICATE_Y 3 -#define BRW_PREDICATE_ALIGN16_REPLICATE_Z 4 -#define BRW_PREDICATE_ALIGN16_REPLICATE_W 5 -#define BRW_PREDICATE_ALIGN16_ANY4H 6 -#define BRW_PREDICATE_ALIGN16_ALL4H 7 - -#define BRW_ARCHITECTURE_REGISTER_FILE 0 -#define BRW_GENERAL_REGISTER_FILE 1 -#define BRW_MESSAGE_REGISTER_FILE 2 -#define BRW_IMMEDIATE_VALUE 3 - -#define BRW_REGISTER_TYPE_UD 0 -#define BRW_REGISTER_TYPE_D 1 -#define BRW_REGISTER_TYPE_UW 2 -#define BRW_REGISTER_TYPE_W 3 -#define BRW_REGISTER_TYPE_UB 4 -#define BRW_REGISTER_TYPE_B 5 -#define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ -#define BRW_REGISTER_TYPE_HF 6 -#define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ -#define BRW_REGISTER_TYPE_F 7 - -#define BRW_REGISTER_3SRC_TYPE_F 0 -#define BRW_REGISTER_3SRC_TYPE_D 1 -#define BRW_REGISTER_3SRC_TYPE_UD 2 -#define BRW_REGISTER_3SRC_TYPE_DF 3 - -#define BRW_ARF_NULL 0x00 -#define BRW_ARF_ADDRESS 0x10 -#define BRW_ARF_ACCUMULATOR 0x20 -#define BRW_ARF_FLAG 0x30 -#define BRW_ARF_MASK 0x40 -#define BRW_ARF_MASK_STACK 0x50 -#define BRW_ARF_MASK_STACK_DEPTH 0x60 -#define BRW_ARF_STATE 0x70 -#define BRW_ARF_CONTROL 0x80 -#define BRW_ARF_NOTIFICATION_COUNT 0x90 -#define BRW_ARF_IP 0xA0 -#define BRW_ARF_TDR 0xB0 -#define BRW_ARF_TIMESTAMP 0xC0 - -#define BRW_MRF_COMPR4 (1 << 7) - -#define BRW_AMASK 0 -#define BRW_IMASK 1 -#define BRW_LMASK 2 -#define BRW_CMASK 3 - - - -#define BRW_THREAD_NORMAL 0 -#define BRW_THREAD_ATOMIC 1 -#define BRW_THREAD_SWITCH 2 - -#define BRW_VERTICAL_STRIDE_0 0 -#define BRW_VERTICAL_STRIDE_1 1 -#define BRW_VERTICAL_STRIDE_2 2 -#define BRW_VERTICAL_STRIDE_4 3 -#define BRW_VERTICAL_STRIDE_8 4 -#define BRW_VERTICAL_STRIDE_16 5 -#define BRW_VERTICAL_STRIDE_32 6 -#define BRW_VERTICAL_STRIDE_64 7 -#define BRW_VERTICAL_STRIDE_128 8 -#define BRW_VERTICAL_STRIDE_256 9 -#define BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF - -#define BRW_WIDTH_1 0 -#define BRW_WIDTH_2 1 -#define BRW_WIDTH_4 2 -#define BRW_WIDTH_8 3 -#define BRW_WIDTH_16 4 - -#define BRW_STATELESS_BUFFER_BOUNDARY_1K 0 -#define BRW_STATELESS_BUFFER_BOUNDARY_2K 1 -#define BRW_STATELESS_BUFFER_BOUNDARY_4K 2 -#define BRW_STATELESS_BUFFER_BOUNDARY_8K 3 -#define BRW_STATELESS_BUFFER_BOUNDARY_16K 4 -#define BRW_STATELESS_BUFFER_BOUNDARY_32K 5 -#define BRW_STATELESS_BUFFER_BOUNDARY_64K 6 -#define BRW_STATELESS_BUFFER_BOUNDARY_128K 7 -#define BRW_STATELESS_BUFFER_BOUNDARY_256K 8 -#define BRW_STATELESS_BUFFER_BOUNDARY_512K 9 -#define BRW_STATELESS_BUFFER_BOUNDARY_1M 10 -#define BRW_STATELESS_BUFFER_BOUNDARY_2M 11 - -#define BRW_POLYGON_FACING_FRONT 0 -#define BRW_POLYGON_FACING_BACK 1 - -/** - * Message target: Shared Function ID for where to SEND a message. - * - * These are enumerated in the ISA reference under "send - Send Message". - * In particular, see the following tables: - * - G45 PRM, Volume 4, Table 14-15 "Message Descriptor Definition" - * - Sandybridge PRM, Volume 4 Part 2, Table 8-16 "Extended Message Descriptor" - * - BSpec, Volume 1a (GPU Overview) / Graphics Processing Engine (GPE) / - * Overview / GPE Function IDs - */ -enum brw_message_target { - BRW_SFID_NULL = 0, - BRW_SFID_MATH = 1, /* Only valid on Gen4-5 */ - BRW_SFID_SAMPLER = 2, - BRW_SFID_MESSAGE_GATEWAY = 3, - BRW_SFID_DATAPORT_READ = 4, - BRW_SFID_DATAPORT_WRITE = 5, - BRW_SFID_URB = 6, - BRW_SFID_THREAD_SPAWNER = 7, - - GEN6_SFID_DATAPORT_SAMPLER_CACHE = 4, - GEN6_SFID_DATAPORT_RENDER_CACHE = 5, - GEN6_SFID_VME = 8, - GEN6_SFID_DATAPORT_CONSTANT_CACHE = 9, - - GEN7_SFID_DATAPORT_DATA_CACHE = 10, - - HSW_SFID_DATAPORT_DATA_CACHE1 = 0x0c, - HSW_SFID_CRE = 0x0d, - - /* There is no Sampler data port cache(0x04) on SKL and it is used - * as the extension of DP_DC0/DP_DC1. - */ - SKL_SFID_DATAPORT_DATA_CACHE2 = 0x4, - /* Data Read only Data port cache */ - SKL_SFID_DATAPORT_DCR0 = 0x9, -}; - -#define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0 -#define BRW_SAMPLER_RETURN_FORMAT_UINT32 2 -#define BRW_SAMPLER_RETURN_FORMAT_SINT32 3 - -#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 -#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 -#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 -#define BRW_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 -#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 -#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 -#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 -#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 -#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 -#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 -#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_BIAS_COMPARE 0 -#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD_COMPARE 1 -#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_LOD_COMPARE 1 -#define BRW_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 -#define BRW_SAMPLER_MESSAGE_SIMD16_RESINFO 2 -#define BRW_SAMPLER_MESSAGE_SIMD4X2_LD 3 -#define BRW_SAMPLER_MESSAGE_SIMD8_LD 3 -#define BRW_SAMPLER_MESSAGE_SIMD16_LD 3 - -#define GEN5_SAMPLER_MESSAGE_SAMPLE 0 -#define GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS 1 -#define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD 2 -#define GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE 3 -#define GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS 4 -#define GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE 5 -#define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE 6 -#define GEN5_SAMPLER_MESSAGE_SAMPLE_LD 7 -#define GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO 10 -#define HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE 20 -#define GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS 29 -#define GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS 30 -#define GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS 31 - -/* for GEN5 only */ -#define BRW_SAMPLER_SIMD_MODE_SIMD4X2 0 -#define BRW_SAMPLER_SIMD_MODE_SIMD8 1 -#define BRW_SAMPLER_SIMD_MODE_SIMD16 2 -#define BRW_SAMPLER_SIMD_MODE_SIMD32_64 3 - -#define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 -#define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 -#define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2 -#define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3 -#define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4 - -#define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 -#define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 - -#define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 -#define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 - -/* This one stays the same across generations. */ -#define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 -/* GEN4 */ -#define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 -#define BRW_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 2 -#define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 -/* G45, GEN5 */ -#define G45_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ 1 -#define G45_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2 -#define G45_DATAPORT_READ_MESSAGE_AVC_LOOP_FILTER_READ 3 -#define G45_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 4 -#define G45_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6 -/* GEN6 */ -#define GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ 1 -#define GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2 -#define GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 4 -#define GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ 5 -#define GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6 - -#define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0 -#define BRW_DATAPORT_READ_TARGET_RENDER_CACHE 1 -#define BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 - -#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 -#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 -#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 -#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 -#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 - -#define BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 -#define BRW_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 -#define BRW_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE 2 -#define BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 -#define BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 -#define BRW_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 -#define BRW_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 - -/* GEN6 */ -#define GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE 7 -#define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 8 -#define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 9 -#define GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE 10 -#define GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 11 -#define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 12 -#define GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE 13 -#define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE 14 - -/* GEN7 */ -#define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 10 -#define GEN7_DATAPORT_DC_DWORD_SCATTERED_READ 3 - -/* dataport atomic operations. */ -#define BRW_AOP_AND 1 -#define BRW_AOP_OR 2 -#define BRW_AOP_XOR 3 -#define BRW_AOP_MOV 4 -#define BRW_AOP_INC 5 -#define BRW_AOP_DEC 6 -#define BRW_AOP_ADD 7 -#define BRW_AOP_SUB 8 -#define BRW_AOP_REVSUB 9 -#define BRW_AOP_IMAX 10 -#define BRW_AOP_IMIN 11 -#define BRW_AOP_UMAX 12 -#define BRW_AOP_UMIN 13 -#define BRW_AOP_CMPWR 14 -#define BRW_AOP_PREDEC 15 - -#define BRW_MATH_FUNCTION_INV 1 -#define BRW_MATH_FUNCTION_LOG 2 -#define BRW_MATH_FUNCTION_EXP 3 -#define BRW_MATH_FUNCTION_SQRT 4 -#define BRW_MATH_FUNCTION_RSQ 5 -#define BRW_MATH_FUNCTION_SIN 6 /* was 7 */ -#define BRW_MATH_FUNCTION_COS 7 /* was 8 */ -#define BRW_MATH_FUNCTION_SINCOS 8 /* was 6 */ -#define BRW_MATH_FUNCTION_TAN 9 /* gen4 */ -#define BRW_MATH_FUNCTION_FDIV 9 /* gen6+ */ -#define BRW_MATH_FUNCTION_POW 10 -#define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 -#define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT 12 -#define BRW_MATH_FUNCTION_INT_DIV_REMAINDER 13 - -#define BRW_MATH_INTEGER_UNSIGNED 0 -#define BRW_MATH_INTEGER_SIGNED 1 - -#define BRW_MATH_PRECISION_FULL 0 -#define BRW_MATH_PRECISION_PARTIAL 1 - -#define BRW_MATH_SATURATE_NONE 0 -#define BRW_MATH_SATURATE_SATURATE 1 - -#define BRW_MATH_DATA_VECTOR 0 -#define BRW_MATH_DATA_SCALAR 1 - -#define BRW_URB_OPCODE_WRITE 0 - -#define BRW_URB_SWIZZLE_NONE 0 -#define BRW_URB_SWIZZLE_INTERLEAVE 1 -#define BRW_URB_SWIZZLE_TRANSPOSE 2 - -#define BRW_SCRATCH_SPACE_SIZE_1K 0 -#define BRW_SCRATCH_SPACE_SIZE_2K 1 -#define BRW_SCRATCH_SPACE_SIZE_4K 2 -#define BRW_SCRATCH_SPACE_SIZE_8K 3 -#define BRW_SCRATCH_SPACE_SIZE_16K 4 -#define BRW_SCRATCH_SPACE_SIZE_32K 5 -#define BRW_SCRATCH_SPACE_SIZE_64K 6 -#define BRW_SCRATCH_SPACE_SIZE_128K 7 -#define BRW_SCRATCH_SPACE_SIZE_256K 8 -#define BRW_SCRATCH_SPACE_SIZE_512K 9 -#define BRW_SCRATCH_SPACE_SIZE_1M 10 -#define BRW_SCRATCH_SPACE_SIZE_2M 11 - - -#define CMD_URB_FENCE 0x6000 -#define CMD_CS_URB_STATE 0x6001 -#define CMD_CONST_BUFFER 0x6002 - -#define CMD_STATE_BASE_ADDRESS 0x6101 -#define CMD_STATE_SIP 0x6102 -#define CMD_PIPELINE_SELECT_965 0x6104 -#define CMD_PIPELINE_SELECT_GM45 0x6904 - -#define _3DSTATE_PIPELINED_POINTERS 0x7800 -#define _3DSTATE_BINDING_TABLE_POINTERS 0x7801 -# define GEN6_BINDING_TABLE_MODIFY_VS (1 << 8) -# define GEN6_BINDING_TABLE_MODIFY_GS (1 << 9) -# define GEN6_BINDING_TABLE_MODIFY_PS (1 << 12) - -#define _3DSTATE_BINDING_TABLE_POINTERS_VS 0x7826 /* GEN7+ */ -#define _3DSTATE_BINDING_TABLE_POINTERS_HS 0x7827 /* GEN7+ */ -#define _3DSTATE_BINDING_TABLE_POINTERS_DS 0x7828 /* GEN7+ */ -#define _3DSTATE_BINDING_TABLE_POINTERS_GS 0x7829 /* GEN7+ */ -#define _3DSTATE_BINDING_TABLE_POINTERS_PS 0x782A /* GEN7+ */ - -#define _3DSTATE_SAMPLER_STATE_POINTERS 0x7802 /* GEN6+ */ -# define PS_SAMPLER_STATE_CHANGE (1 << 12) -# define GS_SAMPLER_STATE_CHANGE (1 << 9) -# define VS_SAMPLER_STATE_CHANGE (1 << 8) -/* DW1: VS */ -/* DW2: GS */ -/* DW3: PS */ - -#define _3DSTATE_SAMPLER_STATE_POINTERS_VS 0x782B /* GEN7+ */ -#define _3DSTATE_SAMPLER_STATE_POINTERS_GS 0x782E /* GEN7+ */ -#define _3DSTATE_SAMPLER_STATE_POINTERS_PS 0x782F /* GEN7+ */ - -#define _3DSTATE_VERTEX_BUFFERS 0x7808 -# define BRW_VB0_INDEX_SHIFT 27 -# define GEN6_VB0_INDEX_SHIFT 26 -# define BRW_VB0_ACCESS_VERTEXDATA (0 << 26) -# define BRW_VB0_ACCESS_INSTANCEDATA (1 << 26) -# define GEN6_VB0_ACCESS_VERTEXDATA (0 << 20) -# define GEN6_VB0_ACCESS_INSTANCEDATA (1 << 20) -# define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14) -# define BRW_VB0_PITCH_SHIFT 0 - -#define _3DSTATE_VERTEX_ELEMENTS 0x7809 -# define BRW_VE0_INDEX_SHIFT 27 -# define GEN6_VE0_INDEX_SHIFT 26 -# define BRW_VE0_FORMAT_SHIFT 16 -# define BRW_VE0_VALID (1 << 26) -# define GEN6_VE0_VALID (1 << 25) -# define GEN6_VE0_EDGE_FLAG_ENABLE (1 << 15) -# define BRW_VE0_SRC_OFFSET_SHIFT 0 -# define BRW_VE1_COMPONENT_NOSTORE 0 -# define BRW_VE1_COMPONENT_STORE_SRC 1 -# define BRW_VE1_COMPONENT_STORE_0 2 -# define BRW_VE1_COMPONENT_STORE_1_FLT 3 -# define BRW_VE1_COMPONENT_STORE_1_INT 4 -# define BRW_VE1_COMPONENT_STORE_VID 5 -# define BRW_VE1_COMPONENT_STORE_IID 6 -# define BRW_VE1_COMPONENT_STORE_PID 7 -# define BRW_VE1_COMPONENT_0_SHIFT 28 -# define BRW_VE1_COMPONENT_1_SHIFT 24 -# define BRW_VE1_COMPONENT_2_SHIFT 20 -# define BRW_VE1_COMPONENT_3_SHIFT 16 -# define BRW_VE1_DST_OFFSET_SHIFT 0 - -#define CMD_INDEX_BUFFER 0x780a -#define GEN4_3DSTATE_VF_STATISTICS 0x780b -#define GM45_3DSTATE_VF_STATISTICS 0x680b -#define _3DSTATE_CC_STATE_POINTERS 0x780e /* GEN6+ */ -#define _3DSTATE_BLEND_STATE_POINTERS 0x7824 /* GEN7+ */ -#define _3DSTATE_DEPTH_STENCIL_STATE_POINTERS 0x7825 /* GEN7+ */ - -#define _3DSTATE_URB 0x7805 /* GEN6 */ -# define GEN6_URB_VS_SIZE_SHIFT 16 -# define GEN6_URB_VS_ENTRIES_SHIFT 0 -# define GEN6_URB_GS_ENTRIES_SHIFT 8 -# define GEN6_URB_GS_SIZE_SHIFT 0 - -#define _3DSTATE_VF 0x780c /* GEN7.5+ */ -#define HSW_CUT_INDEX_ENABLE (1 << 8) - -#define _3DSTATE_URB_VS 0x7830 /* GEN7+ */ -#define _3DSTATE_URB_HS 0x7831 /* GEN7+ */ -#define _3DSTATE_URB_DS 0x7832 /* GEN7+ */ -#define _3DSTATE_URB_GS 0x7833 /* GEN7+ */ -# define GEN7_URB_ENTRY_SIZE_SHIFT 16 -# define GEN7_URB_STARTING_ADDRESS_SHIFT 25 - -#define _3DSTATE_PUSH_CONSTANT_ALLOC_VS 0x7912 /* GEN7+ */ -#define _3DSTATE_PUSH_CONSTANT_ALLOC_PS 0x7916 /* GEN7+ */ -# define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 - -#define _3DSTATE_VIEWPORT_STATE_POINTERS 0x780d /* GEN6+ */ -# define GEN6_CC_VIEWPORT_MODIFY (1 << 12) -# define GEN6_SF_VIEWPORT_MODIFY (1 << 11) -# define GEN6_CLIP_VIEWPORT_MODIFY (1 << 10) - -#define _3DSTATE_VIEWPORT_STATE_POINTERS_CC 0x7823 /* GEN7+ */ -#define _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL 0x7821 /* GEN7+ */ - -#define _3DSTATE_SCISSOR_STATE_POINTERS 0x780f /* GEN6+ */ - -#define _3DSTATE_VS 0x7810 /* GEN6+ */ -/* DW2 */ -# define GEN6_VS_SPF_MODE (1 << 31) -# define GEN6_VS_VECTOR_MASK_ENABLE (1 << 30) -# define GEN6_VS_SAMPLER_COUNT_SHIFT 27 -# define GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 -# define GEN6_VS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) -# define GEN6_VS_FLOATING_POINT_MODE_ALT (1 << 16) -/* DW4 */ -# define GEN6_VS_DISPATCH_START_GRF_SHIFT 20 -# define GEN6_VS_URB_READ_LENGTH_SHIFT 11 -# define GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT 4 -/* DW5 */ -# define GEN6_VS_MAX_THREADS_SHIFT 25 -# define HSW_VS_MAX_THREADS_SHIFT 23 -# define GEN6_VS_STATISTICS_ENABLE (1 << 10) -# define GEN6_VS_CACHE_DISABLE (1 << 1) -# define GEN6_VS_ENABLE (1 << 0) - -#define _3DSTATE_GS 0x7811 /* GEN6+ */ -/* DW2 */ -# define GEN6_GS_SPF_MODE (1 << 31) -# define GEN6_GS_VECTOR_MASK_ENABLE (1 << 30) -# define GEN6_GS_SAMPLER_COUNT_SHIFT 27 -# define GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 -# define GEN6_GS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) -# define GEN6_GS_FLOATING_POINT_MODE_ALT (1 << 16) -/* DW4 */ -# define GEN6_GS_URB_READ_LENGTH_SHIFT 11 -# define GEN7_GS_INCLUDE_VERTEX_HANDLES (1 << 10) -# define GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT 4 -# define GEN6_GS_DISPATCH_START_GRF_SHIFT 0 -/* DW5 */ -# define GEN6_GS_MAX_THREADS_SHIFT 25 -# define GEN6_GS_STATISTICS_ENABLE (1 << 10) -# define GEN6_GS_SO_STATISTICS_ENABLE (1 << 9) -# define GEN6_GS_RENDERING_ENABLE (1 << 8) -# define GEN7_GS_ENABLE (1 << 0) -/* DW6 */ -# define GEN6_GS_REORDER (1 << 30) -# define GEN6_GS_DISCARD_ADJACENCY (1 << 29) -# define GEN6_GS_SVBI_PAYLOAD_ENABLE (1 << 28) -# define GEN6_GS_SVBI_POSTINCREMENT_ENABLE (1 << 27) -# define GEN6_GS_SVBI_POSTINCREMENT_VALUE_SHIFT 16 -# define GEN6_GS_SVBI_POSTINCREMENT_VALUE_MASK INTEL_MASK(25, 16) -# define GEN6_GS_ENABLE (1 << 15) - -# define BRW_GS_EDGE_INDICATOR_0 (1 << 8) -# define BRW_GS_EDGE_INDICATOR_1 (1 << 9) - -#define _3DSTATE_HS 0x781B /* GEN7+ */ -#define _3DSTATE_TE 0x781C /* GEN7+ */ -#define _3DSTATE_DS 0x781D /* GEN7+ */ - -#define _3DSTATE_CLIP 0x7812 /* GEN6+ */ -/* DW1 */ -# define GEN7_CLIP_WINDING_CW (0 << 20) -# define GEN7_CLIP_WINDING_CCW (1 << 20) -# define GEN7_CLIP_VERTEX_SUBPIXEL_PRECISION_8 (0 << 19) -# define GEN7_CLIP_VERTEX_SUBPIXEL_PRECISION_4 (1 << 19) -# define GEN7_CLIP_EARLY_CULL (1 << 18) -# define GEN7_CLIP_CULLMODE_BOTH (0 << 16) -# define GEN7_CLIP_CULLMODE_NONE (1 << 16) -# define GEN7_CLIP_CULLMODE_FRONT (2 << 16) -# define GEN7_CLIP_CULLMODE_BACK (3 << 16) -# define GEN6_CLIP_STATISTICS_ENABLE (1 << 10) -/** - * Just does cheap culling based on the clip distance. Bits must be - * disjoint with USER_CLIP_CLIP_DISTANCE bits. - */ -# define GEN6_USER_CLIP_CULL_DISTANCES_SHIFT 0 -/* DW2 */ -# define GEN6_CLIP_ENABLE (1 << 31) -# define GEN6_CLIP_API_OGL (0 << 30) -# define GEN6_CLIP_API_D3D (1 << 30) -# define GEN6_CLIP_XY_TEST (1 << 28) -# define GEN6_CLIP_Z_TEST (1 << 27) -# define GEN6_CLIP_GB_TEST (1 << 26) -/** 8-bit field of which user clip distances to clip aganist. */ -# define GEN6_USER_CLIP_CLIP_DISTANCES_SHIFT 16 -# define GEN6_CLIP_MODE_NORMAL (0 << 13) -# define GEN6_CLIP_MODE_REJECT_ALL (3 << 13) -# define GEN6_CLIP_MODE_ACCEPT_ALL (4 << 13) -# define GEN6_CLIP_PERSPECTIVE_DIVIDE_DISABLE (1 << 9) -# define GEN6_CLIP_NON_PERSPECTIVE_BARYCENTRIC_ENABLE (1 << 8) -# define GEN6_CLIP_TRI_PROVOKE_SHIFT 4 -# define GEN6_CLIP_LINE_PROVOKE_SHIFT 2 -# define GEN6_CLIP_TRIFAN_PROVOKE_SHIFT 0 -/* DW3 */ -# define GEN6_CLIP_MIN_POINT_WIDTH_SHIFT 17 -# define GEN6_CLIP_MAX_POINT_WIDTH_SHIFT 6 -# define GEN6_CLIP_FORCE_ZERO_RTAINDEX (1 << 5) - -#define _3DSTATE_SF 0x7813 /* GEN6+ */ -/* DW1 (for gen6) */ -# define GEN6_SF_NUM_OUTPUTS_SHIFT 22 -# define GEN6_SF_SWIZZLE_ENABLE (1 << 21) -# define GEN6_SF_POINT_SPRITE_UPPERLEFT (0 << 20) -# define GEN6_SF_POINT_SPRITE_LOWERLEFT (1 << 20) -# define GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 -# define GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 -/* DW2 */ -# define GEN6_SF_LEGACY_GLOBAL_DEPTH_BIAS (1 << 11) -# define GEN6_SF_STATISTICS_ENABLE (1 << 10) -# define GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID (1 << 9) -# define GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME (1 << 8) -# define GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT (1 << 7) -# define GEN6_SF_FRONT_SOLID (0 << 5) -# define GEN6_SF_FRONT_WIREFRAME (1 << 5) -# define GEN6_SF_FRONT_POINT (2 << 5) -# define GEN6_SF_BACK_SOLID (0 << 3) -# define GEN6_SF_BACK_WIREFRAME (1 << 3) -# define GEN6_SF_BACK_POINT (2 << 3) -# define GEN6_SF_VIEWPORT_TRANSFORM_ENABLE (1 << 1) -# define GEN6_SF_WINDING_CCW (1 << 0) -/* DW3 */ -# define GEN6_SF_LINE_AA_ENABLE (1 << 31) -# define GEN6_SF_CULL_BOTH (0 << 29) -# define GEN6_SF_CULL_NONE (1 << 29) -# define GEN6_SF_CULL_FRONT (2 << 29) -# define GEN6_SF_CULL_BACK (3 << 29) -# define GEN6_SF_LINE_WIDTH_SHIFT 18 /* U3.7 */ -# define GEN6_SF_LINE_END_CAP_WIDTH_0_5 (0 << 16) -# define GEN6_SF_LINE_END_CAP_WIDTH_1_0 (1 << 16) -# define GEN6_SF_LINE_END_CAP_WIDTH_2_0 (2 << 16) -# define GEN6_SF_LINE_END_CAP_WIDTH_4_0 (3 << 16) -# define GEN6_SF_SCISSOR_ENABLE (1 << 11) -# define GEN6_SF_MSRAST_OFF_PIXEL (0 << 8) -# define GEN6_SF_MSRAST_OFF_PATTERN (1 << 8) -# define GEN6_SF_MSRAST_ON_PIXEL (2 << 8) -# define GEN6_SF_MSRAST_ON_PATTERN (3 << 8) -/* DW4 */ -# define GEN6_SF_TRI_PROVOKE_SHIFT 29 -# define GEN6_SF_LINE_PROVOKE_SHIFT 27 -# define GEN6_SF_TRIFAN_PROVOKE_SHIFT 25 -# define GEN6_SF_LINE_AA_MODE_MANHATTAN (0 << 14) -# define GEN6_SF_LINE_AA_MODE_TRUE (1 << 14) -# define GEN6_SF_VERTEX_SUBPIXEL_8BITS (0 << 12) -# define GEN6_SF_VERTEX_SUBPIXEL_4BITS (1 << 12) -# define GEN6_SF_USE_STATE_POINT_WIDTH (1 << 11) -# define GEN6_SF_POINT_WIDTH_SHIFT 0 /* U8.3 */ -/* DW5: depth offset constant */ -/* DW6: depth offset scale */ -/* DW7: depth offset clamp */ -/* DW8 */ -# define ATTRIBUTE_1_OVERRIDE_W (1 << 31) -# define ATTRIBUTE_1_OVERRIDE_Z (1 << 30) -# define ATTRIBUTE_1_OVERRIDE_Y (1 << 29) -# define ATTRIBUTE_1_OVERRIDE_X (1 << 28) -# define ATTRIBUTE_1_CONST_SOURCE_SHIFT 25 -# define ATTRIBUTE_1_SWIZZLE_SHIFT 22 -# define ATTRIBUTE_1_SOURCE_SHIFT 16 -# define ATTRIBUTE_0_OVERRIDE_W (1 << 15) -# define ATTRIBUTE_0_OVERRIDE_Z (1 << 14) -# define ATTRIBUTE_0_OVERRIDE_Y (1 << 13) -# define ATTRIBUTE_0_OVERRIDE_X (1 << 12) -# define ATTRIBUTE_0_CONST_SOURCE_SHIFT 9 -# define ATTRIBUTE_0_SWIZZLE_SHIFT 6 -# define ATTRIBUTE_0_SOURCE_SHIFT 0 - -# define ATTRIBUTE_SWIZZLE_INPUTATTR 0 -# define ATTRIBUTE_SWIZZLE_INPUTATTR_FACING 1 -# define ATTRIBUTE_SWIZZLE_INPUTATTR_W 2 -# define ATTRIBUTE_SWIZZLE_INPUTATTR_FACING_W 3 -# define ATTRIBUTE_SWIZZLE_SHIFT 6 - -/* DW16: Point sprite texture coordinate enables */ -/* DW17: Constant interpolation enables */ -/* DW18: attr 0-7 wrap shortest enables */ -/* DW19: attr 8-16 wrap shortest enables */ - -/* On GEN7, many fields of 3DSTATE_SF were split out into a new command: - * 3DSTATE_SBE. The remaining fields live in different DWords, but retain - * the same bit-offset. The only new field: - */ -/* GEN7/DW1: */ -# define GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT 12 -/* GEN7/DW2: */ -# define HSW_SF_LINE_STIPPLE_ENABLE 14 - -#define _3DSTATE_SBE 0x781F /* GEN7+ */ -/* DW1 */ -# define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28) -# define GEN7_SBE_NUM_OUTPUTS_SHIFT 22 -# define GEN7_SBE_SWIZZLE_ENABLE (1 << 21) -# define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20) -# define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 -# define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4 -/* DW2-9: Attribute setup (same as DW8-15 of gen6 _3DSTATE_SF) */ -/* DW10: Point sprite texture coordinate enables */ -/* DW11: Constant interpolation enables */ -/* DW12: attr 0-7 wrap shortest enables */ -/* DW13: attr 8-16 wrap shortest enables */ - -enum brw_wm_barycentric_interp_mode { - BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC = 0, - BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC = 1, - BRW_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC = 2, - BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC = 3, - BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC = 4, - BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC = 5, - BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT = 6 -}; -#define BRW_WM_NONPERSPECTIVE_BARYCENTRIC_BITS \ - ((1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC) | \ - (1 << BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC) | \ - (1 << BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC)) - -#define _3DSTATE_WM 0x7814 /* GEN6+ */ -/* DW1: kernel pointer */ -/* DW2 */ -# define GEN6_WM_SPF_MODE (1 << 31) -# define GEN6_WM_VECTOR_MASK_ENABLE (1 << 30) -# define GEN6_WM_SAMPLER_COUNT_SHIFT 27 -# define GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 -# define GEN6_WM_FLOATING_POINT_MODE_IEEE_754 (0 << 16) -# define GEN6_WM_FLOATING_POINT_MODE_ALT (1 << 16) -/* DW3: scratch space */ -/* DW4 */ -# define GEN6_WM_STATISTICS_ENABLE (1 << 31) -# define GEN6_WM_DEPTH_CLEAR (1 << 30) -# define GEN6_WM_DEPTH_RESOLVE (1 << 28) -# define GEN6_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) -# define GEN6_WM_DISPATCH_START_GRF_SHIFT_0 16 -# define GEN6_WM_DISPATCH_START_GRF_SHIFT_1 8 -# define GEN6_WM_DISPATCH_START_GRF_SHIFT_2 0 -/* DW5 */ -# define GEN6_WM_MAX_THREADS_SHIFT 25 -# define GEN6_WM_KILL_ENABLE (1 << 22) -# define GEN6_WM_COMPUTED_DEPTH (1 << 21) -# define GEN6_WM_USES_SOURCE_DEPTH (1 << 20) -# define GEN6_WM_DISPATCH_ENABLE (1 << 19) -# define GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 16) -# define GEN6_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 16) -# define GEN6_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 16) -# define GEN6_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 16) -# define GEN6_WM_LINE_AA_WIDTH_0_5 (0 << 14) -# define GEN6_WM_LINE_AA_WIDTH_1_0 (1 << 14) -# define GEN6_WM_LINE_AA_WIDTH_2_0 (2 << 14) -# define GEN6_WM_LINE_AA_WIDTH_4_0 (3 << 14) -# define GEN6_WM_POLYGON_STIPPLE_ENABLE (1 << 13) -# define GEN6_WM_LINE_STIPPLE_ENABLE (1 << 11) -# define GEN6_WM_OMASK_TO_RENDER_TARGET (1 << 9) -# define GEN6_WM_USES_SOURCE_W (1 << 8) -# define GEN6_WM_DUAL_SOURCE_BLEND_ENABLE (1 << 7) -# define GEN6_WM_32_DISPATCH_ENABLE (1 << 2) -# define GEN6_WM_16_DISPATCH_ENABLE (1 << 1) -# define GEN6_WM_8_DISPATCH_ENABLE (1 << 0) -/* DW6 */ -# define GEN6_WM_NUM_SF_OUTPUTS_SHIFT 20 -# define GEN6_WM_POSOFFSET_NONE (0 << 18) -# define GEN6_WM_POSOFFSET_CENTROID (2 << 18) -# define GEN6_WM_POSOFFSET_SAMPLE (3 << 18) -# define GEN6_WM_POSITION_ZW_PIXEL (0 << 16) -# define GEN6_WM_POSITION_ZW_CENTROID (2 << 16) -# define GEN6_WM_POSITION_ZW_SAMPLE (3 << 16) -# define GEN6_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) -# define GEN6_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) -# define GEN6_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) -# define GEN6_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) -# define GEN6_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) -# define GEN6_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) -# define GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT 10 -# define GEN6_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 9) -# define GEN6_WM_MSRAST_OFF_PIXEL (0 << 1) -# define GEN6_WM_MSRAST_OFF_PATTERN (1 << 1) -# define GEN6_WM_MSRAST_ON_PIXEL (2 << 1) -# define GEN6_WM_MSRAST_ON_PATTERN (3 << 1) -# define GEN6_WM_MSDISPMODE_PERSAMPLE (0 << 0) -# define GEN6_WM_MSDISPMODE_PERPIXEL (1 << 0) -/* DW7: kernel 1 pointer */ -/* DW8: kernel 2 pointer */ - -#define _3DSTATE_CONSTANT_VS 0x7815 /* GEN6+ */ -#define _3DSTATE_CONSTANT_GS 0x7816 /* GEN6+ */ -#define _3DSTATE_CONSTANT_PS 0x7817 /* GEN6+ */ -# define GEN6_CONSTANT_BUFFER_3_ENABLE (1 << 15) -# define GEN6_CONSTANT_BUFFER_2_ENABLE (1 << 14) -# define GEN6_CONSTANT_BUFFER_1_ENABLE (1 << 13) -# define GEN6_CONSTANT_BUFFER_0_ENABLE (1 << 12) - -#define _3DSTATE_CONSTANT_HS 0x7819 /* GEN7+ */ -#define _3DSTATE_CONSTANT_DS 0x781A /* GEN7+ */ - -#define _3DSTATE_STREAMOUT 0x781e /* GEN7+ */ -/* DW1 */ -# define SO_FUNCTION_ENABLE (1 << 31) -# define SO_RENDERING_DISABLE (1 << 30) -/* This selects which incoming rendering stream goes down the pipeline. The - * rendering stream is 0 if not defined by special cases in the GS state. - */ -# define SO_RENDER_STREAM_SELECT_SHIFT 27 -# define SO_RENDER_STREAM_SELECT_MASK INTEL_MASK(28, 27) -/* Controls reordering of TRISTRIP_* elements in stream output (not rendering). - */ -# define SO_REORDER_TRAILING (1 << 26) -/* Controls SO_NUM_PRIMS_WRITTEN_* and SO_PRIM_STORAGE_* */ -# define SO_STATISTICS_ENABLE (1 << 25) -# define SO_BUFFER_ENABLE(n) (1 << (8 + (n))) -/* DW2 */ -# define SO_STREAM_3_VERTEX_READ_OFFSET_SHIFT 29 -# define SO_STREAM_3_VERTEX_READ_OFFSET_MASK INTEL_MASK(29, 29) -# define SO_STREAM_3_VERTEX_READ_LENGTH_SHIFT 24 -# define SO_STREAM_3_VERTEX_READ_LENGTH_MASK INTEL_MASK(28, 24) -# define SO_STREAM_2_VERTEX_READ_OFFSET_SHIFT 21 -# define SO_STREAM_2_VERTEX_READ_OFFSET_MASK INTEL_MASK(21, 21) -# define SO_STREAM_2_VERTEX_READ_LENGTH_SHIFT 16 -# define SO_STREAM_2_VERTEX_READ_LENGTH_MASK INTEL_MASK(20, 16) -# define SO_STREAM_1_VERTEX_READ_OFFSET_SHIFT 13 -# define SO_STREAM_1_VERTEX_READ_OFFSET_MASK INTEL_MASK(13, 13) -# define SO_STREAM_1_VERTEX_READ_LENGTH_SHIFT 8 -# define SO_STREAM_1_VERTEX_READ_LENGTH_MASK INTEL_MASK(12, 8) -# define SO_STREAM_0_VERTEX_READ_OFFSET_SHIFT 5 -# define SO_STREAM_0_VERTEX_READ_OFFSET_MASK INTEL_MASK(5, 5) -# define SO_STREAM_0_VERTEX_READ_LENGTH_SHIFT 0 -# define SO_STREAM_0_VERTEX_READ_LENGTH_MASK INTEL_MASK(4, 0) - -/* 3DSTATE_WM for Gen7 */ -/* DW1 */ -# define GEN7_WM_STATISTICS_ENABLE (1 << 31) -# define GEN7_WM_DEPTH_CLEAR (1 << 30) -# define GEN7_WM_DISPATCH_ENABLE (1 << 29) -# define GEN7_WM_DEPTH_RESOLVE (1 << 28) -# define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) -# define GEN7_WM_KILL_ENABLE (1 << 25) -# define GEN7_WM_PSCDEPTH_OFF (0 << 23) -# define GEN7_WM_PSCDEPTH_ON (1 << 23) -# define GEN7_WM_PSCDEPTH_ON_GE (2 << 23) -# define GEN7_WM_PSCDEPTH_ON_LE (3 << 23) -# define GEN7_WM_USES_SOURCE_DEPTH (1 << 20) -# define GEN7_WM_USES_SOURCE_W (1 << 19) -# define GEN7_WM_POSITION_ZW_PIXEL (0 << 17) -# define GEN7_WM_POSITION_ZW_CENTROID (2 << 17) -# define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17) -# define GEN7_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT 11 -# define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10) -# define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8) -# define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8) -# define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8) -# define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8) -# define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6) -# define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6) -# define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6) -# define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6) -# define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4) -# define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3) -# define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2) -# define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0) -# define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0) -# define GEN7_WM_MSRAST_ON_PIXEL (2 << 0) -# define GEN7_WM_MSRAST_ON_PATTERN (3 << 0) -/* DW2 */ -# define GEN7_WM_MSDISPMODE_PERSAMPLE (0 << 31) -# define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31) - -#define _3DSTATE_PS 0x7820 /* GEN7+ */ -/* DW1: kernel pointer */ -/* DW2 */ -# define GEN7_PS_SPF_MODE (1 << 31) -# define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30) -# define GEN7_PS_SAMPLER_COUNT_SHIFT 27 -# define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 -# define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) -# define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) -/* DW3: scratch space */ -/* DW4 */ -# define IVB_PS_MAX_THREADS_SHIFT 24 -# define HSW_PS_MAX_THREADS_SHIFT 23 -# define HSW_PS_SAMPLE_MASK_SHIFT 12 -# define HSW_PS_SAMPLE_MASK_MASK INTEL_MASK(19, 12) -# define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) -# define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) -# define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) -# define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7) -# define GEN7_PS_POSOFFSET_NONE (0 << 3) -# define GEN7_PS_POSOFFSET_CENTROID (2 << 3) -# define GEN7_PS_POSOFFSET_SAMPLE (3 << 3) -# define GEN7_PS_32_DISPATCH_ENABLE (1 << 2) -# define GEN7_PS_16_DISPATCH_ENABLE (1 << 1) -# define GEN7_PS_8_DISPATCH_ENABLE (1 << 0) -/* DW5 */ -# define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 -# define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8 -# define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0 -/* DW6: kernel 1 pointer */ -/* DW7: kernel 2 pointer */ - -#define _3DSTATE_SAMPLE_MASK 0x7818 /* GEN6+ */ - -#define _3DSTATE_DRAWING_RECTANGLE 0x7900 -#define _3DSTATE_BLEND_CONSTANT_COLOR 0x7901 -#define _3DSTATE_CHROMA_KEY 0x7904 -#define _3DSTATE_DEPTH_BUFFER 0x7905 /* GEN4-6 */ -#define _3DSTATE_POLY_STIPPLE_OFFSET 0x7906 -#define _3DSTATE_POLY_STIPPLE_PATTERN 0x7907 -#define _3DSTATE_LINE_STIPPLE_PATTERN 0x7908 -#define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x7909 -#define _3DSTATE_AA_LINE_PARAMETERS 0x790a /* G45+ */ - -#define _3DSTATE_GS_SVB_INDEX 0x790b /* CTG+ */ -/* DW1 */ -# define SVB_INDEX_SHIFT 29 -# define SVB_LOAD_INTERNAL_VERTEX_COUNT (1 << 0) /* SNB+ */ -/* DW2: SVB index */ -/* DW3: SVB maximum index */ - -#define _3DSTATE_MULTISAMPLE 0x790d /* GEN6+ */ -/* DW1 */ -# define MS_PIXEL_LOCATION_CENTER (0 << 4) -# define MS_PIXEL_LOCATION_UPPER_LEFT (1 << 4) -# define MS_NUMSAMPLES_1 (0 << 1) -# define MS_NUMSAMPLES_4 (2 << 1) -# define MS_NUMSAMPLES_8 (3 << 1) - -#define _3DSTATE_STENCIL_BUFFER 0x790e /* ILK, SNB */ -#define _3DSTATE_HIER_DEPTH_BUFFER 0x790f /* ILK, SNB */ - -#define GEN7_3DSTATE_CLEAR_PARAMS 0x7804 -#define GEN7_3DSTATE_DEPTH_BUFFER 0x7805 -#define GEN7_3DSTATE_STENCIL_BUFFER 0x7806 -# define HSW_STENCIL_ENABLED (1 << 31) -#define GEN7_3DSTATE_HIER_DEPTH_BUFFER 0x7807 - -#define _3DSTATE_CLEAR_PARAMS 0x7910 /* ILK, SNB */ -# define GEN5_DEPTH_CLEAR_VALID (1 << 15) -/* DW1: depth clear value */ -/* DW2 */ -# define GEN7_DEPTH_CLEAR_VALID (1 << 0) - -#define _3DSTATE_SO_DECL_LIST 0x7917 /* GEN7+ */ -/* DW1 */ -# define SO_STREAM_TO_BUFFER_SELECTS_3_SHIFT 12 -# define SO_STREAM_TO_BUFFER_SELECTS_3_MASK INTEL_MASK(15, 12) -# define SO_STREAM_TO_BUFFER_SELECTS_2_SHIFT 8 -# define SO_STREAM_TO_BUFFER_SELECTS_2_MASK INTEL_MASK(11, 8) -# define SO_STREAM_TO_BUFFER_SELECTS_1_SHIFT 4 -# define SO_STREAM_TO_BUFFER_SELECTS_1_MASK INTEL_MASK(7, 4) -# define SO_STREAM_TO_BUFFER_SELECTS_0_SHIFT 0 -# define SO_STREAM_TO_BUFFER_SELECTS_0_MASK INTEL_MASK(3, 0) -/* DW2 */ -# define SO_NUM_ENTRIES_3_SHIFT 24 -# define SO_NUM_ENTRIES_3_MASK INTEL_MASK(31, 24) -# define SO_NUM_ENTRIES_2_SHIFT 16 -# define SO_NUM_ENTRIES_2_MASK INTEL_MASK(23, 16) -# define SO_NUM_ENTRIES_1_SHIFT 8 -# define SO_NUM_ENTRIES_1_MASK INTEL_MASK(15, 8) -# define SO_NUM_ENTRIES_0_SHIFT 0 -# define SO_NUM_ENTRIES_0_MASK INTEL_MASK(7, 0) - -/* SO_DECL DW0 */ -# define SO_DECL_OUTPUT_BUFFER_SLOT_SHIFT 12 -# define SO_DECL_OUTPUT_BUFFER_SLOT_MASK INTEL_MASK(13, 12) -# define SO_DECL_HOLE_FLAG (1 << 11) -# define SO_DECL_REGISTER_INDEX_SHIFT 4 -# define SO_DECL_REGISTER_INDEX_MASK INTEL_MASK(9, 4) -# define SO_DECL_COMPONENT_MASK_SHIFT 0 -# define SO_DECL_COMPONENT_MASK_MASK INTEL_MASK(3, 0) - -#define _3DSTATE_SO_BUFFER 0x7918 /* GEN7+ */ -/* DW1 */ -# define SO_BUFFER_INDEX_SHIFT 29 -# define SO_BUFFER_INDEX_MASK INTEL_MASK(30, 29) -# define SO_BUFFER_PITCH_SHIFT 0 -# define SO_BUFFER_PITCH_MASK INTEL_MASK(11, 0) -/* DW2: start address */ -/* DW3: end address. */ - -#define CMD_PIPE_CONTROL 0x7a00 - -#define CMD_MI_FLUSH 0x0200 - - -/* Bitfields for the URB_WRITE message, DW2 of message header: */ -#define URB_WRITE_PRIM_END 0x1 -#define URB_WRITE_PRIM_START 0x2 -#define URB_WRITE_PRIM_TYPE_SHIFT 2 - - -/* Maximum number of entries that can be addressed using a binding table - * pointer of type SURFTYPE_BUFFER - */ -#define BRW_MAX_NUM_BUFFER_ENTRIES (1 << 27) - -#define EX_DESC_SFID_MASK 0xF -#define EX_DESC_EOT_MASK 0x20 - -#define EX_DESC_FUNC_MASK 0xFFFFFFC0 - -#endif diff --git a/assembler/brw_disasm.c b/assembler/brw_disasm.c deleted file mode 100644 index 4dec829f..00000000 --- a/assembler/brw_disasm.c +++ /dev/null @@ -1,1348 +0,0 @@ -/* - * Copyright © 2008 Keith Packard - * - * Permission to use, copy, modify, distribute, and sell this software and its - * documentation for any purpose is hereby granted without fee, provided that - * the above copyright notice appear in all copies and that both that copyright - * notice and this permission notice appear in supporting documentation, and - * that the name of the copyright holders not be used in advertising or - * publicity pertaining to distribution of the software without specific, - * written prior permission. The copyright holders make no representations - * about the suitability of this software for any purpose. It is provided "as - * is" without express or implied warranty. - * - * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, - * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER - * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THIS SOFTWARE. - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <getopt.h> -#include <unistd.h> -#include <stdarg.h> - -#include "brw_compat.h" -#include "brw_context.h" -#include "brw_defines.h" - -const struct opcode_desc opcode_descs[128] = { - [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 }, - - [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 }, - [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 }, - - [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 }, - - [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 }, - [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 }, - [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 }, - [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 }, - [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 }, - [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 }, - [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 }, - [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 }, - [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 }, -}; -static const struct opcode_desc *opcode = opcode_descs; - -static const char * const conditional_modifier[16] = { - [BRW_CONDITIONAL_NONE] = "", - [BRW_CONDITIONAL_Z] = ".e", - [BRW_CONDITIONAL_NZ] = ".ne", - [BRW_CONDITIONAL_G] = ".g", - [BRW_CONDITIONAL_GE] = ".ge", - [BRW_CONDITIONAL_L] = ".l", - [BRW_CONDITIONAL_LE] = ".le", - [BRW_CONDITIONAL_R] = ".r", - [BRW_CONDITIONAL_O] = ".o", - [BRW_CONDITIONAL_U] = ".u", -}; - -static const char * const negate[2] = { - [0] = "", - [1] = "-", -}; - -static const char * const _abs[2] = { - [0] = "", - [1] = "(abs)", -}; - -static const char * const vert_stride[16] = { - [0] = "0", - [1] = "1", - [2] = "2", - [3] = "4", - [4] = "8", - [5] = "16", - [6] = "32", - [15] = "VxH", -}; - -static const char * const width[8] = { - [0] = "1", - [1] = "2", - [2] = "4", - [3] = "8", - [4] = "16", -}; - -static const char * const horiz_stride[4] = { - [0] = "0", - [1] = "1", - [2] = "2", - [3] = "4" -}; - -static const char * const chan_sel[4] = { - [0] = "x", - [1] = "y", - [2] = "z", - [3] = "w", -}; - -static const char * const debug_ctrl[2] = { - [0] = "", - [1] = ".breakpoint" -}; - -static const char * const saturate[2] = { - [0] = "", - [1] = ".sat" -}; - -static const char * const accwr[2] = { - [0] = "", - [1] = "AccWrEnable" -}; - -static const char * const wectrl[2] = { - [0] = "WE_normal", - [1] = "WE_all" -}; - -static const char * const exec_size[8] = { - [0] = "1", - [1] = "2", - [2] = "4", - [3] = "8", - [4] = "16", - [5] = "32" -}; - -static const char * const pred_inv[2] = { - [0] = "+", - [1] = "-" -}; - -static const char * const pred_ctrl_align16[16] = { - [1] = "", - [2] = ".x", - [3] = ".y", - [4] = ".z", - [5] = ".w", - [6] = ".any4h", - [7] = ".all4h", -}; - -static const char * const pred_ctrl_align1[16] = { - [1] = "", - [2] = ".anyv", - [3] = ".allv", - [4] = ".any2h", - [5] = ".all2h", - [6] = ".any4h", - [7] = ".all4h", - [8] = ".any8h", - [9] = ".all8h", - [10] = ".any16h", - [11] = ".all16h", -}; - -static const char * const thread_ctrl[4] = { - [0] = "", - [2] = "switch" -}; - -static const char * const compr_ctrl[4] = { - [0] = "", - [1] = "sechalf", - [2] = "compr", - [3] = "compr4", -}; - -static const char * const dep_ctrl[4] = { - [0] = "", - [1] = "NoDDClr", - [2] = "NoDDChk", - [3] = "NoDDClr,NoDDChk", -}; - -static const char * const mask_ctrl[4] = { - [0] = "", - [1] = "nomask", -}; - -static const char * const access_mode[2] = { - [0] = "align1", - [1] = "align16", -}; - -static const char * const reg_encoding[8] = { - [0] = "UD", - [1] = "D", - [2] = "UW", - [3] = "W", - [4] = "UB", - [5] = "B", - [7] = "F" -}; - -const int reg_type_size[8] = { - [0] = 4, - [1] = 4, - [2] = 2, - [3] = 2, - [4] = 1, - [5] = 1, - [7] = 4 -}; - -static const char * const reg_file[4] = { - [0] = "A", - [1] = "g", - [2] = "m", - [3] = "imm", -}; - -static const char * const writemask[16] = { - [0x0] = ".", - [0x1] = ".x", - [0x2] = ".y", - [0x3] = ".xy", - [0x4] = ".z", - [0x5] = ".xz", - [0x6] = ".yz", - [0x7] = ".xyz", - [0x8] = ".w", - [0x9] = ".xw", - [0xa] = ".yw", - [0xb] = ".xyw", - [0xc] = ".zw", - [0xd] = ".xzw", - [0xe] = ".yzw", - [0xf] = "", -}; - -static const char * const end_of_thread[2] = { - [0] = "", - [1] = "EOT" -}; - -static const char * const target_function[16] = { - [BRW_SFID_NULL] = "null", - [BRW_SFID_MATH] = "math", - [BRW_SFID_SAMPLER] = "sampler", - [BRW_SFID_MESSAGE_GATEWAY] = "gateway", - [BRW_SFID_DATAPORT_READ] = "read", - [BRW_SFID_DATAPORT_WRITE] = "write", - [BRW_SFID_URB] = "urb", - [BRW_SFID_THREAD_SPAWNER] = "thread_spawner" -}; - -static const char * const target_function_gen6[16] = { - [BRW_SFID_NULL] = "null", - [BRW_SFID_MATH] = "math", - [BRW_SFID_SAMPLER] = "sampler", - [BRW_SFID_MESSAGE_GATEWAY] = "gateway", - [BRW_SFID_URB] = "urb", - [BRW_SFID_THREAD_SPAWNER] = "thread_spawner", - [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler", - [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render", - [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const", - [GEN7_SFID_DATAPORT_DATA_CACHE] = "data" -}; - -static const char * const dp_rc_msg_type_gen6[16] = { - [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read", - [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read", - [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read", - [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read", - [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read", - [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read", - [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write", - [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write", - [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write", - [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write", - [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write", - [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write", - [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write", - [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write", -}; - -static const char * const math_function[16] = { - [BRW_MATH_FUNCTION_INV] = "inv", - [BRW_MATH_FUNCTION_LOG] = "log", - [BRW_MATH_FUNCTION_EXP] = "exp", - [BRW_MATH_FUNCTION_SQRT] = "sqrt", - [BRW_MATH_FUNCTION_RSQ] = "rsq", - [BRW_MATH_FUNCTION_SIN] = "sin", - [BRW_MATH_FUNCTION_COS] = "cos", - [BRW_MATH_FUNCTION_SINCOS] = "sincos", - [BRW_MATH_FUNCTION_TAN] = "tan", - [BRW_MATH_FUNCTION_POW] = "pow", - [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod", - [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv", - [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod", -}; - -static const char * const math_saturate[2] = { - [0] = "", - [1] = "sat" -}; - -static const char * const math_signed[2] = { - [0] = "", - [1] = "signed" -}; - -static const char * const math_scalar[2] = { - [0] = "", - [1] = "scalar" -}; - -static const char * const math_precision[2] = { - [0] = "", - [1] = "partial_precision" -}; - -static const char * const urb_opcode[2] = { - [0] = "urb_write", - [1] = "ff_sync", -}; - -static const char * const urb_swizzle[4] = { - [BRW_URB_SWIZZLE_NONE] = "", - [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave", - [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose", -}; - -static const char * const urb_allocate[2] = { - [0] = "", - [1] = "allocate" -}; - -static const char * const urb_used[2] = { - [0] = "", - [1] = "used" -}; - -static const char * const urb_complete[2] = { - [0] = "", - [1] = "complete" -}; - -static const char * const sampler_target_format[4] = { - [0] = "F", - [2] = "UD", - [3] = "D" -}; - - -static int column; - -static int string (FILE *file, const char *string) -{ - fputs (string, file); - column += strlen (string); - return 0; -} - -static int format (FILE *f, const char *format, ...) PRINTFLIKE(2, 3); -static int format (FILE *f, const char *format, ...) -{ - char buf[1024]; - va_list args; - va_start (args, format); - - vsnprintf (buf, sizeof (buf) - 1, format, args); - va_end (args); - string (f, buf); - return 0; -} - -static int newline (FILE *f) -{ - putc ('\n', f); - column = 0; - return 0; -} - -static int pad (FILE *f, int c) -{ - do - string (f, " "); - while (column < c); - return 0; -} - -static int control (FILE *file, const char *name, const char * const ctrl[], - unsigned id, int *space) -{ - if (!ctrl[id]) { - fprintf (file, "*** invalid %s value %d ", - name, id); - return 1; - } - if (ctrl[id][0]) - { - if (space && *space) - string (file, " "); - string (file, ctrl[id]); - if (space) - *space = 1; - } - return 0; -} - -static int print_opcode (FILE *file, int id) -{ - if (!opcode[id].name) { - format (file, "*** invalid opcode value %d ", id); - return 1; - } - string (file, opcode[id].name); - return 0; -} - -static int reg (FILE *file, unsigned _reg_file, unsigned _reg_nr) -{ - int err = 0; - - /* Clear the Compr4 instruction compression bit. */ - if (_reg_file == BRW_MESSAGE_REGISTER_FILE) - _reg_nr &= ~(1 << 7); - - if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) { - switch (_reg_nr & 0xf0) { - case BRW_ARF_NULL: - string (file, "null"); - return -1; - case BRW_ARF_ADDRESS: - format (file, "a%d", _reg_nr & 0x0f); - break; - case BRW_ARF_ACCUMULATOR: - format (file, "acc%d", _reg_nr & 0x0f); - break; - case BRW_ARF_FLAG: - format (file, "f%d", _reg_nr & 0x0f); - break; - case BRW_ARF_MASK: - format (file, "mask%d", _reg_nr & 0x0f); - break; - case BRW_ARF_MASK_STACK: - format (file, "msd%d", _reg_nr & 0x0f); - break; - case BRW_ARF_STATE: - format (file, "sr%d", _reg_nr & 0x0f); - break; - case BRW_ARF_CONTROL: - format (file, "cr%d", _reg_nr & 0x0f); - break; - case BRW_ARF_NOTIFICATION_COUNT: - format (file, "n%d", _reg_nr & 0x0f); - break; - case BRW_ARF_IP: - string (file, "ip"); - return -1; - break; - default: - format (file, "ARF%d", _reg_nr); - break; - } - } else { - err |= control (file, "src reg file", reg_file, _reg_file, NULL); - format (file, "%d", _reg_nr); - } - return err; -} - -static int dest (FILE *file, struct brw_instruction *inst) -{ - int err = 0; - - if (inst->header.access_mode == BRW_ALIGN_1) - { - if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT) - { - err |= reg (file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr); - if (err == -1) - return 0; - if (inst->bits1.da1.dest_subreg_nr) - format (file, ".%d", inst->bits1.da1.dest_subreg_nr / - reg_type_size[inst->bits1.da1.dest_reg_type]); - format (file, "<%s>", horiz_stride[inst->bits1.da1.dest_horiz_stride]); - err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da1.dest_reg_type, NULL); - } - else - { - string (file, "g[a0"); - if (inst->bits1.ia1.dest_subreg_nr) - format (file, ".%d", inst->bits1.ia1.dest_subreg_nr / - reg_type_size[inst->bits1.ia1.dest_reg_type]); - if (inst->bits1.ia1.dest_indirect_offset) - format (file, " %d", inst->bits1.ia1.dest_indirect_offset); - string (file, "]"); - format (file, "<%s>", horiz_stride[inst->bits1.ia1.dest_horiz_stride]); - err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL); - } - } - else - { - if (inst->bits1.da16.dest_address_mode == BRW_ADDRESS_DIRECT) - { - err |= reg (file, inst->bits1.da16.dest_reg_file, inst->bits1.da16.dest_reg_nr); - if (err == -1) - return 0; - if (inst->bits1.da16.dest_subreg_nr) - format (file, ".%d", inst->bits1.da16.dest_subreg_nr / - reg_type_size[inst->bits1.da16.dest_reg_type]); - string (file, "<1>"); - err |= control (file, "writemask", writemask, inst->bits1.da16.dest_writemask, NULL); - err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da16.dest_reg_type, NULL); - } - else - { - err = 1; - string (file, "Indirect align16 address mode not supported"); - } - } - - return 0; -} - -static int dest_3src (FILE *file, struct brw_instruction *inst) -{ - int err = 0; - uint32_t reg_file; - - if (inst->bits1.da3src.dest_reg_file) - reg_file = BRW_MESSAGE_REGISTER_FILE; - else - reg_file = BRW_GENERAL_REGISTER_FILE; - - err |= reg (file, reg_file, inst->bits1.da3src.dest_reg_nr); - if (err == -1) - return 0; - if (inst->bits1.da3src.dest_subreg_nr) - format (file, ".%d", inst->bits1.da3src.dest_subreg_nr); - string (file, "<1>"); - err |= control (file, "writemask", writemask, inst->bits1.da3src.dest_writemask, NULL); - err |= control (file, "dest reg encoding", reg_encoding, BRW_REGISTER_TYPE_F, NULL); - - return 0; -} - -static int src_align1_region (FILE *file, - unsigned _vert_stride, unsigned _width, unsigned _horiz_stride) -{ - int err = 0; - string (file, "<"); - err |= control (file, "vert stride", vert_stride, _vert_stride, NULL); - string (file, ","); - err |= control (file, "width", width, _width, NULL); - string (file, ","); - err |= control (file, "horiz_stride", horiz_stride, _horiz_stride, NULL); - string (file, ">"); - return err; -} - -static int src_da1 (FILE *file, unsigned type, unsigned _reg_file, - unsigned _vert_stride, unsigned _width, unsigned _horiz_stride, - unsigned reg_num, unsigned sub_reg_num, unsigned __abs, unsigned _negate) -{ - int err = 0; - err |= control (file, "negate", negate, _negate, NULL); - err |= control (file, "abs", _abs, __abs, NULL); - - err |= reg (file, _reg_file, reg_num); - if (err == -1) - return 0; - if (sub_reg_num) - format (file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */ - src_align1_region (file, _vert_stride, _width, _horiz_stride); - err |= control (file, "src reg encoding", reg_encoding, type, NULL); - return err; -} - -static int src_ia1 (FILE *file, - unsigned type, - unsigned _reg_file, - int _addr_imm, - unsigned _addr_subreg_nr, - unsigned _negate, - unsigned __abs, - unsigned _addr_mode, - unsigned _horiz_stride, - unsigned _width, - unsigned _vert_stride) -{ - int err = 0; - err |= control (file, "negate", negate, _negate, NULL); - err |= control (file, "abs", _abs, __abs, NULL); - - string (file, "g[a0"); - if (_addr_subreg_nr) - format (file, ".%d", _addr_subreg_nr); - if (_addr_imm) - format (file, " %d", _addr_imm); - string (file, "]"); - src_align1_region (file, _vert_stride, _width, _horiz_stride); - err |= control (file, "src reg encoding", reg_encoding, type, NULL); - return err; -} - -static int src_da16 (FILE *file, - unsigned _reg_type, - unsigned _reg_file, - unsigned _vert_stride, - unsigned _reg_nr, - unsigned _subreg_nr, - unsigned __abs, - unsigned _negate, - unsigned swz_x, - unsigned swz_y, - unsigned swz_z, - unsigned swz_w) -{ - int err = 0; - err |= control (file, "negate", negate, _negate, NULL); - err |= control (file, "abs", _abs, __abs, NULL); - - err |= reg (file, _reg_file, _reg_nr); - if (err == -1) - return 0; - if (_subreg_nr) - /* bit4 for subreg number byte addressing. Make this same meaning as - in da1 case, so output looks consistent. */ - format (file, ".%d", 16 / reg_type_size[_reg_type]); - string (file, "<"); - err |= control (file, "vert stride", vert_stride, _vert_stride, NULL); - string (file, ",4,1>"); - /* - * Three kinds of swizzle display: - * identity - nothing printed - * 1->all - print the single channel - * 1->1 - print the mapping - */ - if (swz_x == BRW_CHANNEL_X && - swz_y == BRW_CHANNEL_Y && - swz_z == BRW_CHANNEL_Z && - swz_w == BRW_CHANNEL_W) - { - ; - } - else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) - { - string (file, "."); - err |= control (file, "channel select", chan_sel, swz_x, NULL); - } - else - { - string (file, "."); - err |= control (file, "channel select", chan_sel, swz_x, NULL); - err |= control (file, "channel select", chan_sel, swz_y, NULL); - err |= control (file, "channel select", chan_sel, swz_z, NULL); - err |= control (file, "channel select", chan_sel, swz_w, NULL); - } - err |= control (file, "src da16 reg type", reg_encoding, _reg_type, NULL); - return err; -} - -static int src0_3src (FILE *file, struct brw_instruction *inst) -{ - int err = 0; - unsigned swz_x = (inst->bits2.da3src.src0_swizzle >> 0) & 0x3; - unsigned swz_y = (inst->bits2.da3src.src0_swizzle >> 2) & 0x3; - unsigned swz_z = (inst->bits2.da3src.src0_swizzle >> 4) & 0x3; - unsigned swz_w = (inst->bits2.da3src.src0_swizzle >> 6) & 0x3; - - err |= control (file, "negate", negate, inst->bits1.da3src.src0_negate, NULL); - err |= control (file, "abs", _abs, inst->bits1.da3src.src0_abs, NULL); - - err |= reg (file, BRW_GENERAL_REGISTER_FILE, inst->bits2.da3src.src0_reg_nr); - if (err == -1) - return 0; - if (inst->bits2.da3src.src0_subreg_nr) - format (file, ".%d", inst->bits2.da3src.src0_subreg_nr); - string (file, "<4,1,1>"); - err |= control (file, "src da16 reg type", reg_encoding, - BRW_REGISTER_TYPE_F, NULL); - /* - * Three kinds of swizzle display: - * identity - nothing printed - * 1->all - print the single channel - * 1->1 - print the mapping - */ - if (swz_x == BRW_CHANNEL_X && - swz_y == BRW_CHANNEL_Y && - swz_z == BRW_CHANNEL_Z && - swz_w == BRW_CHANNEL_W) - { - ; - } - else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) - { - string (file, "."); - err |= control (file, "channel select", chan_sel, swz_x, NULL); - } - else - { - string (file, "."); - err |= control (file, "channel select", chan_sel, swz_x, NULL); - err |= control (file, "channel select", chan_sel, swz_y, NULL); - err |= control (file, "channel select", chan_sel, swz_z, NULL); - err |= control (file, "channel select", chan_sel, swz_w, NULL); - } - return err; -} - -static int src1_3src (FILE *file, struct brw_instruction *inst) -{ - int err = 0; - unsigned swz_x = (inst->bits2.da3src.src1_swizzle >> 0) & 0x3; - unsigned swz_y = (inst->bits2.da3src.src1_swizzle >> 2) & 0x3; - unsigned swz_z = (inst->bits2.da3src.src1_swizzle >> 4) & 0x3; - unsigned swz_w = (inst->bits2.da3src.src1_swizzle >> 6) & 0x3; - unsigned src1_subreg_nr = (inst->bits2.da3src.src1_subreg_nr_low | - (inst->bits3.da3src.src1_subreg_nr_high << 2)); - - err |= control (file, "negate", negate, inst->bits1.da3src.src1_negate, - NULL); - err |= control (file, "abs", _abs, inst->bits1.da3src.src1_abs, NULL); - - err |= reg (file, BRW_GENERAL_REGISTER_FILE, - inst->bits3.da3src.src1_reg_nr); - if (err == -1) - return 0; - if (src1_subreg_nr) - format (file, ".%d", src1_subreg_nr); - string (file, "<4,1,1>"); - err |= control (file, "src da16 reg type", reg_encoding, - BRW_REGISTER_TYPE_F, NULL); - /* - * Three kinds of swizzle display: - * identity - nothing printed - * 1->all - print the single channel - * 1->1 - print the mapping - */ - if (swz_x == BRW_CHANNEL_X && - swz_y == BRW_CHANNEL_Y && - swz_z == BRW_CHANNEL_Z && - swz_w == BRW_CHANNEL_W) - { - ; - } - else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) - { - string (file, "."); - err |= control (file, "channel select", chan_sel, swz_x, NULL); - } - else - { - string (file, "."); - err |= control (file, "channel select", chan_sel, swz_x, NULL); - err |= control (file, "channel select", chan_sel, swz_y, NULL); - err |= control (file, "channel select", chan_sel, swz_z, NULL); - err |= control (file, "channel select", chan_sel, swz_w, NULL); - } - return err; -} - - -static int src2_3src (FILE *file, struct brw_instruction *inst) -{ - int err = 0; - unsigned swz_x = (inst->bits3.da3src.src2_swizzle >> 0) & 0x3; - unsigned swz_y = (inst->bits3.da3src.src2_swizzle >> 2) & 0x3; - unsigned swz_z = (inst->bits3.da3src.src2_swizzle >> 4) & 0x3; - unsigned swz_w = (inst->bits3.da3src.src2_swizzle >> 6) & 0x3; - - err |= control (file, "negate", negate, inst->bits1.da3src.src2_negate, - NULL); - err |= control (file, "abs", _abs, inst->bits1.da3src.src2_abs, NULL); - - err |= reg (file, BRW_GENERAL_REGISTER_FILE, - inst->bits3.da3src.src2_reg_nr); - if (err == -1) - return 0; - if (inst->bits3.da3src.src2_subreg_nr) - format (file, ".%d", inst->bits3.da3src.src2_subreg_nr); - string (file, "<4,1,1>"); - err |= control (file, "src da16 reg type", reg_encoding, - BRW_REGISTER_TYPE_F, NULL); - /* - * Three kinds of swizzle display: - * identity - nothing printed - * 1->all - print the single channel - * 1->1 - print the mapping - */ - if (swz_x == BRW_CHANNEL_X && - swz_y == BRW_CHANNEL_Y && - swz_z == BRW_CHANNEL_Z && - swz_w == BRW_CHANNEL_W) - { - ; - } - else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) - { - string (file, "."); - err |= control (file, "channel select", chan_sel, swz_x, NULL); - } - else - { - string (file, "."); - err |= control (file, "channel select", chan_sel, swz_x, NULL); - err |= control (file, "channel select", chan_sel, swz_y, NULL); - err |= control (file, "channel select", chan_sel, swz_z, NULL); - err |= control (file, "channel select", chan_sel, swz_w, NULL); - } - return err; -} - -static int imm (FILE *file, unsigned type, struct brw_instruction *inst) { - switch (type) { - case BRW_REGISTER_TYPE_UD: - format (file, "0x%08xUD", inst->bits3.ud); - break; - case BRW_REGISTER_TYPE_D: - format (file, "%dD", inst->bits3.d); - break; - case BRW_REGISTER_TYPE_UW: - format (file, "0x%04xUW", (uint16_t) inst->bits3.ud); - break; - case BRW_REGISTER_TYPE_W: - format (file, "%dW", (int16_t) inst->bits3.d); - break; - case BRW_REGISTER_TYPE_UB: - format (file, "0x%02xUB", (int8_t) inst->bits3.ud); - break; - case BRW_REGISTER_TYPE_VF: - format (file, "Vector Float"); - break; - case BRW_REGISTER_TYPE_V: - format (file, "0x%08xV", inst->bits3.ud); - break; - case BRW_REGISTER_TYPE_F: - format (file, "%-gF", inst->bits3.f); - } - return 0; -} - -static int src0 (FILE *file, struct brw_instruction *inst) -{ - if (inst->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE) - return imm (file, inst->bits1.da1.src0_reg_type, - inst); - else if (inst->header.access_mode == BRW_ALIGN_1) - { - if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT) - { - return src_da1 (file, - inst->bits1.da1.src0_reg_type, - inst->bits1.da1.src0_reg_file, - inst->bits2.da1.src0_vert_stride, - inst->bits2.da1.src0_width, - inst->bits2.da1.src0_horiz_stride, - inst->bits2.da1.src0_reg_nr, - inst->bits2.da1.src0_subreg_nr, - inst->bits2.da1.src0_abs, - inst->bits2.da1.src0_negate); - } - else - { - return src_ia1 (file, - inst->bits1.ia1.src0_reg_type, - inst->bits1.ia1.src0_reg_file, - inst->bits2.ia1.src0_indirect_offset, - inst->bits2.ia1.src0_subreg_nr, - inst->bits2.ia1.src0_negate, - inst->bits2.ia1.src0_abs, - inst->bits2.ia1.src0_address_mode, - inst->bits2.ia1.src0_horiz_stride, - inst->bits2.ia1.src0_width, - inst->bits2.ia1.src0_vert_stride); - } - } - else - { - if (inst->bits2.da16.src0_address_mode == BRW_ADDRESS_DIRECT) - { - return src_da16 (file, - inst->bits1.da16.src0_reg_type, - inst->bits1.da16.src0_reg_file, - inst->bits2.da16.src0_vert_stride, - inst->bits2.da16.src0_reg_nr, - inst->bits2.da16.src0_subreg_nr, - inst->bits2.da16.src0_abs, - inst->bits2.da16.src0_negate, - inst->bits2.da16.src0_swz_x, - inst->bits2.da16.src0_swz_y, - inst->bits2.da16.src0_swz_z, - inst->bits2.da16.src0_swz_w); - } - else - { - string (file, "Indirect align16 address mode not supported"); - return 1; - } - } -} - -static int src1 (FILE *file, struct brw_instruction *inst) -{ - if (inst->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE) - return imm (file, inst->bits1.da1.src1_reg_type, - inst); - else if (inst->header.access_mode == BRW_ALIGN_1) - { - if (inst->bits3.da1.src1_address_mode == BRW_ADDRESS_DIRECT) - { - return src_da1 (file, - inst->bits1.da1.src1_reg_type, - inst->bits1.da1.src1_reg_file, - inst->bits3.da1.src1_vert_stride, - inst->bits3.da1.src1_width, - inst->bits3.da1.src1_horiz_stride, - inst->bits3.da1.src1_reg_nr, - inst->bits3.da1.src1_subreg_nr, - inst->bits3.da1.src1_abs, - inst->bits3.da1.src1_negate); - } - else - { - return src_ia1 (file, - inst->bits1.ia1.src1_reg_type, - inst->bits1.ia1.src1_reg_file, - inst->bits3.ia1.src1_indirect_offset, - inst->bits3.ia1.src1_subreg_nr, - inst->bits3.ia1.src1_negate, - inst->bits3.ia1.src1_abs, - inst->bits3.ia1.src1_address_mode, - inst->bits3.ia1.src1_horiz_stride, - inst->bits3.ia1.src1_width, - inst->bits3.ia1.src1_vert_stride); - } - } - else - { - if (inst->bits3.da16.src1_address_mode == BRW_ADDRESS_DIRECT) - { - return src_da16 (file, - inst->bits1.da16.src1_reg_type, - inst->bits1.da16.src1_reg_file, - inst->bits3.da16.src1_vert_stride, - inst->bits3.da16.src1_reg_nr, - inst->bits3.da16.src1_subreg_nr, - inst->bits3.da16.src1_abs, - inst->bits3.da16.src1_negate, - inst->bits3.da16.src1_swz_x, - inst->bits3.da16.src1_swz_y, - inst->bits3.da16.src1_swz_z, - inst->bits3.da16.src1_swz_w); - } - else - { - string (file, "Indirect align16 address mode not supported"); - return 1; - } - } -} - -int esize[6] = { - [0] = 1, - [1] = 2, - [2] = 4, - [3] = 8, - [4] = 16, - [5] = 32, -}; - -static int qtr_ctrl(FILE *file, struct brw_instruction *inst) -{ - int qtr_ctl = inst->header.compression_control; - int exec_size = esize[inst->header.execution_size]; - - if (exec_size == 8) { - switch (qtr_ctl) { - case 0: - string (file, " 1Q"); - break; - case 1: - string (file, " 2Q"); - break; - case 2: - string (file, " 3Q"); - break; - case 3: - string (file, " 4Q"); - break; - } - } else if (exec_size == 16){ - if (qtr_ctl < 2) - string (file, " 1H"); - else - string (file, " 2H"); - } - return 0; -} - -int brw_disasm (FILE *file, struct brw_instruction *inst, int gen) -{ - int err = 0; - int space = 0; - - if (inst->header.predicate_control) { - string (file, "("); - err |= control (file, "predicate inverse", pred_inv, inst->header.predicate_inverse, NULL); - format (file, "f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0); - if (inst->bits2.da1.flag_subreg_nr) - format (file, ".%d", inst->bits2.da1.flag_subreg_nr); - if (inst->header.access_mode == BRW_ALIGN_1) - err |= control (file, "predicate control align1", pred_ctrl_align1, - inst->header.predicate_control, NULL); - else - err |= control (file, "predicate control align16", pred_ctrl_align16, - inst->header.predicate_control, NULL); - string (file, ") "); - } - - err |= print_opcode (file, inst->header.opcode); - err |= control (file, "saturate", saturate, inst->header.saturate, NULL); - err |= control (file, "debug control", debug_ctrl, inst->header.debug_control, NULL); - - if (inst->header.opcode == BRW_OPCODE_MATH) { - string (file, " "); - err |= control (file, "function", math_function, - inst->header.destreg__conditionalmod, NULL); - } else if (inst->header.opcode != BRW_OPCODE_SEND && - inst->header.opcode != BRW_OPCODE_SENDC) { - err |= control (file, "conditional modifier", conditional_modifier, - inst->header.destreg__conditionalmod, NULL); - - /* If we're using the conditional modifier, print which flags reg is - * used for it. Note that on gen6+, the embedded-condition SEL and - * control flow doesn't update flags. - */ - if (inst->header.destreg__conditionalmod && - (gen < 6 || (inst->header.opcode != BRW_OPCODE_SEL && - inst->header.opcode != BRW_OPCODE_IF && - inst->header.opcode != BRW_OPCODE_WHILE))) { - format (file, ".f%d", gen >= 7 ? inst->bits2.da1.flag_reg_nr : 0); - if (inst->bits2.da1.flag_subreg_nr) - format (file, ".%d", inst->bits2.da1.flag_subreg_nr); - } - } - - if (inst->header.opcode != BRW_OPCODE_NOP) { - string (file, "("); - err |= control (file, "execution size", exec_size, inst->header.execution_size, NULL); - string (file, ")"); - } - - if (inst->header.opcode == BRW_OPCODE_SEND && gen < 6) - format (file, " %d", inst->header.destreg__conditionalmod); - - if (opcode[inst->header.opcode].nsrc == 3) { - pad (file, 16); - err |= dest_3src (file, inst); - - pad (file, 32); - err |= src0_3src (file, inst); - - pad (file, 48); - err |= src1_3src (file, inst); - - pad (file, 64); - err |= src2_3src (file, inst); - } else { - if (opcode[inst->header.opcode].ndst > 0) { - pad (file, 16); - err |= dest (file, inst); - } else if (gen == 7 && (inst->header.opcode == BRW_OPCODE_ELSE || - inst->header.opcode == BRW_OPCODE_ENDIF || - inst->header.opcode == BRW_OPCODE_WHILE)) { - format (file, " %d", inst->bits3.break_cont.jip); - } else if (gen == 6 && (inst->header.opcode == BRW_OPCODE_IF || - inst->header.opcode == BRW_OPCODE_ELSE || - inst->header.opcode == BRW_OPCODE_ENDIF || - inst->header.opcode == BRW_OPCODE_WHILE)) { - format (file, " %d", inst->bits1.branch_gen6.jump_count); - } else if ((gen >= 6 && (inst->header.opcode == BRW_OPCODE_BREAK || - inst->header.opcode == BRW_OPCODE_CONTINUE || - inst->header.opcode == BRW_OPCODE_HALT)) || - (gen == 7 && inst->header.opcode == BRW_OPCODE_IF)) { - format (file, " %d %d", inst->bits3.break_cont.uip, inst->bits3.break_cont.jip); - } else if (inst->header.opcode == BRW_OPCODE_JMPI) { - format (file, " %d", inst->bits3.d); - } - - if (opcode[inst->header.opcode].nsrc > 0) { - pad (file, 32); - err |= src0 (file, inst); - } - if (opcode[inst->header.opcode].nsrc > 1) { - pad (file, 48); - err |= src1 (file, inst); - } - } - - if (inst->header.opcode == BRW_OPCODE_SEND || - inst->header.opcode == BRW_OPCODE_SENDC) { - enum brw_message_target target; - - if (gen >= 6) - target = inst->header.destreg__conditionalmod; - else if (gen == 5) - target = inst->bits2.send_gen5.sfid; - else - target = inst->bits3.generic.msg_target; - - newline (file); - pad (file, 16); - space = 0; - - if (gen >= 6) { - err |= control (file, "target function", target_function_gen6, - target, &space); - } else { - err |= control (file, "target function", target_function, - target, &space); - } - - switch (target) { - case BRW_SFID_MATH: - err |= control (file, "math function", math_function, - inst->bits3.math.function, &space); - err |= control (file, "math saturate", math_saturate, - inst->bits3.math.saturate, &space); - err |= control (file, "math signed", math_signed, - inst->bits3.math.int_type, &space); - err |= control (file, "math scalar", math_scalar, - inst->bits3.math.data_type, &space); - err |= control (file, "math precision", math_precision, - inst->bits3.math.precision, &space); - break; - case BRW_SFID_SAMPLER: - if (gen >= 7) { - format (file, " (%d, %d, %d, %d)", - inst->bits3.sampler_gen7.binding_table_index, - inst->bits3.sampler_gen7.sampler, - inst->bits3.sampler_gen7.msg_type, - inst->bits3.sampler_gen7.simd_mode); - } else if (gen >= 5) { - format (file, " (%d, %d, %d, %d)", - inst->bits3.sampler_gen5.binding_table_index, - inst->bits3.sampler_gen5.sampler, - inst->bits3.sampler_gen5.msg_type, - inst->bits3.sampler_gen5.simd_mode); - } else if (0 /* FINISHME: is_g4x */) { - format (file, " (%d, %d)", - inst->bits3.sampler_g4x.binding_table_index, - inst->bits3.sampler_g4x.sampler); - } else { - format (file, " (%d, %d, ", - inst->bits3.sampler.binding_table_index, - inst->bits3.sampler.sampler); - err |= control (file, "sampler target format", - sampler_target_format, - inst->bits3.sampler.return_format, NULL); - string (file, ")"); - } - break; - case BRW_SFID_DATAPORT_READ: - if (gen >= 6) { - format (file, " (%d, %d, %d, %d)", - inst->bits3.gen6_dp.binding_table_index, - inst->bits3.gen6_dp.msg_control, - inst->bits3.gen6_dp.msg_type, - inst->bits3.gen6_dp.send_commit_msg); - } else if (gen >= 5 /* FINISHME: || is_g4x */) { - format (file, " (%d, %d, %d)", - inst->bits3.dp_read_gen5.binding_table_index, - inst->bits3.dp_read_gen5.msg_control, - inst->bits3.dp_read_gen5.msg_type); - } else { - format (file, " (%d, %d, %d)", - inst->bits3.dp_read.binding_table_index, - inst->bits3.dp_read.msg_control, - inst->bits3.dp_read.msg_type); - } - break; - - case BRW_SFID_DATAPORT_WRITE: - if (gen >= 7) { - format (file, " ("); - - err |= control (file, "DP rc message type", - dp_rc_msg_type_gen6, - inst->bits3.gen7_dp.msg_type, &space); - - format (file, ", %d, %d, %d)", - inst->bits3.gen7_dp.binding_table_index, - inst->bits3.gen7_dp.msg_control, - inst->bits3.gen7_dp.msg_type); - } else if (gen == 6) { - format (file, " ("); - - err |= control (file, "DP rc message type", - dp_rc_msg_type_gen6, - inst->bits3.gen6_dp.msg_type, &space); - - format (file, ", %d, %d, %d, %d)", - inst->bits3.gen6_dp.binding_table_index, - inst->bits3.gen6_dp.msg_control, - inst->bits3.gen6_dp.msg_type, - inst->bits3.gen6_dp.send_commit_msg); - } else { - format (file, " (%d, %d, %d, %d)", - inst->bits3.dp_write.binding_table_index, - (inst->bits3.dp_write.last_render_target << 3) | - inst->bits3.dp_write.msg_control, - inst->bits3.dp_write.msg_type, - inst->bits3.dp_write.send_commit_msg); - } - break; - - case BRW_SFID_URB: - if (gen >= 5) { - format (file, " %d", inst->bits3.urb_gen5.offset); - } else { - format (file, " %d", inst->bits3.urb.offset); - } - - space = 1; - if (gen >= 5) { - err |= control (file, "urb opcode", urb_opcode, - inst->bits3.urb_gen5.opcode, &space); - } - err |= control (file, "urb swizzle", urb_swizzle, - inst->bits3.urb.swizzle_control, &space); - err |= control (file, "urb allocate", urb_allocate, - inst->bits3.urb.allocate, &space); - err |= control (file, "urb used", urb_used, - inst->bits3.urb.used, &space); - err |= control (file, "urb complete", urb_complete, - inst->bits3.urb.complete, &space); - break; - case BRW_SFID_THREAD_SPAWNER: - break; - case GEN7_SFID_DATAPORT_DATA_CACHE: - format (file, " (%d, %d, %d)", - inst->bits3.gen7_dp.binding_table_index, - inst->bits3.gen7_dp.msg_control, - inst->bits3.gen7_dp.msg_type); - break; - - - default: - format (file, "unsupported target %d", target); - break; - } - if (space) - string (file, " "); - if (gen >= 5) { - format (file, "mlen %d", - inst->bits3.generic_gen5.msg_length); - format (file, " rlen %d", - inst->bits3.generic_gen5.response_length); - } else { - format (file, "mlen %d", - inst->bits3.generic.msg_length); - format (file, " rlen %d", - inst->bits3.generic.response_length); - } - } - pad (file, 64); - if (inst->header.opcode != BRW_OPCODE_NOP) { - string (file, "{"); - space = 1; - err |= control(file, "access mode", access_mode, inst->header.access_mode, &space); - if (gen >= 6) - err |= control (file, "write enable control", wectrl, inst->header.mask_control, &space); - else - err |= control (file, "mask control", mask_ctrl, inst->header.mask_control, &space); - err |= control (file, "dependency control", dep_ctrl, inst->header.dependency_control, &space); - - if (gen >= 6) - err |= qtr_ctrl (file, inst); - else { - if (inst->header.compression_control == BRW_COMPRESSION_COMPRESSED && - opcode[inst->header.opcode].ndst > 0 && - inst->bits1.da1.dest_reg_file == BRW_MESSAGE_REGISTER_FILE && - inst->bits1.da1.dest_reg_nr & (1 << 7)) { - format (file, " compr4"); - } else { - err |= control (file, "compression control", compr_ctrl, - inst->header.compression_control, &space); - } - } - - err |= control (file, "thread control", thread_ctrl, inst->header.thread_control, &space); - if (gen >= 6) - err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space); - if (inst->header.opcode == BRW_OPCODE_SEND || - inst->header.opcode == BRW_OPCODE_SENDC) - err |= control (file, "end of thread", end_of_thread, - inst->bits3.generic.end_of_thread, &space); - if (space) - string (file, " "); - string (file, "}"); - } - string (file, ";"); - newline (file); - return err; -} diff --git a/assembler/brw_eu.c b/assembler/brw_eu.c deleted file mode 100644 index d874b792..00000000 --- a/assembler/brw_eu.c +++ /dev/null @@ -1,268 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - - -#include <string.h> - -#include "brw_context.h" -#include "brw_defines.h" -#include "brw_eu.h" - -#include "ralloc.h" - -/* Returns the corresponding conditional mod for swapping src0 and - * src1 in e.g. CMP. - */ -uint32_t -brw_swap_cmod(uint32_t cmod) -{ - switch (cmod) { - case BRW_CONDITIONAL_Z: - case BRW_CONDITIONAL_NZ: - return cmod; - case BRW_CONDITIONAL_G: - return BRW_CONDITIONAL_L; - case BRW_CONDITIONAL_GE: - return BRW_CONDITIONAL_LE; - case BRW_CONDITIONAL_L: - return BRW_CONDITIONAL_G; - case BRW_CONDITIONAL_LE: - return BRW_CONDITIONAL_GE; - default: - return ~0; - } -} - - -/* How does predicate control work when execution_size != 8? Do I - * need to test/set for 0xffff when execution_size is 16? - */ -void brw_set_predicate_control_flag_value( struct brw_compile *p, unsigned value ) -{ - p->current->header.predicate_control = BRW_PREDICATE_NONE; - - if (value != 0xff) { - if (value != p->flag_value) { - brw_push_insn_state(p); - brw_MOV(p, brw_flag_reg(0, 0), brw_imm_uw(value)); - p->flag_value = value; - brw_pop_insn_state(p); - } - - p->current->header.predicate_control = BRW_PREDICATE_NORMAL; - } -} - -void brw_set_predicate_control( struct brw_compile *p, unsigned pc ) -{ - p->current->header.predicate_control = pc; -} - -void brw_set_predicate_inverse(struct brw_compile *p, bool predicate_inverse) -{ - p->current->header.predicate_inverse = predicate_inverse; -} - -void brw_set_conditionalmod( struct brw_compile *p, unsigned conditional ) -{ - p->current->header.destreg__conditionalmod = conditional; -} - -void brw_set_flag_reg(struct brw_compile *p, int reg, int subreg) -{ - p->current->bits2.da1.flag_reg_nr = reg; - p->current->bits2.da1.flag_subreg_nr = subreg; -} - -void brw_set_access_mode( struct brw_compile *p, unsigned access_mode ) -{ - p->current->header.access_mode = access_mode; -} - -void -brw_set_compression_control(struct brw_compile *p, - enum brw_compression compression_control) -{ - p->compressed = (compression_control == BRW_COMPRESSION_COMPRESSED); - - if (p->brw->intel.gen >= 6) { - /* Since we don't use the 32-wide support in gen6, we translate - * the pre-gen6 compression control here. - */ - switch (compression_control) { - case BRW_COMPRESSION_NONE: - /* This is the "use the first set of bits of dmask/vmask/arf - * according to execsize" option. - */ - p->current->header.compression_control = GEN6_COMPRESSION_1Q; - break; - case BRW_COMPRESSION_2NDHALF: - /* For 8-wide, this is "use the second set of 8 bits." */ - p->current->header.compression_control = GEN6_COMPRESSION_2Q; - break; - case BRW_COMPRESSION_COMPRESSED: - /* For 16-wide instruction compression, use the first set of 16 bits - * since we don't do 32-wide dispatch. - */ - p->current->header.compression_control = GEN6_COMPRESSION_1H; - break; - default: - assert(!"not reached"); - p->current->header.compression_control = GEN6_COMPRESSION_1H; - break; - } - } else { - p->current->header.compression_control = compression_control; - } -} - -void brw_set_mask_control( struct brw_compile *p, unsigned value ) -{ - p->current->header.mask_control = value; -} - -void brw_set_saturate( struct brw_compile *p, bool enable ) -{ - p->current->header.saturate = enable; -} - -void brw_set_acc_write_control(struct brw_compile *p, unsigned value) -{ - if (p->brw->intel.gen >= 6) - p->current->header.acc_wr_control = value; -} - -void brw_push_insn_state( struct brw_compile *p ) -{ - assert(p->current != &p->stack[BRW_EU_MAX_INSN_STACK-1]); - memcpy(p->current+1, p->current, sizeof(struct brw_instruction)); - p->compressed_stack[p->current - p->stack] = p->compressed; - p->current++; -} - -void brw_pop_insn_state( struct brw_compile *p ) -{ - assert(p->current != p->stack); - p->current--; - p->compressed = p->compressed_stack[p->current - p->stack]; -} - - -/*********************************************************************** - */ -void -brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx) -{ - memset(p, 0, sizeof(*p)); - - p->brw = brw; - /* - * Set the initial instruction store array size to 1024, if found that - * isn't enough, then it will double the store size at brw_next_insn() - * until out of memory. - */ - p->store_size = 1024; - p->store = rzalloc_array(mem_ctx, struct brw_instruction, p->store_size); - p->nr_insn = 0; - p->current = p->stack; - p->compressed = false; - memset(p->current, 0, sizeof(p->current[0])); - - p->mem_ctx = mem_ctx; - - /* Some defaults? - */ - brw_set_mask_control(p, BRW_MASK_ENABLE); /* what does this do? */ - brw_set_saturate(p, 0); - brw_set_compression_control(p, BRW_COMPRESSION_NONE); - brw_set_predicate_control_flag_value(p, 0xff); - - /* Set up control flow stack */ - p->if_stack_depth = 0; - p->if_stack_array_size = 16; - p->if_stack = rzalloc_array(mem_ctx, int, p->if_stack_array_size); - - p->loop_stack_depth = 0; - p->loop_stack_array_size = 16; - p->loop_stack = rzalloc_array(mem_ctx, int, p->loop_stack_array_size); - p->if_depth_in_loop = rzalloc_array(mem_ctx, int, p->loop_stack_array_size); - - brw_init_compaction_tables(&brw->intel); -} - - -const unsigned *brw_get_program( struct brw_compile *p, - unsigned *sz ) -{ - brw_compact_instructions(p); - - *sz = p->next_insn_offset; - return (const unsigned *)p->store; -} - -void -brw_dump_compile(struct brw_compile *p, FILE *out, int start, int end) -{ - struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; - void *store = p->store; - bool dump_hex = false; - - for (int offset = start; offset < end;) { - struct brw_instruction *insn = store + offset; - struct brw_instruction uncompacted; - printf("0x%08x: ", offset); - - if (insn->header.cmpt_control) { - struct brw_compact_instruction *compacted = (void *)insn; - if (dump_hex) { - printf("0x%08x 0x%08x ", - ((uint32_t *)insn)[1], - ((uint32_t *)insn)[0]); - } - - brw_uncompact_instruction(intel, &uncompacted, compacted); - insn = &uncompacted; - offset += 8; - } else { - if (dump_hex) { - printf("0x%08x 0x%08x 0x%08x 0x%08x ", - ((uint32_t *)insn)[3], - ((uint32_t *)insn)[2], - ((uint32_t *)insn)[1], - ((uint32_t *)insn)[0]); - } - offset += 16; - } - - brw_disasm(stdout, insn, p->brw->intel.gen); - } -} diff --git a/assembler/brw_eu.h b/assembler/brw_eu.h deleted file mode 100644 index 427db373..00000000 --- a/assembler/brw_eu.h +++ /dev/null @@ -1,427 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - - -#ifndef BRW_EU_H -#define BRW_EU_H - -#include <stdbool.h> -#include <stdio.h> -#include "brw_context.h" -#include "brw_structs.h" -#include "brw_defines.h" -#include "brw_reg.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define BRW_EU_MAX_INSN_STACK 5 - -struct brw_compile { - struct brw_instruction *store; - int store_size; - unsigned nr_insn; - unsigned int next_insn_offset; - - void *mem_ctx; - - /* Allow clients to push/pop instruction state: - */ - struct brw_instruction stack[BRW_EU_MAX_INSN_STACK]; - bool compressed_stack[BRW_EU_MAX_INSN_STACK]; - struct brw_instruction *current; - - unsigned flag_value; - bool single_program_flow; - bool compressed; - struct brw_context *brw; - - /* Control flow stacks: - * - if_stack contains IF and ELSE instructions which must be patched - * (and popped) once the matching ENDIF instruction is encountered. - * - * Just store the instruction pointer(an index). - */ - int *if_stack; - int if_stack_depth; - int if_stack_array_size; - - /** - * loop_stack contains the instruction pointers of the starts of loops which - * must be patched (and popped) once the matching WHILE instruction is - * encountered. - */ - int *loop_stack; - /** - * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF - * blocks they were popping out of, to fix up the mask stack. This tracks - * the IF/ENDIF nesting in each current nested loop level. - */ - int *if_depth_in_loop; - int loop_stack_depth; - int loop_stack_array_size; -}; - -static inline struct brw_instruction *current_insn( struct brw_compile *p) -{ - return &p->store[p->nr_insn]; -} - -void brw_pop_insn_state( struct brw_compile *p ); -void brw_push_insn_state( struct brw_compile *p ); -void brw_set_mask_control( struct brw_compile *p, unsigned value ); -void brw_set_saturate( struct brw_compile *p, bool enable ); -void brw_set_access_mode( struct brw_compile *p, unsigned access_mode ); -void brw_set_compression_control(struct brw_compile *p, enum brw_compression c); -void brw_set_predicate_control_flag_value( struct brw_compile *p, unsigned value ); -void brw_set_predicate_control( struct brw_compile *p, unsigned pc ); -void brw_set_predicate_inverse(struct brw_compile *p, bool predicate_inverse); -void brw_set_conditionalmod( struct brw_compile *p, unsigned conditional ); -void brw_set_flag_reg(struct brw_compile *p, int reg, int subreg); -void brw_set_acc_write_control(struct brw_compile *p, unsigned value); - -void brw_init_compile(struct brw_context *, struct brw_compile *p, - void *mem_ctx); -void brw_dump_compile(struct brw_compile *p, FILE *out, int start, int end); -const unsigned *brw_get_program( struct brw_compile *p, unsigned *sz ); - -struct brw_instruction *brw_next_insn(struct brw_compile *p, unsigned opcode); -void brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, - struct brw_reg dest); -void brw_set_src0(struct brw_compile *p, struct brw_instruction *insn, - struct brw_reg reg); - -void gen6_resolve_implied_move(struct brw_compile *p, - struct brw_reg *src, - unsigned msg_reg_nr); - -/* Helpers for regular instructions: - */ -#define ALU1(OP) \ -struct brw_instruction *brw_##OP(struct brw_compile *p, \ - struct brw_reg dest, \ - struct brw_reg src0); - -#define ALU2(OP) \ -struct brw_instruction *brw_##OP(struct brw_compile *p, \ - struct brw_reg dest, \ - struct brw_reg src0, \ - struct brw_reg src1); - -#define ALU3(OP) \ -struct brw_instruction *brw_##OP(struct brw_compile *p, \ - struct brw_reg dest, \ - struct brw_reg src0, \ - struct brw_reg src1, \ - struct brw_reg src2); - -#define ROUND(OP) \ -void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0); - -ALU1(MOV) -ALU2(SEL) -ALU1(NOT) -ALU2(AND) -ALU2(OR) -ALU2(XOR) -ALU2(SHR) -ALU2(SHL) -ALU2(RSR) -ALU2(RSL) -ALU2(ASR) -ALU2(JMPI) -ALU2(ADD) -ALU2(AVG) -ALU2(MUL) -ALU1(FRC) -ALU1(RNDD) -ALU2(MAC) -ALU2(MACH) -ALU1(LZD) -ALU2(DP4) -ALU2(DPH) -ALU2(DP3) -ALU2(DP2) -ALU2(LINE) -ALU2(PLN) -ALU3(MAD) - -ROUND(RNDZ) -ROUND(RNDE) - -#undef ALU1 -#undef ALU2 -#undef ALU3 -#undef ROUND - - -/* Helpers for SEND instruction: - */ -void brw_set_sampler_message(struct brw_compile *p, - struct brw_instruction *insn, - unsigned binding_table_index, - unsigned sampler, - unsigned msg_type, - unsigned response_length, - unsigned msg_length, - unsigned header_present, - unsigned simd_mode, - unsigned return_format); - -void brw_set_dp_read_message(struct brw_compile *p, - struct brw_instruction *insn, - unsigned binding_table_index, - unsigned msg_control, - unsigned msg_type, - unsigned target_cache, - unsigned msg_length, - bool header_present, - unsigned response_length); - -void brw_set_dp_write_message(struct brw_compile *p, - struct brw_instruction *insn, - unsigned binding_table_index, - unsigned msg_control, - unsigned msg_type, - unsigned msg_length, - bool header_present, - unsigned last_render_target, - unsigned response_length, - unsigned end_of_thread, - unsigned send_commit_msg); - -void brw_urb_WRITE(struct brw_compile *p, - struct brw_reg dest, - unsigned msg_reg_nr, - struct brw_reg src0, - bool allocate, - bool used, - unsigned msg_length, - unsigned response_length, - bool eot, - bool writes_complete, - unsigned offset, - unsigned swizzle); - -void brw_ff_sync(struct brw_compile *p, - struct brw_reg dest, - unsigned msg_reg_nr, - struct brw_reg src0, - bool allocate, - unsigned response_length, - bool eot); - -void brw_svb_write(struct brw_compile *p, - struct brw_reg dest, - unsigned msg_reg_nr, - struct brw_reg src0, - unsigned binding_table_index, - bool send_commit_msg); - -void brw_fb_WRITE(struct brw_compile *p, - int dispatch_width, - unsigned msg_reg_nr, - struct brw_reg src0, - unsigned msg_control, - unsigned binding_table_index, - unsigned msg_length, - unsigned response_length, - bool eot, - bool header_present); - -void brw_SAMPLE(struct brw_compile *p, - struct brw_reg dest, - unsigned msg_reg_nr, - struct brw_reg src0, - unsigned binding_table_index, - unsigned sampler, - unsigned writemask, - unsigned msg_type, - unsigned response_length, - unsigned msg_length, - unsigned header_present, - unsigned simd_mode, - unsigned return_format); - -void brw_math( struct brw_compile *p, - struct brw_reg dest, - unsigned function, - unsigned msg_reg_nr, - struct brw_reg src, - unsigned data_type, - unsigned precision ); - -void brw_math2(struct brw_compile *p, - struct brw_reg dest, - unsigned function, - struct brw_reg src0, - struct brw_reg src1); - -void brw_oword_block_read(struct brw_compile *p, - struct brw_reg dest, - struct brw_reg mrf, - uint32_t offset, - uint32_t bind_table_index); - -void brw_oword_block_read_scratch(struct brw_compile *p, - struct brw_reg dest, - struct brw_reg mrf, - int num_regs, - unsigned offset); - -void brw_oword_block_write_scratch(struct brw_compile *p, - struct brw_reg mrf, - int num_regs, - unsigned offset); - -void brw_shader_time_add(struct brw_compile *p, - int mrf, - uint32_t surf_index); - -/* If/else/endif. Works by manipulating the execution flags on each - * channel. - */ -struct brw_instruction *brw_IF(struct brw_compile *p, - unsigned execute_size); -struct brw_instruction *gen6_IF(struct brw_compile *p, uint32_t conditional, - struct brw_reg src0, struct brw_reg src1); - -void brw_ELSE(struct brw_compile *p); -void brw_ENDIF(struct brw_compile *p); - -/* DO/WHILE loops: - */ -struct brw_instruction *brw_DO(struct brw_compile *p, - unsigned execute_size); - -struct brw_instruction *brw_WHILE(struct brw_compile *p); - -struct brw_instruction *brw_BREAK(struct brw_compile *p); -struct brw_instruction *brw_CONT(struct brw_compile *p); -struct brw_instruction *gen6_CONT(struct brw_compile *p); -struct brw_instruction *gen6_HALT(struct brw_compile *p); -/* Forward jumps: - */ -void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx); - - - -void brw_NOP(struct brw_compile *p); - -void brw_WAIT(struct brw_compile *p); - -/* Special case: there is never a destination, execution size will be - * taken from src0: - */ -void brw_CMP(struct brw_compile *p, - struct brw_reg dest, - unsigned conditional, - struct brw_reg src0, - struct brw_reg src1); - -/*********************************************************************** - * brw_eu_util.c: - */ - -void brw_copy_indirect_to_indirect(struct brw_compile *p, - struct brw_indirect dst_ptr, - struct brw_indirect src_ptr, - unsigned count); - -void brw_copy_from_indirect(struct brw_compile *p, - struct brw_reg dst, - struct brw_indirect ptr, - unsigned count); - -void brw_copy4(struct brw_compile *p, - struct brw_reg dst, - struct brw_reg src, - unsigned count); - -void brw_copy8(struct brw_compile *p, - struct brw_reg dst, - struct brw_reg src, - unsigned count); - -void brw_math_invert( struct brw_compile *p, - struct brw_reg dst, - struct brw_reg src); - -void brw_set_src1(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg reg); - -void brw_set_uip_jip(struct brw_compile *p); - -uint32_t brw_swap_cmod(uint32_t cmod); - -void -brw_set_3src_dest(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg dest); -void -brw_set_3src_src0(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg src0); -void -brw_set_3src_src1(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg src1); -void -brw_set_3src_src2(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg src2); - -/* brw_eu_compact.c */ -void brw_init_compaction_tables(struct intel_context *intel); -void brw_compact_instructions(struct brw_compile *p); -void brw_uncompact_instruction(struct intel_context *intel, - struct brw_instruction *dst, - struct brw_compact_instruction *src); -bool brw_try_compact_instruction(struct brw_compile *p, - struct brw_compact_instruction *dst, - struct brw_instruction *src); - -void brw_debug_compact_uncompact(struct intel_context *intel, - struct brw_instruction *orig, - struct brw_instruction *uncompacted); - -/* brw_optimize.c */ -void brw_optimize(struct brw_compile *p); -void brw_remove_duplicate_mrf_moves(struct brw_compile *p); -void brw_remove_grf_to_mrf_moves(struct brw_compile *p); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/assembler/brw_eu_compact.c b/assembler/brw_eu_compact.c deleted file mode 100644 index d362ed3c..00000000 --- a/assembler/brw_eu_compact.c +++ /dev/null @@ -1,810 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -/** @file brw_eu_compact.c - * - * Instruction compaction is a feature of gm45 and newer hardware that allows - * for a smaller instruction encoding. - * - * The instruction cache is on the order of 32KB, and many programs generate - * far more instructions than that. The instruction cache is built to barely - * keep up with instruction dispatch abaility in cache hit cases -- L1 - * instruction cache misses that still hit in the next level could limit - * throughput by around 50%. - * - * The idea of instruction compaction is that most instructions use a tiny - * subset of the GPU functionality, so we can encode what would be a 16 byte - * instruction in 8 bytes using some lookup tables for various fields. - */ - -#include <string.h> - -#include "brw_compat.h" -#include "brw_context.h" -#include "brw_eu.h" - -static const uint32_t gen6_control_index_table[32] = { - 0b00000000000000000, - 0b01000000000000000, - 0b00110000000000000, - 0b00000000100000000, - 0b00010000000000000, - 0b00001000100000000, - 0b00000000100000010, - 0b00000000000000010, - 0b01000000100000000, - 0b01010000000000000, - 0b10110000000000000, - 0b00100000000000000, - 0b11010000000000000, - 0b11000000000000000, - 0b01001000100000000, - 0b01000000000001000, - 0b01000000000000100, - 0b00000000000001000, - 0b00000000000000100, - 0b00111000100000000, - 0b00001000100000010, - 0b00110000100000000, - 0b00110000000000001, - 0b00100000000000001, - 0b00110000000000010, - 0b00110000000000101, - 0b00110000000001001, - 0b00110000000010000, - 0b00110000000000011, - 0b00110000000000100, - 0b00110000100001000, - 0b00100000000001001 -}; - -static const uint32_t gen6_datatype_table[32] = { - 0b001001110000000000, - 0b001000110000100000, - 0b001001110000000001, - 0b001000000001100000, - 0b001010110100101001, - 0b001000000110101101, - 0b001100011000101100, - 0b001011110110101101, - 0b001000000111101100, - 0b001000000001100001, - 0b001000110010100101, - 0b001000000001000001, - 0b001000001000110001, - 0b001000001000101001, - 0b001000000000100000, - 0b001000001000110010, - 0b001010010100101001, - 0b001011010010100101, - 0b001000000110100101, - 0b001100011000101001, - 0b001011011000101100, - 0b001011010110100101, - 0b001011110110100101, - 0b001111011110111101, - 0b001111011110111100, - 0b001111011110111101, - 0b001111011110011101, - 0b001111011110111110, - 0b001000000000100001, - 0b001000000000100010, - 0b001001111111011101, - 0b001000001110111110, -}; - -static const uint32_t gen6_subreg_table[32] = { - 0b000000000000000, - 0b000000000000100, - 0b000000110000000, - 0b111000000000000, - 0b011110000001000, - 0b000010000000000, - 0b000000000010000, - 0b000110000001100, - 0b001000000000000, - 0b000001000000000, - 0b000001010010100, - 0b000000001010110, - 0b010000000000000, - 0b110000000000000, - 0b000100000000000, - 0b000000010000000, - 0b000000000001000, - 0b100000000000000, - 0b000001010000000, - 0b001010000000000, - 0b001100000000000, - 0b000000001010100, - 0b101101010010100, - 0b010100000000000, - 0b000000010001111, - 0b011000000000000, - 0b111110000000000, - 0b101000000000000, - 0b000000000001111, - 0b000100010001111, - 0b001000010001111, - 0b000110000000000, -}; - -static const uint32_t gen6_src_index_table[32] = { - 0b000000000000, - 0b010110001000, - 0b010001101000, - 0b001000101000, - 0b011010010000, - 0b000100100000, - 0b010001101100, - 0b010101110000, - 0b011001111000, - 0b001100101000, - 0b010110001100, - 0b001000100000, - 0b010110001010, - 0b000000000010, - 0b010101010000, - 0b010101101000, - 0b111101001100, - 0b111100101100, - 0b011001110000, - 0b010110001001, - 0b010101011000, - 0b001101001000, - 0b010000101100, - 0b010000000000, - 0b001101110000, - 0b001100010000, - 0b001100000000, - 0b010001101010, - 0b001101111000, - 0b000001110000, - 0b001100100000, - 0b001101010000, -}; - -static const uint32_t gen7_control_index_table[32] = { - 0b0000000000000000010, - 0b0000100000000000000, - 0b0000100000000000001, - 0b0000100000000000010, - 0b0000100000000000011, - 0b0000100000000000100, - 0b0000100000000000101, - 0b0000100000000000111, - 0b0000100000000001000, - 0b0000100000000001001, - 0b0000100000000001101, - 0b0000110000000000000, - 0b0000110000000000001, - 0b0000110000000000010, - 0b0000110000000000011, - 0b0000110000000000100, - 0b0000110000000000101, - 0b0000110000000000111, - 0b0000110000000001001, - 0b0000110000000001101, - 0b0000110000000010000, - 0b0000110000100000000, - 0b0001000000000000000, - 0b0001000000000000010, - 0b0001000000000000100, - 0b0001000000100000000, - 0b0010110000000000000, - 0b0010110000000010000, - 0b0011000000000000000, - 0b0011000000100000000, - 0b0101000000000000000, - 0b0101000000100000000 -}; - -static const uint32_t gen7_datatype_table[32] = { - 0b001000000000000001, - 0b001000000000100000, - 0b001000000000100001, - 0b001000000001100001, - 0b001000000010111101, - 0b001000001011111101, - 0b001000001110100001, - 0b001000001110100101, - 0b001000001110111101, - 0b001000010000100001, - 0b001000110000100000, - 0b001000110000100001, - 0b001001010010100101, - 0b001001110010100100, - 0b001001110010100101, - 0b001111001110111101, - 0b001111011110011101, - 0b001111011110111100, - 0b001111011110111101, - 0b001111111110111100, - 0b000000001000001100, - 0b001000000000111101, - 0b001000000010100101, - 0b001000010000100000, - 0b001001010010100100, - 0b001001110010000100, - 0b001010010100001001, - 0b001101111110111101, - 0b001111111110111101, - 0b001011110110101100, - 0b001010010100101000, - 0b001010110100101000 -}; - -static const uint32_t gen7_subreg_table[32] = { - 0b000000000000000, - 0b000000000000001, - 0b000000000001000, - 0b000000000001111, - 0b000000000010000, - 0b000000010000000, - 0b000000100000000, - 0b000000110000000, - 0b000001000000000, - 0b000001000010000, - 0b000010100000000, - 0b001000000000000, - 0b001000000000001, - 0b001000010000001, - 0b001000010000010, - 0b001000010000011, - 0b001000010000100, - 0b001000010000111, - 0b001000010001000, - 0b001000010001110, - 0b001000010001111, - 0b001000110000000, - 0b001000111101000, - 0b010000000000000, - 0b010000110000000, - 0b011000000000000, - 0b011110010000111, - 0b100000000000000, - 0b101000000000000, - 0b110000000000000, - 0b111000000000000, - 0b111000000011100 -}; - -static const uint32_t gen7_src_index_table[32] = { - 0b000000000000, - 0b000000000010, - 0b000000010000, - 0b000000010010, - 0b000000011000, - 0b000000100000, - 0b000000101000, - 0b000001001000, - 0b000001010000, - 0b000001110000, - 0b000001111000, - 0b001100000000, - 0b001100000010, - 0b001100001000, - 0b001100010000, - 0b001100010010, - 0b001100100000, - 0b001100101000, - 0b001100111000, - 0b001101000000, - 0b001101000010, - 0b001101001000, - 0b001101010000, - 0b001101100000, - 0b001101101000, - 0b001101110000, - 0b001101110001, - 0b001101111000, - 0b010001101000, - 0b010001101001, - 0b010001101010, - 0b010110001000 -}; - -static const uint32_t *control_index_table; -static const uint32_t *datatype_table; -static const uint32_t *subreg_table; -static const uint32_t *src_index_table; - -static bool -set_control_index(struct intel_context *intel, - struct brw_compact_instruction *dst, - struct brw_instruction *src) -{ - uint32_t *src_u32 = (uint32_t *)src; - uint32_t uncompacted = 0; - - uncompacted |= ((src_u32[0] >> 8) & 0xffff) << 0; - uncompacted |= ((src_u32[0] >> 31) & 0x1) << 16; - /* On gen7, the flag register number gets integrated into the control - * index. - */ - if (intel->gen >= 7) - uncompacted |= ((src_u32[2] >> 25) & 0x3) << 17; - - for (int i = 0; i < 32; i++) { - if (control_index_table[i] == uncompacted) { - dst->dw0.control_index = i; - return true; - } - } - - return false; -} - -static bool -set_datatype_index(struct brw_compact_instruction *dst, - struct brw_instruction *src) -{ - uint32_t uncompacted = 0; - - uncompacted |= src->bits1.ud & 0x7fff; - uncompacted |= (src->bits1.ud >> 29) << 15; - - for (int i = 0; i < 32; i++) { - if (datatype_table[i] == uncompacted) { - dst->dw0.data_type_index = i; - return true; - } - } - - return false; -} - -static bool -set_subreg_index(struct brw_compact_instruction *dst, - struct brw_instruction *src) -{ - uint32_t uncompacted = 0; - - uncompacted |= src->bits1.da1.dest_subreg_nr << 0; - uncompacted |= src->bits2.da1.src0_subreg_nr << 5; - uncompacted |= src->bits3.da1.src1_subreg_nr << 10; - - for (int i = 0; i < 32; i++) { - if (subreg_table[i] == uncompacted) { - dst->dw0.sub_reg_index = i; - return true; - } - } - - return false; -} - -static bool -get_src_index(uint32_t uncompacted, - uint32_t *compacted) -{ - for (int i = 0; i < 32; i++) { - if (src_index_table[i] == uncompacted) { - *compacted = i; - return true; - } - } - - return false; -} - -static bool -set_src0_index(struct brw_compact_instruction *dst, - struct brw_instruction *src) -{ - uint32_t compacted, uncompacted = 0; - - uncompacted |= (src->bits2.ud >> 13) & 0xfff; - - if (!get_src_index(uncompacted, &compacted)) - return false; - - dst->dw0.src0_index = compacted & 0x3; - dst->dw1.src0_index = compacted >> 2; - - return true; -} - -static bool -set_src1_index(struct brw_compact_instruction *dst, - struct brw_instruction *src) -{ - uint32_t compacted, uncompacted = 0; - - uncompacted |= (src->bits3.ud >> 13) & 0xfff; - - if (!get_src_index(uncompacted, &compacted)) - return false; - - dst->dw1.src1_index = compacted; - - return true; -} - -/** - * Tries to compact instruction src into dst. - * - * It doesn't modify dst unless src is compactable, which is relied on by - * brw_compact_instructions(). - */ -bool -brw_try_compact_instruction(struct brw_compile *p, - struct brw_compact_instruction *dst, - struct brw_instruction *src) -{ - struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; - struct brw_compact_instruction temp; - - if (src->header.opcode == BRW_OPCODE_IF || - src->header.opcode == BRW_OPCODE_ELSE || - src->header.opcode == BRW_OPCODE_ENDIF || - src->header.opcode == BRW_OPCODE_HALT || - src->header.opcode == BRW_OPCODE_DO || - src->header.opcode == BRW_OPCODE_WHILE) { - /* FINISHME: The fixup code below, and brw_set_uip_jip and friends, needs - * to be able to handle compacted flow control instructions.. - */ - return false; - } - - /* FINISHME: immediates */ - if (src->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE || - src->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE) - return false; - - memset(&temp, 0, sizeof(temp)); - - temp.dw0.opcode = src->header.opcode; - temp.dw0.debug_control = src->header.debug_control; - if (!set_control_index(intel, &temp, src)) - return false; - if (!set_datatype_index(&temp, src)) - return false; - if (!set_subreg_index(&temp, src)) - return false; - temp.dw0.acc_wr_control = src->header.acc_wr_control; - temp.dw0.conditionalmod = src->header.destreg__conditionalmod; - if (intel->gen <= 6) - temp.dw0.flag_subreg_nr = src->bits2.da1.flag_subreg_nr; - temp.dw0.cmpt_ctrl = 1; - if (!set_src0_index(&temp, src)) - return false; - if (!set_src1_index(&temp, src)) - return false; - temp.dw1.dst_reg_nr = src->bits1.da1.dest_reg_nr; - temp.dw1.src0_reg_nr = src->bits2.da1.src0_reg_nr; - temp.dw1.src1_reg_nr = src->bits3.da1.src1_reg_nr; - - *dst = temp; - - return true; -} - -static void -set_uncompacted_control(struct intel_context *intel, - struct brw_instruction *dst, - struct brw_compact_instruction *src) -{ - uint32_t *dst_u32 = (uint32_t *)dst; - uint32_t uncompacted = control_index_table[src->dw0.control_index]; - - dst_u32[0] |= ((uncompacted >> 0) & 0xffff) << 8; - dst_u32[0] |= ((uncompacted >> 16) & 0x1) << 31; - - if (intel->gen >= 7) - dst_u32[2] |= ((uncompacted >> 17) & 0x3) << 25; -} - -static void -set_uncompacted_datatype(struct brw_instruction *dst, - struct brw_compact_instruction *src) -{ - uint32_t uncompacted = datatype_table[src->dw0.data_type_index]; - - dst->bits1.ud &= ~(0x7 << 29); - dst->bits1.ud |= ((uncompacted >> 15) & 0x7) << 29; - dst->bits1.ud &= ~0x7fff; - dst->bits1.ud |= uncompacted & 0x7fff; -} - -static void -set_uncompacted_subreg(struct brw_instruction *dst, - struct brw_compact_instruction *src) -{ - uint32_t uncompacted = subreg_table[src->dw0.sub_reg_index]; - - dst->bits1.da1.dest_subreg_nr = (uncompacted >> 0) & 0x1f; - dst->bits2.da1.src0_subreg_nr = (uncompacted >> 5) & 0x1f; - dst->bits3.da1.src1_subreg_nr = (uncompacted >> 10) & 0x1f; -} - -static void -set_uncompacted_src0(struct brw_instruction *dst, - struct brw_compact_instruction *src) -{ - uint32_t compacted = src->dw0.src0_index | src->dw1.src0_index << 2; - uint32_t uncompacted = src_index_table[compacted]; - - dst->bits2.ud |= uncompacted << 13; -} - -static void -set_uncompacted_src1(struct brw_instruction *dst, - struct brw_compact_instruction *src) -{ - uint32_t uncompacted = src_index_table[src->dw1.src1_index]; - - dst->bits3.ud |= uncompacted << 13; -} - -void -brw_uncompact_instruction(struct intel_context *intel, - struct brw_instruction *dst, - struct brw_compact_instruction *src) -{ - memset(dst, 0, sizeof(*dst)); - - dst->header.opcode = src->dw0.opcode; - dst->header.debug_control = src->dw0.debug_control; - - set_uncompacted_control(intel, dst, src); - set_uncompacted_datatype(dst, src); - set_uncompacted_subreg(dst, src); - dst->header.acc_wr_control = src->dw0.acc_wr_control; - dst->header.destreg__conditionalmod = src->dw0.conditionalmod; - if (intel->gen <= 6) - dst->bits2.da1.flag_subreg_nr = src->dw0.flag_subreg_nr; - set_uncompacted_src0(dst, src); - set_uncompacted_src1(dst, src); - dst->bits1.da1.dest_reg_nr = src->dw1.dst_reg_nr; - dst->bits2.da1.src0_reg_nr = src->dw1.src0_reg_nr; - dst->bits3.da1.src1_reg_nr = src->dw1.src1_reg_nr; -} - -void brw_debug_compact_uncompact(struct intel_context *intel, - struct brw_instruction *orig, - struct brw_instruction *uncompacted) -{ - fprintf(stderr, "Instruction compact/uncompact changed (gen%d):\n", - intel->gen); - - fprintf(stderr, " before: "); - brw_disasm(stderr, orig, intel->gen); - - fprintf(stderr, " after: "); - brw_disasm(stderr, uncompacted, intel->gen); - - uint32_t *before_bits = (uint32_t *)orig; - uint32_t *after_bits = (uint32_t *)uncompacted; - printf(" changed bits:\n"); - for (int i = 0; i < 128; i++) { - uint32_t before = before_bits[i / 32] & (1 << (i & 31)); - uint32_t after = after_bits[i / 32] & (1 << (i & 31)); - - if (before != after) { - printf(" bit %d, %s to %s\n", i, - before ? "set" : "unset", - after ? "set" : "unset"); - } - } -} - -static int -compacted_between(int old_ip, int old_target_ip, int *compacted_counts) -{ - int this_compacted_count = compacted_counts[old_ip]; - int target_compacted_count = compacted_counts[old_target_ip]; - return target_compacted_count - this_compacted_count; -} - -static void -update_uip_jip(struct brw_instruction *insn, int this_old_ip, - int *compacted_counts) -{ - int target_old_ip; - - target_old_ip = this_old_ip + insn->bits3.break_cont.jip; - insn->bits3.break_cont.jip -= compacted_between(this_old_ip, - target_old_ip, - compacted_counts); - - target_old_ip = this_old_ip + insn->bits3.break_cont.uip; - insn->bits3.break_cont.uip -= compacted_between(this_old_ip, - target_old_ip, - compacted_counts); -} - -void -brw_init_compaction_tables(struct intel_context *intel) -{ - assert(gen6_control_index_table[ARRAY_SIZE(gen6_control_index_table) - 1] != 0); - assert(gen6_datatype_table[ARRAY_SIZE(gen6_datatype_table) - 1] != 0); - assert(gen6_subreg_table[ARRAY_SIZE(gen6_subreg_table) - 1] != 0); - assert(gen6_src_index_table[ARRAY_SIZE(gen6_src_index_table) - 1] != 0); - assert(gen7_control_index_table[ARRAY_SIZE(gen6_control_index_table) - 1] != 0); - assert(gen7_datatype_table[ARRAY_SIZE(gen6_datatype_table) - 1] != 0); - assert(gen7_subreg_table[ARRAY_SIZE(gen6_subreg_table) - 1] != 0); - assert(gen7_src_index_table[ARRAY_SIZE(gen6_src_index_table) - 1] != 0); - - switch (intel->gen) { - case 7: - control_index_table = gen7_control_index_table; - datatype_table = gen7_datatype_table; - subreg_table = gen7_subreg_table; - src_index_table = gen7_src_index_table; - break; - case 6: - control_index_table = gen6_control_index_table; - datatype_table = gen6_datatype_table; - subreg_table = gen6_subreg_table; - src_index_table = gen6_src_index_table; - break; - default: - return; - } -} - -void -brw_compact_instructions(struct brw_compile *p) -{ - struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; - void *store = p->store; - /* For an instruction at byte offset 8*i before compaction, this is the number - * of compacted instructions that preceded it. - */ - int compacted_counts[p->next_insn_offset / 8]; - /* For an instruction at byte offset 8*i after compaction, this is the - * 8-byte offset it was at before compaction. - */ - int old_ip[p->next_insn_offset / 8]; - - if (intel->gen < 6) - return; - - int src_offset; - int offset = 0; - int compacted_count = 0; - for (src_offset = 0; src_offset < p->nr_insn * 16;) { - struct brw_instruction *src = store + src_offset; - void *dst = store + offset; - - old_ip[offset / 8] = src_offset / 8; - compacted_counts[src_offset / 8] = compacted_count; - - struct brw_instruction saved = *src; - - if (!src->header.cmpt_control && - brw_try_compact_instruction(p, dst, src)) { - compacted_count++; - - if (INTEL_DEBUG) { - struct brw_instruction uncompacted; - brw_uncompact_instruction(intel, &uncompacted, dst); - if (memcmp(&saved, &uncompacted, sizeof(uncompacted))) { - brw_debug_compact_uncompact(intel, &saved, &uncompacted); - } - } - - offset += 8; - src_offset += 16; - } else { - int size = src->header.cmpt_control ? 8 : 16; - - /* It appears that the end of thread SEND instruction needs to be - * aligned, or the GPU hangs. - */ - if ((src->header.opcode == BRW_OPCODE_SEND || - src->header.opcode == BRW_OPCODE_SENDC) && - src->bits3.generic.end_of_thread && - (offset & 8) != 0) { - struct brw_compact_instruction *align = store + offset; - memset(align, 0, sizeof(*align)); - align->dw0.opcode = BRW_OPCODE_NOP; - align->dw0.cmpt_ctrl = 1; - offset += 8; - old_ip[offset / 8] = src_offset / 8; - dst = store + offset; - } - - /* If we didn't compact this intruction, we need to move it down into - * place. - */ - if (offset != src_offset) { - memmove(dst, src, size); - } - offset += size; - src_offset += size; - } - } - - /* Fix up control flow offsets. */ - p->next_insn_offset = offset; - for (offset = 0; offset < p->next_insn_offset;) { - struct brw_instruction *insn = store + offset; - int this_old_ip = old_ip[offset / 8]; - int this_compacted_count = compacted_counts[this_old_ip]; - int target_old_ip, target_compacted_count; - - switch (insn->header.opcode) { - case BRW_OPCODE_BREAK: - case BRW_OPCODE_CONTINUE: - case BRW_OPCODE_HALT: - update_uip_jip(insn, this_old_ip, compacted_counts); - break; - - case BRW_OPCODE_IF: - case BRW_OPCODE_ELSE: - case BRW_OPCODE_ENDIF: - case BRW_OPCODE_WHILE: - if (intel->gen == 6) { - target_old_ip = this_old_ip + insn->bits1.branch_gen6.jump_count; - target_compacted_count = compacted_counts[target_old_ip]; - insn->bits1.branch_gen6.jump_count -= (target_compacted_count - - this_compacted_count); - } else { - update_uip_jip(insn, this_old_ip, compacted_counts); - } - break; - } - - if (insn->header.cmpt_control) { - offset += 8; - } else { - offset += 16; - } - } - - /* p->nr_insn is counting the number of uncompacted instructions still, so - * divide. We do want to be sure there's a valid instruction in any - * alignment padding, so that the next compression pass (for the FS 8/16 - * compile passes) parses correctly. - */ - if (p->next_insn_offset & 8) { - struct brw_compact_instruction *align = store + offset; - memset(align, 0, sizeof(*align)); - align->dw0.opcode = BRW_OPCODE_NOP; - align->dw0.cmpt_ctrl = 1; - p->next_insn_offset += 8; - } - p->nr_insn = p->next_insn_offset / 16; - - if (0) { - fprintf(stdout, "dumping compacted program\n"); - brw_dump_compile(p, stdout, 0, p->next_insn_offset); - - int cmp = 0; - for (offset = 0; offset < p->next_insn_offset;) { - struct brw_instruction *insn = store + offset; - - if (insn->header.cmpt_control) { - offset += 8; - cmp++; - } else { - offset += 16; - } - } - fprintf(stderr, "%db/%db saved (%d%%)\n", cmp * 8, offset + cmp * 8, - cmp * 8 * 100 / (offset + cmp * 8)); - } -} diff --git a/assembler/brw_eu_debug.c b/assembler/brw_eu_debug.c deleted file mode 100644 index b4460076..00000000 --- a/assembler/brw_eu_debug.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#include "brw_eu.h" - -void brw_print_reg( struct brw_reg hwreg ) -{ - static const char *file[] = { - "arf", - "grf", - "msg", - "imm" - }; - - static const char *type[] = { - "ud", - "d", - "uw", - "w", - "ub", - "vf", - "hf", - "f" - }; - - printf("%s%s", - hwreg.abs ? "abs/" : "", - hwreg.negate ? "-" : ""); - - if (hwreg.file == BRW_GENERAL_REGISTER_FILE && - hwreg.nr % 2 == 0 && - hwreg.subnr == 0 && - hwreg.vstride == BRW_VERTICAL_STRIDE_8 && - hwreg.width == BRW_WIDTH_8 && - hwreg.hstride == BRW_HORIZONTAL_STRIDE_1 && - hwreg.type == BRW_REGISTER_TYPE_F) { - /* vector register */ - printf("vec%d", hwreg.nr); - } - else if (hwreg.file == BRW_GENERAL_REGISTER_FILE && - hwreg.vstride == BRW_VERTICAL_STRIDE_0 && - hwreg.width == BRW_WIDTH_1 && - hwreg.hstride == BRW_HORIZONTAL_STRIDE_0 && - hwreg.type == BRW_REGISTER_TYPE_F) { - /* "scalar" register */ - printf("scl%d.%d", hwreg.nr, hwreg.subnr / 4); - } - else if (hwreg.file == BRW_IMMEDIATE_VALUE) { - printf("imm %f", hwreg.dw1.f); - } - else { - printf("%s%d.%d<%d;%d,%d>:%s", - file[hwreg.file], - hwreg.nr, - hwreg.subnr / type_sz(hwreg.type), - hwreg.vstride ? (1<<(hwreg.vstride-1)) : 0, - 1<<hwreg.width, - hwreg.hstride ? (1<<(hwreg.hstride-1)) : 0, - type[hwreg.type]); - } -} - - - diff --git a/assembler/brw_eu_emit.c b/assembler/brw_eu_emit.c deleted file mode 100644 index 23f0da5f..00000000 --- a/assembler/brw_eu_emit.c +++ /dev/null @@ -1,2627 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#include <string.h> - -#include "brw_context.h" -#include "brw_defines.h" -#include "brw_eu.h" - -#include "ralloc.h" - -/*********************************************************************** - * Internal helper for constructing instructions - */ - -static void guess_execution_size(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg reg) -{ - if (reg.width == BRW_WIDTH_8 && p->compressed) - insn->header.execution_size = BRW_EXECUTE_16; - else - insn->header.execution_size = reg.width; /* note - definitions are compatible */ -} - - -/** - * Prior to Sandybridge, the SEND instruction accepted non-MRF source - * registers, implicitly moving the operand to a message register. - * - * On Sandybridge, this is no longer the case. This function performs the - * explicit move; it should be called before emitting a SEND instruction. - */ -void -gen6_resolve_implied_move(struct brw_compile *p, - struct brw_reg *src, - unsigned msg_reg_nr) -{ - struct intel_context *intel = &p->brw->intel; - if (intel->gen < 6) - return; - - if (src->file == BRW_MESSAGE_REGISTER_FILE) - return; - - if (src->file != BRW_ARCHITECTURE_REGISTER_FILE || src->nr != BRW_ARF_NULL) { - brw_push_insn_state(p); - brw_set_mask_control(p, BRW_MASK_DISABLE); - brw_set_compression_control(p, BRW_COMPRESSION_NONE); - brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD), - retype(*src, BRW_REGISTER_TYPE_UD)); - brw_pop_insn_state(p); - } - *src = brw_message_reg(msg_reg_nr); -} - -static void -gen7_convert_mrf_to_grf(struct brw_compile *p, struct brw_reg *reg) -{ - /* From the BSpec / ISA Reference / send - [DevIVB+]: - * "The send with EOT should use register space R112-R127 for <src>. This is - * to enable loading of a new thread into the same slot while the message - * with EOT for current thread is pending dispatch." - * - * Since we're pretending to have 16 MRFs anyway, we may as well use the - * registers required for messages with EOT. - */ - struct intel_context *intel = &p->brw->intel; - if (intel->gen == 7 && reg->file == BRW_MESSAGE_REGISTER_FILE) { - reg->file = BRW_GENERAL_REGISTER_FILE; - reg->nr += GEN7_MRF_HACK_START; - } -} - - -void -brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, - struct brw_reg dest) -{ - if (dest.file != BRW_ARCHITECTURE_REGISTER_FILE && - dest.file != BRW_MESSAGE_REGISTER_FILE) - assert(dest.nr < 128); - - gen7_convert_mrf_to_grf(p, &dest); - - insn->bits1.da1.dest_reg_file = dest.file; - insn->bits1.da1.dest_reg_type = dest.type; - insn->bits1.da1.dest_address_mode = dest.address_mode; - - if (dest.address_mode == BRW_ADDRESS_DIRECT) { - insn->bits1.da1.dest_reg_nr = dest.nr; - - if (insn->header.access_mode == BRW_ALIGN_1) { - insn->bits1.da1.dest_subreg_nr = dest.subnr; - if (dest.hstride == BRW_HORIZONTAL_STRIDE_0) - dest.hstride = BRW_HORIZONTAL_STRIDE_1; - insn->bits1.da1.dest_horiz_stride = dest.hstride; - } - else { - insn->bits1.da16.dest_subreg_nr = dest.subnr / 16; - insn->bits1.da16.dest_writemask = dest.dw1.bits.writemask; - /* even ignored in da16, still need to set as '01' */ - insn->bits1.da16.dest_horiz_stride = 1; - } - } - else { - insn->bits1.ia1.dest_subreg_nr = dest.subnr; - - /* These are different sizes in align1 vs align16: - */ - if (insn->header.access_mode == BRW_ALIGN_1) { - insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset; - if (dest.hstride == BRW_HORIZONTAL_STRIDE_0) - dest.hstride = BRW_HORIZONTAL_STRIDE_1; - insn->bits1.ia1.dest_horiz_stride = dest.hstride; - } - else { - insn->bits1.ia16.dest_indirect_offset = dest.dw1.bits.indirect_offset; - /* even ignored in da16, still need to set as '01' */ - insn->bits1.ia16.dest_horiz_stride = 1; - } - } - - /* NEW: Set the execution size based on dest.width and - * insn->compression_control: - */ - guess_execution_size(p, insn, dest); -} - -extern int reg_type_size[]; - -static void -validate_reg(struct brw_instruction *insn, struct brw_reg reg) -{ - int hstride_for_reg[] = {0, 1, 2, 4}; - int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; - int width_for_reg[] = {1, 2, 4, 8, 16}; - int execsize_for_reg[] = {1, 2, 4, 8, 16, 32}; - int width, hstride, vstride, execsize; - - if (reg.file == BRW_IMMEDIATE_VALUE) { - /* 3.3.6: Region Parameters. Restriction: Immediate vectors - * mean the destination has to be 128-bit aligned and the - * destination horiz stride has to be a word. - */ - if (reg.type == BRW_REGISTER_TYPE_V) { - assert(hstride_for_reg[insn->bits1.da1.dest_horiz_stride] * - reg_type_size[insn->bits1.da1.dest_reg_type] == 2); - } - - return; - } - - if (reg.file == BRW_ARCHITECTURE_REGISTER_FILE && - reg.file == BRW_ARF_NULL) - return; - - assert(reg.hstride >= 0 && reg.hstride < Elements(hstride_for_reg)); - hstride = hstride_for_reg[reg.hstride]; - - if (reg.vstride == 0xf) { - vstride = -1; - } else { - assert(reg.vstride >= 0 && reg.vstride < Elements(vstride_for_reg)); - vstride = vstride_for_reg[reg.vstride]; - } - - assert(reg.width >= 0 && reg.width < Elements(width_for_reg)); - width = width_for_reg[reg.width]; - - assert(insn->header.execution_size >= 0 && - insn->header.execution_size < Elements(execsize_for_reg)); - execsize = execsize_for_reg[insn->header.execution_size]; - - /* Restrictions from 3.3.10: Register Region Restrictions. */ - /* 3. */ - assert(execsize >= width); - - /* FIXME: the assembler has a lot of code written that triggers the - * assertions commented it below. Let's paper over it (for now!) until we - * can re-validate the shaders with those little inconsistencies fixed. */ - - /* 4. */ -#if 0 - if (execsize == width && hstride != 0) { - assert(vstride == -1 || vstride == width * hstride); - } -#endif - - /* 5. */ - if (execsize == width && hstride == 0) { - /* no restriction on vstride. */ - } - - /* 6. */ -#if 0 - if (width == 1) { - assert(hstride == 0); - } -#endif - - /* 7. */ -#if 0 - if (execsize == 1 && width == 1) { - assert(hstride == 0); - assert(vstride == 0); - } -#endif - - /* 8. */ - if (vstride == 0 && hstride == 0) { - assert(width == 1); - } - - /* 10. Check destination issues. */ -} - -void -brw_set_src0(struct brw_compile *p, struct brw_instruction *insn, - struct brw_reg reg) -{ - struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; - - if (reg.file != BRW_ARCHITECTURE_REGISTER_FILE) - assert(reg.nr < 128); - - gen7_convert_mrf_to_grf(p, ®); - - if (intel->gen >= 6 && (insn->header.opcode == BRW_OPCODE_SEND || - insn->header.opcode == BRW_OPCODE_SENDC)) { - /* Any source modifiers or regions will be ignored, since this just - * identifies the MRF/GRF to start reading the message contents from. - * Check for some likely failures. - */ - assert(!reg.negate); - assert(!reg.abs); - assert(reg.address_mode == BRW_ADDRESS_DIRECT); - } - - validate_reg(insn, reg); - - insn->bits1.da1.src0_reg_file = reg.file; - insn->bits1.da1.src0_reg_type = reg.type; - insn->bits2.da1.src0_abs = reg.abs; - insn->bits2.da1.src0_negate = reg.negate; - insn->bits2.da1.src0_address_mode = reg.address_mode; - - if (reg.file == BRW_IMMEDIATE_VALUE) { - insn->bits3.ud = reg.dw1.ud; - - /* Required to set some fields in src1 as well: - */ - - /* FIXME: This looks quite wrong, tempering with src1. I did not find - * anything in the bspec that was hinting it woud be needed when setting - * src0. before removing this one needs to run piglit. - - insn->bits1.da1.src1_reg_file = 0; - insn->bits1.da1.src1_reg_type = reg.type; - */ - } - else - { - if (reg.address_mode == BRW_ADDRESS_DIRECT) { - if (insn->header.access_mode == BRW_ALIGN_1) { - insn->bits2.da1.src0_subreg_nr = reg.subnr; - insn->bits2.da1.src0_reg_nr = reg.nr; - } - else { - insn->bits2.da16.src0_subreg_nr = reg.subnr / 16; - insn->bits2.da16.src0_reg_nr = reg.nr; - } - } - else { - insn->bits2.ia1.src0_subreg_nr = reg.subnr; - - if (insn->header.access_mode == BRW_ALIGN_1) { - insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset; - } - else { - insn->bits2.ia16.src0_subreg_nr = reg.dw1.bits.indirect_offset; - } - } - - if (insn->header.access_mode == BRW_ALIGN_1) { - - /* FIXME: While this is correct, if the assembler uses that code path - * the opcode generated are different and thus needs a validation - * pass. - if (reg.width == BRW_WIDTH_1 && - insn->header.execution_size == BRW_EXECUTE_1) { - insn->bits2.da1.src0_horiz_stride = BRW_HORIZONTAL_STRIDE_0; - insn->bits2.da1.src0_width = BRW_WIDTH_1; - insn->bits2.da1.src0_vert_stride = BRW_VERTICAL_STRIDE_0; - } - else { - */ - insn->bits2.da1.src0_horiz_stride = reg.hstride; - insn->bits2.da1.src0_width = reg.width; - insn->bits2.da1.src0_vert_stride = reg.vstride; - /* } */ - } - else { - insn->bits2.da16.src0_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); - insn->bits2.da16.src0_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); - insn->bits2.da16.src0_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); - insn->bits2.da16.src0_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W); - - /* This is an oddity of the fact we're using the same - * descriptions for registers in align_16 as align_1: - */ - if (reg.vstride == BRW_VERTICAL_STRIDE_8) - insn->bits2.da16.src0_vert_stride = BRW_VERTICAL_STRIDE_4; - else - insn->bits2.da16.src0_vert_stride = reg.vstride; - } - } -} - - -void brw_set_src1(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg reg) -{ - struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; - - assert(reg.file != BRW_MESSAGE_REGISTER_FILE); - - if (reg.file != BRW_ARCHITECTURE_REGISTER_FILE) - assert(reg.nr < 128); - - gen7_convert_mrf_to_grf(p, ®); - - validate_reg(insn, reg); - - insn->bits1.da1.src1_reg_file = reg.file; - insn->bits1.da1.src1_reg_type = reg.type; - insn->bits3.da1.src1_abs = reg.abs; - insn->bits3.da1.src1_negate = reg.negate; - insn->bits3.da1.src1_address_mode = reg.address_mode; - - /* Only src1 can be immediate in two-argument instructions. - */ - assert(insn->bits1.da1.src0_reg_file != BRW_IMMEDIATE_VALUE); - - if (reg.file == BRW_IMMEDIATE_VALUE) { - insn->bits3.ud = reg.dw1.ud; - } - else { - /* It's only BRW that does not support register-indirect addressing on - * src1 */ - assert (intel->gen >= 4 || reg.address_mode == BRW_ADDRESS_DIRECT); - - if (reg.address_mode == BRW_ADDRESS_DIRECT) { - if (insn->header.access_mode == BRW_ALIGN_1) { - insn->bits3.da1.src1_subreg_nr = reg.subnr; - insn->bits3.da1.src1_reg_nr = reg.nr; - } - else { - insn->bits3.da16.src1_subreg_nr = reg.subnr / 16; - insn->bits3.da16.src1_reg_nr = reg.nr; - } - } - else { - insn->bits3.ia1.src1_subreg_nr = reg.subnr; - - if (insn->header.access_mode == BRW_ALIGN_1) - insn->bits3.ia1.src1_indirect_offset = reg.dw1.bits.indirect_offset; - else - insn->bits3.ia16.src1_indirect_offset = reg.dw1.bits.indirect_offset / 16; - } - - if (insn->header.access_mode == BRW_ALIGN_1) { - /* FIXME: While this is correct, if the assembler uses that code path - * the opcode generated are different and thus needs a validation - * pass. - if (reg.width == BRW_WIDTH_1 && - insn->header.execution_size == BRW_EXECUTE_1) { - insn->bits3.da1.src1_horiz_stride = BRW_HORIZONTAL_STRIDE_0; - insn->bits3.da1.src1_width = BRW_WIDTH_1; - insn->bits3.da1.src1_vert_stride = BRW_VERTICAL_STRIDE_0; - } - else { */ - insn->bits3.da1.src1_horiz_stride = reg.hstride; - insn->bits3.da1.src1_width = reg.width; - insn->bits3.da1.src1_vert_stride = reg.vstride; - /* } */ - } - else { - insn->bits3.da16.src1_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); - insn->bits3.da16.src1_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); - insn->bits3.da16.src1_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); - insn->bits3.da16.src1_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W); - - /* This is an oddity of the fact we're using the same - * descriptions for registers in align_16 as align_1: - */ - if (reg.vstride == BRW_VERTICAL_STRIDE_8) - insn->bits3.da16.src1_vert_stride = BRW_VERTICAL_STRIDE_4; - else - insn->bits3.da16.src1_vert_stride = reg.vstride; - } - } -} - -/** - * Set the Message Descriptor and Extended Message Descriptor fields - * for SEND messages. - * - * \note This zeroes out the Function Control bits, so it must be called - * \b before filling out any message-specific data. Callers can - * choose not to fill in irrelevant bits; they will be zero. - */ -static void -brw_set_message_descriptor(struct brw_compile *p, - struct brw_instruction *inst, - enum brw_message_target sfid, - unsigned msg_length, - unsigned response_length, - bool header_present, - bool end_of_thread) -{ - struct intel_context *intel = &p->brw->intel; - - brw_set_src1(p, inst, brw_imm_d(0)); - - if (intel->gen >= 5) { - inst->bits3.generic_gen5.header_present = header_present; - inst->bits3.generic_gen5.response_length = response_length; - inst->bits3.generic_gen5.msg_length = msg_length; - inst->bits3.generic_gen5.end_of_thread = end_of_thread; - - if (intel->gen >= 6) { - /* On Gen6+ Message target/SFID goes in bits 27:24 of the header */ - inst->header.destreg__conditionalmod = sfid; - } else { - /* Set Extended Message Descriptor (ex_desc) */ - inst->bits2.send_gen5.sfid = sfid; - inst->bits2.send_gen5.end_of_thread = end_of_thread; - } - } else { - inst->bits3.generic.response_length = response_length; - inst->bits3.generic.msg_length = msg_length; - inst->bits3.generic.msg_target = sfid; - inst->bits3.generic.end_of_thread = end_of_thread; - } -} - -static void brw_set_math_message( struct brw_compile *p, - struct brw_instruction *insn, - unsigned function, - unsigned integer_type, - bool low_precision, - unsigned dataType ) -{ - struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; - unsigned msg_length; - unsigned response_length; - - /* Infer message length from the function */ - switch (function) { - case BRW_MATH_FUNCTION_POW: - case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT: - case BRW_MATH_FUNCTION_INT_DIV_REMAINDER: - case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER: - msg_length = 2; - break; - default: - msg_length = 1; - break; - } - - /* Infer response length from the function */ - switch (function) { - case BRW_MATH_FUNCTION_SINCOS: - case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER: - response_length = 2; - break; - default: - response_length = 1; - break; - } - - - brw_set_message_descriptor(p, insn, BRW_SFID_MATH, - msg_length, response_length, false, false); - if (intel->gen == 5) { - insn->bits3.math_gen5.function = function; - insn->bits3.math_gen5.int_type = integer_type; - insn->bits3.math_gen5.precision = low_precision; - insn->bits3.math_gen5.saturate = insn->header.saturate; - insn->bits3.math_gen5.data_type = dataType; - insn->bits3.math_gen5.snapshot = 0; - } else { - insn->bits3.math.function = function; - insn->bits3.math.int_type = integer_type; - insn->bits3.math.precision = low_precision; - insn->bits3.math.saturate = insn->header.saturate; - insn->bits3.math.data_type = dataType; - } - insn->header.saturate = 0; -} - - -static void brw_set_ff_sync_message(struct brw_compile *p, - struct brw_instruction *insn, - bool allocate, - unsigned response_length, - bool end_of_thread) -{ - brw_set_message_descriptor(p, insn, BRW_SFID_URB, - 1, response_length, true, end_of_thread); - insn->bits3.urb_gen5.opcode = 1; /* FF_SYNC */ - insn->bits3.urb_gen5.offset = 0; /* Not used by FF_SYNC */ - insn->bits3.urb_gen5.swizzle_control = 0; /* Not used by FF_SYNC */ - insn->bits3.urb_gen5.allocate = allocate; - insn->bits3.urb_gen5.used = 0; /* Not used by FF_SYNC */ - insn->bits3.urb_gen5.complete = 0; /* Not used by FF_SYNC */ -} - -static void brw_set_urb_message( struct brw_compile *p, - struct brw_instruction *insn, - bool allocate, - bool used, - unsigned msg_length, - unsigned response_length, - bool end_of_thread, - bool complete, - unsigned offset, - unsigned swizzle_control ) -{ - struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; - - brw_set_message_descriptor(p, insn, BRW_SFID_URB, - msg_length, response_length, true, end_of_thread); - if (intel->gen == 7) { - insn->bits3.urb_gen7.opcode = 0; /* URB_WRITE_HWORD */ - insn->bits3.urb_gen7.offset = offset; - assert(swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE); - insn->bits3.urb_gen7.swizzle_control = swizzle_control; - /* per_slot_offset = 0 makes it ignore offsets in message header */ - insn->bits3.urb_gen7.per_slot_offset = 0; - insn->bits3.urb_gen7.complete = complete; - } else if (intel->gen >= 5) { - insn->bits3.urb_gen5.opcode = 0; /* URB_WRITE */ - insn->bits3.urb_gen5.offset = offset; - insn->bits3.urb_gen5.swizzle_control = swizzle_control; - insn->bits3.urb_gen5.allocate = allocate; - insn->bits3.urb_gen5.used = used; /* ? */ - insn->bits3.urb_gen5.complete = complete; - } else { - insn->bits3.urb.opcode = 0; /* ? */ - insn->bits3.urb.offset = offset; - insn->bits3.urb.swizzle_control = swizzle_control; - insn->bits3.urb.allocate = allocate; - insn->bits3.urb.used = used; /* ? */ - insn->bits3.urb.complete = complete; - } -} - -void -brw_set_dp_write_message(struct brw_compile *p, - struct brw_instruction *insn, - unsigned binding_table_index, - unsigned msg_control, - unsigned msg_type, - unsigned msg_length, - bool header_present, - unsigned last_render_target, - unsigned response_length, - unsigned end_of_thread, - unsigned send_commit_msg) -{ - struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; - unsigned sfid; - - if (intel->gen >= 7) { - /* Use the Render Cache for RT writes; otherwise use the Data Cache */ - if (msg_type == GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE) - sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; - else - sfid = GEN7_SFID_DATAPORT_DATA_CACHE; - } else if (intel->gen == 6) { - /* Use the render cache for all write messages. */ - sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; - } else { - sfid = BRW_SFID_DATAPORT_WRITE; - } - - brw_set_message_descriptor(p, insn, sfid, msg_length, response_length, - header_present, end_of_thread); - - if (intel->gen >= 7) { - insn->bits3.gen7_dp.binding_table_index = binding_table_index; - insn->bits3.gen7_dp.msg_control = msg_control | - last_render_target << 6; - insn->bits3.gen7_dp.msg_type = msg_type; - } else if (intel->gen == 6) { - insn->bits3.gen6_dp.binding_table_index = binding_table_index; - insn->bits3.gen6_dp.msg_control = msg_control | - last_render_target << 5; - insn->bits3.gen6_dp.msg_type = msg_type; - insn->bits3.gen6_dp.send_commit_msg = send_commit_msg; - } else if (intel->gen == 5) { - insn->bits3.dp_write_gen5.binding_table_index = binding_table_index; - insn->bits3.dp_write_gen5.msg_control = msg_control; - insn->bits3.dp_write_gen5.last_render_target = last_render_target; - insn->bits3.dp_write_gen5.msg_type = msg_type; - insn->bits3.dp_write_gen5.send_commit_msg = send_commit_msg; - } else { - insn->bits3.dp_write.binding_table_index = binding_table_index; - insn->bits3.dp_write.msg_control = msg_control; - insn->bits3.dp_write.last_render_target = last_render_target; - insn->bits3.dp_write.msg_type = msg_type; - insn->bits3.dp_write.send_commit_msg = send_commit_msg; - } -} - -void -brw_set_dp_read_message(struct brw_compile *p, - struct brw_instruction *insn, - unsigned binding_table_index, - unsigned msg_control, - unsigned msg_type, - unsigned target_cache, - unsigned msg_length, - bool header_present, - unsigned response_length) -{ - struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; - unsigned sfid; - - if (intel->gen >= 7) { - sfid = GEN7_SFID_DATAPORT_DATA_CACHE; - } else if (intel->gen == 6) { - if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE) - sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; - else - sfid = GEN6_SFID_DATAPORT_SAMPLER_CACHE; - } else { - sfid = BRW_SFID_DATAPORT_READ; - } - - brw_set_message_descriptor(p, insn, sfid, msg_length, response_length, - header_present, false); - - if (intel->gen >= 7) { - insn->bits3.gen7_dp.binding_table_index = binding_table_index; - insn->bits3.gen7_dp.msg_control = msg_control; - insn->bits3.gen7_dp.msg_type = msg_type; - } else if (intel->gen == 6) { - insn->bits3.gen6_dp.binding_table_index = binding_table_index; - insn->bits3.gen6_dp.msg_control = msg_control; - insn->bits3.gen6_dp.msg_type = msg_type; - insn->bits3.gen6_dp.send_commit_msg = 0; - } else if (intel->gen == 5) { - insn->bits3.dp_read_gen5.binding_table_index = binding_table_index; - insn->bits3.dp_read_gen5.msg_control = msg_control; - insn->bits3.dp_read_gen5.msg_type = msg_type; - insn->bits3.dp_read_gen5.target_cache = target_cache; - } else if (intel->is_g4x) { - insn->bits3.dp_read_g4x.binding_table_index = binding_table_index; /*0:7*/ - insn->bits3.dp_read_g4x.msg_control = msg_control; /*8:10*/ - insn->bits3.dp_read_g4x.msg_type = msg_type; /*11:13*/ - insn->bits3.dp_read_g4x.target_cache = target_cache; /*14:15*/ - } else { - insn->bits3.dp_read.binding_table_index = binding_table_index; /*0:7*/ - insn->bits3.dp_read.msg_control = msg_control; /*8:11*/ - insn->bits3.dp_read.msg_type = msg_type; /*12:13*/ - insn->bits3.dp_read.target_cache = target_cache; /*14:15*/ - } -} - -void -brw_set_sampler_message(struct brw_compile *p, - struct brw_instruction *insn, - unsigned binding_table_index, - unsigned sampler, - unsigned msg_type, - unsigned response_length, - unsigned msg_length, - unsigned header_present, - unsigned simd_mode, - unsigned return_format) -{ - struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; - - brw_set_message_descriptor(p, insn, BRW_SFID_SAMPLER, msg_length, - response_length, header_present, false); - - if (intel->gen >= 7) { - insn->bits3.sampler_gen7.binding_table_index = binding_table_index; - insn->bits3.sampler_gen7.sampler = sampler; - insn->bits3.sampler_gen7.msg_type = msg_type; - insn->bits3.sampler_gen7.simd_mode = simd_mode; - } else if (intel->gen >= 5) { - insn->bits3.sampler_gen5.binding_table_index = binding_table_index; - insn->bits3.sampler_gen5.sampler = sampler; - insn->bits3.sampler_gen5.msg_type = msg_type; - insn->bits3.sampler_gen5.simd_mode = simd_mode; - } else if (intel->is_g4x) { - insn->bits3.sampler_g4x.binding_table_index = binding_table_index; - insn->bits3.sampler_g4x.sampler = sampler; - insn->bits3.sampler_g4x.msg_type = msg_type; - } else { - insn->bits3.sampler.binding_table_index = binding_table_index; - insn->bits3.sampler.sampler = sampler; - insn->bits3.sampler.msg_type = msg_type; - insn->bits3.sampler.return_format = return_format; - } -} - - -#define next_insn brw_next_insn -struct brw_instruction * -brw_next_insn(struct brw_compile *p, unsigned opcode) -{ - struct brw_instruction *insn; - - if (p->nr_insn + 1 > p->store_size) { - if (0) - printf("incresing the store size to %d\n", p->store_size << 1); - p->store_size <<= 1; - p->store = reralloc(p->mem_ctx, p->store, - struct brw_instruction, p->store_size); - if (!p->store) - assert(!"realloc eu store memeory failed"); - } - - p->next_insn_offset += 16; - insn = &p->store[p->nr_insn++]; - memcpy(insn, p->current, sizeof(*insn)); - - /* Reset this one-shot flag: - */ - - if (p->current->header.destreg__conditionalmod) { - p->current->header.destreg__conditionalmod = 0; - p->current->header.predicate_control = BRW_PREDICATE_NORMAL; - } - - insn->header.opcode = opcode; - return insn; -} - -static struct brw_instruction *brw_alu1( struct brw_compile *p, - unsigned opcode, - struct brw_reg dest, - struct brw_reg src ) -{ - struct brw_instruction *insn = next_insn(p, opcode); - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src); - return insn; -} - -static struct brw_instruction *brw_alu2(struct brw_compile *p, - unsigned opcode, - struct brw_reg dest, - struct brw_reg src0, - struct brw_reg src1 ) -{ - struct brw_instruction *insn = next_insn(p, opcode); - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src0); - brw_set_src1(p, insn, src1); - return insn; -} - -static int -get_3src_subreg_nr(struct brw_reg reg) -{ - if (reg.vstride == BRW_VERTICAL_STRIDE_0) { - assert(brw_is_single_value_swizzle(reg.dw1.bits.swizzle)); - return reg.subnr / 4 + BRW_GET_SWZ(reg.dw1.bits.swizzle, 0); - } else { - return reg.subnr / 4; - } -} - -static int get_3src_type(int type) -{ - assert(type == BRW_REGISTER_TYPE_F || - type == BRW_REGISTER_TYPE_D || - type == BRW_REGISTER_TYPE_UD); - - switch(type) { - case BRW_REGISTER_TYPE_F: return BRW_REGISTER_3SRC_TYPE_F; - case BRW_REGISTER_TYPE_D: return BRW_REGISTER_3SRC_TYPE_D; - case BRW_REGISTER_TYPE_UD: return BRW_REGISTER_3SRC_TYPE_UD; - } - - return BRW_REGISTER_3SRC_TYPE_F; -} - -void -brw_set_3src_dest(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg dest) -{ - gen7_convert_mrf_to_grf(p, &dest); - - assert(insn->header.access_mode == BRW_ALIGN_16); - - assert(dest.file == BRW_GENERAL_REGISTER_FILE || - dest.file == BRW_MESSAGE_REGISTER_FILE); - assert(dest.nr < 128); - assert(dest.address_mode == BRW_ADDRESS_DIRECT); - insn->bits1.da3src.dest_reg_type = get_3src_type(dest.type); - insn->bits1.da3src.dest_reg_file = (dest.file == BRW_MESSAGE_REGISTER_FILE); - insn->bits1.da3src.dest_reg_nr = dest.nr; - insn->bits1.da3src.dest_subreg_nr = dest.subnr / 16; - insn->bits1.da3src.dest_writemask = dest.dw1.bits.writemask; - guess_execution_size(p, insn, dest); -} - -void -brw_set_3src_src0(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg src0) -{ - assert(src0.file == BRW_GENERAL_REGISTER_FILE); - assert(src0.address_mode == BRW_ADDRESS_DIRECT); - assert(src0.nr < 128); - insn->bits1.da3src.src_reg_type = get_3src_type(src0.type); - insn->bits2.da3src.src0_swizzle = src0.dw1.bits.swizzle; - insn->bits2.da3src.src0_subreg_nr = get_3src_subreg_nr(src0); - insn->bits2.da3src.src0_reg_nr = src0.nr; - insn->bits1.da3src.src0_abs = src0.abs; - insn->bits1.da3src.src0_negate = src0.negate; - insn->bits2.da3src.src0_rep_ctrl = src0.vstride == BRW_VERTICAL_STRIDE_0; -} - -void -brw_set_3src_src1(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg src1) -{ - assert(src1.file == BRW_GENERAL_REGISTER_FILE); - assert(src1.address_mode == BRW_ADDRESS_DIRECT); - assert(src1.nr < 128); - assert(src1.type == insn->bits1.da3src.src_reg_type); - insn->bits2.da3src.src1_swizzle = src1.dw1.bits.swizzle; - insn->bits2.da3src.src1_subreg_nr_low = get_3src_subreg_nr(src1) & 0x3; - insn->bits3.da3src.src1_subreg_nr_high = get_3src_subreg_nr(src1) >> 2; - insn->bits2.da3src.src1_rep_ctrl = src1.vstride == BRW_VERTICAL_STRIDE_0; - insn->bits3.da3src.src1_reg_nr = src1.nr; - insn->bits1.da3src.src1_abs = src1.abs; - insn->bits1.da3src.src1_negate = src1.negate; -} - -void -brw_set_3src_src2(struct brw_compile *p, - struct brw_instruction *insn, - struct brw_reg src2) -{ - assert(src2.file == BRW_GENERAL_REGISTER_FILE); - assert(src2.address_mode == BRW_ADDRESS_DIRECT); - assert(src2.nr < 128); - assert(src2.type == insn->bits1.da3src.src_reg_type); - insn->bits3.da3src.src2_swizzle = src2.dw1.bits.swizzle; - insn->bits3.da3src.src2_subreg_nr = get_3src_subreg_nr(src2); - insn->bits3.da3src.src2_rep_ctrl = src2.vstride == BRW_VERTICAL_STRIDE_0; - insn->bits3.da3src.src2_reg_nr = src2.nr; - insn->bits1.da3src.src2_abs = src2.abs; - insn->bits1.da3src.src2_negate = src2.negate; -} - -static struct brw_instruction *brw_alu3(struct brw_compile *p, - unsigned opcode, - struct brw_reg dest, - struct brw_reg src0, - struct brw_reg src1, - struct brw_reg src2) -{ - struct brw_instruction *insn = next_insn(p, opcode); - brw_set_3src_dest(p, insn, dest); - brw_set_3src_src0(p, insn, src0); - brw_set_3src_src1(p, insn, src1); - brw_set_3src_src2(p, insn, src2); - return insn; -} - - -/*********************************************************************** - * Convenience routines. - */ -#define ALU1(OP) \ -struct brw_instruction *brw_##OP(struct brw_compile *p, \ - struct brw_reg dest, \ - struct brw_reg src0) \ -{ \ - return brw_alu1(p, BRW_OPCODE_##OP, dest, src0); \ -} - -#define ALU2(OP) \ -struct brw_instruction *brw_##OP(struct brw_compile *p, \ - struct brw_reg dest, \ - struct brw_reg src0, \ - struct brw_reg src1) \ -{ \ - return brw_alu2(p, BRW_OPCODE_##OP, dest, src0, src1); \ -} - -#define ALU3(OP) \ -struct brw_instruction *brw_##OP(struct brw_compile *p, \ - struct brw_reg dest, \ - struct brw_reg src0, \ - struct brw_reg src1, \ - struct brw_reg src2) \ -{ \ - return brw_alu3(p, BRW_OPCODE_##OP, dest, src0, src1, src2); \ -} - -/* Rounding operations (other than RNDD) require two instructions - the first - * stores a rounded value (possibly the wrong way) in the dest register, but - * also sets a per-channel "increment bit" in the flag register. A predicated - * add of 1.0 fixes dest to contain the desired result. - * - * Sandybridge and later appear to round correctly without an ADD. - */ -#define ROUND(OP) \ -void brw_##OP(struct brw_compile *p, \ - struct brw_reg dest, \ - struct brw_reg src) \ -{ \ - struct brw_instruction *rnd, *add; \ - rnd = next_insn(p, BRW_OPCODE_##OP); \ - brw_set_dest(p, rnd, dest); \ - brw_set_src0(p, rnd, src); \ - \ - if (p->brw->intel.gen < 6) { \ - /* turn on round-increments */ \ - rnd->header.destreg__conditionalmod = BRW_CONDITIONAL_R; \ - add = brw_ADD(p, dest, dest, brw_imm_f(1.0f)); \ - add->header.predicate_control = BRW_PREDICATE_NORMAL; \ - } \ -} - - -ALU1(MOV) -ALU2(SEL) -ALU1(NOT) -ALU2(AND) -ALU2(OR) -ALU2(XOR) -ALU2(SHR) -ALU2(SHL) -ALU2(RSR) -ALU2(RSL) -ALU2(ASR) -ALU1(FRC) -ALU1(RNDD) -ALU2(MAC) -ALU2(MACH) -ALU1(LZD) -ALU2(DP4) -ALU2(DPH) -ALU2(DP3) -ALU2(DP2) -ALU2(LINE) -ALU2(PLN) -ALU3(MAD) - -ROUND(RNDZ) -ROUND(RNDE) - - -struct brw_instruction *brw_ADD(struct brw_compile *p, - struct brw_reg dest, - struct brw_reg src0, - struct brw_reg src1) -{ - /* 6.2.2: add */ - if (src0.type == BRW_REGISTER_TYPE_F || - (src0.file == BRW_IMMEDIATE_VALUE && - src0.type == BRW_REGISTER_TYPE_VF)) { - assert(src1.type != BRW_REGISTER_TYPE_UD); - assert(src1.type != BRW_REGISTER_TYPE_D); - } - - if (src1.type == BRW_REGISTER_TYPE_F || - (src1.file == BRW_IMMEDIATE_VALUE && - src1.type == BRW_REGISTER_TYPE_VF)) { - assert(src0.type != BRW_REGISTER_TYPE_UD); - assert(src0.type != BRW_REGISTER_TYPE_D); - } - - return brw_alu2(p, BRW_OPCODE_ADD, dest, src0, src1); -} - -struct brw_instruction *brw_AVG(struct brw_compile *p, - struct brw_reg dest, - struct brw_reg src0, - struct brw_reg src1) -{ - assert(dest.type == src0.type); - assert(src0.type == src1.type); - switch (src0.type) { - case BRW_REGISTER_TYPE_B: - case BRW_REGISTER_TYPE_UB: - case BRW_REGISTER_TYPE_W: - case BRW_REGISTER_TYPE_UW: - case BRW_REGISTER_TYPE_D: - case BRW_REGISTER_TYPE_UD: - break; - default: - assert(!"Bad type for brw_AVG"); - } - - return brw_alu2(p, BRW_OPCODE_AVG, dest, src0, src1); -} - -struct brw_instruction *brw_MUL(struct brw_compile *p, - struct brw_reg dest, - struct brw_reg src0, - struct brw_reg src1) -{ - /* 6.32.38: mul */ - if (src0.type == BRW_REGISTER_TYPE_D || - src0.type == BRW_REGISTER_TYPE_UD || - src1.type == BRW_REGISTER_TYPE_D || - src1.type == BRW_REGISTER_TYPE_UD) { - assert(dest.type != BRW_REGISTER_TYPE_F); - } - - if (src0.type == BRW_REGISTER_TYPE_F || - (src0.file == BRW_IMMEDIATE_VALUE && - src0.type == BRW_REGISTER_TYPE_VF)) { - assert(src1.type != BRW_REGISTER_TYPE_UD); - assert(src1.type != BRW_REGISTER_TYPE_D); - } - - if (src1.type == BRW_REGISTER_TYPE_F || - (src1.file == BRW_IMMEDIATE_VALUE && - src1.type == BRW_REGISTER_TYPE_VF)) { - assert(src0.type != BRW_REGISTER_TYPE_UD); - assert(src0.type != BRW_REGISTER_TYPE_D); - } - - assert(src0.file != BRW_ARCHITECTURE_REGISTER_FILE || - src0.nr != BRW_ARF_ACCUMULATOR); - assert(src1.file != BRW_ARCHITECTURE_REGISTER_FILE || - src1.nr != BRW_ARF_ACCUMULATOR); - - return brw_alu2(p, BRW_OPCODE_MUL, dest, src0, src1); -} - - -void brw_NOP(struct brw_compile *p) -{ - struct brw_instruction *insn = next_insn(p, BRW_OPCODE_NOP); - brw_set_dest(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD)); - brw_set_src0(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD)); - brw_set_src1(p, insn, brw_imm_ud(0x0)); -} - - - - - -/*********************************************************************** - * Comparisons, if/else/endif - */ - -struct brw_instruction *brw_JMPI(struct brw_compile *p, - struct brw_reg dest, - struct brw_reg src0, - struct brw_reg src1) -{ - struct brw_instruction *insn = brw_alu2(p, BRW_OPCODE_JMPI, dest, src0, src1); - - insn->header.execution_size = 1; - insn->header.compression_control = BRW_COMPRESSION_NONE; - insn->header.mask_control = BRW_MASK_DISABLE; - - p->current->header.predicate_control = BRW_PREDICATE_NONE; - - return insn; -} - -static void -push_if_stack(struct brw_compile *p, struct brw_instruction *inst) -{ - p->if_stack[p->if_stack_depth] = inst - p->store; - - p->if_stack_depth++; - if (p->if_stack_array_size <= p->if_stack_depth) { - p->if_stack_array_size *= 2; - p->if_stack = reralloc(p->mem_ctx, p->if_stack, int, - p->if_stack_array_size); - } -} - -static struct brw_instruction * -pop_if_stack(struct brw_compile *p) -{ - p->if_stack_depth--; - return &p->store[p->if_stack[p->if_stack_depth]]; -} - -static void -push_loop_stack(struct brw_compile *p, struct brw_instruction *inst) -{ - if (p->loop_stack_array_size < p->loop_stack_depth) { - p->loop_stack_array_size *= 2; - p->loop_stack = reralloc(p->mem_ctx, p->loop_stack, int, - p->loop_stack_array_size); - p->if_depth_in_loop = reralloc(p->mem_ctx, p->if_depth_in_loop, int, - p->loop_stack_array_size); - } - - p->loop_stack[p->loop_stack_depth] = inst - p->store; - p->loop_stack_depth++; - p->if_depth_in_loop[p->loop_stack_depth] = 0; -} - -static struct brw_instruction * -get_inner_do_insn(struct brw_compile *p) -{ - return &p->store[p->loop_stack[p->loop_stack_depth - 1]]; -} - -/* EU takes the value from the flag register and pushes it onto some - * sort of a stack (presumably merging with any flag value already on - * the stack). Within an if block, the flags at the top of the stack - * control execution on each channel of the unit, eg. on each of the - * 16 pixel values in our wm programs. - * - * When the matching 'else' instruction is reached (presumably by - * countdown of the instruction count patched in by our ELSE/ENDIF - * functions), the relevent flags are inverted. - * - * When the matching 'endif' instruction is reached, the flags are - * popped off. If the stack is now empty, normal execution resumes. - */ -struct brw_instruction * -brw_IF(struct brw_compile *p, unsigned execute_size) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *insn; - - insn = next_insn(p, BRW_OPCODE_IF); - - /* Override the defaults for this instruction: - */ - if (intel->gen < 6) { - brw_set_dest(p, insn, brw_ip_reg()); - brw_set_src0(p, insn, brw_ip_reg()); - brw_set_src1(p, insn, brw_imm_d(0x0)); - } else if (intel->gen == 6) { - brw_set_dest(p, insn, brw_imm_w(0)); - insn->bits1.branch_gen6.jump_count = 0; - brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); - brw_set_src1(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); - } else { - brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); - brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); - brw_set_src1(p, insn, brw_imm_ud(0)); - insn->bits3.break_cont.jip = 0; - insn->bits3.break_cont.uip = 0; - } - - insn->header.execution_size = execute_size; - insn->header.compression_control = BRW_COMPRESSION_NONE; - insn->header.predicate_control = BRW_PREDICATE_NORMAL; - insn->header.mask_control = BRW_MASK_ENABLE; - if (!p->single_program_flow) - insn->header.thread_control = BRW_THREAD_SWITCH; - - p->current->header.predicate_control = BRW_PREDICATE_NONE; - - push_if_stack(p, insn); - p->if_depth_in_loop[p->loop_stack_depth]++; - return insn; -} - -/* This function is only used for gen6-style IF instructions with an - * embedded comparison (conditional modifier). It is not used on gen7. - */ -struct brw_instruction * -gen6_IF(struct brw_compile *p, uint32_t conditional, - struct brw_reg src0, struct brw_reg src1) -{ - struct brw_instruction *insn; - - insn = next_insn(p, BRW_OPCODE_IF); - - brw_set_dest(p, insn, brw_imm_w(0)); - if (p->compressed) { - insn->header.execution_size = BRW_EXECUTE_16; - } else { - insn->header.execution_size = BRW_EXECUTE_8; - } - insn->bits1.branch_gen6.jump_count = 0; - brw_set_src0(p, insn, src0); - brw_set_src1(p, insn, src1); - - assert(insn->header.compression_control == BRW_COMPRESSION_NONE); - assert(insn->header.predicate_control == BRW_PREDICATE_NONE); - insn->header.destreg__conditionalmod = conditional; - - if (!p->single_program_flow) - insn->header.thread_control = BRW_THREAD_SWITCH; - - push_if_stack(p, insn); - return insn; -} - -/** - * In single-program-flow (SPF) mode, convert IF and ELSE into ADDs. - */ -static void -convert_IF_ELSE_to_ADD(struct brw_compile *p, - struct brw_instruction *if_inst, - struct brw_instruction *else_inst) -{ - /* The next instruction (where the ENDIF would be, if it existed) */ - struct brw_instruction *next_inst = &p->store[p->nr_insn]; - - assert(p->single_program_flow); - assert(if_inst != NULL && if_inst->header.opcode == BRW_OPCODE_IF); - assert(else_inst == NULL || else_inst->header.opcode == BRW_OPCODE_ELSE); - assert(if_inst->header.execution_size == BRW_EXECUTE_1); - - /* Convert IF to an ADD instruction that moves the instruction pointer - * to the first instruction of the ELSE block. If there is no ELSE - * block, point to where ENDIF would be. Reverse the predicate. - * - * There's no need to execute an ENDIF since we don't need to do any - * stack operations, and if we're currently executing, we just want to - * continue normally. - */ - if_inst->header.opcode = BRW_OPCODE_ADD; - if_inst->header.predicate_inverse = 1; - - if (else_inst != NULL) { - /* Convert ELSE to an ADD instruction that points where the ENDIF - * would be. - */ - else_inst->header.opcode = BRW_OPCODE_ADD; - - if_inst->bits3.ud = (else_inst - if_inst + 1) * 16; - else_inst->bits3.ud = (next_inst - else_inst) * 16; - } else { - if_inst->bits3.ud = (next_inst - if_inst) * 16; - } -} - -/** - * Patch IF and ELSE instructions with appropriate jump targets. - */ -static void -patch_IF_ELSE(struct brw_compile *p, - struct brw_instruction *if_inst, - struct brw_instruction *else_inst, - struct brw_instruction *endif_inst) -{ - struct intel_context *intel = &p->brw->intel; - - /* We shouldn't be patching IF and ELSE instructions in single program flow - * mode when gen < 6, because in single program flow mode on those - * platforms, we convert flow control instructions to conditional ADDs that - * operate on IP (see brw_ENDIF). - * - * However, on Gen6, writing to IP doesn't work in single program flow mode - * (see the SandyBridge PRM, Volume 4 part 2, p79: "When SPF is ON, IP may - * not be updated by non-flow control instructions."). And on later - * platforms, there is no significant benefit to converting control flow - * instructions to conditional ADDs. So we do patch IF and ELSE - * instructions in single program flow mode on those platforms. - */ - if (intel->gen < 6) - assert(!p->single_program_flow); - - assert(if_inst != NULL && if_inst->header.opcode == BRW_OPCODE_IF); - assert(endif_inst != NULL); - assert(else_inst == NULL || else_inst->header.opcode == BRW_OPCODE_ELSE); - - unsigned br = 1; - /* Jump count is for 64bit data chunk each, so one 128bit instruction - * requires 2 chunks. - */ - if (intel->gen >= 5) - br = 2; - - assert(endif_inst->header.opcode == BRW_OPCODE_ENDIF); - endif_inst->header.execution_size = if_inst->header.execution_size; - - if (else_inst == NULL) { - /* Patch IF -> ENDIF */ - if (intel->gen < 6) { - /* Turn it into an IFF, which means no mask stack operations for - * all-false and jumping past the ENDIF. - */ - if_inst->header.opcode = BRW_OPCODE_IFF; - if_inst->bits3.if_else.jump_count = br * (endif_inst - if_inst + 1); - if_inst->bits3.if_else.pop_count = 0; - if_inst->bits3.if_else.pad0 = 0; - } else if (intel->gen == 6) { - /* As of gen6, there is no IFF and IF must point to the ENDIF. */ - if_inst->bits1.branch_gen6.jump_count = br * (endif_inst - if_inst); - } else { - if_inst->bits3.break_cont.uip = br * (endif_inst - if_inst); - if_inst->bits3.break_cont.jip = br * (endif_inst - if_inst); - } - } else { - else_inst->header.execution_size = if_inst->header.execution_size; - - /* Patch IF -> ELSE */ - if (intel->gen < 6) { - if_inst->bits3.if_else.jump_count = br * (else_inst - if_inst); - if_inst->bits3.if_else.pop_count = 0; - if_inst->bits3.if_else.pad0 = 0; - } else if (intel->gen == 6) { - if_inst->bits1.branch_gen6.jump_count = br * (else_inst - if_inst + 1); - } - - /* Patch ELSE -> ENDIF */ - if (intel->gen < 6) { - /* BRW_OPCODE_ELSE pre-gen6 should point just past the - * matching ENDIF. - */ - else_inst->bits3.if_else.jump_count = br*(endif_inst - else_inst + 1); - else_inst->bits3.if_else.pop_count = 1; - else_inst->bits3.if_else.pad0 = 0; - } else if (intel->gen == 6) { - /* BRW_OPCODE_ELSE on gen6 should point to the matching ENDIF. */ - else_inst->bits1.branch_gen6.jump_count = br*(endif_inst - else_inst); - } else { - /* The IF instruction's JIP should point just past the ELSE */ - if_inst->bits3.break_cont.jip = br * (else_inst - if_inst + 1); - /* The IF instruction's UIP and ELSE's JIP should point to ENDIF */ - if_inst->bits3.break_cont.uip = br * (endif_inst - if_inst); - else_inst->bits3.break_cont.jip = br * (endif_inst - else_inst); - } - } -} - -void -brw_ELSE(struct brw_compile *p) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *insn; - - insn = next_insn(p, BRW_OPCODE_ELSE); - - if (intel->gen < 6) { - brw_set_dest(p, insn, brw_ip_reg()); - brw_set_src0(p, insn, brw_ip_reg()); - brw_set_src1(p, insn, brw_imm_d(0x0)); - } else if (intel->gen == 6) { - brw_set_dest(p, insn, brw_imm_w(0)); - insn->bits1.branch_gen6.jump_count = 0; - brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - } else { - brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src1(p, insn, brw_imm_ud(0)); - insn->bits3.break_cont.jip = 0; - insn->bits3.break_cont.uip = 0; - } - - insn->header.compression_control = BRW_COMPRESSION_NONE; - insn->header.mask_control = BRW_MASK_ENABLE; - if (!p->single_program_flow) - insn->header.thread_control = BRW_THREAD_SWITCH; - - push_if_stack(p, insn); -} - -void -brw_ENDIF(struct brw_compile *p) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *insn = NULL; - struct brw_instruction *else_inst = NULL; - struct brw_instruction *if_inst = NULL; - struct brw_instruction *tmp; - bool emit_endif = true; - - /* In single program flow mode, we can express IF and ELSE instructions - * equivalently as ADD instructions that operate on IP. On platforms prior - * to Gen6, flow control instructions cause an implied thread switch, so - * this is a significant savings. - * - * However, on Gen6, writing to IP doesn't work in single program flow mode - * (see the SandyBridge PRM, Volume 4 part 2, p79: "When SPF is ON, IP may - * not be updated by non-flow control instructions."). And on later - * platforms, there is no significant benefit to converting control flow - * instructions to conditional ADDs. So we only do this trick on Gen4 and - * Gen5. - */ - if (intel->gen < 6 && p->single_program_flow) - emit_endif = false; - - /* - * A single next_insn() may change the base adress of instruction store - * memory(p->store), so call it first before referencing the instruction - * store pointer from an index - */ - if (emit_endif) - insn = next_insn(p, BRW_OPCODE_ENDIF); - - /* Pop the IF and (optional) ELSE instructions from the stack */ - p->if_depth_in_loop[p->loop_stack_depth]--; - tmp = pop_if_stack(p); - if (tmp->header.opcode == BRW_OPCODE_ELSE) { - else_inst = tmp; - tmp = pop_if_stack(p); - } - if_inst = tmp; - - if (!emit_endif) { - /* ENDIF is useless; don't bother emitting it. */ - convert_IF_ELSE_to_ADD(p, if_inst, else_inst); - return; - } - - if (intel->gen < 6) { - brw_set_dest(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD)); - brw_set_src0(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD)); - brw_set_src1(p, insn, brw_imm_d(0x0)); - } else if (intel->gen == 6) { - brw_set_dest(p, insn, brw_imm_w(0)); - brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - } else { - brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src1(p, insn, brw_imm_ud(0)); - } - - insn->header.compression_control = BRW_COMPRESSION_NONE; - insn->header.mask_control = BRW_MASK_ENABLE; - insn->header.thread_control = BRW_THREAD_SWITCH; - - /* Also pop item off the stack in the endif instruction: */ - if (intel->gen < 6) { - insn->bits3.if_else.jump_count = 0; - insn->bits3.if_else.pop_count = 1; - insn->bits3.if_else.pad0 = 0; - } else if (intel->gen == 6) { - insn->bits1.branch_gen6.jump_count = 2; - } else { - insn->bits3.break_cont.jip = 2; - } - patch_IF_ELSE(p, if_inst, else_inst, insn); -} - -struct brw_instruction *brw_BREAK(struct brw_compile *p) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *insn; - - insn = next_insn(p, BRW_OPCODE_BREAK); - if (intel->gen >= 6) { - brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src1(p, insn, brw_imm_d(0x0)); - } else { - brw_set_dest(p, insn, brw_ip_reg()); - brw_set_src0(p, insn, brw_ip_reg()); - brw_set_src1(p, insn, brw_imm_d(0x0)); - insn->bits3.if_else.pad0 = 0; - insn->bits3.if_else.pop_count = p->if_depth_in_loop[p->loop_stack_depth]; - } - insn->header.compression_control = BRW_COMPRESSION_NONE; - insn->header.execution_size = BRW_EXECUTE_8; - - return insn; -} - -struct brw_instruction *gen6_CONT(struct brw_compile *p) -{ - struct brw_instruction *insn; - - insn = next_insn(p, BRW_OPCODE_CONTINUE); - brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_dest(p, insn, brw_ip_reg()); - brw_set_src0(p, insn, brw_ip_reg()); - brw_set_src1(p, insn, brw_imm_d(0x0)); - - insn->header.compression_control = BRW_COMPRESSION_NONE; - insn->header.execution_size = BRW_EXECUTE_8; - return insn; -} - -struct brw_instruction *brw_CONT(struct brw_compile *p) -{ - struct brw_instruction *insn; - insn = next_insn(p, BRW_OPCODE_CONTINUE); - brw_set_dest(p, insn, brw_ip_reg()); - brw_set_src0(p, insn, brw_ip_reg()); - brw_set_src1(p, insn, brw_imm_d(0x0)); - insn->header.compression_control = BRW_COMPRESSION_NONE; - insn->header.execution_size = BRW_EXECUTE_8; - /* insn->header.mask_control = BRW_MASK_DISABLE; */ - insn->bits3.if_else.pad0 = 0; - insn->bits3.if_else.pop_count = p->if_depth_in_loop[p->loop_stack_depth]; - return insn; -} - -struct brw_instruction *gen6_HALT(struct brw_compile *p) -{ - struct brw_instruction *insn; - - insn = next_insn(p, BRW_OPCODE_HALT); - brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src1(p, insn, brw_imm_d(0x0)); /* UIP and JIP, updated later. */ - - if (p->compressed) { - insn->header.execution_size = BRW_EXECUTE_16; - } else { - insn->header.compression_control = BRW_COMPRESSION_NONE; - insn->header.execution_size = BRW_EXECUTE_8; - } - return insn; -} - -/* DO/WHILE loop: - * - * The DO/WHILE is just an unterminated loop -- break or continue are - * used for control within the loop. We have a few ways they can be - * done. - * - * For uniform control flow, the WHILE is just a jump, so ADD ip, ip, - * jip and no DO instruction. - * - * For non-uniform control flow pre-gen6, there's a DO instruction to - * push the mask, and a WHILE to jump back, and BREAK to get out and - * pop the mask. - * - * For gen6, there's no more mask stack, so no need for DO. WHILE - * just points back to the first instruction of the loop. - */ -struct brw_instruction *brw_DO(struct brw_compile *p, unsigned execute_size) -{ - struct intel_context *intel = &p->brw->intel; - - if (intel->gen >= 6 || p->single_program_flow) { - push_loop_stack(p, &p->store[p->nr_insn]); - return &p->store[p->nr_insn]; - } else { - struct brw_instruction *insn = next_insn(p, BRW_OPCODE_DO); - - push_loop_stack(p, insn); - - /* Override the defaults for this instruction: - */ - brw_set_dest(p, insn, brw_null_reg()); - brw_set_src0(p, insn, brw_null_reg()); - brw_set_src1(p, insn, brw_null_reg()); - - insn->header.compression_control = BRW_COMPRESSION_NONE; - insn->header.execution_size = execute_size; - insn->header.predicate_control = BRW_PREDICATE_NONE; - /* insn->header.mask_control = BRW_MASK_ENABLE; */ - /* insn->header.mask_control = BRW_MASK_DISABLE; */ - - return insn; - } -} - -/** - * For pre-gen6, we patch BREAK/CONT instructions to point at the WHILE - * instruction here. - * - * For gen6+, see brw_set_uip_jip(), which doesn't care so much about the loop - * nesting, since it can always just point to the end of the block/current loop. - */ -static void -brw_patch_break_cont(struct brw_compile *p, struct brw_instruction *while_inst) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *do_inst = get_inner_do_insn(p); - struct brw_instruction *inst; - int br = (intel->gen == 5) ? 2 : 1; - - for (inst = while_inst - 1; inst != do_inst; inst--) { - /* If the jump count is != 0, that means that this instruction has already - * been patched because it's part of a loop inside of the one we're - * patching. - */ - if (inst->header.opcode == BRW_OPCODE_BREAK && - inst->bits3.if_else.jump_count == 0) { - inst->bits3.if_else.jump_count = br * ((while_inst - inst) + 1); - } else if (inst->header.opcode == BRW_OPCODE_CONTINUE && - inst->bits3.if_else.jump_count == 0) { - inst->bits3.if_else.jump_count = br * (while_inst - inst); - } - } -} - -struct brw_instruction *brw_WHILE(struct brw_compile *p) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *insn, *do_insn; - unsigned br = 1; - - if (intel->gen >= 5) - br = 2; - - if (intel->gen >= 7) { - insn = next_insn(p, BRW_OPCODE_WHILE); - do_insn = get_inner_do_insn(p); - - brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src1(p, insn, brw_imm_ud(0)); - insn->bits3.break_cont.jip = br * (do_insn - insn); - - insn->header.execution_size = BRW_EXECUTE_8; - } else if (intel->gen == 6) { - insn = next_insn(p, BRW_OPCODE_WHILE); - do_insn = get_inner_do_insn(p); - - brw_set_dest(p, insn, brw_imm_w(0)); - insn->bits1.branch_gen6.jump_count = br * (do_insn - insn); - brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); - - insn->header.execution_size = BRW_EXECUTE_8; - } else { - if (p->single_program_flow) { - insn = next_insn(p, BRW_OPCODE_ADD); - do_insn = get_inner_do_insn(p); - - brw_set_dest(p, insn, brw_ip_reg()); - brw_set_src0(p, insn, brw_ip_reg()); - brw_set_src1(p, insn, brw_imm_d((do_insn - insn) * 16)); - insn->header.execution_size = BRW_EXECUTE_1; - } else { - insn = next_insn(p, BRW_OPCODE_WHILE); - do_insn = get_inner_do_insn(p); - - assert(do_insn->header.opcode == BRW_OPCODE_DO); - - brw_set_dest(p, insn, brw_ip_reg()); - brw_set_src0(p, insn, brw_ip_reg()); - brw_set_src1(p, insn, brw_imm_d(0)); - - insn->header.execution_size = do_insn->header.execution_size; - insn->bits3.if_else.jump_count = br * (do_insn - insn + 1); - insn->bits3.if_else.pop_count = 0; - insn->bits3.if_else.pad0 = 0; - - brw_patch_break_cont(p, insn); - } - } - insn->header.compression_control = BRW_COMPRESSION_NONE; - p->current->header.predicate_control = BRW_PREDICATE_NONE; - - p->loop_stack_depth--; - - return insn; -} - - -/* FORWARD JUMPS: - */ -void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *jmp_insn = &p->store[jmp_insn_idx]; - unsigned jmpi = 1; - - if (intel->gen >= 5) - jmpi = 2; - - assert(jmp_insn->header.opcode == BRW_OPCODE_JMPI); - assert(jmp_insn->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE); - - jmp_insn->bits3.ud = jmpi * (p->nr_insn - jmp_insn_idx - 1); -} - - - -/* To integrate with the above, it makes sense that the comparison - * instruction should populate the flag register. It might be simpler - * just to use the flag reg for most WM tasks? - */ -void brw_CMP(struct brw_compile *p, - struct brw_reg dest, - unsigned conditional, - struct brw_reg src0, - struct brw_reg src1) -{ - struct brw_instruction *insn = next_insn(p, BRW_OPCODE_CMP); - - insn->header.destreg__conditionalmod = conditional; - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src0); - brw_set_src1(p, insn, src1); - -/* guess_execution_size(insn, src0); */ - - - /* Make it so that future instructions will use the computed flag - * value until brw_set_predicate_control_flag_value() is called - * again. - */ - if (dest.file == BRW_ARCHITECTURE_REGISTER_FILE && - dest.nr == 0) { - p->current->header.predicate_control = BRW_PREDICATE_NORMAL; - p->flag_value = 0xff; - } -} - -/* Issue 'wait' instruction for n1, host could program MMIO - to wake up thread. */ -void brw_WAIT (struct brw_compile *p) -{ - struct brw_instruction *insn = next_insn(p, BRW_OPCODE_WAIT); - struct brw_reg src = brw_notification_1_reg(); - - brw_set_dest(p, insn, src); - brw_set_src0(p, insn, src); - brw_set_src1(p, insn, brw_null_reg()); - insn->header.execution_size = 0; /* must */ - insn->header.predicate_control = 0; - insn->header.compression_control = 0; -} - - -/*********************************************************************** - * Helpers for the various SEND message types: - */ - -/** Extended math function, float[8]. - */ -void brw_math( struct brw_compile *p, - struct brw_reg dest, - unsigned function, - unsigned msg_reg_nr, - struct brw_reg src, - unsigned data_type, - unsigned precision ) -{ - struct intel_context *intel = &p->brw->intel; - - if (intel->gen >= 6) { - struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); - - assert(dest.file == BRW_GENERAL_REGISTER_FILE); - assert(src.file == BRW_GENERAL_REGISTER_FILE); - - assert(dest.hstride == BRW_HORIZONTAL_STRIDE_1); - if (intel->gen == 6) - assert(src.hstride == BRW_HORIZONTAL_STRIDE_1); - - /* Source modifiers are ignored for extended math instructions on Gen6. */ - if (intel->gen == 6) { - assert(!src.negate); - assert(!src.abs); - } - - if (function == BRW_MATH_FUNCTION_INT_DIV_QUOTIENT || - function == BRW_MATH_FUNCTION_INT_DIV_REMAINDER || - function == BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER) { - assert(src.type != BRW_REGISTER_TYPE_F); - } else { - assert(src.type == BRW_REGISTER_TYPE_F); - } - - /* Math is the same ISA format as other opcodes, except that CondModifier - * becomes FC[3:0] and ThreadCtrl becomes FC[5:4]. - */ - insn->header.destreg__conditionalmod = function; - - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src); - brw_set_src1(p, insn, brw_null_reg()); - } else { - struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); - - /* Example code doesn't set predicate_control for send - * instructions. - */ - insn->header.predicate_control = 0; - insn->header.destreg__conditionalmod = msg_reg_nr; - - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src); - brw_set_math_message(p, - insn, - function, - src.type == BRW_REGISTER_TYPE_D, - precision, - data_type); - } -} - -/** Extended math function, float[8]. - */ -void brw_math2(struct brw_compile *p, - struct brw_reg dest, - unsigned function, - struct brw_reg src0, - struct brw_reg src1) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); - - assert(intel->gen >= 6); - (void) intel; - - - assert(dest.file == BRW_GENERAL_REGISTER_FILE); - assert(src0.file == BRW_GENERAL_REGISTER_FILE); - assert(src1.file == BRW_GENERAL_REGISTER_FILE); - - assert(dest.hstride == BRW_HORIZONTAL_STRIDE_1); - if (intel->gen == 6) { - assert(src0.hstride == BRW_HORIZONTAL_STRIDE_1); - assert(src1.hstride == BRW_HORIZONTAL_STRIDE_1); - } - - if (function == BRW_MATH_FUNCTION_INT_DIV_QUOTIENT || - function == BRW_MATH_FUNCTION_INT_DIV_REMAINDER || - function == BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER) { - assert(src0.type != BRW_REGISTER_TYPE_F); - assert(src1.type != BRW_REGISTER_TYPE_F); - } else { - assert(src0.type == BRW_REGISTER_TYPE_F); - assert(src1.type == BRW_REGISTER_TYPE_F); - } - - /* Source modifiers are ignored for extended math instructions on Gen6. */ - if (intel->gen == 6) { - assert(!src0.negate); - assert(!src0.abs); - assert(!src1.negate); - assert(!src1.abs); - } - - /* Math is the same ISA format as other opcodes, except that CondModifier - * becomes FC[3:0] and ThreadCtrl becomes FC[5:4]. - */ - insn->header.destreg__conditionalmod = function; - - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src0); - brw_set_src1(p, insn, src1); -} - - -/** - * Write a block of OWORDs (half a GRF each) from the scratch buffer, - * using a constant offset per channel. - * - * The offset must be aligned to oword size (16 bytes). Used for - * register spilling. - */ -void brw_oword_block_write_scratch(struct brw_compile *p, - struct brw_reg mrf, - int num_regs, - unsigned offset) -{ - struct intel_context *intel = &p->brw->intel; - uint32_t msg_control, msg_type; - int mlen; - - if (intel->gen >= 6) - offset /= 16; - - mrf = retype(mrf, BRW_REGISTER_TYPE_UD); - - if (num_regs == 1) { - msg_control = BRW_DATAPORT_OWORD_BLOCK_2_OWORDS; - mlen = 2; - } else { - msg_control = BRW_DATAPORT_OWORD_BLOCK_4_OWORDS; - mlen = 3; - } - - /* Set up the message header. This is g0, with g0.2 filled with - * the offset. We don't want to leave our offset around in g0 or - * it'll screw up texture samples, so set it up inside the message - * reg. - */ - { - brw_push_insn_state(p); - brw_set_mask_control(p, BRW_MASK_DISABLE); - brw_set_compression_control(p, BRW_COMPRESSION_NONE); - - brw_MOV(p, mrf, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); - - /* set message header global offset field (reg 0, element 2) */ - brw_MOV(p, - retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, - mrf.nr, - 2), BRW_REGISTER_TYPE_UD), - brw_imm_ud(offset)); - - brw_pop_insn_state(p); - } - - { - struct brw_reg dest; - struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); - int send_commit_msg; - struct brw_reg src_header = retype(brw_vec8_grf(0, 0), - BRW_REGISTER_TYPE_UW); - - if (insn->header.compression_control != BRW_COMPRESSION_NONE) { - insn->header.compression_control = BRW_COMPRESSION_NONE; - src_header = vec16(src_header); - } - assert(insn->header.predicate_control == BRW_PREDICATE_NONE); - insn->header.destreg__conditionalmod = mrf.nr; - - /* Until gen6, writes followed by reads from the same location - * are not guaranteed to be ordered unless write_commit is set. - * If set, then a no-op write is issued to the destination - * register to set a dependency, and a read from the destination - * can be used to ensure the ordering. - * - * For gen6, only writes between different threads need ordering - * protection. Our use of DP writes is all about register - * spilling within a thread. - */ - if (intel->gen >= 6) { - dest = retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW); - send_commit_msg = 0; - } else { - dest = src_header; - send_commit_msg = 1; - } - - brw_set_dest(p, insn, dest); - if (intel->gen >= 6) { - brw_set_src0(p, insn, mrf); - } else { - brw_set_src0(p, insn, brw_null_reg()); - } - - if (intel->gen >= 6) - msg_type = GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE; - else - msg_type = BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE; - - brw_set_dp_write_message(p, - insn, - 255, /* binding table index (255=stateless) */ - msg_control, - msg_type, - mlen, - true, /* header_present */ - 0, /* not a render target */ - send_commit_msg, /* response_length */ - 0, /* eot */ - send_commit_msg); - } -} - - -/** - * Read a block of owords (half a GRF each) from the scratch buffer - * using a constant index per channel. - * - * Offset must be aligned to oword size (16 bytes). Used for register - * spilling. - */ -void -brw_oword_block_read_scratch(struct brw_compile *p, - struct brw_reg dest, - struct brw_reg mrf, - int num_regs, - unsigned offset) -{ - struct intel_context *intel = &p->brw->intel; - uint32_t msg_control; - int rlen; - - if (intel->gen >= 6) - offset /= 16; - - mrf = retype(mrf, BRW_REGISTER_TYPE_UD); - dest = retype(dest, BRW_REGISTER_TYPE_UW); - - if (num_regs == 1) { - msg_control = BRW_DATAPORT_OWORD_BLOCK_2_OWORDS; - rlen = 1; - } else { - msg_control = BRW_DATAPORT_OWORD_BLOCK_4_OWORDS; - rlen = 2; - } - - { - brw_push_insn_state(p); - brw_set_compression_control(p, BRW_COMPRESSION_NONE); - brw_set_mask_control(p, BRW_MASK_DISABLE); - - brw_MOV(p, mrf, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); - - /* set message header global offset field (reg 0, element 2) */ - brw_MOV(p, - retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, - mrf.nr, - 2), BRW_REGISTER_TYPE_UD), - brw_imm_ud(offset)); - - brw_pop_insn_state(p); - } - - { - struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); - - assert(insn->header.predicate_control == 0); - insn->header.compression_control = BRW_COMPRESSION_NONE; - insn->header.destreg__conditionalmod = mrf.nr; - - brw_set_dest(p, insn, dest); /* UW? */ - if (intel->gen >= 6) { - brw_set_src0(p, insn, mrf); - } else { - brw_set_src0(p, insn, brw_null_reg()); - } - - brw_set_dp_read_message(p, - insn, - 255, /* binding table index (255=stateless) */ - msg_control, - BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, /* msg_type */ - BRW_DATAPORT_READ_TARGET_RENDER_CACHE, - 1, /* msg_length */ - true, /* header_present */ - rlen); - } -} - -/** - * Read a float[4] vector from the data port Data Cache (const buffer). - * Location (in buffer) should be a multiple of 16. - * Used for fetching shader constants. - */ -void brw_oword_block_read(struct brw_compile *p, - struct brw_reg dest, - struct brw_reg mrf, - uint32_t offset, - uint32_t bind_table_index) -{ - struct intel_context *intel = &p->brw->intel; - - /* On newer hardware, offset is in units of owords. */ - if (intel->gen >= 6) - offset /= 16; - - mrf = retype(mrf, BRW_REGISTER_TYPE_UD); - - brw_push_insn_state(p); - brw_set_predicate_control(p, BRW_PREDICATE_NONE); - brw_set_compression_control(p, BRW_COMPRESSION_NONE); - brw_set_mask_control(p, BRW_MASK_DISABLE); - - brw_MOV(p, mrf, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); - - /* set message header global offset field (reg 0, element 2) */ - brw_MOV(p, - retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, - mrf.nr, - 2), BRW_REGISTER_TYPE_UD), - brw_imm_ud(offset)); - - struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); - insn->header.destreg__conditionalmod = mrf.nr; - - /* cast dest to a uword[8] vector */ - dest = retype(vec8(dest), BRW_REGISTER_TYPE_UW); - - brw_set_dest(p, insn, dest); - if (intel->gen >= 6) { - brw_set_src0(p, insn, mrf); - } else { - brw_set_src0(p, insn, brw_null_reg()); - } - - brw_set_dp_read_message(p, - insn, - bind_table_index, - BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW, - BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, - BRW_DATAPORT_READ_TARGET_DATA_CACHE, - 1, /* msg_length */ - true, /* header_present */ - 1); /* response_length (1 reg, 2 owords!) */ - - brw_pop_insn_state(p); -} - - -void brw_fb_WRITE(struct brw_compile *p, - int dispatch_width, - unsigned msg_reg_nr, - struct brw_reg src0, - unsigned msg_control, - unsigned binding_table_index, - unsigned msg_length, - unsigned response_length, - bool eot, - bool header_present) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *insn; - unsigned msg_type; - struct brw_reg dest; - - if (dispatch_width == 16) - dest = retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW); - else - dest = retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW); - - if (intel->gen >= 6) { - insn = next_insn(p, BRW_OPCODE_SENDC); - } else { - insn = next_insn(p, BRW_OPCODE_SEND); - } - /* The execution mask is ignored for render target writes. */ - insn->header.predicate_control = 0; - insn->header.compression_control = BRW_COMPRESSION_NONE; - - if (intel->gen >= 6) { - /* headerless version, just submit color payload */ - src0 = brw_message_reg(msg_reg_nr); - - msg_type = GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE; - } else { - insn->header.destreg__conditionalmod = msg_reg_nr; - - msg_type = BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE; - } - - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src0); - brw_set_dp_write_message(p, - insn, - binding_table_index, - msg_control, - msg_type, - msg_length, - header_present, - eot, /* last render target write */ - response_length, - eot, - 0 /* send_commit_msg */); -} - - -/** - * Texture sample instruction. - * Note: the msg_type plus msg_length values determine exactly what kind - * of sampling operation is performed. See volume 4, page 161 of docs. - */ -void brw_SAMPLE(struct brw_compile *p, - struct brw_reg dest, - unsigned msg_reg_nr, - struct brw_reg src0, - unsigned binding_table_index, - unsigned sampler, - unsigned writemask, - unsigned msg_type, - unsigned response_length, - unsigned msg_length, - unsigned header_present, - unsigned simd_mode, - unsigned return_format) -{ - struct intel_context *intel = &p->brw->intel; - bool need_stall = 0; - - if (writemask == 0) { - /*printf("%s: zero writemask??\n", __FUNCTION__); */ - return; - } - - /* Hardware doesn't do destination dependency checking on send - * instructions properly. Add a workaround which generates the - * dependency by other means. In practice it seems like this bug - * only crops up for texture samples, and only where registers are - * written by the send and then written again later without being - * read in between. Luckily for us, we already track that - * information and use it to modify the writemask for the - * instruction, so that is a guide for whether a workaround is - * needed. - */ - if (writemask != BRW_WRITEMASK_XYZW) { - unsigned dst_offset = 0; - unsigned i, newmask = 0, len = 0; - - for (i = 0; i < 4; i++) { - if (writemask & (1<<i)) - break; - dst_offset += 2; - } - for (; i < 4; i++) { - if (!(writemask & (1<<i))) - break; - newmask |= 1<<i; - len++; - } - - if (newmask != writemask) { - need_stall = 1; - /* printf("need stall %x %x\n", newmask , writemask); */ - } - else { - bool dispatch_16 = false; - - struct brw_reg m1 = brw_message_reg(msg_reg_nr); - - guess_execution_size(p, p->current, dest); - if (p->current->header.execution_size == BRW_EXECUTE_16) - dispatch_16 = true; - - newmask = ~newmask & BRW_WRITEMASK_XYZW; - - brw_push_insn_state(p); - - brw_set_compression_control(p, BRW_COMPRESSION_NONE); - brw_set_mask_control(p, BRW_MASK_DISABLE); - - brw_MOV(p, retype(m1, BRW_REGISTER_TYPE_UD), - retype(brw_vec8_grf(0,0), BRW_REGISTER_TYPE_UD)); - brw_MOV(p, get_element_ud(m1, 2), brw_imm_ud(newmask << 12)); - - brw_pop_insn_state(p); - - src0 = retype(brw_null_reg(), BRW_REGISTER_TYPE_UW); - dest = offset(dest, dst_offset); - - /* For 16-wide dispatch, masked channels are skipped in the - * response. For 8-wide, masked channels still take up slots, - * and are just not written to. - */ - if (dispatch_16) - response_length = len * 2; - } - } - - { - struct brw_instruction *insn; - - gen6_resolve_implied_move(p, &src0, msg_reg_nr); - - insn = next_insn(p, BRW_OPCODE_SEND); - insn->header.predicate_control = 0; /* XXX */ - insn->header.compression_control = BRW_COMPRESSION_NONE; - if (intel->gen < 6) - insn->header.destreg__conditionalmod = msg_reg_nr; - - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src0); - brw_set_sampler_message(p, insn, - binding_table_index, - sampler, - msg_type, - response_length, - msg_length, - header_present, - simd_mode, - return_format); - } - - if (need_stall) { - struct brw_reg reg = vec8(offset(dest, response_length-1)); - - /* mov (8) r9.0<1>:f r9.0<8;8,1>:f { Align1 } - */ - brw_push_insn_state(p); - brw_set_compression_control(p, BRW_COMPRESSION_NONE); - brw_MOV(p, retype(reg, BRW_REGISTER_TYPE_UD), - retype(reg, BRW_REGISTER_TYPE_UD)); - brw_pop_insn_state(p); - } - -} - -/* All these variables are pretty confusing - we might be better off - * using bitmasks and macros for this, in the old style. Or perhaps - * just having the caller instantiate the fields in dword3 itself. - */ -void brw_urb_WRITE(struct brw_compile *p, - struct brw_reg dest, - unsigned msg_reg_nr, - struct brw_reg src0, - bool allocate, - bool used, - unsigned msg_length, - unsigned response_length, - bool eot, - bool writes_complete, - unsigned offset, - unsigned swizzle) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *insn; - - gen6_resolve_implied_move(p, &src0, msg_reg_nr); - - if (intel->gen == 7) { - /* Enable Channel Masks in the URB_WRITE_HWORD message header */ - brw_push_insn_state(p); - brw_set_access_mode(p, BRW_ALIGN_1); - brw_OR(p, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, msg_reg_nr, 5), - BRW_REGISTER_TYPE_UD), - retype(brw_vec1_grf(0, 5), BRW_REGISTER_TYPE_UD), - brw_imm_ud(0xff00)); - brw_pop_insn_state(p); - } - - insn = next_insn(p, BRW_OPCODE_SEND); - - assert(msg_length < BRW_MAX_MRF); - - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src0); - brw_set_src1(p, insn, brw_imm_d(0)); - - if (intel->gen < 6) - insn->header.destreg__conditionalmod = msg_reg_nr; - - brw_set_urb_message(p, - insn, - allocate, - used, - msg_length, - response_length, - eot, - writes_complete, - offset, - swizzle); -} - -static int -next_ip(struct brw_compile *p, int ip) -{ - struct brw_instruction *insn = (void *)p->store + ip; - - if (insn->header.cmpt_control) - return ip + 8; - else - return ip + 16; -} - -static int -brw_find_next_block_end(struct brw_compile *p, int start) -{ - int ip; - void *store = p->store; - - for (ip = next_ip(p, start); ip < p->next_insn_offset; ip = next_ip(p, ip)) { - struct brw_instruction *insn = store + ip; - - switch (insn->header.opcode) { - case BRW_OPCODE_ENDIF: - case BRW_OPCODE_ELSE: - case BRW_OPCODE_WHILE: - case BRW_OPCODE_HALT: - return ip; - } - } - - return 0; -} - -/* There is no DO instruction on gen6, so to find the end of the loop - * we have to see if the loop is jumping back before our start - * instruction. - */ -static int -brw_find_loop_end(struct brw_compile *p, int start) -{ - struct intel_context *intel = &p->brw->intel; - int ip; - int scale = 8; - void *store = p->store; - - /* Always start after the instruction (such as a WHILE) we're trying to fix - * up. - */ - for (ip = next_ip(p, start); ip < p->next_insn_offset; ip = next_ip(p, ip)) { - struct brw_instruction *insn = store + ip; - - if (insn->header.opcode == BRW_OPCODE_WHILE) { - int jip = intel->gen == 6 ? insn->bits1.branch_gen6.jump_count - : insn->bits3.break_cont.jip; - if (ip + jip * scale <= start) - return ip; - } - } - assert(!"not reached"); - return start; -} - -/* After program generation, go back and update the UIP and JIP of - * BREAK, CONT, and HALT instructions to their correct locations. - */ -void -brw_set_uip_jip(struct brw_compile *p) -{ - struct intel_context *intel = &p->brw->intel; - int ip; - int scale = 8; - void *store = p->store; - - if (intel->gen < 6) - return; - - for (ip = 0; ip < p->next_insn_offset; ip = next_ip(p, ip)) { - struct brw_instruction *insn = store + ip; - - if (insn->header.cmpt_control) { - /* Fixups for compacted BREAK/CONTINUE not supported yet. */ - assert(insn->header.opcode != BRW_OPCODE_BREAK && - insn->header.opcode != BRW_OPCODE_CONTINUE && - insn->header.opcode != BRW_OPCODE_HALT); - continue; - } - - int block_end_ip = brw_find_next_block_end(p, ip); - switch (insn->header.opcode) { - case BRW_OPCODE_BREAK: - assert(block_end_ip != 0); - insn->bits3.break_cont.jip = (block_end_ip - ip) / scale; - /* Gen7 UIP points to WHILE; Gen6 points just after it */ - insn->bits3.break_cont.uip = - (brw_find_loop_end(p, ip) - ip + - (intel->gen == 6 ? 16 : 0)) / scale; - break; - case BRW_OPCODE_CONTINUE: - assert(block_end_ip != 0); - insn->bits3.break_cont.jip = (block_end_ip - ip) / scale; - insn->bits3.break_cont.uip = - (brw_find_loop_end(p, ip) - ip) / scale; - - assert(insn->bits3.break_cont.uip != 0); - assert(insn->bits3.break_cont.jip != 0); - break; - - case BRW_OPCODE_ENDIF: - if (block_end_ip == 0) - insn->bits3.break_cont.jip = 2; - else - insn->bits3.break_cont.jip = (block_end_ip - ip) / scale; - break; - - case BRW_OPCODE_HALT: - /* From the Sandy Bridge PRM (volume 4, part 2, section 8.3.19): - * - * "In case of the halt instruction not inside any conditional - * code block, the value of <JIP> and <UIP> should be the - * same. In case of the halt instruction inside conditional code - * block, the <UIP> should be the end of the program, and the - * <JIP> should be end of the most inner conditional code block." - * - * The uip will have already been set by whoever set up the - * instruction. - */ - if (block_end_ip == 0) { - insn->bits3.break_cont.jip = insn->bits3.break_cont.uip; - } else { - insn->bits3.break_cont.jip = (block_end_ip - ip) / scale; - } - assert(insn->bits3.break_cont.uip != 0); - assert(insn->bits3.break_cont.jip != 0); - break; - } - } -} - -void brw_ff_sync(struct brw_compile *p, - struct brw_reg dest, - unsigned msg_reg_nr, - struct brw_reg src0, - bool allocate, - unsigned response_length, - bool eot) -{ - struct intel_context *intel = &p->brw->intel; - struct brw_instruction *insn; - - gen6_resolve_implied_move(p, &src0, msg_reg_nr); - - insn = next_insn(p, BRW_OPCODE_SEND); - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src0); - brw_set_src1(p, insn, brw_imm_d(0)); - - if (intel->gen < 6) - insn->header.destreg__conditionalmod = msg_reg_nr; - - brw_set_ff_sync_message(p, - insn, - allocate, - response_length, - eot); -} - -/** - * Emit the SEND instruction necessary to generate stream output data on Gen6 - * (for transform feedback). - * - * If send_commit_msg is true, this is the last piece of stream output data - * from this thread, so send the data as a committed write. According to the - * Sandy Bridge PRM (volume 2 part 1, section 4.5.1): - * - * "Prior to End of Thread with a URB_WRITE, the kernel must ensure all - * writes are complete by sending the final write as a committed write." - */ -void -brw_svb_write(struct brw_compile *p, - struct brw_reg dest, - unsigned msg_reg_nr, - struct brw_reg src0, - unsigned binding_table_index, - bool send_commit_msg) -{ - struct brw_instruction *insn; - - gen6_resolve_implied_move(p, &src0, msg_reg_nr); - - insn = next_insn(p, BRW_OPCODE_SEND); - brw_set_dest(p, insn, dest); - brw_set_src0(p, insn, src0); - brw_set_src1(p, insn, brw_imm_d(0)); - brw_set_dp_write_message(p, insn, - binding_table_index, - 0, /* msg_control: ignored */ - GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE, - 1, /* msg_length */ - true, /* header_present */ - 0, /* last_render_target: ignored */ - send_commit_msg, /* response_length */ - 0, /* end_of_thread */ - send_commit_msg); /* send_commit_msg */ -} - -/** - * This instruction is generated as a single-channel align1 instruction by - * both the VS and FS stages when using INTEL_DEBUG=shader_time. - * - * We can't use the typed atomic op in the FS because that has the execution - * mask ANDed with the pixel mask, but we just want to write the one dword for - * all the pixels. - * - * We don't use the SIMD4x2 atomic ops in the VS because want to just write - * one u32. So we use the same untyped atomic write message as the pixel - * shader. - * - * The untyped atomic operation requires a BUFFER surface type with RAW - * format, and is only accessible through the legacy DATA_CACHE dataport - * messages. - */ -void brw_shader_time_add(struct brw_compile *p, - int base_mrf, - uint32_t surf_index) -{ - struct intel_context *intel = &p->brw->intel; - assert(intel->gen >= 7); - - brw_push_insn_state(p); - brw_set_access_mode(p, BRW_ALIGN_1); - brw_set_mask_control(p, BRW_MASK_DISABLE); - struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND); - brw_pop_insn_state(p); - - /* We use brw_vec1_reg and unmasked because we want to increment the given - * offset only once. - */ - brw_set_dest(p, send, brw_vec1_reg(BRW_ARCHITECTURE_REGISTER_FILE, - BRW_ARF_NULL, 0)); - brw_set_src0(p, send, brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, - base_mrf, 0)); - - bool header_present = false; - bool eot = false; - uint32_t mlen = 2; /* offset, value */ - uint32_t rlen = 0; - brw_set_message_descriptor(p, send, - GEN7_SFID_DATAPORT_DATA_CACHE, - mlen, rlen, header_present, eot); - - send->bits3.ud |= 6 << 14; /* untyped atomic op */ - send->bits3.ud |= 0 << 13; /* no return data */ - send->bits3.ud |= 1 << 12; /* SIMD8 mode */ - send->bits3.ud |= BRW_AOP_ADD << 8; - send->bits3.ud |= surf_index << 0; -} diff --git a/assembler/brw_eu_util.c b/assembler/brw_eu_util.c deleted file mode 100644 index f9126abf..00000000 --- a/assembler/brw_eu_util.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - - -#include "brw_context.h" -#include "brw_defines.h" -#include "brw_eu.h" - - -void brw_math_invert( struct brw_compile *p, - struct brw_reg dst, - struct brw_reg src) -{ - brw_math( p, - dst, - BRW_MATH_FUNCTION_INV, - 0, - src, - BRW_MATH_PRECISION_FULL, - BRW_MATH_DATA_VECTOR ); -} - - - -void brw_copy4(struct brw_compile *p, - struct brw_reg dst, - struct brw_reg src, - unsigned count) -{ - unsigned i; - - dst = vec4(dst); - src = vec4(src); - - for (i = 0; i < count; i++) - { - unsigned delta = i*32; - brw_MOV(p, byte_offset(dst, delta), byte_offset(src, delta)); - brw_MOV(p, byte_offset(dst, delta+16), byte_offset(src, delta+16)); - } -} - - -void brw_copy8(struct brw_compile *p, - struct brw_reg dst, - struct brw_reg src, - unsigned count) -{ - unsigned i; - - dst = vec8(dst); - src = vec8(src); - - for (i = 0; i < count; i++) - { - unsigned delta = i*32; - brw_MOV(p, byte_offset(dst, delta), byte_offset(src, delta)); - } -} - - -void brw_copy_indirect_to_indirect(struct brw_compile *p, - struct brw_indirect dst_ptr, - struct brw_indirect src_ptr, - unsigned count) -{ - unsigned i; - - for (i = 0; i < count; i++) - { - unsigned delta = i*32; - brw_MOV(p, deref_4f(dst_ptr, delta), deref_4f(src_ptr, delta)); - brw_MOV(p, deref_4f(dst_ptr, delta+16), deref_4f(src_ptr, delta+16)); - } -} - - -void brw_copy_from_indirect(struct brw_compile *p, - struct brw_reg dst, - struct brw_indirect ptr, - unsigned count) -{ - unsigned i; - - dst = vec4(dst); - - for (i = 0; i < count; i++) - { - unsigned delta = i*32; - brw_MOV(p, byte_offset(dst, delta), deref_4f(ptr, delta)); - brw_MOV(p, byte_offset(dst, delta+16), deref_4f(ptr, delta+16)); - } -} - - - - diff --git a/assembler/brw_reg.h b/assembler/brw_reg.h deleted file mode 100644 index f2259156..00000000 --- a/assembler/brw_reg.h +++ /dev/null @@ -1,808 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - -/** @file brw_reg.h - * - * This file defines struct brw_reg, which is our representation for EU - * registers. They're not a hardware specific format, just an abstraction - * that intends to capture the full flexibility of the hardware registers. - * - * The brw_eu_emit.c layer's brw_set_dest/brw_set_src[01] functions encode - * the abstract brw_reg type into the actual hardware instruction encoding. - */ - -#ifndef BRW_REG_H -#define BRW_REG_H - -#include <stdbool.h> -#include <assert.h> -#include "brw_defines.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** Number of general purpose registers (VS, WM, etc) */ -#define BRW_MAX_GRF 128 - -/** - * First GRF used for the MRF hack. - * - * On gen7, MRFs are no longer used, and contiguous GRFs are used instead. We - * haven't converted our compiler to be aware of this, so it asks for MRFs and - * brw_eu_emit.c quietly converts them to be accesses of the top GRFs. The - * register allocators have to be careful of this to avoid corrupting the "MRF"s - * with actual GRF allocations. - */ -#define GEN7_MRF_HACK_START 112 - -/** Number of message register file registers */ -#define BRW_MAX_MRF 16 - -#define BRW_SWIZZLE4(a,b,c,d) (((a)<<0) | ((b)<<2) | ((c)<<4) | ((d)<<6)) -#define BRW_GET_SWZ(swz, idx) (((swz) >> ((idx)*2)) & 0x3) - -#define BRW_SWIZZLE_NOOP BRW_SWIZZLE4(0,1,2,3) -#define BRW_SWIZZLE_XYZW BRW_SWIZZLE4(0,1,2,3) -#define BRW_SWIZZLE_XXXX BRW_SWIZZLE4(0,0,0,0) -#define BRW_SWIZZLE_YYYY BRW_SWIZZLE4(1,1,1,1) -#define BRW_SWIZZLE_ZZZZ BRW_SWIZZLE4(2,2,2,2) -#define BRW_SWIZZLE_WWWW BRW_SWIZZLE4(3,3,3,3) -#define BRW_SWIZZLE_XYXY BRW_SWIZZLE4(0,1,0,1) - -static inline bool -brw_is_single_value_swizzle(int swiz) -{ - return (swiz == BRW_SWIZZLE_XXXX || - swiz == BRW_SWIZZLE_YYYY || - swiz == BRW_SWIZZLE_ZZZZ || - swiz == BRW_SWIZZLE_WWWW); -} - -#define BRW_WRITEMASK_X 0x1 -#define BRW_WRITEMASK_Y 0x2 -#define BRW_WRITEMASK_Z 0x4 -#define BRW_WRITEMASK_W 0x8 - -#define BRW_WRITEMASK_XY (BRW_WRITEMASK_X | BRW_WRITEMASK_Y) -#define BRW_WRITEMASK_XZ (BRW_WRITEMASK_X | BRW_WRITEMASK_Z) -#define BRW_WRITEMASK_XW (BRW_WRITEMASK_X | BRW_WRITEMASK_W) -#define BRW_WRITEMASK_YW (BRW_WRITEMASK_Y | BRW_WRITEMASK_W) -#define BRW_WRITEMASK_ZW (BRW_WRITEMASK_Z | BRW_WRITEMASK_W) -#define BRW_WRITEMASK_XYZ (BRW_WRITEMASK_X | BRW_WRITEMASK_Y | BRW_WRITEMASK_Z) -#define BRW_WRITEMASK_XYZW (BRW_WRITEMASK_X | BRW_WRITEMASK_Y | \ - BRW_WRITEMASK_Z | BRW_WRITEMASK_W) - -#define REG_SIZE (8*4) - -/* These aren't hardware structs, just something useful for us to pass around: - * - * Align1 operation has a lot of control over input ranges. Used in - * WM programs to implement shaders decomposed into "channel serial" - * or "structure of array" form: - */ -struct brw_reg { - unsigned type:4; - unsigned file:2; - unsigned nr:8; - unsigned subnr:5; /* :1 in align16 */ - unsigned negate:1; /* source only */ - unsigned abs:1; /* source only */ - unsigned vstride:4; /* source only */ - unsigned width:3; /* src only, align1 only */ - unsigned hstride:2; /* align1 only */ - unsigned address_mode:1; /* relative addressing, hopefully! */ - unsigned pad0:1; - - union { - struct { - unsigned swizzle:8; /* src only, align16 only */ - unsigned writemask:4; /* dest only, align16 only */ - int indirect_offset:10; /* relative addressing offset */ - unsigned pad1:10; /* two dwords total */ - } bits; - - float f; - int d; - unsigned ud; - } dw1; -}; - - -struct brw_indirect { - unsigned addr_subnr:4; - int addr_offset:10; - unsigned pad:18; -}; - - -static inline int -type_sz(unsigned type) -{ - switch(type) { - case BRW_REGISTER_TYPE_UD: - case BRW_REGISTER_TYPE_D: - case BRW_REGISTER_TYPE_F: - return 4; - case BRW_REGISTER_TYPE_HF: - case BRW_REGISTER_TYPE_UW: - case BRW_REGISTER_TYPE_W: - return 2; - case BRW_REGISTER_TYPE_UB: - case BRW_REGISTER_TYPE_B: - return 1; - default: - return 0; - } -} - -/** - * Construct a brw_reg. - * \param file one of the BRW_x_REGISTER_FILE values - * \param nr register number/index - * \param subnr register sub number - * \param type one of BRW_REGISTER_TYPE_x - * \param vstride one of BRW_VERTICAL_STRIDE_x - * \param width one of BRW_WIDTH_x - * \param hstride one of BRW_HORIZONTAL_STRIDE_x - * \param swizzle one of BRW_SWIZZLE_x - * \param writemask BRW_WRITEMASK_X/Y/Z/W bitfield - */ -static inline struct brw_reg -brw_reg(unsigned file, - unsigned nr, - unsigned subnr, - unsigned type, - unsigned vstride, - unsigned width, - unsigned hstride, - unsigned swizzle, - unsigned writemask) -{ - struct brw_reg reg; - if (file == BRW_GENERAL_REGISTER_FILE) - assert(nr < BRW_MAX_GRF); - else if (file == BRW_MESSAGE_REGISTER_FILE) - assert((nr & ~(1 << 7)) < BRW_MAX_MRF); - else if (file == BRW_ARCHITECTURE_REGISTER_FILE) - assert(nr <= BRW_ARF_TIMESTAMP); - - reg.type = type; - reg.file = file; - reg.nr = nr; - reg.subnr = subnr * type_sz(type); - reg.negate = 0; - reg.abs = 0; - reg.vstride = vstride; - reg.width = width; - reg.hstride = hstride; - reg.address_mode = BRW_ADDRESS_DIRECT; - reg.pad0 = 0; - - /* Could do better: If the reg is r5.3<0;1,0>, we probably want to - * set swizzle and writemask to W, as the lower bits of subnr will - * be lost when converted to align16. This is probably too much to - * keep track of as you'd want it adjusted by suboffset(), etc. - * Perhaps fix up when converting to align16? - */ - reg.dw1.bits.swizzle = swizzle; - reg.dw1.bits.writemask = writemask; - reg.dw1.bits.indirect_offset = 0; - reg.dw1.bits.pad1 = 0; - return reg; -} - -/** Construct float[16] register */ -static inline struct brw_reg -brw_vec16_reg(unsigned file, unsigned nr, unsigned subnr) -{ - return brw_reg(file, - nr, - subnr, - BRW_REGISTER_TYPE_F, - BRW_VERTICAL_STRIDE_16, - BRW_WIDTH_16, - BRW_HORIZONTAL_STRIDE_1, - BRW_SWIZZLE_XYZW, - BRW_WRITEMASK_XYZW); -} - -/** Construct float[8] register */ -static inline struct brw_reg -brw_vec8_reg(unsigned file, unsigned nr, unsigned subnr) -{ - return brw_reg(file, - nr, - subnr, - BRW_REGISTER_TYPE_F, - BRW_VERTICAL_STRIDE_8, - BRW_WIDTH_8, - BRW_HORIZONTAL_STRIDE_1, - BRW_SWIZZLE_XYZW, - BRW_WRITEMASK_XYZW); -} - -/** Construct float[4] register */ -static inline struct brw_reg -brw_vec4_reg(unsigned file, unsigned nr, unsigned subnr) -{ - return brw_reg(file, - nr, - subnr, - BRW_REGISTER_TYPE_F, - BRW_VERTICAL_STRIDE_4, - BRW_WIDTH_4, - BRW_HORIZONTAL_STRIDE_1, - BRW_SWIZZLE_XYZW, - BRW_WRITEMASK_XYZW); -} - -/** Construct float[2] register */ -static inline struct brw_reg -brw_vec2_reg(unsigned file, unsigned nr, unsigned subnr) -{ - return brw_reg(file, - nr, - subnr, - BRW_REGISTER_TYPE_F, - BRW_VERTICAL_STRIDE_2, - BRW_WIDTH_2, - BRW_HORIZONTAL_STRIDE_1, - BRW_SWIZZLE_XYXY, - BRW_WRITEMASK_XY); -} - -/** Construct float[1] register */ -static inline struct brw_reg -brw_vec1_reg(unsigned file, unsigned nr, unsigned subnr) -{ - return brw_reg(file, - nr, - subnr, - BRW_REGISTER_TYPE_F, - BRW_VERTICAL_STRIDE_0, - BRW_WIDTH_1, - BRW_HORIZONTAL_STRIDE_0, - BRW_SWIZZLE_XXXX, - BRW_WRITEMASK_X); -} - - -static inline struct brw_reg -retype(struct brw_reg reg, unsigned type) -{ - reg.type = type; - return reg; -} - -static inline struct brw_reg -sechalf(struct brw_reg reg) -{ - if (reg.vstride) - reg.nr++; - return reg; -} - -static inline struct brw_reg -suboffset(struct brw_reg reg, unsigned delta) -{ - reg.subnr += delta * type_sz(reg.type); - return reg; -} - - -static inline struct brw_reg -offset(struct brw_reg reg, unsigned delta) -{ - reg.nr += delta; - return reg; -} - - -static inline struct brw_reg -byte_offset(struct brw_reg reg, unsigned bytes) -{ - unsigned newoffset = reg.nr * REG_SIZE + reg.subnr + bytes; - reg.nr = newoffset / REG_SIZE; - reg.subnr = newoffset % REG_SIZE; - return reg; -} - - -/** Construct unsigned word[16] register */ -static inline struct brw_reg -brw_uw16_reg(unsigned file, unsigned nr, unsigned subnr) -{ - return suboffset(retype(brw_vec16_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); -} - -/** Construct unsigned word[8] register */ -static inline struct brw_reg -brw_uw8_reg(unsigned file, unsigned nr, unsigned subnr) -{ - return suboffset(retype(brw_vec8_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); -} - -/** Construct unsigned word[1] register */ -static inline struct brw_reg -brw_uw1_reg(unsigned file, unsigned nr, unsigned subnr) -{ - return suboffset(retype(brw_vec1_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); -} - -static inline struct brw_reg -brw_imm_reg(unsigned type) -{ - return brw_reg(BRW_IMMEDIATE_VALUE, - 0, - 0, - type, - BRW_VERTICAL_STRIDE_0, - BRW_WIDTH_1, - BRW_HORIZONTAL_STRIDE_0, - 0, - 0); -} - -/** Construct float immediate register */ -static inline struct brw_reg -brw_imm_f(float f) -{ - struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_F); - imm.dw1.f = f; - return imm; -} - -/** Construct integer immediate register */ -static inline struct brw_reg -brw_imm_d(int d) -{ - struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_D); - imm.dw1.d = d; - return imm; -} - -/** Construct uint immediate register */ -static inline struct brw_reg -brw_imm_ud(unsigned ud) -{ - struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UD); - imm.dw1.ud = ud; - return imm; -} - -/** Construct ushort immediate register */ -static inline struct brw_reg -brw_imm_uw(uint16_t uw) -{ - struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UW); - imm.dw1.ud = uw | (uw << 16); - return imm; -} - -/** Construct short immediate register */ -static inline struct brw_reg -brw_imm_w(int16_t w) -{ - struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_W); - imm.dw1.d = w | (w << 16); - return imm; -} - -/* brw_imm_b and brw_imm_ub aren't supported by hardware - the type - * numbers alias with _V and _VF below: - */ - -/** Construct vector of eight signed half-byte values */ -static inline struct brw_reg -brw_imm_v(unsigned v) -{ - struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_V); - imm.vstride = BRW_VERTICAL_STRIDE_0; - imm.width = BRW_WIDTH_8; - imm.hstride = BRW_HORIZONTAL_STRIDE_1; - imm.dw1.ud = v; - return imm; -} - -/** Construct vector of four 8-bit float values */ -static inline struct brw_reg -brw_imm_vf(unsigned v) -{ - struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); - imm.vstride = BRW_VERTICAL_STRIDE_0; - imm.width = BRW_WIDTH_4; - imm.hstride = BRW_HORIZONTAL_STRIDE_1; - imm.dw1.ud = v; - return imm; -} - -#define VF_ZERO 0x0 -#define VF_ONE 0x30 -#define VF_NEG (1<<7) - -static inline struct brw_reg -brw_imm_vf4(unsigned v0, unsigned v1, unsigned v2, unsigned v3) -{ - struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); - imm.vstride = BRW_VERTICAL_STRIDE_0; - imm.width = BRW_WIDTH_4; - imm.hstride = BRW_HORIZONTAL_STRIDE_1; - imm.dw1.ud = ((v0 << 0) | (v1 << 8) | (v2 << 16) | (v3 << 24)); - return imm; -} - - -static inline struct brw_reg -brw_address(struct brw_reg reg) -{ - return brw_imm_uw(reg.nr * REG_SIZE + reg.subnr); -} - -/** Construct float[1] general-purpose register */ -static inline struct brw_reg -brw_vec1_grf(unsigned nr, unsigned subnr) -{ - return brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); -} - -/** Construct float[2] general-purpose register */ -static inline struct brw_reg -brw_vec2_grf(unsigned nr, unsigned subnr) -{ - return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); -} - -/** Construct float[4] general-purpose register */ -static inline struct brw_reg -brw_vec4_grf(unsigned nr, unsigned subnr) -{ - return brw_vec4_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); -} - -/** Construct float[8] general-purpose register */ -static inline struct brw_reg -brw_vec8_grf(unsigned nr, unsigned subnr) -{ - return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); -} - - -static inline struct brw_reg -brw_uw8_grf(unsigned nr, unsigned subnr) -{ - return brw_uw8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); -} - -static inline struct brw_reg -brw_uw16_grf(unsigned nr, unsigned subnr) -{ - return brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); -} - - -/** Construct null register (usually used for setting condition codes) */ -static inline struct brw_reg -brw_null_reg(void) -{ - return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_NULL, 0); -} - -static inline struct brw_reg -brw_address_reg(unsigned subnr) -{ - return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ADDRESS, subnr); -} - -/* If/else instructions break in align16 mode if writemask & swizzle - * aren't xyzw. This goes against the convention for other scalar - * regs: - */ -static inline struct brw_reg -brw_ip_reg(void) -{ - return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, - BRW_ARF_IP, - 0, - BRW_REGISTER_TYPE_UD, - BRW_VERTICAL_STRIDE_4, /* ? */ - BRW_WIDTH_1, - BRW_HORIZONTAL_STRIDE_0, - BRW_SWIZZLE_XYZW, /* NOTE! */ - BRW_WRITEMASK_XYZW); /* NOTE! */ -} - -static inline struct brw_reg -brw_acc_reg(void) -{ - return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ACCUMULATOR, 0); -} - -static inline struct brw_reg -brw_notification_1_reg(void) -{ - - return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, - BRW_ARF_NOTIFICATION_COUNT, - 1, - BRW_REGISTER_TYPE_UD, - BRW_VERTICAL_STRIDE_0, - BRW_WIDTH_1, - BRW_HORIZONTAL_STRIDE_0, - BRW_SWIZZLE_XXXX, - BRW_WRITEMASK_X); -} - - -static inline struct brw_reg -brw_flag_reg(int reg, int subreg) -{ - return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, - BRW_ARF_FLAG + reg, subreg); -} - - -static inline struct brw_reg -brw_mask_reg(unsigned subnr) -{ - return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_MASK, subnr); -} - -static inline struct brw_reg -brw_message_reg(unsigned nr) -{ - assert((nr & ~(1 << 7)) < BRW_MAX_MRF); - return brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, nr, 0); -} - - -/* This is almost always called with a numeric constant argument, so - * make things easy to evaluate at compile time: - */ -static inline unsigned cvt(unsigned val) -{ - switch (val) { - case 0: return 0; - case 1: return 1; - case 2: return 2; - case 4: return 3; - case 8: return 4; - case 16: return 5; - case 32: return 6; - } - return 0; -} - -static inline struct brw_reg -stride(struct brw_reg reg, unsigned vstride, unsigned width, unsigned hstride) -{ - reg.vstride = cvt(vstride); - reg.width = cvt(width) - 1; - reg.hstride = cvt(hstride); - return reg; -} - - -static inline struct brw_reg -vec16(struct brw_reg reg) -{ - return stride(reg, 16,16,1); -} - -static inline struct brw_reg -vec8(struct brw_reg reg) -{ - return stride(reg, 8,8,1); -} - -static inline struct brw_reg -vec4(struct brw_reg reg) -{ - return stride(reg, 4,4,1); -} - -static inline struct brw_reg -vec2(struct brw_reg reg) -{ - return stride(reg, 2,2,1); -} - -static inline struct brw_reg -vec1(struct brw_reg reg) -{ - return stride(reg, 0,1,0); -} - - -static inline struct brw_reg -get_element(struct brw_reg reg, unsigned elt) -{ - return vec1(suboffset(reg, elt)); -} - -static inline struct brw_reg -get_element_ud(struct brw_reg reg, unsigned elt) -{ - return vec1(suboffset(retype(reg, BRW_REGISTER_TYPE_UD), elt)); -} - -static inline struct brw_reg -get_element_d(struct brw_reg reg, unsigned elt) -{ - return vec1(suboffset(retype(reg, BRW_REGISTER_TYPE_D), elt)); -} - - -static inline struct brw_reg -brw_swizzle(struct brw_reg reg, unsigned x, unsigned y, unsigned z, unsigned w) -{ - assert(reg.file != BRW_IMMEDIATE_VALUE); - - reg.dw1.bits.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(reg.dw1.bits.swizzle, x), - BRW_GET_SWZ(reg.dw1.bits.swizzle, y), - BRW_GET_SWZ(reg.dw1.bits.swizzle, z), - BRW_GET_SWZ(reg.dw1.bits.swizzle, w)); - return reg; -} - - -static inline struct brw_reg -brw_swizzle1(struct brw_reg reg, unsigned x) -{ - return brw_swizzle(reg, x, x, x, x); -} - -static inline struct brw_reg -brw_writemask(struct brw_reg reg, unsigned mask) -{ - assert(reg.file != BRW_IMMEDIATE_VALUE); - reg.dw1.bits.writemask &= mask; - return reg; -} - -static inline struct brw_reg -brw_set_writemask(struct brw_reg reg, unsigned mask) -{ - assert(reg.file != BRW_IMMEDIATE_VALUE); - reg.dw1.bits.writemask = mask; - return reg; -} - -static inline struct brw_reg -negate(struct brw_reg reg) -{ - reg.negate ^= 1; - return reg; -} - -static inline struct brw_reg -brw_abs(struct brw_reg reg) -{ - reg.abs = 1; - reg.negate = 0; - return reg; -} - -/************************************************************************/ - -static inline struct brw_reg -brw_vec4_indirect(unsigned subnr, int offset) -{ - struct brw_reg reg = brw_vec4_grf(0, 0); - reg.subnr = subnr; - reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; - reg.dw1.bits.indirect_offset = offset; - return reg; -} - -static inline struct brw_reg -brw_vec1_indirect(unsigned subnr, int offset) -{ - struct brw_reg reg = brw_vec1_grf(0, 0); - reg.subnr = subnr; - reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; - reg.dw1.bits.indirect_offset = offset; - return reg; -} - -static inline struct brw_reg -deref_4f(struct brw_indirect ptr, int offset) -{ - return brw_vec4_indirect(ptr.addr_subnr, ptr.addr_offset + offset); -} - -static inline struct brw_reg -deref_1f(struct brw_indirect ptr, int offset) -{ - return brw_vec1_indirect(ptr.addr_subnr, ptr.addr_offset + offset); -} - -static inline struct brw_reg -deref_4b(struct brw_indirect ptr, int offset) -{ - return retype(deref_4f(ptr, offset), BRW_REGISTER_TYPE_B); -} - -static inline struct brw_reg -deref_1uw(struct brw_indirect ptr, int offset) -{ - return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_UW); -} - -static inline struct brw_reg -deref_1d(struct brw_indirect ptr, int offset) -{ - return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_D); -} - -static inline struct brw_reg -deref_1ud(struct brw_indirect ptr, int offset) -{ - return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_UD); -} - -static inline struct brw_reg -get_addr_reg(struct brw_indirect ptr) -{ - return brw_address_reg(ptr.addr_subnr); -} - -static inline struct brw_indirect -brw_indirect_offset(struct brw_indirect ptr, int offset) -{ - ptr.addr_offset += offset; - return ptr; -} - -static inline struct brw_indirect -brw_indirect(unsigned addr_subnr, int offset) -{ - struct brw_indirect ptr; - ptr.addr_subnr = addr_subnr; - ptr.addr_offset = offset; - ptr.pad = 0; - return ptr; -} - -/** Do two brw_regs refer to the same register? */ -static inline bool -brw_same_reg(struct brw_reg r1, struct brw_reg r2) -{ - return r1.file == r2.file && r1.nr == r2.nr; -} - -void brw_print_reg(struct brw_reg reg); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/assembler/brw_structs.h b/assembler/brw_structs.h deleted file mode 100644 index 8c2d2b9f..00000000 --- a/assembler/brw_structs.h +++ /dev/null @@ -1,1493 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - */ - - -#ifndef BRW_STRUCTS_H -#define BRW_STRUCTS_H - -#include <stdint.h> - -/* These seem to be passed around as function args, so it works out - * better to keep them as #defines: - */ -#define BRW_FLUSH_READ_CACHE 0x1 -#define BRW_FLUSH_STATE_CACHE 0x2 -#define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4 -#define BRW_FLUSH_SNAPSHOT_COUNTERS 0x8 - -struct brw_urb_fence -{ - struct - { - unsigned length:8; - unsigned vs_realloc:1; - unsigned gs_realloc:1; - unsigned clp_realloc:1; - unsigned sf_realloc:1; - unsigned vfe_realloc:1; - unsigned cs_realloc:1; - unsigned pad:2; - unsigned opcode:16; - } header; - - struct - { - unsigned vs_fence:10; - unsigned gs_fence:10; - unsigned clp_fence:10; - unsigned pad:2; - } bits0; - - struct - { - unsigned sf_fence:10; - unsigned vf_fence:10; - unsigned cs_fence:11; - unsigned pad:1; - } bits1; -}; - -/* State structs for the various fixed function units: - */ - - -struct thread0 -{ - unsigned pad0:1; - unsigned grf_reg_count:3; - unsigned pad1:2; - unsigned kernel_start_pointer:26; /* Offset from GENERAL_STATE_BASE */ -}; - -struct thread1 -{ - unsigned ext_halt_exception_enable:1; - unsigned sw_exception_enable:1; - unsigned mask_stack_exception_enable:1; - unsigned timeout_exception_enable:1; - unsigned illegal_op_exception_enable:1; - unsigned pad0:3; - unsigned depth_coef_urb_read_offset:6; /* WM only */ - unsigned pad1:2; - unsigned floating_point_mode:1; - unsigned thread_priority:1; - unsigned binding_table_entry_count:8; - unsigned pad3:5; - unsigned single_program_flow:1; -}; - -struct thread2 -{ - unsigned per_thread_scratch_space:4; - unsigned pad0:6; - unsigned scratch_space_base_pointer:22; -}; - - -struct thread3 -{ - unsigned dispatch_grf_start_reg:4; - unsigned urb_entry_read_offset:6; - unsigned pad0:1; - unsigned urb_entry_read_length:6; - unsigned pad1:1; - unsigned const_urb_entry_read_offset:6; - unsigned pad2:1; - unsigned const_urb_entry_read_length:6; - unsigned pad3:1; -}; - - - -struct brw_clip_unit_state -{ - struct thread0 thread0; - struct - { - unsigned pad0:7; - unsigned sw_exception_enable:1; - unsigned pad1:3; - unsigned mask_stack_exception_enable:1; - unsigned pad2:1; - unsigned illegal_op_exception_enable:1; - unsigned pad3:2; - unsigned floating_point_mode:1; - unsigned thread_priority:1; - unsigned binding_table_entry_count:8; - unsigned pad4:5; - unsigned single_program_flow:1; - } thread1; - - struct thread2 thread2; - struct thread3 thread3; - - struct - { - unsigned pad0:9; - unsigned gs_output_stats:1; /* not always */ - unsigned stats_enable:1; - unsigned nr_urb_entries:7; - unsigned pad1:1; - unsigned urb_entry_allocation_size:5; - unsigned pad2:1; - unsigned max_threads:5; /* may be less */ - unsigned pad3:2; - } thread4; - - struct - { - unsigned pad0:13; - unsigned clip_mode:3; - unsigned userclip_enable_flags:8; - unsigned userclip_must_clip:1; - unsigned negative_w_clip_test:1; - unsigned guard_band_enable:1; - unsigned viewport_z_clip_enable:1; - unsigned viewport_xy_clip_enable:1; - unsigned vertex_position_space:1; - unsigned api_mode:1; - unsigned pad2:1; - } clip5; - - struct - { - unsigned pad0:5; - unsigned clipper_viewport_state_ptr:27; - } clip6; - - - float viewport_xmin; - float viewport_xmax; - float viewport_ymin; - float viewport_ymax; -}; - -struct gen6_blend_state -{ - struct { - unsigned dest_blend_factor:5; - unsigned source_blend_factor:5; - unsigned pad3:1; - unsigned blend_func:3; - unsigned pad2:1; - unsigned ia_dest_blend_factor:5; - unsigned ia_source_blend_factor:5; - unsigned pad1:1; - unsigned ia_blend_func:3; - unsigned pad0:1; - unsigned ia_blend_enable:1; - unsigned blend_enable:1; - } blend0; - - struct { - unsigned post_blend_clamp_enable:1; - unsigned pre_blend_clamp_enable:1; - unsigned clamp_range:2; - unsigned pad0:4; - unsigned x_dither_offset:2; - unsigned y_dither_offset:2; - unsigned dither_enable:1; - unsigned alpha_test_func:3; - unsigned alpha_test_enable:1; - unsigned pad1:1; - unsigned logic_op_func:4; - unsigned logic_op_enable:1; - unsigned pad2:1; - unsigned write_disable_b:1; - unsigned write_disable_g:1; - unsigned write_disable_r:1; - unsigned write_disable_a:1; - unsigned pad3:1; - unsigned alpha_to_coverage_dither:1; - unsigned alpha_to_one:1; - unsigned alpha_to_coverage:1; - } blend1; -}; - -struct gen6_color_calc_state -{ - struct { - unsigned alpha_test_format:1; - unsigned pad0:14; - unsigned round_disable:1; - unsigned bf_stencil_ref:8; - unsigned stencil_ref:8; - } cc0; - - union { - float alpha_ref_f; - struct { - unsigned ui:8; - unsigned pad0:24; - } alpha_ref_fi; - } cc1; - - float constant_r; - float constant_g; - float constant_b; - float constant_a; -}; - -struct gen6_depth_stencil_state -{ - struct { - unsigned pad0:3; - unsigned bf_stencil_pass_depth_pass_op:3; - unsigned bf_stencil_pass_depth_fail_op:3; - unsigned bf_stencil_fail_op:3; - unsigned bf_stencil_func:3; - unsigned bf_stencil_enable:1; - unsigned pad1:2; - unsigned stencil_write_enable:1; - unsigned stencil_pass_depth_pass_op:3; - unsigned stencil_pass_depth_fail_op:3; - unsigned stencil_fail_op:3; - unsigned stencil_func:3; - unsigned stencil_enable:1; - } ds0; - - struct { - unsigned bf_stencil_write_mask:8; - unsigned bf_stencil_test_mask:8; - unsigned stencil_write_mask:8; - unsigned stencil_test_mask:8; - } ds1; - - struct { - unsigned pad0:26; - unsigned depth_write_enable:1; - unsigned depth_test_func:3; - unsigned pad1:1; - unsigned depth_test_enable:1; - } ds2; -}; - -struct brw_cc_unit_state -{ - struct - { - unsigned pad0:3; - unsigned bf_stencil_pass_depth_pass_op:3; - unsigned bf_stencil_pass_depth_fail_op:3; - unsigned bf_stencil_fail_op:3; - unsigned bf_stencil_func:3; - unsigned bf_stencil_enable:1; - unsigned pad1:2; - unsigned stencil_write_enable:1; - unsigned stencil_pass_depth_pass_op:3; - unsigned stencil_pass_depth_fail_op:3; - unsigned stencil_fail_op:3; - unsigned stencil_func:3; - unsigned stencil_enable:1; - } cc0; - - - struct - { - unsigned bf_stencil_ref:8; - unsigned stencil_write_mask:8; - unsigned stencil_test_mask:8; - unsigned stencil_ref:8; - } cc1; - - - struct - { - unsigned logicop_enable:1; - unsigned pad0:10; - unsigned depth_write_enable:1; - unsigned depth_test_function:3; - unsigned depth_test:1; - unsigned bf_stencil_write_mask:8; - unsigned bf_stencil_test_mask:8; - } cc2; - - - struct - { - unsigned pad0:8; - unsigned alpha_test_func:3; - unsigned alpha_test:1; - unsigned blend_enable:1; - unsigned ia_blend_enable:1; - unsigned pad1:1; - unsigned alpha_test_format:1; - unsigned pad2:16; - } cc3; - - struct - { - unsigned pad0:5; - unsigned cc_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */ - } cc4; - - struct - { - unsigned pad0:2; - unsigned ia_dest_blend_factor:5; - unsigned ia_src_blend_factor:5; - unsigned ia_blend_function:3; - unsigned statistics_enable:1; - unsigned logicop_func:4; - unsigned pad1:11; - unsigned dither_enable:1; - } cc5; - - struct - { - unsigned clamp_post_alpha_blend:1; - unsigned clamp_pre_alpha_blend:1; - unsigned clamp_range:2; - unsigned pad0:11; - unsigned y_dither_offset:2; - unsigned x_dither_offset:2; - unsigned dest_blend_factor:5; - unsigned src_blend_factor:5; - unsigned blend_function:3; - } cc6; - - struct { - union { - float f; - uint8_t ub[4]; - } alpha_ref; - } cc7; -}; - -struct brw_sf_unit_state -{ - struct thread0 thread0; - struct thread1 thread1; - struct thread2 thread2; - struct thread3 thread3; - - struct - { - unsigned pad0:10; - unsigned stats_enable:1; - unsigned nr_urb_entries:7; - unsigned pad1:1; - unsigned urb_entry_allocation_size:5; - unsigned pad2:1; - unsigned max_threads:6; - unsigned pad3:1; - } thread4; - - struct - { - unsigned front_winding:1; - unsigned viewport_transform:1; - unsigned pad0:3; - unsigned sf_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */ - } sf5; - - struct - { - unsigned pad0:9; - unsigned dest_org_vbias:4; - unsigned dest_org_hbias:4; - unsigned scissor:1; - unsigned disable_2x2_trifilter:1; - unsigned disable_zero_pix_trifilter:1; - unsigned point_rast_rule:2; - unsigned line_endcap_aa_region_width:2; - unsigned line_width:4; - unsigned fast_scissor_disable:1; - unsigned cull_mode:2; - unsigned aa_enable:1; - } sf6; - - struct - { - unsigned point_size:11; - unsigned use_point_size_state:1; - unsigned subpixel_precision:1; - unsigned sprite_point:1; - unsigned pad0:10; - unsigned aa_line_distance_mode:1; - unsigned trifan_pv:2; - unsigned linestrip_pv:2; - unsigned tristrip_pv:2; - unsigned line_last_pixel_enable:1; - } sf7; - -}; - -struct gen6_scissor_rect -{ - unsigned xmin:16; - unsigned ymin:16; - unsigned xmax:16; - unsigned ymax:16; -}; - -struct brw_gs_unit_state -{ - struct thread0 thread0; - struct thread1 thread1; - struct thread2 thread2; - struct thread3 thread3; - - struct - { - unsigned pad0:8; - unsigned rendering_enable:1; /* for Ironlake */ - unsigned pad4:1; - unsigned stats_enable:1; - unsigned nr_urb_entries:7; - unsigned pad1:1; - unsigned urb_entry_allocation_size:5; - unsigned pad2:1; - unsigned max_threads:5; - unsigned pad3:2; - } thread4; - - struct - { - unsigned sampler_count:3; - unsigned pad0:2; - unsigned sampler_state_pointer:27; - } gs5; - - - struct - { - unsigned max_vp_index:4; - unsigned pad0:12; - unsigned svbi_post_inc_value:10; - unsigned pad1:1; - unsigned svbi_post_inc_enable:1; - unsigned svbi_payload:1; - unsigned discard_adjaceny:1; - unsigned reorder_enable:1; - unsigned pad2:1; - } gs6; -}; - - -struct brw_vs_unit_state -{ - struct thread0 thread0; - struct thread1 thread1; - struct thread2 thread2; - struct thread3 thread3; - - struct - { - unsigned pad0:10; - unsigned stats_enable:1; - unsigned nr_urb_entries:7; - unsigned pad1:1; - unsigned urb_entry_allocation_size:5; - unsigned pad2:1; - unsigned max_threads:6; - unsigned pad3:1; - } thread4; - - struct - { - unsigned sampler_count:3; - unsigned pad0:2; - unsigned sampler_state_pointer:27; - } vs5; - - struct - { - unsigned vs_enable:1; - unsigned vert_cache_disable:1; - unsigned pad0:30; - } vs6; -}; - - -struct brw_wm_unit_state -{ - struct thread0 thread0; - struct thread1 thread1; - struct thread2 thread2; - struct thread3 thread3; - - struct { - unsigned stats_enable:1; - unsigned depth_buffer_clear:1; - unsigned sampler_count:3; - unsigned sampler_state_pointer:27; - } wm4; - - struct - { - unsigned enable_8_pix:1; - unsigned enable_16_pix:1; - unsigned enable_32_pix:1; - unsigned enable_con_32_pix:1; - unsigned enable_con_64_pix:1; - unsigned pad0:1; - - /* These next four bits are for Ironlake+ */ - unsigned fast_span_coverage_enable:1; - unsigned depth_buffer_clear:1; - unsigned depth_buffer_resolve_enable:1; - unsigned hierarchical_depth_buffer_resolve_enable:1; - - unsigned legacy_global_depth_bias:1; - unsigned line_stipple:1; - unsigned depth_offset:1; - unsigned polygon_stipple:1; - unsigned line_aa_region_width:2; - unsigned line_endcap_aa_region_width:2; - unsigned early_depth_test:1; - unsigned thread_dispatch_enable:1; - unsigned program_uses_depth:1; - unsigned program_computes_depth:1; - unsigned program_uses_killpixel:1; - unsigned legacy_line_rast: 1; - unsigned transposed_urb_read_enable:1; - unsigned max_threads:7; - } wm5; - - float global_depth_offset_constant; - float global_depth_offset_scale; - - /* for Ironlake only */ - struct { - unsigned pad0:1; - unsigned grf_reg_count_1:3; - unsigned pad1:2; - unsigned kernel_start_pointer_1:26; - } wm8; - - struct { - unsigned pad0:1; - unsigned grf_reg_count_2:3; - unsigned pad1:2; - unsigned kernel_start_pointer_2:26; - } wm9; - - struct { - unsigned pad0:1; - unsigned grf_reg_count_3:3; - unsigned pad1:2; - unsigned kernel_start_pointer_3:26; - } wm10; -}; - -struct brw_sampler_default_color { - float color[4]; -}; - -struct gen5_sampler_default_color { - uint8_t ub[4]; - float f[4]; - uint16_t hf[4]; - uint16_t us[4]; - int16_t s[4]; - uint8_t b[4]; -}; - -struct brw_sampler_state -{ - - struct - { - unsigned shadow_function:3; - unsigned lod_bias:11; - unsigned min_filter:3; - unsigned mag_filter:3; - unsigned mip_filter:2; - unsigned base_level:5; - unsigned min_mag_neq:1; - unsigned lod_preclamp:1; - unsigned default_color_mode:1; - unsigned pad0:1; - unsigned disable:1; - } ss0; - - struct - { - unsigned r_wrap_mode:3; - unsigned t_wrap_mode:3; - unsigned s_wrap_mode:3; - unsigned cube_control_mode:1; - unsigned pad:2; - unsigned max_lod:10; - unsigned min_lod:10; - } ss1; - - - struct - { - unsigned pad:5; - unsigned default_color_pointer:27; - } ss2; - - struct - { - unsigned non_normalized_coord:1; - unsigned pad:12; - unsigned address_round:6; - unsigned max_aniso:3; - unsigned chroma_key_mode:1; - unsigned chroma_key_index:2; - unsigned chroma_key_enable:1; - unsigned monochrome_filter_width:3; - unsigned monochrome_filter_height:3; - } ss3; -}; - -struct gen7_sampler_state -{ - struct - { - unsigned aniso_algorithm:1; - unsigned lod_bias:13; - unsigned min_filter:3; - unsigned mag_filter:3; - unsigned mip_filter:2; - unsigned base_level:5; - unsigned pad1:1; - unsigned lod_preclamp:1; - unsigned default_color_mode:1; - unsigned pad0:1; - unsigned disable:1; - } ss0; - - struct - { - unsigned cube_control_mode:1; - unsigned shadow_function:3; - unsigned pad:4; - unsigned max_lod:12; - unsigned min_lod:12; - } ss1; - - struct - { - unsigned pad:5; - unsigned default_color_pointer:27; - } ss2; - - struct - { - unsigned r_wrap_mode:3; - unsigned t_wrap_mode:3; - unsigned s_wrap_mode:3; - unsigned pad:1; - unsigned non_normalized_coord:1; - unsigned trilinear_quality:2; - unsigned address_round:6; - unsigned max_aniso:3; - unsigned chroma_key_mode:1; - unsigned chroma_key_index:2; - unsigned chroma_key_enable:1; - unsigned pad0:6; - } ss3; -}; - -struct brw_clipper_viewport -{ - float xmin; - float xmax; - float ymin; - float ymax; -}; - -struct brw_cc_viewport -{ - float min_depth; - float max_depth; -}; - -struct brw_sf_viewport -{ - struct { - float m00; - float m11; - float m22; - float m30; - float m31; - float m32; - } viewport; - - /* scissor coordinates are inclusive */ - struct { - int16_t xmin; - int16_t ymin; - int16_t xmax; - int16_t ymax; - } scissor; -}; - -struct gen6_sf_viewport { - float m00; - float m11; - float m22; - float m30; - float m31; - float m32; -}; - -struct gen7_sf_clip_viewport { - struct { - float m00; - float m11; - float m22; - float m30; - float m31; - float m32; - } viewport; - - unsigned pad0[2]; - - struct { - float xmin; - float xmax; - float ymin; - float ymax; - } guardband; - - float pad1[4]; -}; - -struct brw_vertex_element_state -{ - struct - { - unsigned src_offset:11; - unsigned pad:5; - unsigned src_format:9; - unsigned pad0:1; - unsigned valid:1; - unsigned vertex_buffer_index:5; - } ve0; - - struct - { - unsigned dst_offset:8; - unsigned pad:8; - unsigned vfcomponent3:4; - unsigned vfcomponent2:4; - unsigned vfcomponent1:4; - unsigned vfcomponent0:4; - } ve1; -}; - -struct brw_urb_immediate { - unsigned opcode:4; - unsigned offset:6; - unsigned swizzle_control:2; - unsigned pad:1; - unsigned allocate:1; - unsigned used:1; - unsigned complete:1; - unsigned response_length:4; - unsigned msg_length:4; - unsigned msg_target:4; - unsigned pad1:3; - unsigned end_of_thread:1; -}; - -/* Instruction format for the execution units: - */ - -struct brw_instruction -{ - struct - { - unsigned opcode:7; - unsigned pad:1; - unsigned access_mode:1; - unsigned mask_control:1; - unsigned dependency_control:2; - unsigned compression_control:2; /* gen6: quater control */ - unsigned thread_control:2; - unsigned predicate_control:4; - unsigned predicate_inverse:1; - unsigned execution_size:3; - /** - * Conditional Modifier for most instructions. On Gen6+, this is also - * used for the SEND instruction's Message Target/SFID. - */ - unsigned destreg__conditionalmod:4; - unsigned acc_wr_control:1; - unsigned cmpt_control:1; - unsigned debug_control:1; - unsigned saturate:1; - } header; - - union { - struct - { - unsigned dest_reg_file:2; - unsigned dest_reg_type:3; - unsigned src0_reg_file:2; - unsigned src0_reg_type:3; - unsigned src1_reg_file:2; - unsigned src1_reg_type:3; - unsigned pad:1; - unsigned dest_subreg_nr:5; - unsigned dest_reg_nr:8; - unsigned dest_horiz_stride:2; - unsigned dest_address_mode:1; - } da1; - - struct - { - unsigned dest_reg_file:2; - unsigned dest_reg_type:3; - unsigned src0_reg_file:2; - unsigned src0_reg_type:3; - unsigned src1_reg_file:2; /* 0x00000c00 */ - unsigned src1_reg_type:3; /* 0x00007000 */ - unsigned pad:1; - int dest_indirect_offset:10; /* offset against the deref'd address reg */ - unsigned dest_subreg_nr:3; /* subnr for the address reg a0.x */ - unsigned dest_horiz_stride:2; - unsigned dest_address_mode:1; - } ia1; - - struct - { - unsigned dest_reg_file:2; - unsigned dest_reg_type:3; - unsigned src0_reg_file:2; - unsigned src0_reg_type:3; - unsigned src1_reg_file:2; - unsigned src1_reg_type:3; - unsigned pad:1; - unsigned dest_writemask:4; - unsigned dest_subreg_nr:1; - unsigned dest_reg_nr:8; - unsigned dest_horiz_stride:2; - unsigned dest_address_mode:1; - } da16; - - struct - { - unsigned dest_reg_file:2; - unsigned dest_reg_type:3; - unsigned src0_reg_file:2; - unsigned src0_reg_type:3; - unsigned pad0:6; - unsigned dest_writemask:4; - int dest_indirect_offset:6; - unsigned dest_subreg_nr:3; - unsigned dest_horiz_stride:2; - unsigned dest_address_mode:1; - } ia16; - - struct { - unsigned dest_reg_file:2; - unsigned dest_reg_type:3; - unsigned src0_reg_file:2; - unsigned src0_reg_type:3; - unsigned src1_reg_file:2; - unsigned src1_reg_type:3; - unsigned pad:1; - - int jump_count:16; - } branch_gen6; - - struct { - unsigned dest_reg_file:1; - unsigned flag_subreg_nr:1; - unsigned flag_reg_nr:1; - unsigned pad0:1; - unsigned src0_abs:1; - unsigned src0_negate:1; - unsigned src1_abs:1; - unsigned src1_negate:1; - unsigned src2_abs:1; - unsigned src2_negate:1; - unsigned src_reg_type:2; - unsigned dest_reg_type:2; - unsigned pad1:1; - unsigned nib_ctrl:1; - unsigned pad2:1; - unsigned dest_writemask:4; - unsigned dest_subreg_nr:3; - unsigned dest_reg_nr:8; - } da3src; - - uint32_t ud; - } bits1; - - - union { - struct - { - unsigned src0_subreg_nr:5; - unsigned src0_reg_nr:8; - unsigned src0_abs:1; - unsigned src0_negate:1; - unsigned src0_address_mode:1; - unsigned src0_horiz_stride:2; - unsigned src0_width:3; - unsigned src0_vert_stride:4; - unsigned flag_subreg_nr:1; - unsigned flag_reg_nr:1; - unsigned pad:5; - } da1; - - struct - { - int src0_indirect_offset:10; - unsigned src0_subreg_nr:3; - unsigned src0_abs:1; - unsigned src0_negate:1; - unsigned src0_address_mode:1; - unsigned src0_horiz_stride:2; - unsigned src0_width:3; - unsigned src0_vert_stride:4; - unsigned flag_subreg_nr:1; - unsigned flag_reg_nr:1; - unsigned pad:5; - } ia1; - - struct - { - unsigned src0_swz_x:2; - unsigned src0_swz_y:2; - unsigned src0_subreg_nr:1; - unsigned src0_reg_nr:8; - unsigned src0_abs:1; - unsigned src0_negate:1; - unsigned src0_address_mode:1; - unsigned src0_swz_z:2; - unsigned src0_swz_w:2; - unsigned pad0:1; - unsigned src0_vert_stride:4; - unsigned flag_subreg_nr:1; - unsigned flag_reg_nr:1; - unsigned pad1:5; - } da16; - - struct - { - unsigned src0_swz_x:2; - unsigned src0_swz_y:2; - int src0_indirect_offset:6; - unsigned src0_subreg_nr:3; - unsigned src0_abs:1; - unsigned src0_negate:1; - unsigned src0_address_mode:1; - unsigned src0_swz_z:2; - unsigned src0_swz_w:2; - unsigned pad0:1; - unsigned src0_vert_stride:4; - unsigned flag_subreg_nr:1; - unsigned flag_reg_nr:1; - unsigned pad1:5; - } ia16; - - /* Extended Message Descriptor for Ironlake (Gen5) SEND instruction. - * - * Does not apply to Gen6+. The SFID/message target moved to bits - * 27:24 of the header (destreg__conditionalmod); EOT is in bits3. - */ - struct - { - unsigned pad:26; - unsigned end_of_thread:1; - unsigned pad1:1; - unsigned sfid:4; - } send_gen5; /* for Ironlake only */ - - struct { - unsigned src0_rep_ctrl:1; - unsigned src0_swizzle:8; - unsigned src0_subreg_nr:3; - unsigned src0_reg_nr:8; - unsigned pad0:1; - unsigned src1_rep_ctrl:1; - unsigned src1_swizzle:8; - unsigned src1_subreg_nr_low:2; - } da3src; - - uint32_t ud; - } bits2; - - union - { - struct - { - unsigned src1_subreg_nr:5; - unsigned src1_reg_nr:8; - unsigned src1_abs:1; - unsigned src1_negate:1; - unsigned src1_address_mode:1; - unsigned src1_horiz_stride:2; - unsigned src1_width:3; - unsigned src1_vert_stride:4; - unsigned pad0:7; - } da1; - - struct - { - unsigned src1_swz_x:2; - unsigned src1_swz_y:2; - unsigned src1_subreg_nr:1; - unsigned src1_reg_nr:8; - unsigned src1_abs:1; - unsigned src1_negate:1; - unsigned src1_address_mode:1; - unsigned src1_swz_z:2; - unsigned src1_swz_w:2; - unsigned pad1:1; - unsigned src1_vert_stride:4; - unsigned pad2:7; - } da16; - - struct - { - int src1_indirect_offset:10; - unsigned src1_subreg_nr:3; - unsigned src1_abs:1; - unsigned src1_negate:1; - unsigned src1_address_mode:1; - unsigned src1_horiz_stride:2; - unsigned src1_width:3; - unsigned src1_vert_stride:4; - unsigned pad1:7; - } ia1; - - struct - { - unsigned src1_swz_x:2; - unsigned src1_swz_y:2; - int src1_indirect_offset:6; - unsigned src1_subreg_nr:3; - unsigned src1_abs:1; - unsigned src1_negate:1; - unsigned src1_address_mode:1; - unsigned src1_swz_z:2; - unsigned src1_swz_w:2; - unsigned pad1:1; - unsigned src1_vert_stride:4; - unsigned pad2:7; - } ia16; - - - struct - { - int jump_count:16; /* note: signed */ - unsigned pop_count:4; - unsigned pad0:12; - } if_else; - - /* This is also used for gen7 IF/ELSE instructions */ - struct - { - /* Signed jump distance to the ip to jump to if all channels - * are disabled after the break or continue. It should point - * to the end of the innermost control flow block, as that's - * where some channel could get re-enabled. - */ - int jip:16; - - /* Signed jump distance to the location to resume execution - * of this channel if it's enabled for the break or continue. - */ - int uip:16; - } break_cont; - - int JIP; /* used by Gen6 CALL instructions; Gen7 JMPI */ - - /** - * \defgroup SEND instructions / Message Descriptors - * - * @{ - */ - - /** - * Generic Message Descriptor for Gen4 SEND instructions. The structs - * below expand function_control to something specific for their - * message. Due to struct packing issues, they duplicate these bits. - * - * See the G45 PRM, Volume 4, Table 14-15. - */ - struct { - unsigned function_control:16; - unsigned response_length:4; - unsigned msg_length:4; - unsigned msg_target:4; - unsigned pad1:3; - unsigned end_of_thread:1; - } generic; - - /** - * Generic Message Descriptor for Gen5-7 SEND instructions. - * - * See the Sandybridge PRM, Volume 2 Part 2, Table 8-15. (Sadly, most - * of the information on the SEND instruction is missing from the public - * Ironlake PRM.) - * - * The table claims that bit 31 is reserved/MBZ on Gen6+, but it lies. - * According to the SEND instruction description: - * "The MSb of the message description, the EOT field, always comes from - * bit 127 of the instruction word"...which is bit 31 of this field. - */ - struct { - unsigned function_control:19; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad1:2; - unsigned end_of_thread:1; - } generic_gen5; - - struct { - unsigned opcode:1; - unsigned requester_type:1; - unsigned pad:2; - unsigned resource_select:1; - unsigned pad1:11; - unsigned response_length:4; - unsigned msg_length:4; - unsigned msg_target:4; - unsigned pad2:3; - unsigned end_of_thread:1; - } thread_spawner; - - struct { - unsigned opcode:1; - unsigned requester_type:1; - unsigned pad0:2; - unsigned resource_select:1; - unsigned pad1:14; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad2:2; - unsigned end_of_thread:1; - } thread_spawner_gen5; - - /** G45 PRM, Volume 4, Section 6.1.1.1 */ - struct { - unsigned function:4; - unsigned int_type:1; - unsigned precision:1; - unsigned saturate:1; - unsigned data_type:1; - unsigned pad0:8; - unsigned response_length:4; - unsigned msg_length:4; - unsigned msg_target:4; - unsigned pad1:3; - unsigned end_of_thread:1; - } math; - - /** Ironlake PRM, Volume 4 Part 1, Section 6.1.1.1 */ - struct { - unsigned function:4; - unsigned int_type:1; - unsigned precision:1; - unsigned saturate:1; - unsigned data_type:1; - unsigned snapshot:1; - unsigned pad0:10; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad1:2; - unsigned end_of_thread:1; - } math_gen5; - - /** G45 PRM, Volume 4, Section 4.8.1.1.1 [DevBW] and [DevCL] */ - struct { - unsigned binding_table_index:8; - unsigned sampler:4; - unsigned return_format:2; - unsigned msg_type:2; - unsigned response_length:4; - unsigned msg_length:4; - unsigned msg_target:4; - unsigned pad1:3; - unsigned end_of_thread:1; - } sampler; - - /** G45 PRM, Volume 4, Section 4.8.1.1.2 [DevCTG] */ - struct { - unsigned binding_table_index:8; - unsigned sampler:4; - unsigned msg_type:4; - unsigned response_length:4; - unsigned msg_length:4; - unsigned msg_target:4; - unsigned pad1:3; - unsigned end_of_thread:1; - } sampler_g4x; - - /** Ironlake PRM, Volume 4 Part 1, Section 4.11.1.1.3 */ - struct { - unsigned binding_table_index:8; - unsigned sampler:4; - unsigned msg_type:4; - unsigned simd_mode:2; - unsigned pad0:1; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad1:2; - unsigned end_of_thread:1; - } sampler_gen5; - - struct { - unsigned binding_table_index:8; - unsigned sampler:4; - unsigned msg_type:5; - unsigned simd_mode:2; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad1:2; - unsigned end_of_thread:1; - } sampler_gen7; - - struct brw_urb_immediate urb; - - struct { - unsigned opcode:4; - unsigned offset:6; - unsigned swizzle_control:2; - unsigned pad:1; - unsigned allocate:1; - unsigned used:1; - unsigned complete:1; - unsigned pad0:3; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad1:2; - unsigned end_of_thread:1; - } urb_gen5; - - struct { - unsigned opcode:3; - unsigned offset:11; - unsigned swizzle_control:1; - unsigned complete:1; - unsigned per_slot_offset:1; - unsigned pad0:2; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad1:2; - unsigned end_of_thread:1; - } urb_gen7; - - struct { - unsigned binding_table_index:8; - unsigned search_path_index:3; - unsigned lut_subindex:2; - unsigned message_type:2; - unsigned pad0:4; - unsigned header_present:1; - } vme_gen6; - - struct { - unsigned binding_table_index:8; - unsigned pad0:5; - unsigned message_type:2; - unsigned pad1:4; - unsigned header_present:1; - } cre_gen75; - - /** 965 PRM, Volume 4, Section 5.10.1.1: Message Descriptor */ - struct { - unsigned binding_table_index:8; - unsigned msg_control:4; - unsigned msg_type:2; - unsigned target_cache:2; - unsigned response_length:4; - unsigned msg_length:4; - unsigned msg_target:4; - unsigned pad1:3; - unsigned end_of_thread:1; - } dp_read; - - /** G45 PRM, Volume 4, Section 5.10.1.1.2 */ - struct { - unsigned binding_table_index:8; - unsigned msg_control:3; - unsigned msg_type:3; - unsigned target_cache:2; - unsigned response_length:4; - unsigned msg_length:4; - unsigned msg_target:4; - unsigned pad1:3; - unsigned end_of_thread:1; - } dp_read_g4x; - - /** Ironlake PRM, Volume 4 Part 1, Section 5.10.2.1.2. */ - struct { - unsigned binding_table_index:8; - unsigned msg_control:4; - unsigned msg_type:2; - unsigned target_cache:2; - unsigned pad0:3; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad1:2; - unsigned end_of_thread:1; - } dp_read_gen5; - - /** G45 PRM, Volume 4, Section 5.10.1.1.2. For both Gen4 and G45. */ - struct { - unsigned binding_table_index:8; - unsigned msg_control:3; - unsigned last_render_target:1; - unsigned msg_type:3; - unsigned send_commit_msg:1; - unsigned response_length:4; - unsigned msg_length:4; - unsigned msg_target:4; - unsigned pad1:3; - unsigned end_of_thread:1; - } dp_write; - - /** Ironlake PRM, Volume 4 Part 1, Section 5.10.2.1.2. */ - struct { - unsigned binding_table_index:8; - unsigned msg_control:3; - unsigned last_render_target:1; - unsigned msg_type:3; - unsigned send_commit_msg:1; - unsigned pad0:3; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad1:2; - unsigned end_of_thread:1; - } dp_write_gen5; - - /** - * Message for the Sandybridge Sampler Cache or Constant Cache Data Port. - * - * See the Sandybridge PRM, Volume 4 Part 1, Section 3.9.2.1.1. - **/ - struct { - unsigned binding_table_index:8; - unsigned msg_control:5; - unsigned msg_type:3; - unsigned pad0:3; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad1:2; - unsigned end_of_thread:1; - } gen6_dp_sampler_const_cache; - - /** - * Message for the Sandybridge Render Cache Data Port. - * - * Most fields are defined in the Sandybridge PRM, Volume 4 Part 1, - * Section 3.9.2.1.1: Message Descriptor. - * - * "Slot Group Select" and "Last Render Target" are part of the - * 5-bit message control for Render Target Write messages. See - * Section 3.9.9.2.1 of the same volume. - */ - struct { - unsigned binding_table_index:8; - unsigned msg_control:5; - unsigned msg_type:4; - unsigned send_commit_msg:1; - unsigned pad0:1; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad1:2; - unsigned end_of_thread:1; - } gen6_dp; - - /** - * Message for any of the Gen7 Data Port caches. - * - * Most fields are defined in BSpec volume 5c.2 Data Port / Messages / - * Data Port Messages / Message Descriptor. Once again, "Slot Group - * Select" and "Last Render Target" are part of the 6-bit message - * control for Render Target Writes. - */ - struct { - unsigned binding_table_index:8; - unsigned msg_control:6; - unsigned msg_type:4; - unsigned category:1; - unsigned header_present:1; - unsigned response_length:5; - unsigned msg_length:4; - unsigned pad2:2; - unsigned end_of_thread:1; - } gen7_dp; - /** @} */ - - struct { - unsigned src1_subreg_nr_high:1; - unsigned src1_reg_nr:8; - unsigned pad0:1; - unsigned src2_rep_ctrl:1; - unsigned src2_swizzle:8; - unsigned src2_subreg_nr:3; - unsigned src2_reg_nr:8; - unsigned pad1:2; - } da3src; - - int d; - unsigned ud; - float f; - } bits3; -}; - -struct brw_compact_instruction { - struct { - unsigned opcode:7; /* 0- 6 */ - unsigned debug_control:1; /* 7- 7 */ - unsigned control_index:5; /* 8-12 */ - unsigned data_type_index:5; /* 13-17 */ - unsigned sub_reg_index:5; /* 18-22 */ - unsigned acc_wr_control:1; /* 23-23 */ - unsigned conditionalmod:4; /* 24-27 */ - unsigned flag_subreg_nr:1; /* 28-28 */ - unsigned cmpt_ctrl:1; /* 29-29 */ - unsigned src0_index:2; /* 30-31 */ - } dw0; - - struct { - unsigned src0_index:3; /* 32-24 */ - unsigned src1_index:5; /* 35-39 */ - unsigned dst_reg_nr:8; /* 40-47 */ - unsigned src0_reg_nr:8; /* 48-55 */ - unsigned src1_reg_nr:8; /* 56-63 */ - } dw1; -}; - -#endif diff --git a/assembler/disasm-main.c b/assembler/disasm-main.c deleted file mode 100644 index b3655568..00000000 --- a/assembler/disasm-main.c +++ /dev/null @@ -1,177 +0,0 @@ -/* - * Copyright © 2008 Keith Packard - * - * Permission to use, copy, modify, distribute, and sell this software and its - * documentation for any purpose is hereby granted without fee, provided that - * the above copyright notice appear in all copies and that both that copyright - * notice and this permission notice appear in supporting documentation, and - * that the name of the copyright holders not be used in advertising or - * publicity pertaining to distribution of the software without specific, - * written prior permission. The copyright holders make no representations - * about the suitability of this software for any purpose. It is provided "as - * is" without express or implied warranty. - * - * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, - * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER - * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THIS SOFTWARE. - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <getopt.h> -#include <unistd.h> - -#include "gen4asm.h" -#include "brw_eu.h" -#include "gen8_instruction.h" - -static const struct option longopts[] = { - { NULL, 0, NULL, 0 } -}; - -static struct brw_program * -read_program (FILE *input) -{ - uint32_t inst[4]; - struct brw_program *program; - struct brw_program_instruction *entry, **prev; - int c; - int n = 0; - - program = malloc (sizeof (struct brw_program)); - program->first = NULL; - prev = &program->first; - while ((c = getc (input)) != EOF) { - if (c == '0') { - if (fscanf (input, "x%x", &inst[n]) == 1) { - ++n; - if (n == 4) { - entry = malloc (sizeof (struct brw_program_instruction)); - memcpy (&entry->insn, inst, 4 * sizeof (uint32_t)); - entry->next = NULL; - *prev = entry; - prev = &entry->next; - n = 0; - } - } - } - } - return program; -} - -static struct brw_program * -read_program_binary (FILE *input) -{ - uint32_t temp; - uint8_t inst[16]; - struct brw_program *program; - struct brw_program_instruction *entry, **prev; - int c; - int n = 0; - - program = malloc (sizeof (struct brw_program)); - program->first = NULL; - prev = &program->first; - while ((c = getc (input)) != EOF) { - if (c == '0') { - if (fscanf (input, "x%2x", &temp) == 1) { - inst[n++] = (uint8_t)temp; - if (n == 16) { - entry = malloc (sizeof (struct brw_program_instruction)); - memcpy (&entry->insn, inst, 16 * sizeof (uint8_t)); - entry->next = NULL; - *prev = entry; - prev = &entry->next; - n = 0; - } - } - } - } - return program; -} - -static void usage(void) -{ - fprintf(stderr, "usage: intel-gen4disasm [options] inputfile\n"); - fprintf(stderr, "\t-b, --binary C style binary output\n"); - fprintf(stderr, "\t-o, --output {outputfile} Specify output file\n"); - fprintf(stderr, "\t-g, --gen <4|5|6|7|8|9> Specify GPU generation\n"); -} - -int main(int argc, char **argv) -{ - struct brw_program *program; - FILE *input = stdin; - FILE *output = stdout; - char *input_filename = NULL; - char *output_file = NULL; - int byte_array_input = 0; - int o; - int gen = 4; - struct brw_program_instruction *inst; - - while ((o = getopt_long(argc, argv, "o:bg:", longopts, NULL)) != -1) { - switch (o) { - case 'o': - if (strcmp(optarg, "-") != 0) - output_file = optarg; - break; - case 'b': - byte_array_input = 1; - break; - case 'g': - gen = strtol(optarg, NULL, 10); - - if (gen < 4 || gen > 9) { - usage(); - exit(1); - } - - break; - default: - usage(); - exit(1); - } - } - argc -= optind; - argv += optind; - if (argc != 1) { - usage(); - exit(1); - } - - if (strcmp(argv[0], "-") != 0) { - input_filename = argv[0]; - input = fopen(input_filename, "r"); - if (input == NULL) { - perror("Couldn't open input file"); - exit(1); - } - } - if (byte_array_input) - program = read_program_binary (input); - else - program = read_program (input); - if (!program) - exit (1); - if (output_file) { - output = fopen (output_file, "w"); - if (output == NULL) { - perror("Couldn't open output file"); - exit(1); - } - } - - for (inst = program->first; inst; inst = inst->next) - if (gen >= 8) - gen8_disassemble(output, &inst->insn.gen8, gen); - else - brw_disasm (output, &inst->insn.gen, gen); - - exit (0); -} diff --git a/assembler/doc/Makefile.am b/assembler/doc/Makefile.am deleted file mode 100644 index 257fc385..00000000 --- a/assembler/doc/Makefile.am +++ /dev/null @@ -1,3 +0,0 @@ -EXTRA_DIST = \ - examples/packed_yuv_sf.g4a \ - examples/packed_yuv_wm.g4a diff --git a/assembler/doc/examples/packed_yuv_sf.g4a b/assembler/doc/examples/packed_yuv_sf.g4a deleted file mode 100644 index 8c1398f4..00000000 --- a/assembler/doc/examples/packed_yuv_sf.g4a +++ /dev/null @@ -1,17 +0,0 @@ -send (1) 0 g6<1>F g1.12<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 }; -send (1) 0 g6.4<1>F g1.20<0,1,0>F math inv scalar mlen 1 rlen 1 { align1 }; -add (8) g7<1>F g4<8,8,1>F -g3<8,8,1>F { align1 }; -mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 }; -mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 }; -mov (8) m1<1>F g7<0,1,0>F { align1 }; -mov (8) m2<1>F g7.4<0,1,0>F { align1 }; -mov (8) m3<1>F g3<8,8,1>F { align1 }; -send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT }; -nop; -nop; -nop; -nop; -nop; -nop; -nop; -nop; diff --git a/assembler/doc/examples/packed_yuv_wm.g4a b/assembler/doc/examples/packed_yuv_wm.g4a deleted file mode 100644 index d312d170..00000000 --- a/assembler/doc/examples/packed_yuv_wm.g4a +++ /dev/null @@ -1,161 +0,0 @@ -/* The initial payload of the thread is always g0. - * WM_URB (incoming URB entries) is g3 - * X0_R is g4 - * X1_R is g5 - * Y0_R is g6 - * Y1_R is g7 - */ - - /* Set up the X/Y screen coordinates of the pixels in our 4 subspans. Each - * subspan is a 2x2 rectangle, and the screen x/y of the upper left of each - * subspan are given in GRF register 1.2 through 1.5 (which, with the word - * addressing below, are 1.4 through 1.11). - * - * The result is WM_X*_R and WM_Y*R being: - * - * X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y} - * Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1} - * X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y} - * Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1} - */ - - /* Set up ss0.x coordinates*/ -mov (1) g4<1>F g1.8<0,1,0>UW { align1 }; -add (1) g4.4<1>F g1.8<0,1,0>UW 1UB { align1 }; -mov (1) g4.8<1>F g1.8<0,1,0>UW { align1 }; -add (1) g4.12<1>F g1.8<0,1,0>UW 1UB { align1 }; - /* Set up ss0.y coordinates */ -mov (1) g6<1>F g1.10<0,1,0>UW { align1 }; -mov (1) g6.4<1>F g1.10<0,1,0>UW { align1 }; -add (1) g6.8<1>F g1.10<0,1,0>UW 1UB { align1 }; -add (1) g6.12<1>F g1.10<0,1,0>UW 1UB { align1 }; - /* set up ss1.x coordinates */ -mov (1) g4.16<1>F g1.12<0,1,0>UW { align1 }; -add (1) g4.20<1>F g1.12<0,1,0>UW 1UB { align1 }; -mov (1) g4.24<1>F g1.12<0,1,0>UW { align1 }; -add (1) g4.28<1>F g1.12<0,1,0>UW 1UB { align1 }; - /* set up ss1.y coordinates */ -mov (1) g6.16<1>F g1.14<0,1,0>UW { align1 }; -mov (1) g6.20<1>F g1.14<0,1,0>UW { align1 }; -add (1) g6.24<1>F g1.14<0,1,0>UW 1UB { align1 }; -add (1) g6.28<1>F g1.14<0,1,0>UW 1UB { align1 }; - /* Set up ss2.x coordinates */ -mov (1) g5<1>F g1.16<0,1,0>UW { align1 }; -add (1) g5.4<1>F g1.16<0,1,0>UW 1UB { align1 }; -mov (1) g5.8<1>F g1.16<0,1,0>UW { align1 }; -add (1) g5.12<1>F g1.16<0,1,0>UW 1UB { align1 }; - /* Set up ss2.y coordinates */ -mov (1) g7<1>F g1.18<0,1,0>UW { align1 }; -mov (1) g7.4<1>F g1.18<0,1,0>UW { align1 }; -add (1) g7.8<1>F g1.18<0,1,0>UW 1UB { align1 }; -add (1) g7.12<1>F g1.18<0,1,0>UW 1UB { align1 }; - /* Set up ss3.x coordinates */ -mov (1) g5.16<1>F g1.20<0,1,0>UW { align1 }; -add (1) g5.20<1>F g1.20<0,1,0>UW 1UB { align1 }; -mov (1) g5.24<1>F g1.20<0,1,0>UW { align1 }; -add (1) g5.28<1>F g1.20<0,1,0>UW 1UB { align1 }; - /* Set up ss3.y coordinates */ -mov (1) g7.16<1>F g1.22<0,1,0>UW { align1 }; -mov (1) g7.20<1>F g1.22<0,1,0>UW { align1 }; -add (1) g7.24<1>F g1.22<0,1,0>UW 1UB { align1 }; -add (1) g7.28<1>F g1.22<0,1,0>UW 1UB { align1 }; - - /* Now, map these screen space coordinates into texture coordinates. */ - /* subtract screen-space X origin of vertex 0. */ -add (8) g4<1>F g4<8,8,1>F -g1<0,1,0>F { align1 }; -add (8) g5<1>F g5<8,8,1>F -g1<0,1,0>F { align1 }; - /* scale by texture X increment */ -mul (8) g4<1>F g4<8,8,1>F g3<0,1,0>F { align1 }; -mul (8) g5<1>F g5<8,8,1>F g3<0,1,0>F { align1 }; - /* add in texture X offset */ -add (8) g4<1>F g4<8,8,1>F g3.12<0,1,0>F { align1 }; -add (8) g5<1>F g5<8,8,1>F g3.12<0,1,0>F { align1 }; - /* subtract screen-space Y origin of vertex 0. */ -add (8) g6<1>F g6<8,8,1>F -g1.4<0,1,0>F { align1 }; -add (8) g7<1>F g7<8,8,1>F -g1.4<0,1,0>F { align1 }; - /* scale by texture Y increment */ -mul (8) g6<1>F g6<8,8,1>F g3.20<0,1,0>F { align1 }; -mul (8) g7<1>F g7<8,8,1>F g3.20<0,1,0>F { align1 }; - /* add in texture Y offset */ -add (8) g6<1>F g6<8,8,1>F g3.28<0,1,0>F { align1 }; -add (8) g7<1>F g7<8,8,1>F g3.28<0,1,0>F { align1 }; - /* sampler */ -mov (8) m1<1>F g4<8,8,1>F { align1 }; -mov (8) m2<1>F g5<8,8,1>F { align1 }; -mov (8) m3<1>F g6<8,8,1>F { align1 }; -mov (8) m4<1>F g7<8,8,1>F { align1 }; - - /* - * g0 holds the PS thread payload, which (oddly) contains - * precisely what the sampler wants to see in m0 - */ -send (16) 0 g12<1>UW g0<8,8,1>UW sampler (1,0,F) mlen 5 rlen 8 { align1 }; -mov (8) g19<1>UW g19<8,8,1>UW { align1 }; - - /* color space conversion function: - * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) - * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) - * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) - * - * Y is g14, g15. - * Cr is g12, g13. - * Cb is g16, g17. - * - * R is g2, g6. - * G is g3, g7. - * B is g4, g8. - */ - /* Y = Y - 16/255 */ -add (8) g14<1>F g14<8,8,1>F -0.0627451F { align1 }; - /* Cr = Cr - 128/255 */ -add (8) g12<1>F g12<8,8,1>F -0.501961F { align1 }; - /* Cb = Cb - 128 / 255 */ -add (8) g16<1>F g16<8,8,1>F -0.501961F { align1 }; - /* Y = Y * 1.164 */ -mul (8) g14<1>F g14<8,8,1>F 1.164F { align1 }; - /* acc = 1.596 * Cr */ -mul (8) null g12<8,8,1>F 1.596F { align1 }; - /* R = acc + Y */ -mac.sat (8) m2<1>F g14<8,8,1>F 1F { align1 }; - /* acc = Cr * -0.813 */ -mul (8) null g12<8,8,1>F -0.813F { align1 }; - /* acc += Cb * -0.392 */ -mac (8) null g16<8,8,1>F -0.392F { align1 }; - /* G = acc + Y */ -mac.sat (8) m3<1>F g14<8,8,1>F 1F { align1 }; - /* acc = Cb * 2.017 */ -mul (8) null g16<8,8,1>F 2.017F { align1 }; - /* B = acc + Y */ -mac.sat (8) m4<1>F g14<8,8,1>F 1F { align1 }; - /* and do it again */ -add (8) g15<1>F g15<8,8,1>F -0.0627451F { align1 }; -add (8) g13<1>F g13<8,8,1>F -0.501961F { align1 }; -add (8) g17<1>F g17<8,8,1>F -0.501961F { align1 }; -mul (8) g15<1>F g15<8,8,1>F 1.164F { align1 }; -mul (8) null g13<8,8,1>F 1.596F { align1 }; -mac.sat (8) m6<1>F g15<8,8,1>F 1F { align1 }; -mul (8) null g13<8,8,1>F -0.813F { align1 }; -mac (8) null g17<8,8,1>F -0.392F { align1 }; -mac.sat (8) m7<1>F g15<8,8,1>F 1F { align1 }; -mul (8) null g17<8,8,1>F 2.017F { align1 }; -mac.sat (8) m8<1>F g15<8,8,1>F 1F { align1 }; - - /* Pass through control information: - */ -mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable }; - /* Send framebuffer write message: XXX: acc0? */ -send (16) 0 null g0<8,8,1>UW write ( - 0, /* binding table index 0 */ - 8, /* pixel scoreboard clear */ - 4, /* render target write */ - 0 /* no write commit message */ - ) mlen 10 rlen 0 { align1 EOT }; - /* padding */ -nop; -nop; -nop; -nop; -nop; -nop; -nop; -nop; diff --git a/assembler/gen4asm.h b/assembler/gen4asm.h deleted file mode 100644 index 6b957e28..00000000 --- a/assembler/gen4asm.h +++ /dev/null @@ -1,231 +0,0 @@ -/* -*- c-basic-offset: 8 -*- */ -/* - * Copyright © 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -#ifndef __GEN4ASM_H__ -#define __GEN4ASM_H__ - -#include <inttypes.h> -#include <stdbool.h> -#include <assert.h> - -#include "brw_reg.h" -#include "brw_defines.h" -#include "brw_structs.h" -#include "gen8_instruction.h" - -extern long int gen_level; -extern int advanced_flag; -extern int errors; - -#define WARN_ALWAYS (1 << 0) -#define WARN_ALL (1 << 31) -extern unsigned int warning_flags; - -extern char *input_filename; - -extern struct brw_context genasm_context; -extern struct brw_compile genasm_compile; - -/* Predicate for Gen X and above */ -#define IS_GENp(x) (gen_level >= (x)*10) - -/* Predicate for Gen X exactly */ -#define IS_GENx(x) (gen_level >= (x)*10 && gen_level < ((x)+1)*10) - -/* Predicate to match Haswell processors */ -#define IS_HASWELL(x) (gen_level == 75) - -void yyerror (char *msg); - -#define STRUCT_SIZE_ASSERT(TYPE, SIZE) \ -typedef struct { \ - char compile_time_assert_ ## TYPE ## _size[ \ - (sizeof (struct TYPE) == (SIZE)) ? 1 : -1]; \ - } _ ## TYPE ## SizeCheck - -/* ensure nobody changes the size of struct brw_instruction */ -STRUCT_SIZE_ASSERT(brw_instruction, 16); - -#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) - -struct condition { - int cond; - int flag_reg_nr; - int flag_subreg_nr; -}; - -struct predicate { - unsigned pred_control:4; - unsigned pred_inverse:1; - unsigned flag_reg_nr:1; - unsigned flag_subreg_nr:1; -}; - -struct options { - unsigned access_mode:1; - unsigned compression_control:2; /* gen6: quater control */ - unsigned thread_control:2; - unsigned dependency_control:2; - unsigned mask_control:1; - unsigned debug_control:1; - unsigned acc_wr_control:1; - - unsigned end_of_thread:1; -}; - -struct region { - int vert_stride, width, horiz_stride; - int is_default; -}; -struct regtype { - int type; - int is_default; -}; - -/** - * This structure is the internal representation of source operands in the - * parser. - */ -struct src_operand { - struct brw_reg reg; - int default_region; - uint32_t imm32; /* set if src_operand is expressing a branch offset */ - char *reloc_target; /* bspec: branching instructions JIP and UIP are source operands */ -} src_operand; - -typedef struct { - enum { - imm32_d, imm32_f - } r; - union { - uint32_t d; - float f; - int32_t signed_d; - } u; -} imm32_t; - -enum assembler_instruction_type { - GEN4ASM_INSTRUCTION_GEN, - GEN4ASM_INSTRUCTION_GEN_RELOCATABLE, - GEN4ASM_INSTRUCTION_GEN8, - GEN4ASM_INSTRUCTION_GEN8_RELOCATABLE, - GEN4ASM_INSTRUCTION_LABEL, -}; - -struct label_instruction { - char *name; -}; - -struct relocation { - char *first_reloc_target, *second_reloc_target; // JIP and UIP respectively - int first_reloc_offset, second_reloc_offset; // in number of instructions -}; - -/** - * This structure is just the list container for instructions accumulated by - * the parser and labels. - */ -struct brw_program_instruction { - enum assembler_instruction_type type; - unsigned inst_offset; - union { - struct brw_instruction gen; - struct gen8_instruction gen8; - struct label_instruction label; - } insn; - struct relocation reloc; - struct brw_program_instruction *next; -}; - -static inline bool is_label(struct brw_program_instruction *instruction) -{ - return instruction->type == GEN4ASM_INSTRUCTION_LABEL; -} - -static inline char *label_name(struct brw_program_instruction *i) -{ - assert(is_label(i)); - return i->insn.label.name; -} - -static inline bool is_relocatable(struct brw_program_instruction *intruction) -{ - return intruction->type == GEN4ASM_INSTRUCTION_GEN_RELOCATABLE; -} - -/** - * This structure is a list of instructions. It is the final output of the - * parser. - */ -struct brw_program { - struct brw_program_instruction *first; - struct brw_program_instruction *last; -}; - -extern struct brw_program compiled_program; - -#define TYPE_B_INDEX 0 -#define TYPE_UB_INDEX 1 -#define TYPE_W_INDEX 2 -#define TYPE_UW_INDEX 3 -#define TYPE_D_INDEX 4 -#define TYPE_UD_INDEX 5 -#define TYPE_F_INDEX 6 - -#define TOTAL_TYPES 7 - -struct program_defaults { - int execute_size; - int execute_type[TOTAL_TYPES]; - int register_type; - int register_type_regfile; - struct region source_region; - struct region source_region_type[TOTAL_TYPES]; - struct region dest_region; - struct region dest_region_type[TOTAL_TYPES]; -}; -extern struct program_defaults program_defaults; - -struct declared_register { - char *name; - struct brw_reg reg; - int element_size; - struct region src_region; - int dst_region; -}; -struct declared_register *find_register(char *name); -void insert_register(struct declared_register *reg); - -int yyparse(void); -int yylex(void); -int yylex_destroy(void); - -char * -lex_text(void); - -#endif /* __GEN4ASM_H__ */ diff --git a/assembler/gen8_disasm.c b/assembler/gen8_disasm.c deleted file mode 100644 index 7fc7a658..00000000 --- a/assembler/gen8_disasm.c +++ /dev/null @@ -1,993 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission to use, copy, modify, distribute, and sell this software and its - * documentation for any purpose is hereby granted without fee, provided that - * the above copyright notice appear in all copies and that both that copyright - * notice and this permission notice appear in supporting documentation, and - * that the name of the copyright holders not be used in advertising or - * publicity pertaining to distribution of the software without specific, - * written prior permission. The copyright holders make no representations - * about the suitability of this software for any purpose. It is provided "as - * is" without express or implied warranty. - * - * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, - * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER - * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THIS SOFTWARE. - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <getopt.h> -#include <unistd.h> -#include <stdarg.h> - -#include "brw_context.h" -#include "brw_defines.h" -#include "gen8_instruction.h" - -static const struct opcode_desc *m_opcode = opcode_descs; - -static const char *const m_conditional_modifier[16] = { - /* [0 - BRW_CONDITIONAL_NONE] */ "", - /* [1 - BRW_CONDITIONAL_Z] */ ".e", - /* [2 - BRW_CONDITIONAL_NZ] */ ".ne", - /* [3 - BRW_CONDITIONAL_G] */ ".g", - /* [4 - BRW_CONDITIONAL_GE] */ ".ge", - /* [5 - BRW_CONDITIONAL_L] */ ".l", - /* [6 - BRW_CONDITIONAL_LE] */ ".le", - /* [7 - Reserved] */ NULL, - /* [8 - BRW_CONDITIONAL_O] */ ".o", - /* [9 - BRW_CONDITIONAL_U] */ ".u", - /* [a-f - Reserved] */ -}; - -static const char *const m_negate[2] = { "", "-" }; - -static const char *const m_abs[2] = { "", "(abs)" }; - -static const char *const m_vert_stride[16] = { - "0", - "1", - "2", - "4", - "8", - "16", - "32", -}; - -static const char *const width[8] = { - "1", - "2", - "4", - "8", - "16", -}; - -static const char *const m_horiz_stride[4] = { - "0", - "1", - "2", - "4" -}; - -static const char *const m_chan_sel[4] = { "x", "y", "z", "w" }; - -static const char *const m_debug_ctrl[2] = { "", ".breakpoint" }; - -static const char *const m_saturate[2] = { "", ".sat" }; - -static const char *const m_accwr[2] = { "", "AccWrEnable" }; - -static const char *const m_maskctrl[2] = { "WE_normal", "WE_all" }; - -static const char *const m_exec_size[8] = { - "1", - "2", - "4", - "8", - "16", - "32", -}; - -static const char *const m_pred_inv[2] = { "+", "-" }; - -static const char *const m_pred_ctrl_align16[16] = { - "", - "", - ".x", - ".y", - ".z", - ".w", - ".any4h", - ".all4h", -}; - -static const char *const m_pred_ctrl_align1[16] = { - "", - "", - ".anyv", - ".allv", - ".any2h", - ".all2h", - ".any4h", - ".all4h", - ".any8h", - ".all8h", - ".any16h", - ".all16h", - ".any32h", - ".all32h", -}; - -static const char *const m_thread_ctrl[4] = { - "", - "atomic", - "switch", -}; - -static const char *const m_dep_ctrl[4] = { - "", - "NoDDClr", - "NoDDChk", - "NoDDClr,NoDDChk", -}; - -static const char *const m_mask_ctrl[4] = { - "", - "nomask", -}; - -static const char *const m_access_mode[2] = { "align1", "align16" }; - -static const char *const m_reg_type[8] = { - "UD", - "D", - "UW", - "W", - "UB", - "B", - "DF", - "F", -}; - -static const int reg_type_size[8] = { - /* UD */ 4, - /* D */ 4, - /* UW */ 2, - /* W */ 2, - /* UB */ 1, - /* B */ 1, - /* DF */ 8, - /* F */ 4, -}; - -static const char *const m_reg_file[4] = { - "A", - "g", - NULL, - "imm", -}; - -static const char *const m_writemask[16] = { - ".(none)", - ".x", - ".y", - ".xy", - ".z", - ".xz", - ".yz", - ".xyz", - ".w", - ".xw", - ".yw", - ".xyw", - ".zw", - ".xzw", - ".yzw", - "", -}; - -static const char *const m_eot[2] = { "", "EOT" }; - -static const char *const m_sfid[16] = { - /* [0 - BRW_SFID_NULL] */ "null", - /* [1 - Reserved] */ NULL, - /* [2 - BRW_SFID_SAMPLER] */ "sampler", - /* [3 - BRW_SFID_MESSAGE_GATEWAY] */ "gateway", - /* [4 - GEN6_SFID_DATAPORT_SAMPLER_CACHE] */ "dp/sampler_cache", - /* [5 - GEN6_SFID_DATAPORT_RENDER_CACHE] */ "dp/render_cache", - /* [6 - BRW_SFID_URB] */ "URB", - /* [7 - BRW_SFID_THREAD_SPAWNER] */ "thread_spawner", - /* [8 - BRW_SFID_VME] */ "vme", - /* [9 - GEN6_SFID_DATAPORT_CONSTANT_CACHE] */ "dp/constant_cache", - /* [a - GEN7_SFID_DATAPORT_DATA_CACHE] */ "dp/data_cache", - /* [b - GEN7_SFID_PI] */ "pi", - /* [c - HSW_SFID_DATAPORT_DATA_CACHE_1] */ "dp/data_cache:1", - /* [d - HSW_SFID_CRE] */ "cre", - /* [e-f - Reserved */ NULL, NULL, -}; - -#if 0 -static const char *const dp_rc_msg_type[16] = { - [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read", - [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read", - [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read", - [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read", - [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read", - [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read", - [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write", - [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write", - [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write", - [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write", - [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write", - [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write", - [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write", - [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write", -}; -#endif - -static const char *const m_math_function[16] = { - /* [0 - Reserved] */ NULL, - /* [1 - BRW_MATH_FUNCTION_INV] */ "inv", - /* [2 - BRW_MATH_FUNCTION_LOG] */ "log", - /* [3 - BRW_MATH_FUNCTION_EXP] */ "exp", - /* [4 - BRW_MATH_FUNCTION_SQRT] */ "sqrt", - /* [5 - BRW_MATH_FUNCTION_RSQ] */ "rsq", - /* [6 - BRW_MATH_FUNCTION_SIN] */ "sin", - /* [7 - BRW_MATH_FUNCTION_COS] */ "cos", - /* [8 - Reserved] */ NULL, - /* [9 - BRW_MATH_FUNCTION_FDIV] */ "fdiv", - /* [a - BRW_MATH_FUNCTION_POW] */ "pow", - /* [b - BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] */ "intdivmod", - /* [c - BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] */ "intdiv", - /* [d - BRW_MATH_FUNCTION_INT_DIV_REMAINDER] */ "intmod", - /* [e - GEN8_MATH_FUNCTION_INVM] */ "invm", - /* [f - GEN8_MATH_FUNCTION_RSQRTM] */ "rsqrtm", -}; - -static const char *const m_urb_opcode[16] = { - /* [0] */ "write HWord", - /* [1] */ "write OWord", - /* [2] */ "read HWord", - /* [3] */ "read OWord", - /* [4] */ "atomic mov", - /* [5] */ "atomic inc", - /* [6] */ "atomic add", - /* [7] */ "SIMD8 write", - /* [8] */ "SIMD8 read", - /* [9-15] - reserved */ -}; - -static const char *const m_urb_interleave[2] = { "", "interleaved" }; - -static int column; - -static int -string(FILE *file, const char *string) -{ - fputs(string, file); - column += strlen(string); - return 0; -} - -static int -format(FILE *f, const char *format, ...) -{ - char buf[1024]; - va_list args; - va_start(args, format); - - vsnprintf(buf, sizeof(buf) - 1, format, args); - va_end(args); - string(f, buf); - return 0; -} - -static int -newline(FILE *f) -{ - putc('\n', f); - column = 0; - return 0; -} - -static int -pad(FILE *f, int c) -{ - do - string(f, " "); - while (column < c); - return 0; -} - -static int -control(FILE *file, const char *name, const char *const ctrl[], - unsigned id, int *space) -{ - if (!ctrl[id]) { - fprintf(file, "*** invalid %s value %d ", name, id); - return 1; - } - if (ctrl[id][0]) - { - if (space && *space) - string(file, " "); - string(file, ctrl[id]); - if (space) - *space = 1; - } - return 0; -} - -static int -print_opcode(FILE *file, int id) -{ - if (!m_opcode[id].name) { - format(file, "*** invalid opcode value %d ", id); - return 1; - } - string(file, m_opcode[id].name); - return 0; -} - -static int -reg(FILE *file, unsigned reg_file, unsigned _reg_nr) -{ - int err = 0; - - if (reg_file == BRW_ARCHITECTURE_REGISTER_FILE) { - switch (_reg_nr & 0xf0) { - case BRW_ARF_NULL: - string(file, "null"); - return -1; - case BRW_ARF_ADDRESS: - format(file, "a%d", _reg_nr & 0x0f); - break; - case BRW_ARF_ACCUMULATOR: - format(file, "acc%d", _reg_nr & 0x0f); - break; - case BRW_ARF_FLAG: - format(file, "f%d", _reg_nr & 0x0f); - break; - case BRW_ARF_MASK: - format(file, "mask%d", _reg_nr & 0x0f); - break; - case BRW_ARF_MASK_STACK: - format(file, "msd%d", _reg_nr & 0x0f); - break; - case BRW_ARF_STATE: - format(file, "sr%d", _reg_nr & 0x0f); - break; - case BRW_ARF_CONTROL: - format(file, "cr%d", _reg_nr & 0x0f); - break; - case BRW_ARF_NOTIFICATION_COUNT: - format(file, "n%d", _reg_nr & 0x0f); - break; - case BRW_ARF_IP: - string(file, "ip"); - return -1; - break; - default: - format(file, "ARF%d", _reg_nr); - break; - } - } else { - err |= control(file, "src reg file", m_reg_file, reg_file, NULL); - format(file, "%d", _reg_nr); - } - return err; -} - -static int -dest(FILE *file, struct gen8_instruction *inst) -{ - int err = 0; - - if (gen8_access_mode(inst) == BRW_ALIGN_1) - { - assert(gen8_dst_address_mode(inst) == BRW_ADDRESS_DIRECT); - err |= reg(file, gen8_dst_reg_file(inst), gen8_dst_da_reg_nr(inst)); - if (err == -1) - return 0; - if (gen8_dst_da1_subreg_nr(inst)) - format(file, ".%d", gen8_dst_da1_subreg_nr(inst) / - reg_type_size[gen8_dst_reg_type(inst)]); - string(file, "<"); - err |= control(file, "horiz stride", m_horiz_stride, gen8_dst_da1_hstride(inst), NULL); - string(file, ">"); - err |= control(file, "dest reg encoding", m_reg_type, gen8_dst_reg_type(inst), NULL); - } - else - { - assert(gen8_dst_address_mode(inst) == BRW_ADDRESS_DIRECT); - err |= reg(file, gen8_dst_reg_file(inst), gen8_dst_da_reg_nr(inst)); - if (err == -1) - return 0; - if (gen8_dst_da16_subreg_nr(inst)) - format(file, ".%d", gen8_dst_da16_subreg_nr(inst) / - reg_type_size[gen8_dst_reg_type(inst)]); - string(file, "<1>"); - err |= control(file, "writemask", m_writemask, gen8_da16_writemask(inst), NULL); - err |= control(file, "dest reg encoding", m_reg_type, gen8_dst_reg_type(inst), NULL); - } - - return 0; -} - -#if 0 -static int -dest_3src(FILE *file, gen8_instruction *inst) -{ - int err = 0; - uint32_t reg_file; - - if (inst->bits1.da3src.dest_reg_file) - reg_file = BRW_MESSAGE_REGISTER_FILE; - else - reg_file = BRW_GENERAL_REGISTER_FILE; - - err |= reg(file, reg_file, inst->bits1.da3src.dest_reg_nr); - if (err == -1) - return 0; - if (inst->bits1.da3src.dest_subreg_nr) - format(file, ".%d", inst->bits1.da3src.dest_subreg_nr); - string(file, "<1>"); - err |= control(file, "writemask", m_writemask, inst->bits1.da3src.dest_writemask, NULL); - err |= control(file, "dest reg encoding", m_reg_type, BRW_REGISTER_TYPE_F, NULL); - - return 0; -} -#endif - -static int -src_align1_region(FILE *file, unsigned vert_stride, unsigned _width, - unsigned horiz_stride) -{ - int err = 0; - string(file, "<"); - err |= control(file, "vert stride", m_vert_stride, vert_stride, NULL); - string(file, ","); - err |= control(file, "width", width, _width, NULL); - string(file, ","); - err |= control(file, "horiz_stride", m_horiz_stride, horiz_stride, NULL); - string(file, ">"); - return err; -} - -static int -src_da1(FILE *file, unsigned type, unsigned reg_file, - unsigned vert_stride, unsigned _width, unsigned horiz_stride, - unsigned reg_num, unsigned sub_reg_num, unsigned _abs, unsigned negate) -{ - int err = 0; - err |= control(file, "negate", m_negate, negate, NULL); - err |= control(file, "abs", m_abs, _abs, NULL); - - err |= reg(file, reg_file, reg_num); - if (err == -1) - return 0; - if (sub_reg_num) - format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */ - src_align1_region(file, vert_stride, _width, horiz_stride); - err |= control(file, "src reg encoding", m_reg_type, type, NULL); - return err; -} - -static int -src_da16(FILE *file, - unsigned _reg_type, - unsigned reg_file, - unsigned vert_stride, - unsigned _reg_nr, - unsigned _subreg_nr, - unsigned _abs, - unsigned negate, - unsigned swz_x, - unsigned swz_y, - unsigned swz_z, - unsigned swz_w) -{ - int err = 0; - err |= control(file, "negate", m_negate, negate, NULL); - err |= control(file, "abs", m_abs, _abs, NULL); - - err |= reg(file, reg_file, _reg_nr); - if (err == -1) - return 0; - if (_subreg_nr) - /* bit4 for subreg number byte addressing. Make this same meaning as - in da1 case, so output looks consistent. */ - format(file, ".%d", 16 / reg_type_size[_reg_type]); - string(file, "<"); - err |= control(file, "vert stride", m_vert_stride, vert_stride, NULL); - string(file, ",4,1>"); - /* - * Three kinds of swizzle display: - * identity - nothing printed - * 1->all - print the single channel - * 1->1 - print the mapping - */ - if (swz_x == BRW_CHANNEL_X && - swz_y == BRW_CHANNEL_Y && - swz_z == BRW_CHANNEL_Z && - swz_w == BRW_CHANNEL_W) - { - ; - } - else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) - { - string(file, "."); - err |= control(file, "channel select", m_chan_sel, swz_x, NULL); - } - else - { - string(file, "."); - err |= control(file, "channel select", m_chan_sel, swz_x, NULL); - err |= control(file, "channel select", m_chan_sel, swz_y, NULL); - err |= control(file, "channel select", m_chan_sel, swz_z, NULL); - err |= control(file, "channel select", m_chan_sel, swz_w, NULL); - } - err |= control(file, "src da16 reg type", m_reg_type, _reg_type, NULL); - return err; -} - -#if 0 -static int -src0_3src(FILE *file, gen8_instruction *inst) -{ - int err = 0; - unsigned swz_x = (inst->bits2.da3src.src0_swizzle >> 0) & 0x3; - unsigned swz_y = (inst->bits2.da3src.src0_swizzle >> 2) & 0x3; - unsigned swz_z = (inst->bits2.da3src.src0_swizzle >> 4) & 0x3; - unsigned swz_w = (inst->bits2.da3src.src0_swizzle >> 6) & 0x3; - - err |= control(file, "negate", m_negate, inst->bits1.da3src.src0_negate, NULL); - err |= control(file, "abs", m_abs, inst->bits1.da3src.src0_abs, NULL); - - err |= reg(file, BRW_GENERAL_REGISTER_FILE, inst->bits2.da3src.src0_reg_nr); - if (err == -1) - return 0; - if (inst->bits2.da3src.src0_subreg_nr) - format(file, ".%d", inst->bits2.da3src.src0_subreg_nr); - string(file, "<4,1,1>"); - err |= control(file, "src da16 reg type", m_reg_type, - BRW_REGISTER_TYPE_F, NULL); - /* - * Three kinds of swizzle display: - * identity - nothing printed - * 1->all - print the single channel - * 1->1 - print the mapping - */ - if (swz_x == BRW_CHANNEL_X && - swz_y == BRW_CHANNEL_Y && - swz_z == BRW_CHANNEL_Z && - swz_w == BRW_CHANNEL_W) - { - ; - } - else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) - { - string(file, "."); - err |= control(file, "channel select", m_chan_sel, swz_x, NULL); - } - else - { - string(file, "."); - err |= control(file, "channel select", m_chan_sel, swz_x, NULL); - err |= control(file, "channel select", m_chan_sel, swz_y, NULL); - err |= control(file, "channel select", m_chan_sel, swz_z, NULL); - err |= control(file, "channel select", m_chan_sel, swz_w, NULL); - } - return err; -} - -static int -src1_3src(FILE *file, gen8_instruction *inst) -{ - int err = 0; - unsigned swz_x = (inst->bits2.da3src.src1_swizzle >> 0) & 0x3; - unsigned swz_y = (inst->bits2.da3src.src1_swizzle >> 2) & 0x3; - unsigned swz_z = (inst->bits2.da3src.src1_swizzle >> 4) & 0x3; - unsigned swz_w = (inst->bits2.da3src.src1_swizzle >> 6) & 0x3; - unsigned src1_subreg_nr = (inst->bits2.da3src.src1_subreg_nr_low | - (inst->bits3.da3src.src1_subreg_nr_high << 2)); - - err |= control(file, "negate", m_negate, inst->bits1.da3src.src1_negate, - NULL); - err |= control(file, "abs", m_abs, inst->bits1.da3src.src1_abs, NULL); - - err |= reg(file, BRW_GENERAL_REGISTER_FILE, - inst->bits3.da3src.src1_reg_nr); - if (err == -1) - return 0; - if (src1_subreg_nr) - format(file, ".%d", src1_subreg_nr); - string(file, "<4,1,1>"); - err |= control(file, "src da16 reg type", m_reg_type, - BRW_REGISTER_TYPE_F, NULL); - /* - * Three kinds of swizzle display: - * identity - nothing printed - * 1->all - print the single channel - * 1->1 - print the mapping - */ - if (swz_x == BRW_CHANNEL_X && - swz_y == BRW_CHANNEL_Y && - swz_z == BRW_CHANNEL_Z && - swz_w == BRW_CHANNEL_W) - { - ; - } - else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) - { - string(file, "."); - err |= control(file, "channel select", m_chan_sel, swz_x, NULL); - } - else - { - string(file, "."); - err |= control(file, "channel select", m_chan_sel, swz_x, NULL); - err |= control(file, "channel select", m_chan_sel, swz_y, NULL); - err |= control(file, "channel select", m_chan_sel, swz_z, NULL); - err |= control(file, "channel select", m_chan_sel, swz_w, NULL); - } - return err; -} - - -static int -src2_3src(FILE *file, gen8_instruction *inst) -{ - int err = 0; - unsigned swz_x = (inst->bits3.da3src.src2_swizzle >> 0) & 0x3; - unsigned swz_y = (inst->bits3.da3src.src2_swizzle >> 2) & 0x3; - unsigned swz_z = (inst->bits3.da3src.src2_swizzle >> 4) & 0x3; - unsigned swz_w = (inst->bits3.da3src.src2_swizzle >> 6) & 0x3; - - err |= control(file, "negate", m_negate, inst->bits1.da3src.src2_negate, - NULL); - err |= control(file, "abs", m_abs, inst->bits1.da3src.src2_abs, NULL); - - err |= reg(file, BRW_GENERAL_REGISTER_FILE, - inst->bits3.da3src.src2_reg_nr); - if (err == -1) - return 0; - if (inst->bits3.da3src.src2_subreg_nr) - format(file, ".%d", inst->bits3.da3src.src2_subreg_nr); - string(file, "<4,1,1>"); - err |= control(file, "src da16 reg type", m_reg_type, - BRW_REGISTER_TYPE_F, NULL); - /* - * Three kinds of swizzle display: - * identity - nothing printed - * 1->all - print the single channel - * 1->1 - print the mapping - */ - if (swz_x == BRW_CHANNEL_X && - swz_y == BRW_CHANNEL_Y && - swz_z == BRW_CHANNEL_Z && - swz_w == BRW_CHANNEL_W) - { - ; - } - else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) - { - string(file, "."); - err |= control(file, "channel select", m_chan_sel, swz_x, NULL); - } - else - { - string(file, "."); - err |= control(file, "channel select", m_chan_sel, swz_x, NULL); - err |= control(file, "channel select", m_chan_sel, swz_y, NULL); - err |= control(file, "channel select", m_chan_sel, swz_z, NULL); - err |= control(file, "channel select", m_chan_sel, swz_w, NULL); - } - return err; -} -#endif - -static int -imm(FILE *file, unsigned type, struct gen8_instruction *inst) -{ - switch (type) { - case BRW_REGISTER_TYPE_UD: - format(file, "0x%08xUD", gen8_src1_imm_ud(inst)); - break; - case BRW_REGISTER_TYPE_D: - format(file, "%dD", (int) gen8_src1_imm_d(inst)); - break; - case BRW_REGISTER_TYPE_UW: - format(file, "0x%04xUW", (uint16_t) gen8_src1_imm_ud(inst)); - break; - case BRW_REGISTER_TYPE_W: - format(file, "%dW", (int16_t) gen8_src1_imm_d(inst)); - break; - case BRW_REGISTER_TYPE_UB: - format(file, "0x%02xUB", (int8_t) gen8_src1_imm_ud(inst)); - break; - case BRW_REGISTER_TYPE_VF: - format(file, "Vector Float"); - break; - case BRW_REGISTER_TYPE_V: - format(file, "0x%08xV", gen8_src1_imm_ud(inst)); - break; - case BRW_REGISTER_TYPE_F: - format(file, "%-gF", gen8_src1_imm_f(inst)); - } - return 0; -} - -static int -src0(FILE *file, struct gen8_instruction *inst) -{ - if (gen8_src0_reg_file(inst) == BRW_IMMEDIATE_VALUE) - return imm(file, gen8_src0_reg_type(inst), inst); - - if (gen8_access_mode(inst) == BRW_ALIGN_1) - { - assert(gen8_src0_address_mode(inst) == BRW_ADDRESS_DIRECT); - return src_da1(file, - gen8_src0_reg_type(inst), - gen8_src0_reg_file(inst), - gen8_src0_vert_stride(inst), - gen8_src0_da1_width(inst), - gen8_src0_da1_hstride(inst), - gen8_src0_da_reg_nr(inst), - gen8_src0_da1_subreg_nr(inst), - gen8_src0_abs(inst), - gen8_src0_negate(inst)); - } - else - { - assert(gen8_src0_address_mode(inst) == BRW_ADDRESS_DIRECT); - return src_da16(file, - gen8_src0_reg_type(inst), - gen8_src0_reg_file(inst), - gen8_src0_vert_stride(inst), - gen8_src0_da_reg_nr(inst), - gen8_src0_da16_subreg_nr(inst), - gen8_src0_abs(inst), - gen8_src0_negate(inst), - gen8_src0_da16_swiz_x(inst), - gen8_src0_da16_swiz_y(inst), - gen8_src0_da16_swiz_z(inst), - gen8_src0_da16_swiz_w(inst)); - } -} - -static int -src1(FILE *file, struct gen8_instruction *inst) -{ - if (gen8_src1_reg_file(inst) == BRW_IMMEDIATE_VALUE) - return imm(file, gen8_src1_reg_type(inst), inst); - - if (gen8_access_mode(inst) == BRW_ALIGN_1) - { - assert(gen8_src1_address_mode(inst) == BRW_ADDRESS_DIRECT); - return src_da1(file, - gen8_src1_reg_type(inst), - gen8_src1_reg_file(inst), - gen8_src1_vert_stride(inst), - gen8_src1_da1_width(inst), - gen8_src1_da1_hstride(inst), - gen8_src1_da_reg_nr(inst), - gen8_src1_da1_subreg_nr(inst), - gen8_src1_abs(inst), - gen8_src1_negate(inst)); - } - else - { - assert(gen8_src1_address_mode(inst) == BRW_ADDRESS_DIRECT); - return src_da16(file, - gen8_src1_reg_type(inst), - gen8_src1_reg_file(inst), - gen8_src1_vert_stride(inst), - gen8_src1_da_reg_nr(inst), - gen8_src1_da16_subreg_nr(inst), - gen8_src1_abs(inst), - gen8_src1_negate(inst), - gen8_src1_da16_swiz_x(inst), - gen8_src1_da16_swiz_y(inst), - gen8_src1_da16_swiz_z(inst), - gen8_src1_da16_swiz_w(inst)); - } -} - -static int esize[6] = { 1, 2, 4, 8, 16, 32 }; - -static int -qtr_ctrl(FILE *file, struct gen8_instruction *inst) -{ - int qtr_ctl = gen8_qtr_control(inst); - int exec_size = esize[gen8_exec_size(inst)]; - - if (exec_size == 8) { - switch (qtr_ctl) { - case 0: - string(file, " 1Q"); - break; - case 1: - string(file, " 2Q"); - break; - case 2: - string(file, " 3Q"); - break; - case 3: - string(file, " 4Q"); - break; - } - } else if (exec_size == 16) { - if (qtr_ctl < 2) - string(file, " 1H"); - else - string(file, " 2H"); - } - return 0; -} - -int -gen8_disassemble(FILE *file, struct gen8_instruction *insn, int gen) -{ - int err = 0; - int space = 0; - - const int opcode = gen8_opcode(insn); - - if (gen8_pred_control(insn)) { - string(file, "("); - err |= control(file, "predicate inverse", m_pred_inv, gen8_pred_inv(insn), NULL); - format(file, "f%d", gen8_flag_reg_nr(insn)); - if (gen8_flag_subreg_nr(insn)) - format(file, ".%d", gen8_flag_subreg_nr(insn)); - if (gen8_access_mode(insn) == BRW_ALIGN_1) { - err |= control(file, "predicate control align1", m_pred_ctrl_align1, - gen8_pred_control(insn), NULL); - } else { - err |= control(file, "predicate control align16", m_pred_ctrl_align16, - gen8_pred_control(insn), NULL); - } - string(file, ") "); - } - - err |= print_opcode(file, opcode); - err |= control(file, "saturate", m_saturate, gen8_saturate(insn), NULL); - err |= control(file, "debug control", m_debug_ctrl, gen8_debug_control(insn), NULL); - - if (opcode == BRW_OPCODE_MATH) { - string(file, " "); - err |= control(file, "function", m_math_function, gen8_math_function(insn), - NULL); - } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) { - err |= control(file, "conditional modifier", m_conditional_modifier, - gen8_cond_modifier(insn), NULL); - - /* If we're using the conditional modifier, print the flag reg used. */ - if (gen8_cond_modifier(insn) && opcode != BRW_OPCODE_SEL) { - format(file, ".f%d", gen8_flag_reg_nr(insn)); - if (gen8_flag_subreg_nr(insn)) - format(file, ".%d", gen8_flag_subreg_nr(insn)); - } - } - - if (opcode != BRW_OPCODE_NOP) { - string(file, "("); - err |= control(file, "execution size", m_exec_size, gen8_exec_size(insn), NULL); - string(file, ")"); - } - - if (m_opcode[opcode].nsrc == 3) { - string(file, "XXX: 3-src"); - #if 0 - pad(file, 16); - err |= dest_3src(file, this); - - pad(file, 32); - err |= src0_3src(file, this); - - pad(file, 48); - err |= src1_3src(file, this); - - pad(file, 64); - err |= src2_3src(file, this); - #endif - } else { - if (m_opcode[opcode].ndst > 0) { - pad(file, 16); - err |= dest(file, insn); - } else if (opcode == BRW_OPCODE_ENDIF) { - format(file, " %d", gen8_jip(insn)); - } else if (opcode == BRW_OPCODE_IF || - opcode == BRW_OPCODE_ELSE || - opcode == BRW_OPCODE_WHILE || - opcode == BRW_OPCODE_BREAK || - opcode == BRW_OPCODE_CONTINUE || - opcode == BRW_OPCODE_HALT) { - format(file, " %d %d", gen8_jip(insn), gen8_uip(insn)); - } - - if (m_opcode[opcode].nsrc > 0) { - pad(file, 32); - err |= src0(file, insn); - } - if (m_opcode[opcode].nsrc > 1) { - pad(file, 48); - err |= src1(file, insn); - } - } - - if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) { - const int sfid = gen8_sfid(insn); - - newline(file); - pad(file, 16); - space = 0; - - err |= control(file, "SFID", m_sfid, sfid, &space); - - switch (sfid) { - case BRW_SFID_SAMPLER: - format(file, " (%d, %d, %d, %d)", - gen8_binding_table_index(insn), - gen8_sampler(insn), - gen8_sampler_msg_type(insn), - gen8_sampler_simd_mode(insn)); - break; - - case BRW_SFID_URB: - space = 1; - err |= control(file, "urb opcode", m_urb_opcode, - gen8_urb_opcode(insn), &space); - err |= control(file, "urb interleave", m_urb_interleave, - gen8_urb_interleave(insn), &space); - format(file, " %d %d", - gen8_urb_global_offset(insn), gen8_urb_per_slot_offset(insn)); - break; - - case GEN6_SFID_DATAPORT_SAMPLER_CACHE: - case GEN6_SFID_DATAPORT_RENDER_CACHE: - case GEN6_SFID_DATAPORT_CONSTANT_CACHE: - case GEN7_SFID_DATAPORT_DATA_CACHE: - format(file, " (%d, 0x%x)", - gen8_binding_table_index(insn), - gen8_function_control(insn)); - break; - - default: - format(file, "unsupported shared function ID (%d)", sfid); - break; - } - if (space) - string(file, " "); - format(file, "mlen %d", gen8_mlen(insn)); - format(file, " rlen %d", gen8_rlen(insn)); - } - pad(file, 64); - if (opcode != BRW_OPCODE_NOP) { - string(file, "{"); - space = 1; - err |= control(file, "access mode", m_access_mode, gen8_access_mode(insn), &space); - err |= control(file, "mask control", m_maskctrl, gen8_mask_control(insn), &space); - err |= control(file, "dependency control", m_dep_ctrl, gen8_dep_control(insn), &space); - - err |= qtr_ctrl(file, insn); - - err |= control(file, "thread control", m_thread_ctrl, gen8_thread_control(insn), &space); - err |= control(file, "acc write control", m_accwr, gen8_acc_wr_control(insn), &space); - if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) - err |= control(file, "end of thread", m_eot, gen8_eot(insn), &space); - if (space) - string(file, " "); - string(file, "}"); - } - string(file, ";"); - newline(file); - return err; -} diff --git a/assembler/gen8_instruction.c b/assembler/gen8_instruction.c deleted file mode 100644 index fe0067e0..00000000 --- a/assembler/gen8_instruction.c +++ /dev/null @@ -1,445 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -/** @file gen8_instruction.cpp - * - * A representation of a Gen8+ EU instruction, with helper methods to get - * and set various fields. This is the actual hardware format. - */ - -#include "brw_defines.h" -#include "gen8_instruction.h" - -void -gen8_set_dst(struct gen8_instruction *inst, struct brw_reg reg) -{ - /* MRFs haven't existed since Gen7, so we better not be using them. */ - if (reg.file == BRW_MESSAGE_REGISTER_FILE) { - reg.file = BRW_GENERAL_REGISTER_FILE; - reg.nr += GEN7_MRF_HACK_START; - } - - assert(reg.file != BRW_MESSAGE_REGISTER_FILE); - - if (reg.file == BRW_GENERAL_REGISTER_FILE) - assert(reg.nr < BRW_MAX_GRF); - - gen8_set_dst_reg_file(inst, reg.file); - gen8_set_dst_reg_type(inst, reg.type); - - if (reg.address_mode == BRW_ADDRESS_DIRECT) { - gen8_set_dst_da_reg_nr(inst, reg.nr); - - if (gen8_access_mode(inst) == BRW_ALIGN_1) { - /* Set Dst.SubRegNum[4:0] */ - gen8_set_dst_da1_subreg_nr(inst, reg.subnr); - - /* Set Dst.HorzStride */ - if (reg.hstride == BRW_HORIZONTAL_STRIDE_0) - reg.hstride = BRW_HORIZONTAL_STRIDE_1; - gen8_set_dst_da1_hstride(inst, reg.hstride); - } else { - /* Align16 SubRegNum only has a single bit (bit 4; bits 3:0 MBZ). */ - assert(reg.subnr == 0 || reg.subnr == 16); - gen8_set_dst_da16_subreg_nr(inst, reg.subnr >> 4); - gen8_set_da16_writemask(inst, reg.dw1.bits.writemask); - } - } else { - /* Indirect mode */ - assert (gen8_access_mode(inst) == BRW_ALIGN_1); - - gen8_set_dst_addr_mode(inst, BRW_ADDRESS_REGISTER_INDIRECT_REGISTER); - /* Set Dst.HorzStride */ - if (reg.hstride == BRW_HORIZONTAL_STRIDE_0) - reg.hstride = BRW_HORIZONTAL_STRIDE_1; - gen8_set_dst_da1_hstride(inst, reg.hstride); - gen8_set_dst_ida1_sub_nr(inst, reg.subnr); - gen8_set_dst_ida1_imm8(inst, (reg.dw1.bits.indirect_offset & IMM8_MASK)); - if ((reg.dw1.bits.indirect_offset & IMM9_MASK) == IMM9_MASK) - gen8_set_dst_ida1_imm9(inst, 1); - else - gen8_set_dst_ida1_imm9(inst, 0); - } - - /* Generators should set a default exec_size of either 8 (SIMD4x2 or SIMD8) - * or 16 (SIMD16), as that's normally correct. However, when dealing with - * small registers, we automatically reduce it to match the register size. - */ - if (reg.width < BRW_EXECUTE_8) - gen8_set_exec_size(inst, reg.width); -} - -static void -gen8_validate_reg(struct gen8_instruction *inst, struct brw_reg reg) -{ - int hstride_for_reg[] = {0, 1, 2, 4}; - int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; - int width_for_reg[] = {1, 2, 4, 8, 16}; - int execsize_for_reg[] = {1, 2, 4, 8, 16}; - int width, hstride, vstride, execsize; - - if (reg.file == BRW_IMMEDIATE_VALUE) { - /* TODO: check immediate vectors */ - return; - } - - if (reg.file == BRW_ARCHITECTURE_REGISTER_FILE) - return; - - assert(reg.hstride >= 0 && reg.hstride < Elements(hstride_for_reg)); - hstride = hstride_for_reg[reg.hstride]; - - if (reg.vstride == 0xf) { - vstride = -1; - } else { - assert(reg.vstride >= 0 && reg.vstride < Elements(vstride_for_reg)); - vstride = vstride_for_reg[reg.vstride]; - } - - assert(reg.width >= 0 && reg.width < Elements(width_for_reg)); - width = width_for_reg[reg.width]; - - assert(gen8_exec_size(inst) >= 0 && - gen8_exec_size(inst) < Elements(execsize_for_reg)); - execsize = execsize_for_reg[gen8_exec_size(inst)]; - - /* Restrictions from 3.3.10: Register Region Restrictions. */ - /* 3. */ - assert(execsize >= width); - - /* 4. */ - if (execsize == width && hstride != 0) { - assert(vstride == -1 || vstride == width * hstride); - } - - /* 5. */ - if (execsize == width && hstride == 0) { - /* no restriction on vstride. */ - } - - /* 6. */ - if (width == 1) { - assert(hstride == 0); - } - - /* 7. */ - if (execsize == 1 && width == 1) { - assert(hstride == 0); - assert(vstride == 0); - } - - /* 8. */ - if (vstride == 0 && hstride == 0) { - assert(width == 1); - } - - /* 10. Check destination issues. */ -} - -void -gen8_set_src0(struct gen8_instruction *inst, struct brw_reg reg) -{ - /* MRFs haven't existed since Gen7, so we better not be using them. */ - if (reg.file == BRW_MESSAGE_REGISTER_FILE) { - reg.file = BRW_GENERAL_REGISTER_FILE; - reg.nr += GEN7_MRF_HACK_START; - } - - if (reg.file == BRW_GENERAL_REGISTER_FILE) - assert(reg.nr < BRW_MAX_GRF); - - gen8_validate_reg(inst, reg); - - gen8_set_src0_reg_file(inst, reg.file); - gen8_set_src0_reg_type(inst, reg.type); - gen8_set_src0_abs(inst, reg.abs); - gen8_set_src0_negate(inst, reg.negate); - - - if (reg.file == BRW_IMMEDIATE_VALUE) { - inst->data[3] = reg.dw1.ud; - - /* Required to set some fields in src1 as well: */ - gen8_set_src1_reg_file(inst, 0); /* arf */ - gen8_set_src1_reg_type(inst, reg.type); - } else if (reg.address_mode == BRW_ADDRESS_DIRECT) { - gen8_set_src0_da_reg_nr(inst, reg.nr); - - if (gen8_access_mode(inst) == BRW_ALIGN_1) { - /* Set Src0.SubRegNum[4:0] */ - gen8_set_src0_da1_subreg_nr(inst, reg.subnr); - - if (reg.width == BRW_WIDTH_1 && - gen8_exec_size(inst) == BRW_EXECUTE_1) { - gen8_set_src0_da1_hstride(inst, BRW_HORIZONTAL_STRIDE_0); - gen8_set_src0_vert_stride(inst, BRW_VERTICAL_STRIDE_0); - } else { - gen8_set_src0_da1_hstride(inst, reg.hstride); - gen8_set_src0_vert_stride(inst, reg.vstride); - } - gen8_set_src0_da1_width(inst, reg.width); - - } else { - /* Align16 SubRegNum only has a single bit (bit 4; bits 3:0 MBZ). */ - assert(reg.subnr == 0 || reg.subnr == 16); - gen8_set_src0_da16_subreg_nr(inst, reg.subnr >> 4); - - gen8_set_src0_da16_swiz_x(inst, - BRW_GET_SWZ(reg.dw1.bits.swizzle, - BRW_CHANNEL_X)); - gen8_set_src0_da16_swiz_y(inst, - BRW_GET_SWZ(reg.dw1.bits.swizzle, - BRW_CHANNEL_Y)); - gen8_set_src0_da16_swiz_z(inst, - BRW_GET_SWZ(reg.dw1.bits.swizzle, - BRW_CHANNEL_Z)); - gen8_set_src0_da16_swiz_w(inst, - BRW_GET_SWZ(reg.dw1.bits.swizzle, - BRW_CHANNEL_W)); - - /* This is an oddity of the fact that we're using the same - * descriptions for registers in both Align16 and Align1 modes. - */ - if (reg.vstride == BRW_VERTICAL_STRIDE_8) - gen8_set_src0_vert_stride(inst, BRW_VERTICAL_STRIDE_4); - else - gen8_set_src0_vert_stride(inst, reg.vstride); - } - } else if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER) { - assert (gen8_access_mode(inst) == BRW_ALIGN_1); - if (reg.width == BRW_WIDTH_1 && - gen8_exec_size(inst) == BRW_EXECUTE_1) { - gen8_set_src0_da1_hstride(inst, BRW_HORIZONTAL_STRIDE_0); - gen8_set_src0_vert_stride(inst, BRW_VERTICAL_STRIDE_0); - } else { - gen8_set_src0_da1_hstride(inst, reg.hstride); - gen8_set_src0_vert_stride(inst, reg.vstride); - } - - gen8_set_src0_da1_width(inst, reg.width); - gen8_set_src0_ida1_sub_nr(inst, reg.subnr); - gen8_set_src0_addr_mode(inst, BRW_ADDRESS_REGISTER_INDIRECT_REGISTER); - gen8_set_src0_ida1_imm8(inst, (reg.dw1.bits.indirect_offset & IMM8_MASK)); - if ((reg.dw1.bits.indirect_offset & IMM9_MASK) == IMM9_MASK) - gen8_set_src0_ida1_imm9(inst, 1); - else - gen8_set_src0_ida1_imm9(inst, 0); - } -} - -void -gen8_set_src1(struct gen8_instruction *inst, struct brw_reg reg) -{ - /* MRFs haven't existed since Gen7, so we better not be using them. */ - if (reg.file == BRW_MESSAGE_REGISTER_FILE) { - reg.file = BRW_GENERAL_REGISTER_FILE; - reg.nr += GEN7_MRF_HACK_START; - } - - if (reg.file == BRW_GENERAL_REGISTER_FILE) - assert(reg.nr < BRW_MAX_GRF); - - gen8_validate_reg(inst, reg); - - gen8_set_src1_reg_file(inst, reg.file); - gen8_set_src1_reg_type(inst, reg.type); - gen8_set_src1_abs(inst, reg.abs); - gen8_set_src1_negate(inst, reg.negate); - - /* Only src1 can be an immediate in two-argument instructions. */ - assert(gen8_src0_reg_file(inst) != BRW_IMMEDIATE_VALUE); - - if (reg.file == BRW_IMMEDIATE_VALUE) { - inst->data[3] = reg.dw1.ud; - } else if (reg.address_mode == BRW_ADDRESS_DIRECT) { - gen8_set_src1_da_reg_nr(inst, reg.nr); - - if (gen8_access_mode(inst) == BRW_ALIGN_1) { - /* Set Src0.SubRegNum[4:0] */ - gen8_set_src1_da1_subreg_nr(inst, reg.subnr); - - if (reg.width == BRW_WIDTH_1 && - gen8_exec_size(inst) == BRW_EXECUTE_1) { - gen8_set_src1_da1_hstride(inst, BRW_HORIZONTAL_STRIDE_0); - gen8_set_src1_vert_stride(inst, BRW_VERTICAL_STRIDE_0); - } else { - gen8_set_src1_da1_hstride(inst, reg.hstride); - gen8_set_src1_vert_stride(inst, reg.vstride); - } - gen8_set_src1_da1_width(inst, reg.width); - } else { - /* Align16 SubRegNum only has a single bit (bit 4; bits 3:0 MBZ). */ - assert(reg.subnr == 0 || reg.subnr == 16); - gen8_set_src1_da16_subreg_nr(inst, reg.subnr >> 4); - - gen8_set_src1_da16_swiz_x(inst, - BRW_GET_SWZ(reg.dw1.bits.swizzle, - BRW_CHANNEL_X)); - gen8_set_src1_da16_swiz_y(inst, - BRW_GET_SWZ(reg.dw1.bits.swizzle, - BRW_CHANNEL_Y)); - gen8_set_src1_da16_swiz_z(inst, - BRW_GET_SWZ(reg.dw1.bits.swizzle, - BRW_CHANNEL_Z)); - gen8_set_src1_da16_swiz_w(inst, - BRW_GET_SWZ(reg.dw1.bits.swizzle, - BRW_CHANNEL_W)); - - /* This is an oddity of the fact that we're using the same - * descriptions for registers in both Align16 and Align1 modes. - */ - if (reg.vstride == BRW_VERTICAL_STRIDE_8) - gen8_set_src1_vert_stride(inst, BRW_VERTICAL_STRIDE_4); - else - gen8_set_src1_vert_stride(inst, reg.vstride); - } - } else if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER) { - assert (gen8_access_mode(inst) == BRW_ALIGN_1); - if (reg.width == BRW_WIDTH_1 && - gen8_exec_size(inst) == BRW_EXECUTE_1) { - gen8_set_src1_da1_hstride(inst, BRW_HORIZONTAL_STRIDE_0); - gen8_set_src1_vert_stride(inst, BRW_VERTICAL_STRIDE_0); - } else { - gen8_set_src1_da1_hstride(inst, reg.hstride); - gen8_set_src1_vert_stride(inst, reg.vstride); - } - - gen8_set_src1_da1_width(inst, reg.width); - gen8_set_src1_ida1_sub_nr(inst, reg.subnr); - gen8_set_src1_addr_mode(inst, BRW_ADDRESS_REGISTER_INDIRECT_REGISTER); - gen8_set_src1_ida1_imm8(inst, (reg.dw1.bits.indirect_offset & IMM8_MASK)); - if ((reg.dw1.bits.indirect_offset & IMM9_MASK) == IMM9_MASK) - gen8_set_src1_ida1_imm9(inst, 1); - else - gen8_set_src1_ida1_imm9(inst, 0); - } -} - -/** - * Set the Message Descriptor and Extended Message Descriptor fields - * for SEND messages. - * - * \note This zeroes out the Function Control bits, so it must be called - * \b before filling out any message-specific data. Callers can - * choose not to fill in irrelevant bits; they will be zero. - */ -static void -gen8_set_message_descriptor(struct gen8_instruction *inst, - enum brw_message_target sfid, - unsigned msg_length, - unsigned response_length, - bool header_present, - bool end_of_thread) -{ - gen8_set_src1(inst, brw_imm_d(0)); - - gen8_set_sfid(inst, sfid); - gen8_set_mlen(inst, msg_length); - gen8_set_rlen(inst, response_length); - gen8_set_header_present(inst, header_present); - gen8_set_eot(inst, end_of_thread); -} - -void -gen8_set_urb_message(struct gen8_instruction *inst, - unsigned opcode, - unsigned msg_length, - unsigned response_length, - bool end_of_thread, - unsigned offset, - bool interleave) -{ - gen8_set_message_descriptor(inst, BRW_SFID_URB, msg_length, response_length, - true, end_of_thread); - gen8_set_src0(inst, brw_vec8_grf(GEN7_MRF_HACK_START + 1, 0)); - gen8_set_urb_opcode(inst, 0); /* URB_WRITE_HWORD */ - gen8_set_urb_global_offset(inst, offset); - gen8_set_urb_interleave(inst, interleave); - /* per_slot_offset = 0 makes it ignore offsets in message header */ - gen8_set_urb_per_slot_offset(inst, 0); -} - -void -gen8_set_sampler_message(struct gen8_instruction *inst, - unsigned binding_table_index, - unsigned sampler, - unsigned msg_type, - unsigned response_length, - unsigned msg_length, - bool header_present, - unsigned simd_mode) -{ - gen8_set_message_descriptor(inst, BRW_SFID_SAMPLER, msg_length, - response_length, header_present, false); - - gen8_set_binding_table_index(inst, binding_table_index); - gen8_set_sampler(inst, sampler); - gen8_set_sampler_msg_type(inst, msg_type); - gen8_set_sampler_simd_mode(inst, simd_mode); -} - -void -gen8_set_dp_message(struct gen8_instruction *inst, - enum brw_message_target sfid, - unsigned binding_table_index, - unsigned msg_type, - unsigned msg_control, - unsigned mlen, - unsigned rlen, - bool header_present, - bool end_of_thread) -{ - /* Binding table index is from 0..255 */ - assert((binding_table_index & 0xff) == binding_table_index); - - /* Message Type is only 5 bits */ - assert((msg_type & 0x1f) == msg_type); - - /* Message Control is only 6 bits */ - assert((msg_control & 0x3f) == msg_control); - - gen8_set_message_descriptor(inst, sfid, mlen, rlen, header_present, - end_of_thread); - gen8_set_function_control(inst, - binding_table_index | msg_type << 14 | msg_control << 8); -} - - -void -gen9_set_send_extdesc(struct gen8_instruction *inst, - unsigned int value) -{ - unsigned int extdesc; - - extdesc = (value >> 16) & 0x0f; - gen8_set_bits(inst, 67, 64, extdesc); - - extdesc = (value >> 20) & 0x0f; - gen8_set_bits(inst, 83, 80, extdesc); - - extdesc = (value >> 24) & 0x0f; - gen8_set_bits(inst, 88, 85, extdesc); - - extdesc = (value >> 28) & 0x0f; - gen8_set_bits(inst, 94, 91, extdesc); -} diff --git a/assembler/gen8_instruction.h b/assembler/gen8_instruction.h deleted file mode 100644 index 7db47466..00000000 --- a/assembler/gen8_instruction.h +++ /dev/null @@ -1,362 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -/** @file gen8_instruction.h - * - * A representation of a Gen8+ EU instruction, with helper methods to get - * and set various fields. This is the actual hardware format. - */ - -#ifndef GEN8_INSTRUCTION_H -#define GEN8_INSTRUCTION_H - -#include <stdio.h> -#include <stdint.h> - -#include "brw_compat.h" -#include "brw_reg.h" - -struct gen8_instruction { - uint32_t data[4]; -}; - -static inline unsigned gen8_bits(struct gen8_instruction *insn, - unsigned high, - unsigned low); -static inline void gen8_set_bits(struct gen8_instruction *insn, - unsigned high, - unsigned low, - unsigned value); - -#define F(name, high, low) \ - static inline void gen8_set_##name(struct gen8_instruction *insn, unsigned v) \ - { \ - gen8_set_bits(insn, high, low, v); \ - } \ - static inline unsigned gen8_##name(struct gen8_instruction *insn) \ - { \ - return gen8_bits(insn, high, low); \ - } - -/** -* Direct addressing only: -* @{ -*/ -F(src1_da_reg_nr, 108, 101); -F(src0_da_reg_nr, 76, 69); -F(dst_da1_hstride, 62, 61); -F(dst_da_reg_nr, 60, 53); -F(dst_da16_subreg_nr, 52, 52); -F(dst_da1_subreg_nr, 52, 48); -F(da16_writemask, 51, 48); /* Dst.ChanEn */ -/** @} */ - -F(src1_vert_stride, 120, 117) -F(src1_da1_width, 116, 114) -F(src1_da16_swiz_w, 115, 114) -F(src1_da16_swiz_z, 113, 112) -F(src1_da1_hstride, 113, 112) -F(src1_address_mode, 111, 111) -/** Src1.SrcMod @{ */ -F(src1_negate, 110, 110) -F(src1_abs, 109, 109) -/** @} */ -F(src1_da16_subreg_nr, 100, 100) -F(src1_da1_subreg_nr, 100, 96) -F(src1_da16_swiz_y, 99, 98) -F(src1_da16_swiz_x, 97, 96) -F(src1_reg_type, 94, 91) -F(src1_reg_file, 90, 89) -F(src0_vert_stride, 88, 85) -F(src0_da1_width, 84, 82) -F(src0_da16_swiz_w, 83, 82) -F(src0_da16_swiz_z, 81, 80) -F(src0_da1_hstride, 81, 80) -F(src0_address_mode, 79, 79) -/** Src0.SrcMod @{ */ -F(src0_negate, 78, 78) -F(src0_abs, 77, 77) -/** @} */ -F(src0_da16_subreg_nr, 68, 68) -F(src0_da1_subreg_nr, 68, 64) -F(src0_da16_swiz_y, 67, 66) -F(src0_da16_swiz_x, 65, 64) -F(dst_address_mode, 63, 63) -F(src0_reg_type, 46, 43) -F(src0_reg_file, 42, 41) -F(dst_reg_type, 40, 37) -F(dst_reg_file, 36, 35) -F(mask_control, 34, 34) -F(flag_reg_nr, 33, 33) -F(flag_subreg_nr, 32, 32) -F(saturate, 31, 31) -F(branch_control, 30, 30) -F(debug_control, 30, 30) -F(cmpt_control, 29, 29) -F(acc_wr_control, 28, 28) -F(cond_modifier, 27, 24) -F(exec_size, 23, 21) -F(pred_inv, 20, 20) -F(pred_control, 19, 16) -F(thread_control, 15, 14) -F(qtr_control, 13, 12) -F(nib_control, 11, 11) -F(dep_control, 10, 9) -F(access_mode, 8, 8) -/* Bit 7 is Reserve d (for future Opcode expansion) */ -F(opcode, 6, 0) - -/** -* Three-source instructions: -* @{ -*/ -F(src2_3src_reg_nr, 125, 118) -F(src2_3src_subreg_nr, 117, 115) -F(src2_3src_swizzle, 114, 107) -F(src2_3src_rep_ctrl, 106, 106) -F(src1_3src_reg_nr, 104, 97) -F(src1_3src_subreg_hi, 96, 96) -F(src1_3src_subreg_lo, 95, 94) -F(src1_3src_swizzle, 93, 86) -F(src1_3src_rep_ctrl, 85, 85) -F(src0_3src_reg_nr, 83, 76) -F(src0_3src_subreg_nr, 75, 73) -F(src0_3src_swizzle, 72, 65) -F(src0_3src_rep_ctrl, 64, 64) -F(dst_3src_reg_nr, 63, 56) -F(dst_3src_subreg_nr, 55, 53) -F(dst_3src_writemask, 52, 49) -F(dst_3src_type, 48, 46) -F(src_3src_type, 45, 43) -F(src2_3src_negate, 42, 42) -F(src2_3src_abs, 41, 41) -F(src1_3src_negate, 40, 40) -F(src1_3src_abs, 39, 39) -F(src0_3src_negate, 38, 38) -F(src0_3src_abs, 37, 37) -/** @} */ - -/** -* Fields for SEND messages: -* @{ -*/ -F(eot, 127, 127) -F(mlen, 124, 121) -F(rlen, 120, 116) -F(header_present, 115, 115) -F(function_control, 114, 96) -F(sfid, 27, 24) -F(math_function, 27, 24) -/** @} */ - -/** -* URB message function control bits: -* @{ -*/ -F(urb_per_slot_offset, 113, 113) -F(urb_interleave, 111, 111) -F(urb_global_offset, 110, 100) -F(urb_opcode, 99, 96) -/** @} */ - -/** -* Sampler message function control bits: -* @{ -*/ -F(sampler_simd_mode, 114, 113) -F(sampler_msg_type, 112, 108) -F(sampler, 107, 104) -F(binding_table_index, 103, 96) -/** @} */ - -/** - * Data port message function control bits: - * @ { - */ -F(dp_category, 114, 114) -F(dp_message_type, 113, 110) -F(dp_message_control, 109, 104) -F(dp_binding_table_index, 103, 96) -/** @} */ - -/** - * Thread Spawn message function control bits: - * @ { - */ -F(ts_resource_select, 100, 100) -F(ts_request_type, 97, 97) -F(ts_opcode, 96, 96) -/** @} */ - -/** - * Video Motion Estimation message function control bits: - * @ { - */ -F(vme_message_type, 110, 109) -F(vme_binding_table_index, 103, 96) -/** @} */ - -/** - * Check & Refinement Engine message function control bits: - * @ { - */ -F(cre_message_type, 110, 109) -F(cre_binding_table_index, 103, 96) -/** @} */ - -/* Addr Mode */ - -F(dst_addr_mode, 63, 63) -F(src0_addr_mode, 79, 79) -F(src1_addr_mode, 111, 111) - -/* Indirect access mode for Align1. */ -F(dst_ida1_sub_nr, 60, 57) -F(src0_ida1_sub_nr, 76, 73) -F(src1_ida1_sub_nr, 108, 105) - -/* Imm[8:0] of Immediate addr offset under Indirect mode */ -F(dst_ida1_imm8, 56, 48) -F(src0_ida1_imm8, 72, 64) -F(src1_ida1_imm8, 104, 96) - -/* Imm Bit9 of Immediate addr offset under Indirect mode */ -F(dst_ida1_imm9, 47, 47) -F(src0_ida1_imm9, 95, 95) -F(src1_ida1_imm9, 121, 121) - -#undef F - -#define IMM8_MASK 0x1FF -#define IMM9_MASK 0x200 - -/** -* Flow control instruction bits: -* @{ -*/ -static inline unsigned gen8_uip(struct gen8_instruction *insn) -{ - return insn->data[2]; -} -static inline void gen8_set_uip(struct gen8_instruction *insn, unsigned uip) -{ - insn->data[2] = uip; -} -static inline unsigned gen8_jip(struct gen8_instruction *insn) -{ - return insn->data[3]; -} -static inline void gen8_set_jip(struct gen8_instruction *insn, unsigned jip) -{ - insn->data[3] = jip; -} -/** @} */ - -static inline int gen8_src1_imm_d(struct gen8_instruction *insn) -{ - return insn->data[3]; -} -static inline unsigned gen8_src1_imm_ud(struct gen8_instruction *insn) -{ - return insn->data[3]; -} -static inline float gen8_src1_imm_f(struct gen8_instruction *insn) -{ - fi_type ft; - - ft.u = insn->data[3]; - return ft.f; -} - -void gen8_set_dst(struct gen8_instruction *insn, struct brw_reg reg); -void gen8_set_src0(struct gen8_instruction *insn, struct brw_reg reg); -void gen8_set_src1(struct gen8_instruction *insn, struct brw_reg reg); - -void gen8_set_urb_message(struct gen8_instruction *insn, - unsigned opcode, unsigned mlen, unsigned rlen, - bool eot, unsigned offset, bool interleave); - -void gen8_set_sampler_message(struct gen8_instruction *insn, - unsigned binding_table_index, unsigned sampler, - unsigned msg_type, unsigned rlen, unsigned mlen, - bool header_present, unsigned simd_mode); - -void gen8_set_dp_message(struct gen8_instruction *insn, - enum brw_message_target sfid, - unsigned binding_table_index, - unsigned msg_type, - unsigned msg_control, - unsigned msg_length, - unsigned response_length, - bool header_present, - bool end_of_thread); - -/** Disassemble the instruction. */ -int gen8_disassemble(FILE *file, struct gen8_instruction *insn, int gen); - - -/** - * Fetch a set of contiguous bits from the instruction. - * - * Bits indexes range from 0..127; fields may not cross 32-bit boundaries. - */ -static inline unsigned -gen8_bits(struct gen8_instruction *insn, unsigned high, unsigned low) -{ - /* We assume the field doesn't cross 32-bit boundaries. */ - const unsigned word = high / 32; - assert(word == low / 32); - - high %= 32; - low %= 32; - - const unsigned mask = (((1 << (high - low + 1)) - 1) << low); - - return (insn->data[word] & mask) >> low; -} - -/** - * Set bits in the instruction, with proper shifting and masking. - * - * Bits indexes range from 0..127; fields may not cross 32-bit boundaries. - */ -static inline void -gen8_set_bits(struct gen8_instruction *insn, - unsigned high, - unsigned low, - unsigned value) -{ - const unsigned word = high / 32; - assert(word == low / 32); - - high %= 32; - low %= 32; - - const unsigned mask = (((1 << (high - low + 1)) - 1) << low); - - insn->data[word] = (insn->data[word] & ~mask) | ((value << low) & mask); -} - -void gen9_set_send_extdesc(struct gen8_instruction *insn, unsigned int value); - -#endif diff --git a/assembler/gram.y b/assembler/gram.y deleted file mode 100644 index 23e1a576..00000000 --- a/assembler/gram.y +++ /dev/null @@ -1,3396 +0,0 @@ -%{ -/* - * Copyright © 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -#include <stdio.h> -#include <string.h> -#include <stdlib.h> -#include <stdbool.h> -#include <stdarg.h> -#include <assert.h> -#include "gen4asm.h" -#include "brw_eu.h" -#include "gen8_instruction.h" - -#define DEFAULT_EXECSIZE (ffs(program_defaults.execute_size) - 1) -#define DEFAULT_DSTREGION -1 - -#define SWIZZLE(reg) (reg.dw1.bits.swizzle) - -#define GEN(i) (&(i)->insn.gen) -#define GEN8(i) (&(i)->insn.gen8) - -#define YYLTYPE YYLTYPE -typedef struct YYLTYPE -{ - int first_line; - int first_column; - int last_line; - int last_column; -} YYLTYPE; - -extern int need_export; -static struct src_operand src_null_reg = -{ - .reg.file = BRW_ARCHITECTURE_REGISTER_FILE, - .reg.nr = BRW_ARF_NULL, - .reg.type = BRW_REGISTER_TYPE_UD, -}; -static struct brw_reg dst_null_reg = -{ - .file = BRW_ARCHITECTURE_REGISTER_FILE, - .nr = BRW_ARF_NULL, -}; -static struct brw_reg ip_dst = -{ - .file = BRW_ARCHITECTURE_REGISTER_FILE, - .nr = BRW_ARF_IP, - .type = BRW_REGISTER_TYPE_UD, - .address_mode = BRW_ADDRESS_DIRECT, - .hstride = 1, - .dw1.bits.writemask = BRW_WRITEMASK_XYZW, -}; -static struct src_operand ip_src = -{ - .reg.file = BRW_ARCHITECTURE_REGISTER_FILE, - .reg.nr = BRW_ARF_IP, - .reg.type = BRW_REGISTER_TYPE_UD, - .reg.address_mode = BRW_ADDRESS_DIRECT, - .reg.dw1.bits.swizzle = BRW_SWIZZLE_NOOP, -}; - -static int get_type_size(unsigned type); -static void set_instruction_opcode(struct brw_program_instruction *instr, - unsigned opcode); -static int set_instruction_dest(struct brw_program_instruction *instr, - struct brw_reg *dest); -static int set_instruction_src0(struct brw_program_instruction *instr, - struct src_operand *src, - YYLTYPE *location); -static int set_instruction_src1(struct brw_program_instruction *instr, - struct src_operand *src, - YYLTYPE *location); -static int set_instruction_dest_three_src(struct brw_program_instruction *instr, - struct brw_reg *dest); -static int set_instruction_src0_three_src(struct brw_program_instruction *instr, - struct src_operand *src); -static int set_instruction_src1_three_src(struct brw_program_instruction *instr, - struct src_operand *src); -static int set_instruction_src2_three_src(struct brw_program_instruction *instr, - struct src_operand *src); -static void set_instruction_saturate(struct brw_program_instruction *instr, - int saturate); -static void set_instruction_options(struct brw_program_instruction *instr, - struct options options); -static void set_instruction_predicate(struct brw_program_instruction *instr, - struct predicate *p); -static void set_instruction_pred_cond(struct brw_program_instruction *instr, - struct predicate *p, - struct condition *c, - YYLTYPE *location); -static void set_direct_dst_operand(struct brw_reg *dst, struct brw_reg *reg, - int type); -static void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, - int type); - -void set_branch_two_offsets(struct brw_program_instruction *insn, int jip_offset, int uip_offset); -void set_branch_one_offset(struct brw_program_instruction *insn, int jip_offset); - -enum message_level { - WARN, - ERROR, -}; - -static void message(enum message_level level, YYLTYPE *location, - const char *fmt, ...) -{ - static const char *level_str[] = { "warning", "error" }; - va_list args; - - if (location) - fprintf(stderr, "%s:%d:%d: %s: ", input_filename, location->first_line, - location->first_column, level_str[level]); - else - fprintf(stderr, "%s:%s: ", input_filename, level_str[level]); - - va_start(args, fmt); - vfprintf(stderr, fmt, args); - va_end(args); -} - -#define warn(flag, l, fmt, ...) \ - do { \ - if (warning_flags & WARN_ ## flag) \ - message(WARN, l, fmt, ## __VA_ARGS__); \ - } while(0) - -#define error(l, fmt, ...) \ - do { \ - message(ERROR, l, fmt, ## __VA_ARGS__); \ - } while(0) - -/* like strcmp, but handles NULL pointers */ -static bool strcmp0(const char *s1, const char* s2) -{ - if (!s1) - return -(s1 != s2); - if (!s2) - return s1 != s2; - return strcmp (s1, s2); -} - -static bool region_equal(struct region *r1, struct region *r2) -{ - return memcmp(r1, r2, sizeof(struct region)) == 0; -} - -static bool reg_equal(struct brw_reg *r1, struct brw_reg *r2) -{ - return memcmp(r1, r2, sizeof(struct brw_reg)) == 0; -} - -static bool declared_register_equal(struct declared_register *r1, - struct declared_register *r2) -{ - if (strcmp0(r1->name, r2->name) != 0) - return false; - - if (!reg_equal(&r1->reg, &r2->reg)) - return false; - - if (!region_equal(&r1->src_region, &r2->src_region)) - return false; - - if (r1->element_size != r2->element_size || - r1->dst_region != r2->dst_region) - return false; - - return true; -} - -static void brw_program_init(struct brw_program *p) -{ - memset(p, 0, sizeof(struct brw_program)); -} - -static void brw_program_append_entry(struct brw_program *p, - struct brw_program_instruction *entry) -{ - entry->next = NULL; - if (p->last) - p->last->next = entry; - else - p->first = entry; - p->last = entry; -} - -static void -brw_program_add_instruction(struct brw_program *p, - struct brw_program_instruction *instruction) -{ - struct brw_program_instruction *list_entry; - - list_entry = calloc(sizeof(struct brw_program_instruction), 1); - list_entry->type = GEN4ASM_INSTRUCTION_GEN; - list_entry->insn.gen = instruction->insn.gen; - brw_program_append_entry(p, list_entry); -} - -static void -brw_program_add_relocatable(struct brw_program *p, - struct brw_program_instruction *instruction) -{ - struct brw_program_instruction *list_entry; - - list_entry = calloc(sizeof(struct brw_program_instruction), 1); - list_entry->type = GEN4ASM_INSTRUCTION_GEN_RELOCATABLE; - list_entry->insn.gen = instruction->insn.gen; - list_entry->reloc = instruction->reloc; - brw_program_append_entry(p, list_entry); -} - -static void brw_program_add_label(struct brw_program *p, const char *label) -{ - struct brw_program_instruction *list_entry; - - list_entry = calloc(sizeof(struct brw_program_instruction), 1); - list_entry->type = GEN4ASM_INSTRUCTION_LABEL; - list_entry->insn.label.name = strdup(label); - brw_program_append_entry(p, list_entry); -} - -static int resolve_dst_region(struct declared_register *reference, int region) -{ - int resolved = region; - - if (resolved == DEFAULT_DSTREGION) { - if (reference) - resolved = reference->dst_region; - else - resolved = 1; - } - - assert(resolved == 1 || resolved == 2 || resolved == 3); - return resolved; -} - -static inline int access_mode(struct brw_program_instruction *insn) -{ - if (IS_GENp(8)) - return gen8_access_mode(GEN8(insn)); - else - return GEN(insn)->header.access_mode; -} - -static inline int exec_size(struct brw_program_instruction *insn) -{ - if (IS_GENp(8)) - return gen8_exec_size(GEN8(insn)); - else - return GEN(insn)->header.execution_size; -} - -static void set_execsize(struct brw_program_instruction *insn, int execsize) -{ - if (IS_GENp(8)) - gen8_set_exec_size(GEN8(insn), execsize); - else - GEN(insn)->header.execution_size = execsize; -} - -static bool validate_dst_reg(struct brw_program_instruction *insn, struct brw_reg *reg) -{ - - if (reg->address_mode == BRW_ADDRESS_DIRECT && - access_mode(insn) == BRW_ALIGN_1 && - reg->dw1.bits.writemask != 0 && - reg->dw1.bits.writemask != BRW_WRITEMASK_XYZW) - { - fprintf(stderr, "error: write mask set in align1 instruction\n"); - return false; - } - - if (reg->address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER && - access_mode(insn) == BRW_ALIGN_16) { - fprintf(stderr, "error: indirect Dst addr mode in align16 instruction\n"); - return false; - } - - return true; -} - -static bool validate_src_reg(struct brw_program_instruction *insn, - struct brw_reg reg, - YYLTYPE *location) -{ - int hstride_for_reg[] = {0, 1, 2, 4}; - int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; - int width_for_reg[] = {1, 2, 4, 8, 16}; - int execsize_for_reg[] = {1, 2, 4, 8, 16, 32}; - int width, hstride, vstride, execsize; - - if (reg.file == BRW_IMMEDIATE_VALUE) - return true; - - if (access_mode(insn) == BRW_ALIGN_1 && - SWIZZLE(reg) && SWIZZLE(reg) != BRW_SWIZZLE_NOOP) - { - error(location, "swizzle bits set in align1 instruction\n"); - return false; - } - - if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER && - access_mode(insn) == BRW_ALIGN_16) { - fprintf(stderr, "error: indirect Source addr mode in align16 instruction\n"); - return false; - } - - assert(reg.hstride >= 0 && reg.hstride < ARRAY_SIZE(hstride_for_reg)); - hstride = hstride_for_reg[reg.hstride]; - - if (reg.vstride == 0xf) { - vstride = -1; - } else { - assert(reg.vstride >= 0 && reg.vstride < ARRAY_SIZE(vstride_for_reg)); - vstride = vstride_for_reg[reg.vstride]; - } - - assert(reg.width >= 0 && reg.width < ARRAY_SIZE(width_for_reg)); - width = width_for_reg[reg.width]; - - assert(exec_size(insn) >= 0 && - exec_size(insn) < ARRAY_SIZE(execsize_for_reg)); - execsize = execsize_for_reg[exec_size(insn)]; - - /* Register Region Restrictions */ - - /* B. If ExecSize = Width and HorzStride ≠ 0, VertStride must be set to - * Width * HorzStride. */ - if (execsize == width && hstride != 0) { - if (vstride != -1 && vstride != width * hstride) - warn(ALL, location, "execution size == width and hstride != 0 but " - "vstride is not width * hstride\n"); - } - - /* D. If Width = 1, HorzStride must be 0 regardless of the values of - * ExecSize and VertStride. - * - * FIXME: In "advanced mode" hstride is set to 1, this is probably a bug - * to fix, but it changes the generated opcodes and thus needs validation. - */ - if (width == 1 && hstride != 0) - warn(ALL, location, "region width is 1 but horizontal stride is %d " - " (should be 0)\n", hstride); - - /* E. If ExecSize = Width = 1, both VertStride and HorzStride must be 0. - * This defines a scalar. */ - if (execsize == 1 && width == 1) { - if (hstride != 0) - warn(ALL, location, "execution size and region width are 1 but " - "horizontal stride is %d (should be 0)\n", hstride); - if (vstride != 0) - warn(ALL, location, "execution size and region width are 1 but " - "vertical stride is %d (should be 0)\n", vstride); - } - - return true; -} - -static int get_subreg_address(unsigned regfile, unsigned type, unsigned subreg, unsigned address_mode) -{ - int unit_size = 1; - - assert(address_mode == BRW_ADDRESS_DIRECT); - assert(regfile != BRW_IMMEDIATE_VALUE); - - if (advanced_flag) - unit_size = get_type_size(type); - - return subreg * unit_size; -} - -/* only used in indirect address mode. - * input: sub-register number of an address register - * output: the value of AddrSubRegNum in the instruction binary code - * - * input output(advanced_flag==0) output(advanced_flag==1) - * a0.0 0 0 - * a0.1 invalid input 1 - * a0.2 1 2 - * a0.3 invalid input 3 - * a0.4 2 4 - * a0.5 invalid input 5 - * a0.6 3 6 - * a0.7 invalid input 7 - * a0.8 4 invalid input - * a0.10 5 invalid input - * a0.12 6 invalid input - * a0.14 7 invalid input - */ -static int get_indirect_subreg_address(unsigned subreg) -{ - return advanced_flag == 0 ? subreg / 2 : subreg; -} - -static void resolve_subnr(struct brw_reg *reg) -{ - if (reg->file == BRW_IMMEDIATE_VALUE) - return; - - if (reg->address_mode == BRW_ADDRESS_DIRECT) - reg->subnr = get_subreg_address(reg->file, reg->type, reg->subnr, - reg->address_mode); - else - reg->subnr = get_indirect_subreg_address(reg->subnr); -} - - -%} -%locations - -%start ROOT - -%union { - char *string; - int integer; - double number; - struct brw_program_instruction instruction; - struct brw_program program; - struct region region; - struct regtype regtype; - struct brw_reg reg; - struct condition condition; - struct predicate predicate; - struct options options; - struct declared_register symbol_reg; - imm32_t imm32; - - struct src_operand src_operand; -} - -%token COLON -%token SEMICOLON -%token LPAREN RPAREN -%token LANGLE RANGLE -%token LCURLY RCURLY -%token LSQUARE RSQUARE -%token COMMA EQ -%token ABS DOT -%token PLUS MINUS MULTIPLY DIVIDE - -%token <integer> TYPE_UD TYPE_D TYPE_UW TYPE_W TYPE_UB TYPE_B -%token <integer> TYPE_VF TYPE_HF TYPE_V TYPE_F - -%token ALIGN1 ALIGN16 SECHALF COMPR SWITCH ATOMIC NODDCHK NODDCLR -%token MASK_DISABLE BREAKPOINT ACCWRCTRL EOT - -%token SEQ ANY2H ALL2H ANY4H ALL4H ANY8H ALL8H ANY16H ALL16H ANYV ALLV -%token <integer> ZERO EQUAL NOT_ZERO NOT_EQUAL GREATER GREATER_EQUAL LESS LESS_EQUAL -%token <integer> ROUND_INCREMENT OVERFLOW UNORDERED -%token <integer> GENREG MSGREG ADDRESSREG ACCREG FLAGREG -%token <integer> MASKREG AMASK IMASK LMASK CMASK -%token <integer> MASKSTACKREG LMS IMS MASKSTACKDEPTHREG IMSD LMSD -%token <integer> NOTIFYREG STATEREG CONTROLREG IPREG -%token GENREGFILE MSGREGFILE - -%token <integer> MOV FRC RNDU RNDD RNDE RNDZ NOT LZD -%token <integer> MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2 -%token <integer> AVG ADD SEL AND OR XOR SHR SHL ASR CMP CMPN PLN -%token <integer> ADDC BFI1 BFREV CBIT F16TO32 F32TO16 FBH FBL -%token <integer> SEND SENDC NOP JMPI IF IFF WHILE ELSE BREAK CONT HALT MSAVE -%token <integer> PUSH MREST POP WAIT DO ENDIF ILLEGAL -%token <integer> MATH_INST -%token <integer> MAD LRP BFE BFI2 SUBB -%token <integer> CALL RET -%token <integer> BRD BRC - -%token NULL_TOKEN MATH SAMPLER GATEWAY READ WRITE URB THREAD_SPAWNER VME DATA_PORT CRE - -%token MSGLEN RETURNLEN -%token <integer> ALLOCATE USED COMPLETE TRANSPOSE INTERLEAVE -%token SATURATE - -%token <integer> INTEGER -%token <string> STRING -%token <number> NUMBER - -%token <integer> INV LOG EXP SQRT RSQ POW SIN COS SINCOS INTDIV INTMOD -%token <integer> INTDIVMOD -%token SIGNED SCALAR - -%token <integer> X Y Z W - -%token <integer> KERNEL_PRAGMA END_KERNEL_PRAGMA CODE_PRAGMA END_CODE_PRAGMA -%token <integer> REG_COUNT_PAYLOAD_PRAGMA REG_COUNT_TOTAL_PRAGMA DECLARE_PRAGMA -%token <integer> BASE ELEMENTSIZE SRCREGION DSTREGION TYPE - -%token <integer> DEFAULT_EXEC_SIZE_PRAGMA DEFAULT_REG_TYPE_PRAGMA -%nonassoc SUBREGNUM -%nonassoc SNDOPR -%left PLUS MINUS -%left MULTIPLY DIVIDE -%right UMINUS -%nonassoc DOT -%nonassoc STR_SYMBOL_REG -%nonassoc EMPTEXECSIZE -%nonassoc LPAREN - -%type <integer> exp sndopr -%type <integer> simple_int -%type <instruction> instruction unaryinstruction binaryinstruction -%type <instruction> binaryaccinstruction trinaryinstruction sendinstruction -%type <instruction> syncinstruction -%type <instruction> msgtarget -%type <instruction> mathinstruction -%type <instruction> nopinstruction -%type <instruction> relocatableinstruction breakinstruction -%type <instruction> ifelseinstruction loopinstruction haltinstruction -%type <instruction> multibranchinstruction subroutineinstruction jumpinstruction -%type <string> label -%type <program> instrseq -%type <integer> instoption -%type <integer> unaryop binaryop binaryaccop breakop -%type <integer> trinaryop -%type <integer> sendop -%type <condition> conditionalmodifier -%type <predicate> predicate -%type <options> instoptions instoption_list -%type <integer> condition saturate negate abs chansel -%type <integer> writemask_x writemask_y writemask_z writemask_w -%type <integer> srcimmtype execsize dstregion immaddroffset -%type <integer> subregnum sampler_datatype -%type <integer> urb_swizzle urb_allocate urb_used urb_complete -%type <integer> math_function math_signed math_scalar -%type <integer> predctrl predstate -%type <region> region region_wh indirectregion declare_srcregion; -%type <regtype> regtype -%type <reg> directgenreg directmsgreg addrreg accreg flagreg maskreg -%type <reg> maskstackreg notifyreg -/* %type <reg> maskstackdepthreg */ -%type <reg> statereg controlreg ipreg nullreg -%type <reg> dstoperandex_typed srcarchoperandex_typed -%type <reg> sendleadreg -%type <reg> indirectgenreg indirectmsgreg addrparam -%type <integer> mask_subreg maskstack_subreg -%type <integer> declare_elementsize declare_dstregion declare_type -/* %type <intger> maskstackdepth_subreg */ -%type <symbol_reg> symbol_reg symbol_reg_p; -%type <imm32> imm32 -%type <reg> dst dstoperand dstoperandex dstreg post_dst writemask -%type <reg> declare_base -%type <src_operand> directsrcoperand srcarchoperandex directsrcaccoperand -%type <src_operand> indirectsrcoperand -%type <src_operand> src srcimm imm32reg payload srcacc srcaccimm swizzle -%type <src_operand> relativelocation relativelocation2 - -%code { - -#undef error -#define error(l, fmt, ...) \ - do { \ - message(ERROR, l, fmt, ## __VA_ARGS__); \ - YYERROR; \ - } while(0) - -static void add_option(struct options *options, int option) -{ - switch (option) { - case ALIGN1: - options->access_mode = BRW_ALIGN_1; - break; - case ALIGN16: - options->access_mode = BRW_ALIGN_16; - break; - case SECHALF: - options->compression_control |= BRW_COMPRESSION_2NDHALF; - break; - case COMPR: - if (!IS_GENp(6)) - options->compression_control |= BRW_COMPRESSION_COMPRESSED; - break; - case SWITCH: - options->thread_control |= BRW_THREAD_SWITCH; - break; - case ATOMIC: - options->thread_control |= BRW_THREAD_ATOMIC; - break; - case NODDCHK: - options->dependency_control |= BRW_DEPENDENCY_NOTCHECKED; - break; - case NODDCLR: - options->dependency_control |= BRW_DEPENDENCY_NOTCLEARED; - break; - case MASK_DISABLE: - options->mask_control = BRW_MASK_DISABLE; - break; - case BREAKPOINT: - options->debug_control = BRW_DEBUG_BREAKPOINT; - break; - case ACCWRCTRL: - options->acc_wr_control = BRW_ACCUMULATOR_WRITE_ENABLE; - break; - case EOT: - options->end_of_thread = 1; - break; - } -} - -} - -%% -simple_int: INTEGER { $$ = $1; } - | MINUS INTEGER { $$ = -$2;} -; - -exp: INTEGER { $$ = $1; } - | exp PLUS exp { $$ = $1 + $3; } - | exp MINUS exp { $$ = $1 - $3; } - | exp MULTIPLY exp { $$ = $1 * $3; } - | exp DIVIDE exp { if ($3) $$ = $1 / $3; else YYERROR;} - | MINUS exp %prec UMINUS { $$ = -$2;} - | LPAREN exp RPAREN { $$ = $2; } - ; - -ROOT: instrseq - { - compiled_program = $1; - } -; - - -label: STRING COLON -; - -declare_base: BASE EQ dstreg - { - $$ = $3; - } -; -declare_elementsize: ELEMENTSIZE EQ exp - { - $$ = $3; - } -; -declare_srcregion: /* empty */ - { - /* XXX is this default correct?*/ - memset (&$$, '\0', sizeof ($$)); - $$.vert_stride = ffs(0); - $$.width = BRW_WIDTH_1; - $$.horiz_stride = ffs(0); - } - | SRCREGION EQ region - { - $$ = $3; - } -; -declare_dstregion: /* empty */ - { - $$ = 1; - } - | DSTREGION EQ dstregion - { - $$ = $3; - } -; -declare_type: TYPE EQ regtype - { - $$ = $3.type; - } -; -declare_pragma: DECLARE_PRAGMA STRING declare_base declare_elementsize declare_srcregion declare_dstregion declare_type - { - struct declared_register reg, *found, *new_reg; - - reg.name = $2; - reg.reg = $3; - reg.element_size = $4; - reg.src_region = $5; - reg.dst_region = $6; - reg.reg.type = $7; - - found = find_register($2); - if (found) { - if (!declared_register_equal(®, found)) - error(&@1, "%s already defined and definitions " - "don't agree\n", $2); - free($2); // $2 has been malloc'ed by strdup - } else { - new_reg = malloc(sizeof(struct declared_register)); - *new_reg = reg; - insert_register(new_reg); - } - } -; - -reg_count_total_pragma: REG_COUNT_TOTAL_PRAGMA exp -; -reg_count_payload_pragma: REG_COUNT_PAYLOAD_PRAGMA exp -; - -default_exec_size_pragma: DEFAULT_EXEC_SIZE_PRAGMA exp - { - program_defaults.execute_size = $2; - } -; -default_reg_type_pragma: DEFAULT_REG_TYPE_PRAGMA regtype - { - program_defaults.register_type = $2.type; - } -; -pragma: reg_count_total_pragma - |reg_count_payload_pragma - |default_exec_size_pragma - |default_reg_type_pragma - |declare_pragma -; - -instrseq: instrseq pragma - { - $$ = $1; - } - | instrseq instruction SEMICOLON - { - brw_program_add_instruction(&$1, &$2); - $$ = $1; - } - | instruction SEMICOLON - { - brw_program_init(&$$); - brw_program_add_instruction(&$$, &$1); - } - | instrseq relocatableinstruction SEMICOLON - { - brw_program_add_relocatable(&$1, &$2); - $$ = $1; - } - | relocatableinstruction SEMICOLON - { - brw_program_init(&$$); - brw_program_add_relocatable(&$$, &$1); - } - | instrseq SEMICOLON - { - $$ = $1; - } - | instrseq label - { - brw_program_add_label(&$1, $2); - $$ = $1; - } - | label - { - brw_program_init(&$$); - brw_program_add_label(&$$, $1); - } - | pragma - { - $$.first = NULL; - $$.last = NULL; - } - | instrseq error SEMICOLON { - $$ = $1; - } -; - -/* 1.4.1: Instruction groups */ -// binaryinstruction: Source operands cannot be accumulators -// binaryaccinstruction: Source operands can be accumulators -instruction: unaryinstruction - | binaryinstruction - | binaryaccinstruction - | trinaryinstruction - | sendinstruction - | syncinstruction - | mathinstruction - | nopinstruction -; - -/* relocatableinstruction are instructions that needs a relocation pass */ -relocatableinstruction: ifelseinstruction - | loopinstruction - | haltinstruction - | multibranchinstruction - | subroutineinstruction - | jumpinstruction - | breakinstruction -; - -ifelseinstruction: ENDIF - { - // for Gen4 - if(IS_GENp(6)) // For gen6+. - error(&@1, "should be 'ENDIF execsize relativelocation'\n"); - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $1); - GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; - GEN(&$$)->bits1.da1.dest_horiz_stride = 1; - GEN(&$$)->bits1.da1.src1_reg_file = BRW_ARCHITECTURE_REGISTER_FILE; - GEN(&$$)->bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_UD; - } - | ENDIF execsize relativelocation instoptions - { - // for Gen6+ - /* Gen6, Gen7 bspec: predication is prohibited */ - if(!IS_GENp(6)) // for gen6- - error(&@1, "ENDIF Syntax error: should be 'ENDIF'\n"); - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $1); - set_execsize(&$$, $2); - $$.reloc.first_reloc_target = $3.reloc_target; - $$.reloc.first_reloc_offset = $3.imm32; - } - | ELSE execsize relativelocation instoptions - { - if(!IS_GENp(6)) { - // for Gen4, Gen5. gen_level < 60 - /* Set the istack pop count, which must always be 1. */ - $3.imm32 |= (1 << 16); - - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $1); - GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; - ip_dst.width = $2; - set_instruction_dest(&$$, &ip_dst); - set_instruction_src0(&$$, &ip_src, NULL); - set_instruction_src1(&$$, &$3, NULL); - $$.reloc.first_reloc_target = $3.reloc_target; - $$.reloc.first_reloc_offset = $3.imm32; - } else if(IS_GENp(6)) { - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $1); - set_execsize(&$$, $2); - $$.reloc.first_reloc_target = $3.reloc_target; - $$.reloc.first_reloc_offset = $3.imm32; - } else { - error(&@1, "'ELSE' instruction is not implemented.\n"); - } - } - | predicate IF execsize relativelocation - { - /* The branch instructions require that the IP register - * be the destination and first source operand, while the - * offset is the second source operand. The offset is added - * to the pre-incremented IP. - */ - if(IS_GENp(7)) /* Error in Gen7+. */ - error(&@2, "IF should be 'IF execsize JIP UIP'\n"); - - memset(&$$, 0, sizeof($$)); - set_instruction_predicate(&$$, &$1); - set_instruction_opcode(&$$, $2); - if(!IS_GENp(6)) { - GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; - ip_dst.width = $3; - set_instruction_dest(&$$, &ip_dst); - set_instruction_src0(&$$, &ip_src, NULL); - set_instruction_src1(&$$, &$4, NULL); - } - $$.reloc.first_reloc_target = $4.reloc_target; - $$.reloc.first_reloc_offset = $4.imm32; - } - | predicate IF execsize relativelocation relativelocation - { - /* for Gen7+ */ - if(!IS_GENp(7)) - error(&@2, "IF should be 'IF execsize relativelocation'\n"); - - memset(&$$, 0, sizeof($$)); - set_instruction_predicate(&$$, &$1); - set_instruction_opcode(&$$, $2); - set_execsize(&$$, $3); - $$.reloc.first_reloc_target = $4.reloc_target; - $$.reloc.first_reloc_offset = $4.imm32; - $$.reloc.second_reloc_target = $5.reloc_target; - $$.reloc.second_reloc_offset = $5.imm32; - } -; - -loopinstruction: predicate WHILE execsize relativelocation instoptions - { - if(!IS_GENp(6)) { - /* The branch instructions require that the IP register - * be the destination and first source operand, while the - * offset is the second source operand. The offset is added - * to the pre-incremented IP. - */ - ip_dst.width = $3; - set_instruction_dest(&$$, &ip_dst); - memset(&$$, 0, sizeof($$)); - set_instruction_predicate(&$$, &$1); - set_instruction_opcode(&$$, $2); - GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; - set_instruction_src0(&$$, &ip_src, NULL); - set_instruction_src1(&$$, &$4, NULL); - $$.reloc.first_reloc_target = $4.reloc_target; - $$.reloc.first_reloc_offset = $4.imm32; - } else if (IS_GENp(6)) { - /* Gen6 spec: - dest must have the same element size as src0. - dest horizontal stride must be 1. */ - memset(&$$, 0, sizeof($$)); - set_instruction_predicate(&$$, &$1); - set_instruction_opcode(&$$, $2); - set_execsize(&$$, $3); - $$.reloc.first_reloc_target = $4.reloc_target; - $$.reloc.first_reloc_offset = $4.imm32; - } else { - error(&@2, "'WHILE' instruction is not implemented!\n"); - } - } - | DO - { - // deprecated - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $1); - }; - -haltinstruction: predicate HALT execsize relativelocation relativelocation instoptions - { - // for Gen6, Gen7 - /* Gen6, Gen7 bspec: dst and src0 must be the null reg. */ - memset(&$$, 0, sizeof($$)); - set_instruction_predicate(&$$, &$1); - set_instruction_opcode(&$$, $2); - $$.reloc.first_reloc_target = $4.reloc_target; - $$.reloc.first_reloc_offset = $4.imm32; - $$.reloc.second_reloc_target = $5.reloc_target; - $$.reloc.second_reloc_offset = $5.imm32; - dst_null_reg.width = $3; - set_instruction_dest(&$$, &dst_null_reg); - set_instruction_src0(&$$, &src_null_reg, NULL); - }; - -multibranchinstruction: - predicate BRD execsize relativelocation instoptions - { - /* Gen7 bspec: dest must be null. use Switch option */ - memset(&$$, 0, sizeof($$)); - set_instruction_predicate(&$$, &$1); - set_instruction_opcode(&$$, $2); - if (IS_GENp(8)) - gen8_set_thread_control(GEN8(&$$), gen8_thread_control(GEN8(&$$)) | BRW_THREAD_SWITCH); - else - GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; - $$.reloc.first_reloc_target = $4.reloc_target; - $$.reloc.first_reloc_offset = $4.imm32; - dst_null_reg.width = $3; - set_instruction_dest(&$$, &dst_null_reg); - } - | predicate BRC execsize relativelocation relativelocation instoptions - { - /* Gen7 bspec: dest must be null. src0 must be null. use Switch option */ - memset(&$$, 0, sizeof($$)); - set_instruction_predicate(&$$, &$1); - set_instruction_opcode(&$$, $2); - if (IS_GENp(8)) - gen8_set_thread_control(GEN8(&$$), gen8_thread_control(GEN8(&$$)) | BRW_THREAD_SWITCH); - else - GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; - $$.reloc.first_reloc_target = $4.reloc_target; - $$.reloc.first_reloc_offset = $4.imm32; - $$.reloc.second_reloc_target = $5.reloc_target; - $$.reloc.second_reloc_offset = $5.imm32; - dst_null_reg.width = $3; - set_instruction_dest(&$$, &dst_null_reg); - set_instruction_src0(&$$, &src_null_reg, NULL); - } -; - -subroutineinstruction: - predicate CALL execsize dst relativelocation instoptions - { - /* - Gen6 bspec: - source, dest type should be DWORD. - dest must be QWord aligned. - source0 region control must be <2,2,1>. - execution size must be 2. - QtrCtrl is prohibited. - JIP is an immediate operand, must be of type W. - Gen7 bspec: - source, dest type should be DWORD. - dest must be QWord aligned. - source0 region control must be <2,2,1>. - execution size must be 2. - */ - memset(&$$, 0, sizeof($$)); - set_instruction_predicate(&$$, &$1); - set_instruction_opcode(&$$, $2); - - $4.type = BRW_REGISTER_TYPE_D; /* dest type should be DWORD */ - $4.width = BRW_WIDTH_2; /* execution size must be 2. */ - set_instruction_dest(&$$, &$4); - - struct src_operand src0; - memset(&src0, 0, sizeof(src0)); - src0.reg.type = BRW_REGISTER_TYPE_D; /* source type should be DWORD */ - /* source0 region control must be <2,2,1>. */ - src0.reg.hstride = 1; /*encoded 1*/ - src0.reg.width = BRW_WIDTH_2; - src0.reg.vstride = 2; /*encoded 2*/ - set_instruction_src0(&$$, &src0, NULL); - - $$.reloc.first_reloc_target = $5.reloc_target; - $$.reloc.first_reloc_offset = $5.imm32; - } - | predicate RET execsize dstoperandex src instoptions - { - /* - Gen6, 7: - source cannot be accumulator. - dest must be null. - src0 region control must be <2,2,1> (not specified clearly. should be same as CALL) - */ - memset(&$$, 0, sizeof($$)); - set_instruction_predicate(&$$, &$1); - set_instruction_opcode(&$$, $2); - dst_null_reg.width = BRW_WIDTH_2; /* execution size of RET should be 2 */ - set_instruction_dest(&$$, &dst_null_reg); - $5.reg.type = BRW_REGISTER_TYPE_D; - $5.reg.hstride = 1; /*encoded 1*/ - $5.reg.width = BRW_WIDTH_2; - $5.reg.vstride = 2; /*encoded 2*/ - set_instruction_src0(&$$, &$5, NULL); - } -; - -unaryinstruction: - predicate unaryop conditionalmodifier saturate execsize - dst srcaccimm instoptions - { - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - set_instruction_saturate(&$$, $4); - $6.width = $5; - set_instruction_options(&$$, $8); - set_instruction_pred_cond(&$$, &$1, &$3, &@3); - if (set_instruction_dest(&$$, &$6) != 0) - YYERROR; - if (set_instruction_src0(&$$, &$7, &@7) != 0) - YYERROR; - - if (!IS_GENp(6) && - get_type_size(GEN(&$$)->bits1.da1.dest_reg_type) * (1 << $6.width) == 64) - GEN(&$$)->header.compression_control = BRW_COMPRESSION_COMPRESSED; - } -; - -unaryop: MOV | FRC | RNDU | RNDD | RNDE | RNDZ | NOT | LZD | BFREV | CBIT - | F16TO32 | F32TO16 | FBH | FBL -; - -// Source operands cannot be accumulators -binaryinstruction: - predicate binaryop conditionalmodifier saturate execsize - dst src srcimm instoptions - { - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - set_instruction_saturate(&$$, $4); - set_instruction_options(&$$, $9); - set_instruction_pred_cond(&$$, &$1, &$3, &@3); - $6.width = $5; - if (set_instruction_dest(&$$, &$6) != 0) - YYERROR; - if (set_instruction_src0(&$$, &$7, &@7) != 0) - YYERROR; - if (set_instruction_src1(&$$, &$8, &@8) != 0) - YYERROR; - - if (!IS_GENp(6) && - get_type_size(GEN(&$$)->bits1.da1.dest_reg_type) * (1 << $6.width) == 64) - GEN(&$$)->header.compression_control = BRW_COMPRESSION_COMPRESSED; - } -; - -/* bspec: BFI1 should not access accumulator. */ -binaryop: MUL | MAC | MACH | LINE | SAD2 | SADA2 | DP4 | DPH | DP3 | DP2 | PLN | BFI1 -; - -// Source operands can be accumulators -binaryaccinstruction: - predicate binaryaccop conditionalmodifier saturate execsize - dst srcacc srcimm instoptions - { - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - set_instruction_saturate(&$$, $4); - $6.width = $5; - set_instruction_options(&$$, $9); - set_instruction_pred_cond(&$$, &$1, &$3, &@3); - if (set_instruction_dest(&$$, &$6) != 0) - YYERROR; - if (set_instruction_src0(&$$, &$7, &@7) != 0) - YYERROR; - if (set_instruction_src1(&$$, &$8, &@8) != 0) - YYERROR; - - if (!IS_GENp(6) && - get_type_size(GEN(&$$)->bits1.da1.dest_reg_type) * (1 << $6.width) == 64) - GEN(&$$)->header.compression_control = BRW_COMPRESSION_COMPRESSED; - } -; - -/* TODO: bspec says ADDC/SUBB/CMP/CMPN/SHL/BFI1 cannot use accumulator as dest. */ -binaryaccop: AVG | ADD | SEL | AND | OR | XOR | SHR | SHL | ASR | CMP | CMPN | ADDC | SUBB -; - -trinaryop: MAD | LRP | BFE | BFI2 -; - -trinaryinstruction: - predicate trinaryop conditionalmodifier saturate execsize - dst src src src instoptions -{ - memset(&$$, 0, sizeof($$)); - - set_instruction_pred_cond(&$$, &$1, &$3, &@3); - - set_instruction_opcode(&$$, $2); - set_instruction_saturate(&$$, $4); - - $6.width = $5; - if (set_instruction_dest_three_src(&$$, &$6)) - YYERROR; - if (set_instruction_src0_three_src(&$$, &$7)) - YYERROR; - if (set_instruction_src1_three_src(&$$, &$8)) - YYERROR; - if (set_instruction_src2_three_src(&$$, &$9)) - YYERROR; - set_instruction_options(&$$, $10); -} -; - -sendop: SEND | SENDC -; - -sendinstruction: predicate sendop execsize exp post_dst payload msgtarget - MSGLEN exp RETURNLEN exp instoptions - { - /* Send instructions are messy. The first argument is the - * post destination -- the grf register that the response - * starts from. The second argument is the current - * destination, which is the start of the message arguments - * to the shared function, and where src0 payload is loaded - * to if not null. The payload is typically based on the - * grf 0 thread payload of your current thread, and is - * implicitly loaded if non-null. - */ - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - $5.width = $3; - GEN(&$$)->header.destreg__conditionalmod = $4; /* msg reg index */ - set_instruction_predicate(&$$, &$1); - if (set_instruction_dest(&$$, &$5) != 0) - YYERROR; - - if (IS_GENp(6)) { - struct src_operand src0; - - memset(&src0, 0, sizeof(src0)); - src0.reg.address_mode = BRW_ADDRESS_DIRECT; - - if (IS_GENp(7)) - src0.reg.file = BRW_GENERAL_REGISTER_FILE; - else - src0.reg.file = BRW_MESSAGE_REGISTER_FILE; - - src0.reg.type = BRW_REGISTER_TYPE_D; - src0.reg.nr = $4; - src0.reg.subnr = 0; - set_instruction_src0(&$$, &src0, NULL); - } else { - if (set_instruction_src0(&$$, &$6, &@6) != 0) - YYERROR; - } - - if (IS_GENp(9)) { - gen8_set_src1_reg_file(GEN8(&$$), BRW_IMMEDIATE_VALUE); - gen8_set_src1_reg_type(GEN8(&$$), BRW_REGISTER_TYPE_D); - gen9_set_send_extdesc(GEN8(&$$), 0); - } else if (IS_GENp(8)) { - gen8_set_src1_reg_file(GEN8(&$$), BRW_IMMEDIATE_VALUE); - gen8_set_src1_reg_type(GEN8(&$$), BRW_REGISTER_TYPE_D); - } else { - GEN(&$$)->bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; - GEN(&$$)->bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_D; - } - - if (IS_GENp(8)) { - GEN8(&$$)->data[3] = GEN8(&$7)->data[3]; - gen8_set_sfid(GEN8(&$$), gen8_sfid(GEN8(&$7))); - gen8_set_mlen(GEN8(&$$), $9); - gen8_set_rlen(GEN8(&$$), $11); - gen8_set_eot(GEN8(&$$), $12.end_of_thread); - } else if (IS_GENp(5)) { - if (IS_GENp(6)) { - GEN(&$$)->header.destreg__conditionalmod = GEN(&$7)->bits2.send_gen5.sfid; - } else { - GEN(&$$)->header.destreg__conditionalmod = $4; /* msg reg index */ - GEN(&$$)->bits2.send_gen5.sfid = GEN(&$7)->bits2.send_gen5.sfid; - GEN(&$$)->bits2.send_gen5.end_of_thread = $12.end_of_thread; - } - - GEN(&$$)->bits3.generic_gen5 = GEN(&$7)->bits3.generic_gen5; - GEN(&$$)->bits3.generic_gen5.msg_length = $9; - GEN(&$$)->bits3.generic_gen5.response_length = $11; - GEN(&$$)->bits3.generic_gen5.end_of_thread = $12.end_of_thread; - } else { - GEN(&$$)->header.destreg__conditionalmod = $4; /* msg reg index */ - GEN(&$$)->bits3.generic = GEN(&$7)->bits3.generic; - GEN(&$$)->bits3.generic.msg_length = $9; - GEN(&$$)->bits3.generic.response_length = $11; - GEN(&$$)->bits3.generic.end_of_thread = $12.end_of_thread; - } - } - | predicate sendop execsize dst sendleadreg payload directsrcoperand instoptions - { - if (IS_GENp(6)) - error(&@2, "invalid syntax for send on gen6+\n"); - - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */ - - set_instruction_predicate(&$$, &$1); - - $4.width = $3; - if (set_instruction_dest(&$$, &$4) != 0) - YYERROR; - if (set_instruction_src0(&$$, &$6, &@6) != 0) - YYERROR; - /* XXX is this correct? */ - if (set_instruction_src1(&$$, &$7, &@7) != 0) - YYERROR; - - } - | predicate sendop execsize dst sendleadreg payload imm32reg instoptions - { - if (IS_GENp(6)) - error(&@2, "invalid syntax for send on gen6+\n"); - - if ($7.reg.type != BRW_REGISTER_TYPE_UD && - $7.reg.type != BRW_REGISTER_TYPE_D && - $7.reg.type != BRW_REGISTER_TYPE_V) { - error (&@7, "non-int D/UD/V representation: %d," - "type=%d\n", $7.reg.dw1.ud, $7.reg.type); - } - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */ - - set_instruction_predicate(&$$, &$1); - $4.width = $3; - if (set_instruction_dest(&$$, &$4) != 0) - YYERROR; - if (set_instruction_src0(&$$, &$6, &@6) != 0) - YYERROR; - if (set_instruction_src1(&$$, &$7, &@7) != 0) - YYERROR; - } - | predicate sendop execsize dst sendleadreg sndopr imm32reg instoptions - { - struct src_operand src0; - - if (!IS_GENp(6)) - error(&@2, "invalid syntax for send on gen6+\n"); - - if ($7.reg.type != BRW_REGISTER_TYPE_UD && - $7.reg.type != BRW_REGISTER_TYPE_D && - $7.reg.type != BRW_REGISTER_TYPE_V) { - error(&@7,"non-int D/UD/V representation: %d," - "type=%d\n", $7.reg.dw1.ud, $7.reg.type); - } - - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - set_instruction_predicate(&$$, &$1); - - $4.width = $3; - if (set_instruction_dest(&$$, &$4) != 0) - YYERROR; - - memset(&src0, 0, sizeof(src0)); - src0.reg.address_mode = BRW_ADDRESS_DIRECT; - - if (IS_GENp(7)) { - src0.reg.file = BRW_GENERAL_REGISTER_FILE; - src0.reg.type = BRW_REGISTER_TYPE_UB; - } else { - src0.reg.file = BRW_MESSAGE_REGISTER_FILE; - src0.reg.type = BRW_REGISTER_TYPE_D; - } - - src0.reg.nr = $5.nr; - src0.reg.subnr = 0; - set_instruction_src0(&$$, &src0, NULL); - set_instruction_src1(&$$, &$7, NULL); - - if (IS_GENp(9)) { - gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); - gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); - gen9_set_send_extdesc(GEN8(&$$), $6 & EX_DESC_FUNC_MASK); - } else if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); - gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); - } else { - GEN(&$$)->header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ - GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); - } - } - | predicate sendop execsize dst sendleadreg sndopr directsrcoperand instoptions - { - struct src_operand src0; - - if (!IS_GENp(6)) - error(&@2, "invalid syntax for send on gen6+\n"); - - if ($7.reg.file != BRW_ARCHITECTURE_REGISTER_FILE || - ($7.reg.nr & 0xF0) != BRW_ARF_ADDRESS || - ($7.reg.nr & 0x0F) != 0 || - $7.reg.subnr != 0) { - error (&@7, "scalar register must be a0.0<0;1,0>:ud\n"); - } - - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - set_instruction_predicate(&$$, &$1); - - $4.width = $3; - if (set_instruction_dest(&$$, &$4) != 0) - YYERROR; - - memset(&src0, 0, sizeof(src0)); - src0.reg.address_mode = BRW_ADDRESS_DIRECT; - - if (IS_GENp(7)) { - src0.reg.file = BRW_GENERAL_REGISTER_FILE; - src0.reg.type = BRW_REGISTER_TYPE_UB; - } else { - src0.reg.file = BRW_MESSAGE_REGISTER_FILE; - src0.reg.type = BRW_REGISTER_TYPE_D; - } - - src0.reg.nr = $5.nr; - src0.reg.subnr = 0; - set_instruction_src0(&$$, &src0, NULL); - - set_instruction_src1(&$$, &$7, &@7); - - if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); - gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); - gen9_set_send_extdesc(GEN8(&$$), $6 & EX_DESC_FUNC_MASK); - } else if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); - gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); - } else { - GEN(&$$)->header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ - GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); - } - } - | predicate sendop execsize dst sendleadreg payload sndopr imm32reg instoptions - { - if (IS_GENp(6)) - error(&@2, "invalid syntax for send on gen6+\n"); - - if ($8.reg.type != BRW_REGISTER_TYPE_UD && - $8.reg.type != BRW_REGISTER_TYPE_D && - $8.reg.type != BRW_REGISTER_TYPE_V) { - error(&@8, "non-int D/UD/V representation: %d," - "type=%d\n", $8.reg.dw1.ud, $8.reg.type); - } - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */ - - set_instruction_predicate(&$$, &$1); - $4.width = $3; - if (set_instruction_dest(&$$, &$4) != 0) - YYERROR; - if (set_instruction_src0(&$$, &$6, &@6) != 0) - YYERROR; - if (set_instruction_src1(&$$, &$8, &@8) != 0) - YYERROR; - - if (IS_GENx(5)) { - GEN(&$$)->bits2.send_gen5.sfid = ($7 & EX_DESC_SFID_MASK); - GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($7 & EX_DESC_EOT_MASK); - } - } - | predicate sendop execsize dst sendleadreg payload exp directsrcoperand instoptions - { - if (IS_GENp(6)) - error(&@2, "invalid syntax for send on gen6+\n"); - - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */ - - set_instruction_predicate(&$$, &$1); - - $4.width = $3; - if (set_instruction_dest(&$$, &$4) != 0) - YYERROR; - if (set_instruction_src0(&$$, &$6, &@6) != 0) - YYERROR; - /* XXX is this correct? */ - if (set_instruction_src1(&$$, &$8, &@8) != 0) - YYERROR; - if (IS_GENx(5)) { - GEN(&$$)->bits2.send_gen5.sfid = $7; - } - } - -; - -sndopr: exp %prec SNDOPR - { - $$ = $1; - } -; - -jumpinstruction: predicate JMPI execsize relativelocation2 - { - /* The jump instruction requires that the IP register - * be the destination and first source operand, while the - * offset is the second source operand. The next instruction - * is the post-incremented IP plus the offset. - */ - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - if(advanced_flag) { - if (IS_GENp(8)) - gen8_set_mask_control(GEN8(&$$), BRW_MASK_DISABLE); - else - GEN(&$$)->header.mask_control = BRW_MASK_DISABLE; - } - set_instruction_predicate(&$$, &$1); - ip_dst.width = BRW_WIDTH_1; - set_instruction_dest(&$$, &ip_dst); - set_instruction_src0(&$$, &ip_src, NULL); - set_instruction_src1(&$$, &$4, NULL); - $$.reloc.first_reloc_target = $4.reloc_target; - $$.reloc.first_reloc_offset = $4.imm32; - } -; - -mathinstruction: predicate MATH_INST execsize dst src srcimm math_function instoptions - { - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - - if (IS_GENp(8)) - gen8_set_math_function(GEN8(&$$), $7); - else - GEN(&$$)->header.destreg__conditionalmod = $7; - - set_instruction_options(&$$, $8); - set_instruction_predicate(&$$, &$1); - $4.width = $3; - if (set_instruction_dest(&$$, &$4) != 0) - YYERROR; - if (set_instruction_src0(&$$, &$5, &@5) != 0) - YYERROR; - if (set_instruction_src1(&$$, &$6, &@6) != 0) - YYERROR; - } -; - -breakinstruction: predicate breakop execsize relativelocation relativelocation instoptions - { - // for Gen6, Gen7 - memset(&$$, 0, sizeof($$)); - set_instruction_predicate(&$$, &$1); - set_instruction_opcode(&$$, $2); - set_execsize(&$$, $3); - $$.reloc.first_reloc_target = $4.reloc_target; - $$.reloc.first_reloc_offset = $4.imm32; - $$.reloc.second_reloc_target = $5.reloc_target; - $$.reloc.second_reloc_offset = $5.imm32; - } -; - -breakop: BREAK | CONT -; - -/* -maskpushop: MSAVE | PUSH -; - */ - -syncinstruction: predicate WAIT notifyreg - { - struct brw_reg notify_dst; - struct src_operand notify_src; - - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $2); - set_direct_dst_operand(¬ify_dst, &$3, BRW_REGISTER_TYPE_D); - notify_dst.width = BRW_WIDTH_1; - set_instruction_dest(&$$, ¬ify_dst); - set_direct_src_operand(¬ify_src, &$3, BRW_REGISTER_TYPE_D); - set_instruction_src0(&$$, ¬ify_src, NULL); - set_instruction_src1(&$$, &src_null_reg, NULL); - } - -; - -nopinstruction: NOP - { - memset(&$$, 0, sizeof($$)); - set_instruction_opcode(&$$, $1); - }; - -/* XXX! */ -payload: directsrcoperand -; - -post_dst: dst -; - -msgtarget: NULL_TOKEN - { - if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), BRW_SFID_NULL); - gen8_set_header_present(GEN8(&$$), 0); - } else if (IS_GENp(5)) { - GEN(&$$)->bits2.send_gen5.sfid= BRW_SFID_NULL; - GEN(&$$)->bits3.generic_gen5.header_present = 0; /* ??? */ - } else { - GEN(&$$)->bits3.generic.msg_target = BRW_SFID_NULL; - } - } - | SAMPLER LPAREN INTEGER COMMA INTEGER COMMA - sampler_datatype RPAREN - { - if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), BRW_SFID_SAMPLER); - gen8_set_header_present(GEN8(&$$), 1); /* ??? */ - gen8_set_binding_table_index(GEN8(&$$), $3); - gen8_set_sampler(GEN8(&$$), $5); - gen8_set_sampler_simd_mode(GEN8(&$$), 2); /* SIMD16 */ - } else if (IS_GENp(7)) { - GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_SAMPLER; - GEN(&$$)->bits3.generic_gen5.header_present = 1; /* ??? */ - GEN(&$$)->bits3.sampler_gen7.binding_table_index = $3; - GEN(&$$)->bits3.sampler_gen7.sampler = $5; - GEN(&$$)->bits3.sampler_gen7.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ - } else if (IS_GENp(5)) { - GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_SAMPLER; - GEN(&$$)->bits3.generic_gen5.header_present = 1; /* ??? */ - GEN(&$$)->bits3.sampler_gen5.binding_table_index = $3; - GEN(&$$)->bits3.sampler_gen5.sampler = $5; - GEN(&$$)->bits3.sampler_gen5.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ - } else { - GEN(&$$)->bits3.generic.msg_target = BRW_SFID_SAMPLER; - GEN(&$$)->bits3.sampler.binding_table_index = $3; - GEN(&$$)->bits3.sampler.sampler = $5; - switch ($7) { - case TYPE_F: - GEN(&$$)->bits3.sampler.return_format = - BRW_SAMPLER_RETURN_FORMAT_FLOAT32; - break; - case TYPE_UD: - GEN(&$$)->bits3.sampler.return_format = - BRW_SAMPLER_RETURN_FORMAT_UINT32; - break; - case TYPE_D: - GEN(&$$)->bits3.sampler.return_format = - BRW_SAMPLER_RETURN_FORMAT_SINT32; - break; - } - } - } - | MATH math_function saturate math_signed math_scalar - { - if (IS_GENp(6)) { - error (&@1, "Gen6+ doesn't have math function\n"); - } else if (IS_GENx(5)) { - GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_MATH; - GEN(&$$)->bits3.generic_gen5.header_present = 0; - GEN(&$$)->bits3.math_gen5.function = $2; - set_instruction_saturate(&$$, $3); - GEN(&$$)->bits3.math_gen5.int_type = $4; - GEN(&$$)->bits3.math_gen5.precision = BRW_MATH_PRECISION_FULL; - GEN(&$$)->bits3.math_gen5.data_type = $5; - } else { - GEN(&$$)->bits3.generic.msg_target = BRW_SFID_MATH; - GEN(&$$)->bits3.math.function = $2; - set_instruction_saturate(&$$, $3); - GEN(&$$)->bits3.math.int_type = $4; - GEN(&$$)->bits3.math.precision = BRW_MATH_PRECISION_FULL; - GEN(&$$)->bits3.math.data_type = $5; - } - } - | GATEWAY - { - if (IS_GENp(5)) { - GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_MESSAGE_GATEWAY; - GEN(&$$)->bits3.generic_gen5.header_present = 0; /* ??? */ - } else { - GEN(&$$)->bits3.generic.msg_target = BRW_SFID_MESSAGE_GATEWAY; - } - } - | READ LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA - INTEGER RPAREN - { - if (IS_GENp(9)) { - if ($5 != 0 && - $5 != GEN6_SFID_DATAPORT_RENDER_CACHE && - $5 != GEN7_SFID_DATAPORT_DATA_CACHE && - $5 != HSW_SFID_DATAPORT_DATA_CACHE1 && - $5 != SKL_SFID_DATAPORT_DCR0 && - $5 != SKL_SFID_DATAPORT_DATA_CACHE2) { - error (&@9, "error: wrong cache type\n"); - } - - if ($5 == 0) - gen8_set_sfid(GEN8(&$$), HSW_SFID_DATAPORT_DATA_CACHE1); - else - gen8_set_sfid(GEN8(&$$), $5); - - gen8_set_header_present(GEN8(&$$), 1); - gen8_set_dp_binding_table_index(GEN8(&$$), $3); - gen8_set_dp_message_control(GEN8(&$$), $7); - gen8_set_dp_message_type(GEN8(&$$), $9); - gen8_set_dp_category(GEN8(&$$), 0); - } else if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_SAMPLER_CACHE); - gen8_set_header_present(GEN8(&$$), 1); - gen8_set_dp_binding_table_index(GEN8(&$$), $3); - gen8_set_dp_message_control(GEN8(&$$), $7); - gen8_set_dp_message_type(GEN8(&$$), $9); - gen8_set_dp_category(GEN8(&$$), 0); - } else if (IS_GENx(7)) { - GEN(&$$)->bits2.send_gen5.sfid = - GEN6_SFID_DATAPORT_SAMPLER_CACHE; - GEN(&$$)->bits3.generic_gen5.header_present = 1; - GEN(&$$)->bits3.gen7_dp.binding_table_index = $3; - GEN(&$$)->bits3.gen7_dp.msg_control = $7; - GEN(&$$)->bits3.gen7_dp.msg_type = $9; - } else if (IS_GENx(6)) { - GEN(&$$)->bits2.send_gen5.sfid = - GEN6_SFID_DATAPORT_SAMPLER_CACHE; - GEN(&$$)->bits3.generic_gen5.header_present = 1; - GEN(&$$)->bits3.gen6_dp_sampler_const_cache.binding_table_index = $3; - GEN(&$$)->bits3.gen6_dp_sampler_const_cache.msg_control = $7; - GEN(&$$)->bits3.gen6_dp_sampler_const_cache.msg_type = $9; - } else if (IS_GENx(5)) { - GEN(&$$)->bits2.send_gen5.sfid = - BRW_SFID_DATAPORT_READ; - GEN(&$$)->bits3.generic_gen5.header_present = 1; - GEN(&$$)->bits3.dp_read_gen5.binding_table_index = $3; - GEN(&$$)->bits3.dp_read_gen5.target_cache = $5; - GEN(&$$)->bits3.dp_read_gen5.msg_control = $7; - GEN(&$$)->bits3.dp_read_gen5.msg_type = $9; - } else { - GEN(&$$)->bits3.generic.msg_target = - BRW_SFID_DATAPORT_READ; - GEN(&$$)->bits3.dp_read.binding_table_index = $3; - GEN(&$$)->bits3.dp_read.target_cache = $5; - GEN(&$$)->bits3.dp_read.msg_control = $7; - GEN(&$$)->bits3.dp_read.msg_type = $9; - } - } - | WRITE LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA - INTEGER RPAREN - { - if (IS_GENp(8)) { - if (IS_GENp(9)) { - if ($9 != 0 && - $9 != GEN6_SFID_DATAPORT_RENDER_CACHE && - $9 != GEN7_SFID_DATAPORT_DATA_CACHE && - $9 != HSW_SFID_DATAPORT_DATA_CACHE1 && - $9 != SKL_SFID_DATAPORT_DATA_CACHE2) { - error (&@9, "error: wrong cache type\n"); - } - } else { - if ($9 != 0 && - $9 != GEN6_SFID_DATAPORT_RENDER_CACHE && - $9 != GEN7_SFID_DATAPORT_DATA_CACHE && - $9 != HSW_SFID_DATAPORT_DATA_CACHE1) { - error (&@9, "error: wrong cache type\n"); - } - } - - if ($9 == 0) - gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE); - else - gen8_set_sfid(GEN8(&$$), $9); - - gen8_set_header_present(GEN8(&$$), 1); - gen8_set_dp_binding_table_index(GEN8(&$$), $3); - gen8_set_dp_message_control(GEN8(&$$), $5); - gen8_set_dp_message_type(GEN8(&$$), $7); - gen8_set_dp_category(GEN8(&$$), 0); - } else if (IS_GENx(7)) { - GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; - GEN(&$$)->bits3.generic_gen5.header_present = 1; - GEN(&$$)->bits3.gen7_dp.binding_table_index = $3; - GEN(&$$)->bits3.gen7_dp.msg_control = $5; - GEN(&$$)->bits3.gen7_dp.msg_type = $7; - } else if (IS_GENx(6)) { - GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; - /* Sandybridge supports headerlesss message for render target write. - * Currently the GFX assembler doesn't support it. so the program must provide - * message header - */ - GEN(&$$)->bits3.generic_gen5.header_present = 1; - GEN(&$$)->bits3.gen6_dp.binding_table_index = $3; - GEN(&$$)->bits3.gen6_dp.msg_control = $5; - GEN(&$$)->bits3.gen6_dp.msg_type = $7; - GEN(&$$)->bits3.gen6_dp.send_commit_msg = $9; - } else if (IS_GENx(5)) { - GEN(&$$)->bits2.send_gen5.sfid = - BRW_SFID_DATAPORT_WRITE; - GEN(&$$)->bits3.generic_gen5.header_present = 1; - GEN(&$$)->bits3.dp_write_gen5.binding_table_index = $3; - GEN(&$$)->bits3.dp_write_gen5.last_render_target = ($5 & 0x8) >> 3; - GEN(&$$)->bits3.dp_write_gen5.msg_control = $5 & 0x7; - GEN(&$$)->bits3.dp_write_gen5.msg_type = $7; - GEN(&$$)->bits3.dp_write_gen5.send_commit_msg = $9; - } else { - GEN(&$$)->bits3.generic.msg_target = - BRW_SFID_DATAPORT_WRITE; - GEN(&$$)->bits3.dp_write.binding_table_index = $3; - /* The msg control field of brw_struct.h is split into - * msg control and last_render_target, even though - * last_render_target isn't common to all write messages. - */ - GEN(&$$)->bits3.dp_write.last_render_target = ($5 & 0x8) >> 3; - GEN(&$$)->bits3.dp_write.msg_control = $5 & 0x7; - GEN(&$$)->bits3.dp_write.msg_type = $7; - GEN(&$$)->bits3.dp_write.send_commit_msg = $9; - } - } - | WRITE LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA - INTEGER COMMA INTEGER RPAREN - { - if (IS_GENp(8)) { - if (IS_GENp(9)) { - if ($9 != 0 && - $9 != GEN6_SFID_DATAPORT_RENDER_CACHE && - $9 != GEN7_SFID_DATAPORT_DATA_CACHE && - $9 != HSW_SFID_DATAPORT_DATA_CACHE1 && - $9 != SKL_SFID_DATAPORT_DATA_CACHE2) { - error (&@9, "error: wrong cache type\n"); - } - } else { - if ($9 != 0 && - $9 != GEN6_SFID_DATAPORT_RENDER_CACHE && - $9 != GEN7_SFID_DATAPORT_DATA_CACHE && - $9 != HSW_SFID_DATAPORT_DATA_CACHE1) { - error (&@9, "error: wrong cache type\n"); - } - } - - if ($9 == 0) - gen8_set_sfid(GEN8(&$$), GEN6_SFID_DATAPORT_RENDER_CACHE); - else - gen8_set_sfid(GEN8(&$$), $9); - - gen8_set_header_present(GEN8(&$$), ($11 != 0)); - gen8_set_dp_binding_table_index(GEN8(&$$), $3); - gen8_set_dp_message_control(GEN8(&$$), $5); - gen8_set_dp_message_type(GEN8(&$$), $7); - gen8_set_dp_category(GEN8(&$$), 0); - } else if (IS_GENx(7)) { - GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; - GEN(&$$)->bits3.generic_gen5.header_present = ($11 != 0); - GEN(&$$)->bits3.gen7_dp.binding_table_index = $3; - GEN(&$$)->bits3.gen7_dp.msg_control = $5; - GEN(&$$)->bits3.gen7_dp.msg_type = $7; - } else if (IS_GENx(6)) { - GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; - GEN(&$$)->bits3.generic_gen5.header_present = ($11 != 0); - GEN(&$$)->bits3.gen6_dp.binding_table_index = $3; - GEN(&$$)->bits3.gen6_dp.msg_control = $5; - GEN(&$$)->bits3.gen6_dp.msg_type = $7; - GEN(&$$)->bits3.gen6_dp.send_commit_msg = $9; - } else if (IS_GENx(5)) { - GEN(&$$)->bits2.send_gen5.sfid = - BRW_SFID_DATAPORT_WRITE; - GEN(&$$)->bits3.generic_gen5.header_present = ($11 != 0); - GEN(&$$)->bits3.dp_write_gen5.binding_table_index = $3; - GEN(&$$)->bits3.dp_write_gen5.last_render_target = ($5 & 0x8) >> 3; - GEN(&$$)->bits3.dp_write_gen5.msg_control = $5 & 0x7; - GEN(&$$)->bits3.dp_write_gen5.msg_type = $7; - GEN(&$$)->bits3.dp_write_gen5.send_commit_msg = $9; - } else { - GEN(&$$)->bits3.generic.msg_target = - BRW_SFID_DATAPORT_WRITE; - GEN(&$$)->bits3.dp_write.binding_table_index = $3; - /* The msg control field of brw_struct.h is split into - * msg control and last_render_target, even though - * last_render_target isn't common to all write messages. - */ - GEN(&$$)->bits3.dp_write.last_render_target = ($5 & 0x8) >> 3; - GEN(&$$)->bits3.dp_write.msg_control = $5 & 0x7; - GEN(&$$)->bits3.dp_write.msg_type = $7; - GEN(&$$)->bits3.dp_write.send_commit_msg = $9; - } - } - | URB INTEGER urb_swizzle urb_allocate urb_used urb_complete - { - GEN(&$$)->bits3.generic.msg_target = BRW_SFID_URB; - if (IS_GENp(5)) { - GEN(&$$)->bits2.send_gen5.sfid = BRW_SFID_URB; - GEN(&$$)->bits3.generic_gen5.header_present = 1; - set_instruction_opcode(&$$, BRW_URB_OPCODE_WRITE); - GEN(&$$)->bits3.urb_gen5.offset = $2; - GEN(&$$)->bits3.urb_gen5.swizzle_control = $3; - GEN(&$$)->bits3.urb_gen5.pad = 0; - GEN(&$$)->bits3.urb_gen5.allocate = $4; - GEN(&$$)->bits3.urb_gen5.used = $5; - GEN(&$$)->bits3.urb_gen5.complete = $6; - } else { - GEN(&$$)->bits3.generic.msg_target = BRW_SFID_URB; - set_instruction_opcode(&$$, BRW_URB_OPCODE_WRITE); - GEN(&$$)->bits3.urb.offset = $2; - GEN(&$$)->bits3.urb.swizzle_control = $3; - GEN(&$$)->bits3.urb.pad = 0; - GEN(&$$)->bits3.urb.allocate = $4; - GEN(&$$)->bits3.urb.used = $5; - GEN(&$$)->bits3.urb.complete = $6; - } - } - | THREAD_SPAWNER LPAREN INTEGER COMMA INTEGER COMMA - INTEGER RPAREN - { - if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), BRW_SFID_THREAD_SPAWNER); - gen8_set_header_present(GEN8(&$$), 0); /* Must be 0 */ - gen8_set_ts_opcode(GEN8(&$$), $3); - gen8_set_ts_request_type(GEN8(&$$), $5); - gen8_set_ts_resource_select(GEN8(&$$), $7); - } else { - GEN(&$$)->bits3.generic.msg_target = - BRW_SFID_THREAD_SPAWNER; - if (IS_GENp(5)) { - GEN(&$$)->bits2.send_gen5.sfid = - BRW_SFID_THREAD_SPAWNER; - GEN(&$$)->bits3.generic_gen5.header_present = 0; - GEN(&$$)->bits3.thread_spawner_gen5.opcode = $3; - GEN(&$$)->bits3.thread_spawner_gen5.requester_type = $5; - GEN(&$$)->bits3.thread_spawner_gen5.resource_select = $7; - } else { - GEN(&$$)->bits3.generic.msg_target = - BRW_SFID_THREAD_SPAWNER; - GEN(&$$)->bits3.thread_spawner.opcode = $3; - GEN(&$$)->bits3.thread_spawner.requester_type = $5; - GEN(&$$)->bits3.thread_spawner.resource_select = $7; - } - } - } - | VME LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER RPAREN - { - GEN(&$$)->bits3.generic.msg_target = GEN6_SFID_VME; - - if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), GEN6_SFID_VME); - gen8_set_header_present(GEN8(&$$), 1); /* Must be 1 */ - gen8_set_vme_binding_table_index(GEN8(&$$), $3); - gen8_set_vme_message_type(GEN8(&$$), $9); - } else if (IS_GENp(6)) { - GEN(&$$)->bits2.send_gen5.sfid = GEN6_SFID_VME; - GEN(&$$)->bits3.vme_gen6.binding_table_index = $3; - GEN(&$$)->bits3.vme_gen6.search_path_index = $5; - GEN(&$$)->bits3.vme_gen6.lut_subindex = $7; - GEN(&$$)->bits3.vme_gen6.message_type = $9; - GEN(&$$)->bits3.generic_gen5.header_present = 1; - } else { - error (&@1, "Gen6- doesn't have vme function\n"); - } - } - | CRE LPAREN INTEGER COMMA INTEGER RPAREN - { - if (IS_GENp(8)) { - gen8_set_sfid(GEN8(&$$), HSW_SFID_CRE); - gen8_set_header_present(GEN8(&$$), 1); /* Must be 1 */ - gen8_set_cre_binding_table_index(GEN8(&$$), $3); - gen8_set_cre_message_type(GEN8(&$$), $5); - } else { - if (gen_level < 75) - error (&@1, "Below Gen7.5 doesn't have CRE function\n"); - - GEN(&$$)->bits3.generic.msg_target = HSW_SFID_CRE; - - GEN(&$$)->bits2.send_gen5.sfid = HSW_SFID_CRE; - GEN(&$$)->bits3.cre_gen75.binding_table_index = $3; - GEN(&$$)->bits3.cre_gen75.message_type = $5; - GEN(&$$)->bits3.generic_gen5.header_present = 1; - } - } - - | DATA_PORT LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA - INTEGER COMMA INTEGER COMMA INTEGER RPAREN - { - if (IS_GENp(8)) { - if ($3 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && - $3 != GEN6_SFID_DATAPORT_RENDER_CACHE && - $3 != GEN6_SFID_DATAPORT_CONSTANT_CACHE && - $3 != GEN7_SFID_DATAPORT_DATA_CACHE && - $3 != HSW_SFID_DATAPORT_DATA_CACHE1) { - error (&@3, "error: wrong cache type\n"); - } - - gen8_set_sfid(GEN8(&$$), $3); - gen8_set_header_present(GEN8(&$$), ($13 != 0)); - gen8_set_dp_binding_table_index(GEN8(&$$), $9); - gen8_set_dp_message_control(GEN8(&$$), $7); - gen8_set_dp_message_type(GEN8(&$$), $5); - gen8_set_dp_category(GEN8(&$$), $11); - } else { - GEN(&$$)->bits2.send_gen5.sfid = $3; - GEN(&$$)->bits3.generic_gen5.header_present = ($13 != 0); - - if (IS_GENp(7)) { - if ($3 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && - $3 != GEN6_SFID_DATAPORT_RENDER_CACHE && - $3 != GEN6_SFID_DATAPORT_CONSTANT_CACHE && - $3 != GEN7_SFID_DATAPORT_DATA_CACHE) { - error (&@3, "error: wrong cache type\n"); - } - - GEN(&$$)->bits3.gen7_dp.category = $11; - GEN(&$$)->bits3.gen7_dp.binding_table_index = $9; - GEN(&$$)->bits3.gen7_dp.msg_control = $7; - GEN(&$$)->bits3.gen7_dp.msg_type = $5; - } else if (IS_GENx(6)) { - if ($3 != GEN6_SFID_DATAPORT_SAMPLER_CACHE && - $3 != GEN6_SFID_DATAPORT_RENDER_CACHE && - $3 != GEN6_SFID_DATAPORT_CONSTANT_CACHE) { - error (&@3, "error: wrong cache type\n"); - } - - GEN(&$$)->bits3.gen6_dp.send_commit_msg = $11; - GEN(&$$)->bits3.gen6_dp.binding_table_index = $9; - GEN(&$$)->bits3.gen6_dp.msg_control = $7; - GEN(&$$)->bits3.gen6_dp.msg_type = $5; - } else if (!IS_GENp(5)) { - error (&@1, "Gen6- doesn't support data port for sampler/render/constant/data cache\n"); - } - } - } -; - -urb_allocate: ALLOCATE { $$ = 1; } - | /* empty */ { $$ = 0; } -; - -urb_used: USED { $$ = 1; } - | /* empty */ { $$ = 0; } -; - -urb_complete: COMPLETE { $$ = 1; } - | /* empty */ { $$ = 0; } -; - -urb_swizzle: TRANSPOSE { $$ = BRW_URB_SWIZZLE_TRANSPOSE; } - | INTERLEAVE { $$ = BRW_URB_SWIZZLE_INTERLEAVE; } - | /* empty */ { $$ = BRW_URB_SWIZZLE_NONE; } -; - -sampler_datatype: - TYPE_F - | TYPE_UD - | TYPE_D -; - -math_function: INV | LOG | EXP | SQRT | POW | SIN | COS | SINCOS | INTDIV - | INTMOD | INTDIVMOD -; - -math_signed: /* empty */ { $$ = 0; } - | SIGNED { $$ = 1; } -; - -math_scalar: /* empty */ { $$ = 0; } - | SCALAR { $$ = 1; } -; - -/* 1.4.2: Destination register */ - -dst: dstoperand | dstoperandex -; - -dstoperand: symbol_reg dstregion - { - $$ = $1.reg; - $$.hstride = resolve_dst_region(&$1, $2); - } - | dstreg dstregion writemask regtype - { - /* Returns an instruction with just the destination register - * filled in. - */ - $$ = $1; - $$.hstride = resolve_dst_region(NULL, $2); - $$.dw1.bits.writemask = $3.dw1.bits.writemask; - $$.type = $4.type; - } -; - -/* The dstoperandex returns an instruction with just the destination register - * filled in. - */ -dstoperandex: dstoperandex_typed dstregion regtype - { - $$ = $1; - $$.hstride = resolve_dst_region(NULL, $2); - $$.type = $3.type; - } - | maskstackreg - { - $$ = $1; - $$.hstride = 1; - $$.type = BRW_REGISTER_TYPE_UW; - } - | controlreg - { - $$ = $1; - $$.hstride = 1; - $$.type = BRW_REGISTER_TYPE_UD; - } - | ipreg - { - $$ = $1; - $$.hstride = 1; - $$.type = BRW_REGISTER_TYPE_UD; - } - | nullreg dstregion regtype - { - $$ = $1; - $$.hstride = resolve_dst_region(NULL, $2); - $$.type = $3.type; - } -; - -dstoperandex_typed: accreg | flagreg | addrreg | maskreg -; - -symbol_reg: STRING %prec STR_SYMBOL_REG - { - struct declared_register *dcl_reg = find_register($1); - - if (dcl_reg == NULL) - error(&@1, "can't find register %s\n", $1); - - memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); - free($1); // $1 has been malloc'ed by strdup - } - | symbol_reg_p - { - $$=$1; - } -; - -symbol_reg_p: STRING LPAREN exp RPAREN - { - struct declared_register *dcl_reg = find_register($1); - - if (dcl_reg == NULL) - error(&@1, "can't find register %s\n", $1); - - memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); - $$.reg.nr += $3; - free($1); - } - | STRING LPAREN exp COMMA exp RPAREN - { - struct declared_register *dcl_reg = find_register($1); - - if (dcl_reg == NULL) - error(&@1, "can't find register %s\n", $1); - - memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); - $$.reg.nr += $3; - if(advanced_flag) { - int size = get_type_size(dcl_reg->reg.type); - $$.reg.nr += ($$.reg.subnr + $5) / (32 / size); - $$.reg.subnr = ($$.reg.subnr + $5) % (32 / size); - } else { - $$.reg.nr += ($$.reg.subnr + $5) / 32; - $$.reg.subnr = ($$.reg.subnr + $5) % 32; - } - free($1); - } -; -/* Returns a partially complete destination register consisting of the - * direct or indirect register addressing fields, but not stride or writemask. - */ -dstreg: directgenreg - { - $$ = $1; - $$.address_mode = BRW_ADDRESS_DIRECT; - } - | directmsgreg - { - $$ = $1; - $$.address_mode = BRW_ADDRESS_DIRECT; - } - | indirectgenreg - { - $$ = $1; - $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; - } - | indirectmsgreg - { - $$ = $1; - $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; - } -; - -/* 1.4.3: Source register */ -srcaccimm: srcacc | imm32reg -; - -srcacc: directsrcaccoperand | indirectsrcoperand -; - -srcimm: directsrcoperand | indirectsrcoperand| imm32reg -; - -imm32reg: imm32 srcimmtype - { - union { - int i; - float f; - } intfloat; - uint32_t d; - - switch ($2) { - case BRW_REGISTER_TYPE_UD: - case BRW_REGISTER_TYPE_D: - case BRW_REGISTER_TYPE_V: - case BRW_REGISTER_TYPE_VF: - switch ($1.r) { - case imm32_d: - d = $1.u.d; - break; - default: - error (&@2, "non-int D/UD/V/VF representation: %d,type=%d\n", $1.r, $2); - } - break; - case BRW_REGISTER_TYPE_UW: - case BRW_REGISTER_TYPE_W: - switch ($1.r) { - case imm32_d: - d = $1.u.d; - break; - default: - error (&@2, "non-int W/UW representation\n"); - } - d &= 0xffff; - d |= d << 16; - break; - case BRW_REGISTER_TYPE_F: - switch ($1.r) { - case imm32_f: - intfloat.f = $1.u.f; - break; - case imm32_d: - intfloat.f = (float) $1.u.d; - break; - default: - error (&@2, "non-float F representation\n"); - } - d = intfloat.i; - break; -#if 0 - case BRW_REGISTER_TYPE_VF: - fprintf (stderr, "Immediate type VF not supported yet\n"); - YYERROR; -#endif - default: - error(&@2, "unknown immediate type %d\n", $2); - } - memset (&$$, '\0', sizeof ($$)); - $$.reg.file = BRW_IMMEDIATE_VALUE; - $$.reg.type = $2; - $$.reg.dw1.ud = d; - } -; - -directsrcaccoperand: directsrcoperand - | accreg region regtype - { - set_direct_src_operand(&$$, &$1, $3.type); - $$.reg.vstride = $2.vert_stride; - $$.reg.width = $2.width; - $$.reg.hstride = $2.horiz_stride; - $$.default_region = $2.is_default; - } -; - -/* Returns a source operand in the src0 fields of an instruction. */ -srcarchoperandex: srcarchoperandex_typed region regtype - { - memset (&$$, '\0', sizeof ($$)); - $$.reg.file = $1.file; - $$.reg.type = $3.type; - $$.reg.subnr = $1.subnr; - $$.reg.nr = $1.nr; - $$.reg.vstride = $2.vert_stride; - $$.reg.width = $2.width; - $$.reg.hstride = $2.horiz_stride; - $$.default_region = $2.is_default; - $$.reg.negate = 0; - $$.reg.abs = 0; - } - | maskstackreg - { - set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UB); - } - | controlreg - { - set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); - } -/* | statereg - { - set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); - }*/ - | notifyreg - { - set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); - } - | ipreg - { - set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); - } - | nullreg region regtype - { - if ($3.is_default) { - set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); - } else { - set_direct_src_operand(&$$, &$1, $3.type); - } - $$.default_region = 1; - } -; - -srcarchoperandex_typed: flagreg | addrreg | maskreg -; - -sendleadreg: symbol_reg - { - memset (&$$, '\0', sizeof ($$)); - $$.file = $1.reg.file; - $$.nr = $1.reg.nr; - $$.subnr = $1.reg.subnr; - } - | directgenreg | directmsgreg -; - -src: directsrcoperand | indirectsrcoperand -; - -directsrcoperand: negate abs symbol_reg region regtype - { - memset (&$$, '\0', sizeof ($$)); - $$.reg.address_mode = BRW_ADDRESS_DIRECT; - $$.reg.file = $3.reg.file; - $$.reg.nr = $3.reg.nr; - $$.reg.subnr = $3.reg.subnr; - if ($5.is_default) { - $$.reg.type = $3.reg.type; - } else { - $$.reg.type = $5.type; - } - if ($4.is_default) { - $$.reg.vstride = $3.src_region.vert_stride; - $$.reg.width = $3.src_region.width; - $$.reg.hstride = $3.src_region.horiz_stride; - } else { - $$.reg.vstride = $4.vert_stride; - $$.reg.width = $4.width; - $$.reg.hstride = $4.horiz_stride; - } - $$.reg.negate = $1; - $$.reg.abs = $2; - } - | statereg region regtype - { - if($2.is_default ==1 && $3.is_default == 1) - { - set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); - } - else{ - memset (&$$, '\0', sizeof ($$)); - $$.reg.address_mode = BRW_ADDRESS_DIRECT; - $$.reg.file = $1.file; - $$.reg.nr = $1.nr; - $$.reg.subnr = $1.subnr; - $$.reg.vstride = $2.vert_stride; - $$.reg.width = $2.width; - $$.reg.hstride = $2.horiz_stride; - $$.reg.type = $3.type; - } - } - | negate abs directgenreg region swizzle regtype - { - memset (&$$, '\0', sizeof ($$)); - $$.reg.address_mode = BRW_ADDRESS_DIRECT; - $$.reg.file = $3.file; - $$.reg.nr = $3.nr; - $$.reg.subnr = $3.subnr; - $$.reg.type = $6.type; - $$.reg.vstride = $4.vert_stride; - $$.reg.width = $4.width; - $$.reg.hstride = $4.horiz_stride; - $$.default_region = $4.is_default; - $$.reg.negate = $1; - $$.reg.abs = $2; - $$.reg.dw1.bits.swizzle = $5.reg.dw1.bits.swizzle; - } - | srcarchoperandex -; - -indirectsrcoperand: - negate abs indirectgenreg indirectregion regtype swizzle - { - memset (&$$, '\0', sizeof ($$)); - $$.reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; - $$.reg.file = $3.file; - $$.reg.subnr = $3.subnr; - $$.reg.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; - $$.reg.type = $5.type; - $$.reg.vstride = $4.vert_stride; - $$.reg.width = $4.width; - $$.reg.hstride = $4.horiz_stride; - $$.reg.negate = $1; - $$.reg.abs = $2; - $$.reg.dw1.bits.swizzle = $6.reg.dw1.bits.swizzle; - } -; - -/* 1.4.4: Address Registers */ -/* Returns a partially-completed struct brw_reg consisting of the address - * register fields for register-indirect access. - */ -addrparam: addrreg COMMA immaddroffset - { - if ($3 < -512 || $3 > 511) - error(&@3, "Address immediate offset %d out of range\n", $3); - memset (&$$, '\0', sizeof ($$)); - $$.subnr = $1.subnr; - $$.dw1.bits.indirect_offset = $3; - } - | addrreg - { - memset (&$$, '\0', sizeof ($$)); - $$.subnr = $1.subnr; - $$.dw1.bits.indirect_offset = 0; - } -; - -/* The immaddroffset provides an immediate offset value added to the addresses - * from the address register in register-indirect register access. - */ -immaddroffset: /* empty */ { $$ = 0; } - | exp -; - - -/* 1.4.5: Register files and register numbers */ -subregnum: DOT exp - { - $$ = $2; - } - | %prec SUBREGNUM - { - /* Default to subreg 0 if unspecified. */ - $$ = 0; - } -; - -directgenreg: GENREG subregnum - { - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_GENERAL_REGISTER_FILE; - $$.nr = $1; - $$.subnr = $2; - } -; - -indirectgenreg: GENREGFILE LSQUARE addrparam RSQUARE - { - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_GENERAL_REGISTER_FILE; - $$.subnr = $3.subnr; - $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; - } -; - -directmsgreg: MSGREG subregnum - { - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_MESSAGE_REGISTER_FILE; - $$.nr = $1; - $$.subnr = $2; - } -; - -indirectmsgreg: MSGREGFILE LSQUARE addrparam RSQUARE - { - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_MESSAGE_REGISTER_FILE; - $$.subnr = $3.subnr; - $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset; - } -; - -addrreg: ADDRESSREG subregnum - { - if ($1 != 0) - error(&@2, "address register number %d out of range", $1); - - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_ADDRESS | $1; - $$.subnr = $2; - } -; - -accreg: ACCREG subregnum - { - if ($1 > 1) - error(&@1, "accumulator register number %d out of range", $1); - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_ACCUMULATOR | $1; - $$.subnr = $2; - } -; - -flagreg: FLAGREG subregnum - { - if ((!IS_GENp(7) && $1 > 0) || - (IS_GENp(7) && $1 > 1)) { - error(&@2, "flag register number %d out of range\n", $1); - } - - if ($2 > 1) - error(&@2, "flag subregister number %d out of range\n", $1); - - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_FLAG | $1; - $$.subnr = $2; - } -; - -maskreg: MASKREG subregnum - { - if ($1 > 0) - error(&@1, "mask register number %d out of range", $1); - - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_MASK; - $$.subnr = $2; - } - | mask_subreg - { - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_MASK; - $$.subnr = $1; - } -; - -mask_subreg: AMASK | IMASK | LMASK | CMASK -; - -maskstackreg: MASKSTACKREG subregnum - { - if ($1 > 0) - error(&@1, "mask stack register number %d out of range", $1); - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_MASK_STACK; - $$.subnr = $2; - } - | maskstack_subreg - { - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_MASK_STACK; - $$.subnr = $1; - } -; - -maskstack_subreg: IMS | LMS -; - -/* -maskstackdepthreg: MASKSTACKDEPTHREG subregnum - { - if ($1 > 0) - error(&@1, "mask stack register number %d out of range", $1); - memset (&$$, '\0', sizeof ($$)); - $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.reg_nr = BRW_ARF_MASK_STACK_DEPTH; - $$.subreg_nr = $2; - } - | maskstackdepth_subreg - { - memset (&$$, '\0', sizeof ($$)); - $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.reg_nr = BRW_ARF_MASK_STACK_DEPTH; - $$.subreg_nr = $1; - } -; - -maskstackdepth_subreg: IMSD | LMSD -; - */ - -notifyreg: NOTIFYREG regtype - { - int num_notifyreg = (IS_GENp(6)) ? 3 : 2; - - if ($1 > num_notifyreg) - error(&@1, "notification register number %d out of range", - $1); - - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - - if (IS_GENp(6)) { - $$.nr = BRW_ARF_NOTIFICATION_COUNT; - $$.subnr = $1; - } else { - $$.nr = BRW_ARF_NOTIFICATION_COUNT | $1; - $$.subnr = 0; - } - } -/* - | NOTIFYREG regtype - { - if ($1 > 1) { - fprintf(stderr, - "notification register number %d out of range", - $1); - YYERROR; - } - memset (&$$, '\0', sizeof ($$)); - $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.reg_nr = BRW_ARF_NOTIFICATION_COUNT; - $$.subreg_nr = 0; - } -*/ -; - -statereg: STATEREG subregnum - { - if ($1 > 0) - error(&@1, "state register number %d out of range", $1); - - if ($2 > 1) - error(&@2, "state subregister number %d out of range", $1); - - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_STATE | $1; - $$.subnr = $2; - } -; - -controlreg: CONTROLREG subregnum - { - if ($1 > 0) - error(&@1, "control register number %d out of range", $1); - - if ($2 > 2) - error(&@2, "control subregister number %d out of range", $1); - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_CONTROL | $1; - $$.subnr = $2; - } -; - -ipreg: IPREG regtype - { - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_IP; - $$.subnr = 0; - } -; - -nullreg: NULL_TOKEN - { - memset (&$$, '\0', sizeof ($$)); - $$.file = BRW_ARCHITECTURE_REGISTER_FILE; - $$.nr = BRW_ARF_NULL; - $$.subnr = 0; - } -; - -/* 1.4.6: Relative locations */ -relativelocation: - simple_int - { - if (($1 > 32767) || ($1 < -32768)) - error(&@1, "error: relative offset %d out of range \n", $1); - - memset (&$$, '\0', sizeof ($$)); - $$.reg.file = BRW_IMMEDIATE_VALUE; - $$.reg.type = BRW_REGISTER_TYPE_D; - $$.imm32 = $1 & 0x0000ffff; - } - | STRING - { - memset (&$$, '\0', sizeof ($$)); - $$.reg.file = BRW_IMMEDIATE_VALUE; - $$.reg.type = BRW_REGISTER_TYPE_D; - $$.reloc_target = $1; - } -; - -relativelocation2: - STRING - { - memset (&$$, '\0', sizeof ($$)); - $$.reg.file = BRW_IMMEDIATE_VALUE; - $$.reg.type = BRW_REGISTER_TYPE_D; - $$.reloc_target = $1; - } - | exp - { - memset (&$$, '\0', sizeof ($$)); - $$.reg.file = BRW_IMMEDIATE_VALUE; - $$.reg.type = BRW_REGISTER_TYPE_D; - $$.imm32 = $1; - } - | directgenreg region regtype - { - set_direct_src_operand(&$$, &$1, $3.type); - $$.reg.vstride = $2.vert_stride; - $$.reg.width = $2.width; - $$.reg.hstride = $2.horiz_stride; - $$.default_region = $2.is_default; - } - | symbol_reg_p - { - memset (&$$, '\0', sizeof ($$)); - $$.reg.address_mode = BRW_ADDRESS_DIRECT; - $$.reg.file = $1.reg.file; - $$.reg.nr = $1.reg.nr; - $$.reg.subnr = $1.reg.subnr; - $$.reg.type = $1.reg.type; - $$.reg.vstride = $1.src_region.vert_stride; - $$.reg.width = $1.src_region.width; - $$.reg.hstride = $1.src_region.horiz_stride; - } - | indirectgenreg indirectregion regtype - { - memset (&$$, '\0', sizeof ($$)); - $$.reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; - $$.reg.file = $1.file; - $$.reg.subnr = $1.subnr; - $$.reg.dw1.bits.indirect_offset = $1.dw1.bits.indirect_offset; - $$.reg.type = $3.type; - $$.reg.vstride = $2.vert_stride; - $$.reg.width = $2.width; - $$.reg.hstride = $2.horiz_stride; - } -; - -/* 1.4.7: Regions */ -dstregion: /* empty */ - { - $$ = DEFAULT_DSTREGION; - } - |LANGLE exp RANGLE - { - /* Returns a value for a horiz_stride field of an - * instruction. - */ - if ($2 != 1 && $2 != 2 && $2 != 4) - error(&@2, "Invalid horiz size %d\n", $2); - - $$ = ffs($2); - } -; - -region: /* empty */ - { - /* XXX is this default value correct?*/ - memset (&$$, '\0', sizeof ($$)); - $$.vert_stride = ffs(0); - $$.width = BRW_WIDTH_1; - $$.horiz_stride = ffs(0); - $$.is_default = 1; - } - |LANGLE exp RANGLE - { - /* XXX is this default value correct for accreg?*/ - memset (&$$, '\0', sizeof ($$)); - $$.vert_stride = ffs($2); - $$.width = BRW_WIDTH_1; - $$.horiz_stride = ffs(0); - } - |LANGLE exp COMMA exp COMMA exp RANGLE - { - memset (&$$, '\0', sizeof ($$)); - $$.vert_stride = ffs($2); - $$.width = ffs($4) - 1; - $$.horiz_stride = ffs($6); - } - | LANGLE exp SEMICOLON exp COMMA exp RANGLE - { - memset (&$$, '\0', sizeof ($$)); - $$.vert_stride = ffs($2); - $$.width = ffs($4) - 1; - $$.horiz_stride = ffs($6); - } - -; -/* region_wh is used in specifying indirect operands where rather than having - * a vertical stride, you use subsequent address registers to get a new base - * offset for the next row. - */ -region_wh: LANGLE exp COMMA exp RANGLE - { - memset (&$$, '\0', sizeof ($$)); - $$.vert_stride = BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL; - $$.width = ffs($2) - 1; - $$.horiz_stride = ffs($4); - } -; - -indirectregion: region | region_wh -; - -/* 1.4.8: Types */ - -/* regtype returns an integer register type suitable for inserting into an - * instruction. - */ -regtype: /* empty */ - { $$.type = program_defaults.register_type;$$.is_default = 1;} - | TYPE_F { $$.type = BRW_REGISTER_TYPE_F;$$.is_default = 0; } - | TYPE_UD { $$.type = BRW_REGISTER_TYPE_UD;$$.is_default = 0; } - | TYPE_D { $$.type = BRW_REGISTER_TYPE_D;$$.is_default = 0; } - | TYPE_UW { $$.type = BRW_REGISTER_TYPE_UW;$$.is_default = 0; } - | TYPE_W { $$.type = BRW_REGISTER_TYPE_W;$$.is_default = 0; } - | TYPE_UB { $$.type = BRW_REGISTER_TYPE_UB;$$.is_default = 0; } - | TYPE_B { $$.type = BRW_REGISTER_TYPE_B;$$.is_default = 0; } -; - -srcimmtype: /* empty */ - { - /* XXX change to default when pragma parse is done */ - $$ = BRW_REGISTER_TYPE_D; - } - |TYPE_F { $$ = BRW_REGISTER_TYPE_F; } - | TYPE_UD { $$ = BRW_REGISTER_TYPE_UD; } - | TYPE_D { $$ = BRW_REGISTER_TYPE_D; } - | TYPE_UW { $$ = BRW_REGISTER_TYPE_UW; } - | TYPE_W { $$ = BRW_REGISTER_TYPE_W; } - | TYPE_V { $$ = BRW_REGISTER_TYPE_V; } - | TYPE_VF { $$ = BRW_REGISTER_TYPE_VF; } -; - -/* 1.4.10: Swizzle control */ -/* Returns the swizzle control for an align16 instruction's source operand - * in the src0 fields. - */ -swizzle: /* empty */ - { - $$.reg.dw1.bits.swizzle = BRW_SWIZZLE_NOOP; - } - | DOT chansel - { - $$.reg.dw1.bits.swizzle = BRW_SWIZZLE4($2, $2, $2, $2); - } - | DOT chansel chansel chansel chansel - { - $$.reg.dw1.bits.swizzle = BRW_SWIZZLE4($2, $3, $4, $5); - } -; - -chansel: X | Y | Z | W -; - -/* 1.4.9: Write mask */ -/* Returns a partially completed struct brw_reg, with just the writemask bits - * filled out. - */ -writemask: /* empty */ - { - $$.dw1.bits.writemask = BRW_WRITEMASK_XYZW; - } - | DOT writemask_x writemask_y writemask_z writemask_w - { - $$.dw1.bits.writemask = $2 | $3 | $4 | $5; - } -; - -writemask_x: /* empty */ { $$ = 0; } - | X { $$ = 1 << BRW_CHANNEL_X; } -; - -writemask_y: /* empty */ { $$ = 0; } - | Y { $$ = 1 << BRW_CHANNEL_Y; } -; - -writemask_z: /* empty */ { $$ = 0; } - | Z { $$ = 1 << BRW_CHANNEL_Z; } -; - -writemask_w: /* empty */ { $$ = 0; } - | W { $$ = 1 << BRW_CHANNEL_W; } -; - -/* 1.4.11: Immediate values */ -imm32: exp { $$.r = imm32_d; $$.u.d = $1; } - | NUMBER { $$.r = imm32_f; $$.u.f = $1; } -; - -/* 1.4.12: Predication and modifiers */ -predicate: /* empty */ - { - $$.pred_control = BRW_PREDICATE_NONE; - $$.flag_reg_nr = 0; - $$.flag_subreg_nr = 0; - $$.pred_inverse = 0; - } - | LPAREN predstate flagreg predctrl RPAREN - { - $$.pred_control = $4; - $$.flag_reg_nr = $3.nr; - $$.flag_subreg_nr = $3.subnr; - $$.pred_inverse = $2; - } -; - -predstate: /* empty */ { $$ = 0; } - | PLUS { $$ = 0; } - | MINUS { $$ = 1; } -; - -predctrl: /* empty */ { $$ = BRW_PREDICATE_NORMAL; } - | DOT X { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_X; } - | DOT Y { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_Y; } - | DOT Z { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_Z; } - | DOT W { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_W; } - | ANYV { $$ = BRW_PREDICATE_ALIGN1_ANYV; } - | ALLV { $$ = BRW_PREDICATE_ALIGN1_ALLV; } - | ANY2H { $$ = BRW_PREDICATE_ALIGN1_ANY2H; } - | ALL2H { $$ = BRW_PREDICATE_ALIGN1_ALL2H; } - | ANY4H { $$ = BRW_PREDICATE_ALIGN1_ANY4H; } - | ALL4H { $$ = BRW_PREDICATE_ALIGN1_ALL4H; } - | ANY8H { $$ = BRW_PREDICATE_ALIGN1_ANY8H; } - | ALL8H { $$ = BRW_PREDICATE_ALIGN1_ALL8H; } - | ANY16H { $$ = BRW_PREDICATE_ALIGN1_ANY16H; } - | ALL16H { $$ = BRW_PREDICATE_ALIGN1_ALL16H; } -; - -negate: /* empty */ { $$ = 0; } - | MINUS { $$ = 1; } -; - -abs: /* empty */ { $$ = 0; } - | ABS { $$ = 1; } -; - -execsize: /* empty */ %prec EMPTEXECSIZE - { - $$ = ffs(program_defaults.execute_size) - 1; - } - |LPAREN exp RPAREN - { - /* Returns a value for the execution_size field of an - * instruction. - */ - if ($2 != 1 && $2 != 2 && $2 != 4 && $2 != 8 && $2 != 16 && - $2 != 32) - error(&@2, "Invalid execution size %d\n", $2); - - $$ = ffs($2) - 1; - } -; - -saturate: /* empty */ { $$ = BRW_INSTRUCTION_NORMAL; } - | SATURATE { $$ = BRW_INSTRUCTION_SATURATE; } -; -conditionalmodifier: condition - { - $$.cond = $1; - $$.flag_reg_nr = 0; - $$.flag_subreg_nr = -1; - } - | condition DOT flagreg - { - $$.cond = $1; - $$.flag_reg_nr = ($3.nr & 0xF); - $$.flag_subreg_nr = $3.subnr; - } - -condition: /* empty */ { $$ = BRW_CONDITIONAL_NONE; } - | ZERO - | EQUAL - | NOT_ZERO - | NOT_EQUAL - | GREATER - | GREATER_EQUAL - | LESS - | LESS_EQUAL - | ROUND_INCREMENT - | OVERFLOW - | UNORDERED -; - -/* 1.4.13: Instruction options */ -instoptions: /* empty */ - { memset(&$$, 0, sizeof($$)); } - | LCURLY instoption_list RCURLY - { $$ = $2; } -; - -instoption_list:instoption_list COMMA instoption - { - $$ = $1; - add_option(&$$, $3); - } - | instoption_list instoption - { - $$ = $1; - add_option(&$$, $2); - } - | /* empty, header defaults to zeroes. */ - { - memset(&$$, 0, sizeof($$)); - } -; - -instoption: ALIGN1 { $$ = ALIGN1; } - | ALIGN16 { $$ = ALIGN16; } - | SECHALF { $$ = SECHALF; } - | COMPR { $$ = COMPR; } - | SWITCH { $$ = SWITCH; } - | ATOMIC { $$ = ATOMIC; } - | NODDCHK { $$ = NODDCHK; } - | NODDCLR { $$ = NODDCLR; } - | MASK_DISABLE { $$ = MASK_DISABLE; } - | BREAKPOINT { $$ = BREAKPOINT; } - | ACCWRCTRL { $$ = ACCWRCTRL; } - | EOT { $$ = EOT; } -; - -%% -extern int yylineno; - -void yyerror (char *msg) -{ - fprintf(stderr, "%s: %d: %s at \"%s\"\n", - input_filename, yylineno, msg, lex_text()); - ++errors; -} - -static int get_type_size(unsigned type) -{ - int size = 1; - - switch (type) { - case BRW_REGISTER_TYPE_F: - case BRW_REGISTER_TYPE_UD: - case BRW_REGISTER_TYPE_D: - size = 4; - break; - - case BRW_REGISTER_TYPE_UW: - case BRW_REGISTER_TYPE_W: - size = 2; - break; - - case BRW_REGISTER_TYPE_UB: - case BRW_REGISTER_TYPE_B: - size = 1; - break; - - default: - assert(0); - size = 1; - break; - } - - return size; -} - -static void reset_instruction_src_region(struct brw_instruction *instr, - struct src_operand *src) -{ - if (IS_GENp(8)) - return; - - if (!src->default_region) - return; - - if (src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE && - ((src->reg.nr & 0xF0) == BRW_ARF_ADDRESS)) { - src->reg.vstride = ffs(0); - src->reg.width = BRW_WIDTH_1; - src->reg.hstride = ffs(0); - } else if (src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE && - ((src->reg.nr & 0xF0) == BRW_ARF_ACCUMULATOR)) { - int horiz_stride = 1, width, vert_stride; - if (instr->header.compression_control == BRW_COMPRESSION_COMPRESSED) { - width = 16; - } else { - width = 8; - } - - if (width > (1 << instr->header.execution_size)) - width = (1 << instr->header.execution_size); - - vert_stride = horiz_stride * width; - src->reg.vstride = ffs(vert_stride); - src->reg.width = ffs(width) - 1; - src->reg.hstride = ffs(horiz_stride); - } else if ((src->reg.file == BRW_ARCHITECTURE_REGISTER_FILE) && - (src->reg.nr == BRW_ARF_NULL) && - (instr->header.opcode == BRW_OPCODE_SEND)) { - src->reg.vstride = ffs(8); - src->reg.width = BRW_WIDTH_8; - src->reg.hstride = ffs(1); - } else { - - int horiz_stride = 1, width, vert_stride; - - if (instr->header.execution_size == 0) { /* scalar */ - horiz_stride = 0; - width = 1; - vert_stride = 0; - } else { - if ((instr->header.opcode == BRW_OPCODE_MUL) || - (instr->header.opcode == BRW_OPCODE_MAC) || - (instr->header.opcode == BRW_OPCODE_CMP) || - (instr->header.opcode == BRW_OPCODE_ASR) || - (instr->header.opcode == BRW_OPCODE_ADD) || - (instr->header.opcode == BRW_OPCODE_SHL)) { - horiz_stride = 0; - width = 1; - vert_stride = 0; - } else { - width = (1 << instr->header.execution_size) / horiz_stride; - vert_stride = horiz_stride * width; - - if (get_type_size(src->reg.type) * (width + src->reg.subnr) > 32) { - horiz_stride = 0; - width = 1; - vert_stride = 0; - } - } - } - - src->reg.vstride = ffs(vert_stride); - src->reg.width = ffs(width) - 1; - src->reg.hstride = ffs(horiz_stride); - } -} - -static void set_instruction_opcode(struct brw_program_instruction *instr, - unsigned opcode) -{ - if (IS_GENp(8)) - gen8_set_opcode(GEN8(instr), opcode); - else - GEN(instr)->header.opcode = opcode; -} - -/** - * Fills in the destination register information in instr from the bits in dst. - */ -static int set_instruction_dest(struct brw_program_instruction *instr, - struct brw_reg *dest) -{ - if (!validate_dst_reg(instr, dest)) - return 1; - - /* the assembler support expressing subnr in bytes or in number of - * elements. */ - resolve_subnr(dest); - - if (IS_GENp(8)) { - gen8_set_exec_size(GEN8(instr), dest->width); - gen8_set_dst(GEN8(instr), *dest); - } else { - brw_set_dest(&genasm_compile, GEN(instr), *dest); - } - - return 0; -} - -/* Sets the first source operand for the instruction. Returns 0 on success. */ -static int set_instruction_src0(struct brw_program_instruction *instr, - struct src_operand *src, - YYLTYPE *location) -{ - - if (advanced_flag) - reset_instruction_src_region(GEN(instr), src); - - if (!validate_src_reg(instr, src->reg, location)) - return 1; - - /* the assembler support expressing subnr in bytes or in number of - * elements. */ - resolve_subnr(&src->reg); - - if (IS_GENp(8)) - gen8_set_src0(GEN8(instr), src->reg); - else - brw_set_src0(&genasm_compile, GEN(instr), src->reg); - - return 0; -} - -/* Sets the second source operand for the instruction. Returns 0 on success. - */ -static int set_instruction_src1(struct brw_program_instruction *instr, - struct src_operand *src, - YYLTYPE *location) -{ - if (advanced_flag) - reset_instruction_src_region(GEN(instr), src); - - if (!validate_src_reg(instr, src->reg, location)) - return 1; - - /* the assembler support expressing subnr in bytes or in number of - * elements. */ - resolve_subnr(&src->reg); - - if (IS_GENp(8)) - gen8_set_src1(GEN8(instr), src->reg); - else - brw_set_src1(&genasm_compile, GEN(instr), src->reg); - - return 0; -} - -static int set_instruction_dest_three_src(struct brw_program_instruction *instr, - struct brw_reg *dest) -{ - resolve_subnr(dest); - brw_set_3src_dest(&genasm_compile, GEN(instr), *dest); - return 0; -} - -static int set_instruction_src0_three_src(struct brw_program_instruction *instr, - struct src_operand *src) -{ - if (advanced_flag) - reset_instruction_src_region(GEN(instr), src); - - resolve_subnr(&src->reg); - - // TODO: src0 modifier, src0 rep_ctrl - brw_set_3src_src0(&genasm_compile, GEN(instr), src->reg); - return 0; -} - -static int set_instruction_src1_three_src(struct brw_program_instruction *instr, - struct src_operand *src) -{ - if (advanced_flag) - reset_instruction_src_region(GEN(instr), src); - - resolve_subnr(&src->reg); - - // TODO: src1 modifier, src1 rep_ctrl - brw_set_3src_src1(&genasm_compile, GEN(instr), src->reg); - return 0; -} - -static int set_instruction_src2_three_src(struct brw_program_instruction *instr, - struct src_operand *src) -{ - if (advanced_flag) - reset_instruction_src_region(GEN(instr), src); - - resolve_subnr(&src->reg); - - // TODO: src2 modifier, src2 rep_ctrl - brw_set_3src_src2(&genasm_compile, GEN(instr), src->reg); - return 0; -} - -static void set_instruction_saturate(struct brw_program_instruction *instr, - int saturate) -{ - if (IS_GENp(8)) - gen8_set_saturate(GEN8(instr), saturate); - else - GEN(instr)->header.saturate = saturate; -} - -static void set_instruction_options(struct brw_program_instruction *instr, - struct options options) -{ - if (IS_GENp(8)) { - gen8_set_access_mode(GEN8(instr), options.access_mode); - gen8_set_thread_control(GEN8(instr), options.thread_control); - gen8_set_dep_control(GEN8(instr), options.dependency_control); - gen8_set_mask_control(GEN8(instr), options.mask_control); - gen8_set_debug_control(GEN8(instr), options.debug_control); - gen8_set_acc_wr_control(GEN8(instr), options.acc_wr_control); - gen8_set_eot(GEN8(instr), options.end_of_thread); - } else { - GEN(instr)->header.access_mode = options.access_mode; - GEN(instr)->header.compression_control = options.compression_control; - GEN(instr)->header.thread_control = options.thread_control; - GEN(instr)->header.dependency_control = options.dependency_control; - GEN(instr)->header.mask_control = options.mask_control; - GEN(instr)->header.debug_control = options.debug_control; - GEN(instr)->header.acc_wr_control = options.acc_wr_control; - GEN(instr)->bits3.generic.end_of_thread = options.end_of_thread; - } -} - -static void set_instruction_predicate(struct brw_program_instruction *instr, - struct predicate *p) -{ - if (IS_GENp(8)) { - gen8_set_pred_control(GEN8(instr), p->pred_control); - gen8_set_pred_inv(GEN8(instr), p->pred_inverse); - gen8_set_flag_reg_nr(GEN8(instr), p->flag_reg_nr); - gen8_set_flag_subreg_nr(GEN8(instr), p->flag_subreg_nr); - } else { - GEN(instr)->header.predicate_control = p->pred_control; - GEN(instr)->header.predicate_inverse = p->pred_inverse; - GEN(instr)->bits2.da1.flag_reg_nr = p->flag_reg_nr; - GEN(instr)->bits2.da1.flag_subreg_nr = p->flag_subreg_nr; - } -} - -static void set_instruction_pred_cond(struct brw_program_instruction *instr, - struct predicate *p, - struct condition *c, - YYLTYPE *location) -{ - set_instruction_predicate(instr, p); - - if (IS_GENp(8)) - gen8_set_cond_modifier(GEN8(instr), c->cond); - else - GEN(instr)->header.destreg__conditionalmod = c->cond; - - if (c->flag_subreg_nr == -1) - return; - - if (p->pred_control != BRW_PREDICATE_NONE && - (p->flag_reg_nr != c->flag_reg_nr || - p->flag_subreg_nr != c->flag_subreg_nr)) - { - warn(ALWAYS, location, "must use the same flag register if both " - "prediction and conditional modifier are enabled\n"); - } - - if (IS_GENp(8)) { - gen8_set_flag_reg_nr(GEN8(instr), c->flag_reg_nr); - gen8_set_flag_subreg_nr(GEN8(instr), c->flag_subreg_nr); - } else { - GEN(instr)->bits2.da1.flag_reg_nr = c->flag_reg_nr; - GEN(instr)->bits2.da1.flag_subreg_nr = c->flag_subreg_nr; - } -} - -static void set_direct_dst_operand(struct brw_reg *dst, struct brw_reg *reg, - int type) -{ - *dst = *reg; - dst->address_mode = BRW_ADDRESS_DIRECT; - dst->type = type; - dst->hstride = 1; - dst->dw1.bits.writemask = BRW_WRITEMASK_XYZW; -} - -static void set_direct_src_operand(struct src_operand *src, struct brw_reg *reg, - int type) -{ - memset(src, 0, sizeof(*src)); - src->reg.address_mode = BRW_ADDRESS_DIRECT; - src->reg.file = reg->file; - src->reg.type = type; - src->reg.subnr = reg->subnr; - src->reg.nr = reg->nr; - src->reg.vstride = 0; - src->reg.width = 0; - src->reg.hstride = 0; - src->reg.negate = 0; - src->reg.abs = 0; - SWIZZLE(src->reg) = BRW_SWIZZLE_NOOP; -} - -static inline int instruction_opcode(struct brw_program_instruction *insn) -{ - if (IS_GENp(8)) - return gen8_opcode(GEN8(insn)); - else - return GEN(insn)->header.opcode; -} - -/* - * return the offset used in native flow control (branch) instructions - */ -static inline int branch_offset(struct brw_program_instruction *insn, int offset) -{ - /* - * bspec: Unlike other flow control instructions, the offset used by JMPI - * is relative to the incremented instruction pointer rather than the IP - * value for the instruction itself. - */ - if (instruction_opcode(insn) == BRW_OPCODE_JMPI) - offset--; - - /* - * Gen4- bspec: the jump distance is in number of sixteen-byte units - * Gen5+ bspec: the jump distance is in number of eight-byte units - * Gen7.5+: the offset is in unit of 8bits for JMPI, 64bits for other flow - * control instructions - */ - if (gen_level >= 75 && - (instruction_opcode(insn) == BRW_OPCODE_JMPI)) - offset *= 16; - else if (gen_level >= 50) - offset *= 2; - - return offset; -} - -void set_branch_two_offsets(struct brw_program_instruction *insn, int jip_offset, int uip_offset) -{ - int jip = branch_offset(insn, jip_offset); - int uip = branch_offset(insn, uip_offset); - - assert(instruction_opcode(insn) != BRW_OPCODE_JMPI); - - if (IS_GENp(8)) { - gen8_set_jip(GEN8(insn), jip); - gen8_set_uip(GEN8(insn), uip); - } else { - GEN(insn)->bits3.break_cont.jip = jip; - GEN(insn)->bits3.break_cont.uip = uip; - } -} - -void set_branch_one_offset(struct brw_program_instruction *insn, int jip_offset) -{ - int jip = branch_offset(insn, jip_offset); - - if (IS_GENp(8)) { - gen8_set_jip(GEN8(insn), jip); - } else if (IS_GENx(7)) { - /* Gen7 JMPI Restrictions in bspec: - * The JIP data type must be Signed DWord - */ - if (instruction_opcode(insn) == BRW_OPCODE_JMPI) - GEN(insn)->bits3.JIP = jip; - else - GEN(insn)->bits3.break_cont.jip = jip; - } else if (IS_GENx(6)) { - if ((instruction_opcode(insn) == BRW_OPCODE_CALL) || - (instruction_opcode(insn) == BRW_OPCODE_JMPI)) - GEN(insn)->bits3.JIP = jip; - else - GEN(insn)->bits1.branch_gen6.jump_count = jip; // for CASE,ELSE,FORK,IF,WHILE - } else { - GEN(insn)->bits3.JIP = jip; - - if (instruction_opcode(insn) == BRW_OPCODE_ELSE) - GEN(insn)->bits3.break_cont.uip = 1; // Set the istack pop count, which must always be 1. - } -} diff --git a/assembler/intel-gen4asm.pc.in b/assembler/intel-gen4asm.pc.in deleted file mode 100644 index 54febc48..00000000 --- a/assembler/intel-gen4asm.pc.in +++ /dev/null @@ -1,10 +0,0 @@ -prefix=@prefix@ -exec_prefix=@exec_prefix@ -libdir=@libdir@ -includedir=@includedir@ - -Name: intel-gen4asm -Description: An assembler compiler for the Intel 965+ Chipset -Version: @VERSION@ -Libs: -Cflags: diff --git a/assembler/lex.l b/assembler/lex.l deleted file mode 100644 index 1ba576bf..00000000 --- a/assembler/lex.l +++ /dev/null @@ -1,487 +0,0 @@ -%option yylineno -%{ -#include <string.h> -#include "gen4asm.h" -#include "gram.h" -#include "brw_defines.h" - -#include "string.h" -int saved_state = 0; -extern char *input_filename; - -/* Locations */ -int yycolumn = 1; - -#define YY_NO_INPUT -#define YY_USER_ACTION \ - yylloc.first_line = yylloc.last_line = yylineno; \ - yylloc.first_column = yycolumn; \ - yylloc.last_column = yycolumn+yyleng-1; \ - yycolumn += yyleng; - -%} -%x BLOCK_COMMENT -%x CHANNEL -%x LINENUMBER -%x FILENAME -%x REG -%x DOTSEL - -%% -\/\/.*[\r\n] { yycolumn = 1; } /* eat up single-line comments */ -"\.kernel".*[\r\n] { yycolumn = 1; } -"\.end_kernel".*[\r\n] { yycolumn = 1; } -"\.code".*[\r\n] { yycolumn = 1; } -"\.end_code".*[\r\n] { yycolumn = 1; } - - /* eat up multi-line comments, non-nesting. */ -\/\* { - saved_state = YYSTATE; - BEGIN(BLOCK_COMMENT); -} -<BLOCK_COMMENT>\*\/ { - BEGIN(saved_state); -} -<BLOCK_COMMENT>. { } -<BLOCK_COMMENT>[\r\n] { } -"#line"" "* { - yycolumn = 1; - saved_state = YYSTATE; - BEGIN(LINENUMBER); -} -<LINENUMBER>[0-9]+" "* { - yylineno = atoi (yytext) - 1; - BEGIN(FILENAME); -} -<FILENAME>\"[^\"]+\" { - char *name = malloc (yyleng - 1); - memmove (name, yytext + 1, yyleng - 2); - name[yyleng-1] = '\0'; - input_filename = name; - BEGIN(saved_state); -} - -<CHANNEL>"x" { - yylval.integer = BRW_CHANNEL_X; - return X; -} -<CHANNEL>"y" { - yylval.integer = BRW_CHANNEL_Y; - return Y; -} -<CHANNEL>"z" { - yylval.integer = BRW_CHANNEL_Z; - return Z; -} -<CHANNEL>"w" { -yylval.integer = BRW_CHANNEL_W; - return W; -} -<CHANNEL>. { - yyless(0); - BEGIN(INITIAL); -} - - /* used for both null send and null register. */ -"null" { return NULL_TOKEN; } - - /* opcodes */ -"mov" { yylval.integer = BRW_OPCODE_MOV; return MOV; } -"frc" { yylval.integer = BRW_OPCODE_FRC; return FRC; } -"rndu" { yylval.integer = BRW_OPCODE_RNDU; return RNDU; } -"rndd" { yylval.integer = BRW_OPCODE_RNDD; return RNDD; } -"rnde" { yylval.integer = BRW_OPCODE_RNDE; return RNDE; } -"rndz" { yylval.integer = BRW_OPCODE_RNDZ; return RNDZ; } -"not" { yylval.integer = BRW_OPCODE_NOT; return NOT; } -"lzd" { yylval.integer = BRW_OPCODE_LZD; return LZD; } -"f16to32" { yylval.integer = BRW_OPCODE_F16TO32; return F16TO32; } -"f32to16" { yylval.integer = BRW_OPCODE_F32TO16; return F32TO16; } -"fbh" { yylval.integer = BRW_OPCODE_FBH; return FBH; } -"fbl" { yylval.integer = BRW_OPCODE_FBL; return FBL; } - -"mad" { yylval.integer = BRW_OPCODE_MAD; return MAD; } -"lrp" { yylval.integer = BRW_OPCODE_LRP; return LRP; } -"bfe" { yylval.integer = BRW_OPCODE_BFE; return BFE; } -"bfi1" { yylval.integer = BRW_OPCODE_BFI1; return BFI1; } -"bfi2" { yylval.integer = BRW_OPCODE_BFI2; return BFI2; } -"bfrev" { yylval.integer = BRW_OPCODE_BFREV; return BFREV; } -"mul" { yylval.integer = BRW_OPCODE_MUL; return MUL; } -"mac" { yylval.integer = BRW_OPCODE_MAC; return MAC; } -"mach" { yylval.integer = BRW_OPCODE_MACH; return MACH; } -"line" { yylval.integer = BRW_OPCODE_LINE; return LINE; } -"sad2" { yylval.integer = BRW_OPCODE_SAD2; return SAD2; } -"sada2" { yylval.integer = BRW_OPCODE_SADA2; return SADA2; } -"dp4" { yylval.integer = BRW_OPCODE_DP4; return DP4; } -"dph" { yylval.integer = BRW_OPCODE_DPH; return DPH; } -"dp3" { yylval.integer = BRW_OPCODE_DP3; return DP3; } -"dp2" { yylval.integer = BRW_OPCODE_DP2; return DP2; } - -"cbit" { yylval.integer = BRW_OPCODE_CBIT; return CBIT; } -"avg" { yylval.integer = BRW_OPCODE_AVG; return AVG; } -"add" { yylval.integer = BRW_OPCODE_ADD; return ADD; } -"addc" { yylval.integer = BRW_OPCODE_ADDC; return ADDC; } -"sel" { yylval.integer = BRW_OPCODE_SEL; return SEL; } -"and" { yylval.integer = BRW_OPCODE_AND; return AND; } -"or" { yylval.integer = BRW_OPCODE_OR; return OR; } -"xor" { yylval.integer = BRW_OPCODE_XOR; return XOR; } -"shr" { yylval.integer = BRW_OPCODE_SHR; return SHR; } -"shl" { yylval.integer = BRW_OPCODE_SHL; return SHL; } -"asr" { yylval.integer = BRW_OPCODE_ASR; return ASR; } -"cmp" { yylval.integer = BRW_OPCODE_CMP; return CMP; } -"cmpn" { yylval.integer = BRW_OPCODE_CMPN; return CMPN; } -"subb" { yylval.integer = BRW_OPCODE_SUBB; return SUBB; } - -"send" { yylval.integer = BRW_OPCODE_SEND; return SEND; } -"sendc" { yylval.integer = BRW_OPCODE_SENDC; return SENDC; } -"nop" { yylval.integer = BRW_OPCODE_NOP; return NOP; } -"jmpi" { yylval.integer = BRW_OPCODE_JMPI; return JMPI; } -"if" { yylval.integer = BRW_OPCODE_IF; return IF; } -"iff" { yylval.integer = BRW_OPCODE_IFF; return IFF; } -"while" { yylval.integer = BRW_OPCODE_WHILE; return WHILE; } -"else" { yylval.integer = BRW_OPCODE_ELSE; return ELSE; } -"break" { yylval.integer = BRW_OPCODE_BREAK; return BREAK; } -"cont" { yylval.integer = BRW_OPCODE_CONTINUE; return CONT; } -"halt" { yylval.integer = BRW_OPCODE_HALT; return HALT; } -"msave" { yylval.integer = BRW_OPCODE_MSAVE; return MSAVE; } -"push" { yylval.integer = BRW_OPCODE_PUSH; return PUSH; } -"mrest" { yylval.integer = BRW_OPCODE_MRESTORE; return MREST; } -"pop" { yylval.integer = BRW_OPCODE_POP; return POP; } -"wait" { yylval.integer = BRW_OPCODE_WAIT; return WAIT; } -"do" { yylval.integer = BRW_OPCODE_DO; return DO; } -"endif" { yylval.integer = BRW_OPCODE_ENDIF; return ENDIF; } -"call" { yylval.integer = BRW_OPCODE_CALL; return CALL; } -"ret" { yylval.integer = BRW_OPCODE_RET; return RET; } -"brd" { yylval.integer = BRW_OPCODE_BRD; return BRD; } -"brc" { yylval.integer = BRW_OPCODE_BRC; return BRC; } - -"pln" { yylval.integer = BRW_OPCODE_PLN; return PLN; } - - /* send argument tokens */ -"mlen" { return MSGLEN; } -"rlen" { return RETURNLEN; } -"math" { if (IS_GENp(6)) { yylval.integer = BRW_OPCODE_MATH; return MATH_INST; } else return MATH; } -"sampler" { return SAMPLER; } -"gateway" { return GATEWAY; } -"read" { return READ; } -"write" { return WRITE; } -"urb" { return URB; } -"thread_spawner" { return THREAD_SPAWNER; } -"vme" { return VME; } -"cre" { return CRE; } -"data_port" { return DATA_PORT; } - -"allocate" { return ALLOCATE; } -"used" { return USED; } -"complete" { return COMPLETE; } -"transpose" { return TRANSPOSE; } -"interleave" { return INTERLEAVE; } - -";" { return SEMICOLON; } -"(" { return LPAREN; } -")" { return RPAREN; } -"<" { return LANGLE; } -">" { return RANGLE; } -"{" { return LCURLY; } -"}" { return RCURLY; } -"[" { return LSQUARE; } -"]" { return RSQUARE; } -"," { return COMMA; } -"." { BEGIN(CHANNEL); return DOT; } -"+" { return PLUS; } -"-" { return MINUS; } -"*" { return MULTIPLY;} -"/" { return DIVIDE; } -":" { return COLON; } -"=" { return EQ; } -"(abs)" { return ABS; } - - /* Most register accesses are lexed as REGFILE[0-9]+, to prevent the register - * with subreg from being lexed as REGFILE NUMBER instead of - * REGISTER INTEGER DOT INTEGER like we want. The alternative was to use a - * start condition, which wasn't very clean-looking. - * - * However, this means we need to lex the general and message register file - * characters as well, for register-indirect access which is formatted - * like g[a#.#] or m[a#.#]. - */ -"acc"[0-9]+ { - yylval.integer = atoi(yytext + 3); - return ACCREG; -} -"a"[0-9]+ { - yylval.integer = atoi(yytext + 1); - return ADDRESSREG; -} -"m"[0-9]+ { - yylval.integer = atoi(yytext + 1); - return MSGREG; -} -"m" { - return MSGREGFILE; -} -"mask"[0-9]+ { - yylval.integer = atoi(yytext + 4); - return MASKREG; -} -"ms"[0-9]+ { - yylval.integer = atoi(yytext + 2); - return MASKSTACKREG; -} -"msd"[0-9]+ { - yylval.integer = atoi(yytext + 3); - return MASKSTACKDEPTHREG; -} - -"n0."[0-9]+ { - yylval.integer = atoi(yytext + 3); - return NOTIFYREG; -} - -"n"[0-9]+ { - yylval.integer = atoi(yytext + 1); - return NOTIFYREG; -} - -"f"[0-9] { - yylval.integer = atoi(yytext + 1); - return FLAGREG; -} - -[gr][0-9]+ { - yylval.integer = atoi(yytext + 1); - BEGIN(REG); - return GENREG; -} -<REG>"<" { return LANGLE; } -<REG>[0-9][0-9]* { - yylval.integer = strtoul(yytext, NULL, 10); - return INTEGER; -} -<REG>">" { return RANGLE; } - -<REG>"," { return COMMA; } -<REG>"." { BEGIN(DOTSEL); return DOT; } -<REG>";" { return SEMICOLON; } - -<DOTSEL>"x" { - yylval.integer = BRW_CHANNEL_X; - return X; -} -<DOTSEL>"y" { - yylval.integer = BRW_CHANNEL_Y; - return Y; -} -<DOTSEL>"z" { - yylval.integer = BRW_CHANNEL_Z; - return Z; -} -<DOTSEL>"w" { - yylval.integer = BRW_CHANNEL_W; - return W; -} -<DOTSEL>[0-9][0-9]* { - yylval.integer = strtoul(yytext, NULL, 10); - BEGIN(REG); - return INTEGER; -} -<DOTSEL>. { - yyless(0); - BEGIN(INITIAL); -} - -[gr] { - return GENREGFILE; -} -"cr"[0-9]+ { - yylval.integer = atoi(yytext + 2); - return CONTROLREG; -} -"sr"[0-9]+ { - yylval.integer = atoi(yytext + 2); - return STATEREG; -} -"ip" { - return IPREG; -} -"amask" { - yylval.integer = BRW_AMASK; - return AMASK; -} -"imask" { - yylval.integer = BRW_IMASK; - return IMASK; -} -"lmask" { - yylval.integer = BRW_LMASK; - return LMASK; -} -"cmask" { - yylval.integer = BRW_CMASK; - return CMASK; -} -"imsd" { - yylval.integer = 0; - return IMSD; -} -"lmsd" { - yylval.integer = 1; - return LMSD; -} -"ims" { - yylval.integer = 0; - return IMS; -} -"lms" { - yylval.integer = 16; - return LMS; -} - -<REG>. { - yyless(0); - BEGIN(INITIAL); -} - - /* - * Lexing of register types should probably require the ":" symbol specified - * in the BNF of the assembly, but our existing source didn't use that syntax. - */ -"UD" { return TYPE_UD; } -":UD" { return TYPE_UD; } -"D" { return TYPE_D; } -":D" { return TYPE_D; } -"UW" { return TYPE_UW; } -":UW" { return TYPE_UW; } -"W" { return TYPE_W; } -":W" { return TYPE_W; } -"UB" { return TYPE_UB; } -":UB" { return TYPE_UB; } -"B" { return TYPE_B; } -":B" { return TYPE_B; } -"F" { return TYPE_F; } -":F" { return TYPE_F; } -"VF" {return TYPE_VF; } -":VF" {return TYPE_VF; } -"V" { return TYPE_V; } -":V" { return TYPE_V; } - -#".kernel" { return KERNEL_PRAGMA;} -#".end_kernel" { return END_KERNEL_PRAGMA;} -#".code" { return CODE_PRAGMA;} -#".end_code" { return END_CODE_PRAGMA;} -".reg_count_payload" { return REG_COUNT_PAYLOAD_PRAGMA; } -".reg_count_total" { return REG_COUNT_TOTAL_PRAGMA; } -".default_execution_size" { return DEFAULT_EXEC_SIZE_PRAGMA; } -".default_register_type" { return DEFAULT_REG_TYPE_PRAGMA; } -".declare" { return DECLARE_PRAGMA; } -"Base" { return BASE; } -"ElementSize" { return ELEMENTSIZE; } -"SrcRegion" { return SRCREGION; } -"DstRegion" { return DSTREGION; } -"Type" { return TYPE; } - - -".sat" { return SATURATE; } -"align1" { return ALIGN1; } -"align16" { return ALIGN16; } -"sechalf" { return SECHALF; } -"compr" { return COMPR; } -"switch" { return SWITCH; } -"atomic" { return ATOMIC; } -"noddchk" { return NODDCHK; } -"noddclr" { return NODDCLR; } -"mask_disable" { return MASK_DISABLE; } -"nomask" { return MASK_DISABLE; } -"breakpoint" { return BREAKPOINT; } -"accwrctrl" { return ACCWRCTRL; } -"EOT" { return EOT; } - - /* extended math functions */ -"inv" { yylval.integer = BRW_MATH_FUNCTION_INV; return SIN; } -"log" { yylval.integer = BRW_MATH_FUNCTION_LOG; return LOG; } -"exp" { yylval.integer = BRW_MATH_FUNCTION_EXP; return EXP; } -"sqrt" { yylval.integer = BRW_MATH_FUNCTION_SQRT; return SQRT; } -"rsq" { yylval.integer = BRW_MATH_FUNCTION_RSQ; return RSQ; } -"pow" { yylval.integer = BRW_MATH_FUNCTION_POW; return POW; } -"sin" { yylval.integer = BRW_MATH_FUNCTION_SIN; return SIN; } -"cos" { yylval.integer = BRW_MATH_FUNCTION_COS; return COS; } -"sincos" { yylval.integer = BRW_MATH_FUNCTION_SINCOS; return SINCOS; } -"intdiv" { - yylval.integer = BRW_MATH_FUNCTION_INT_DIV_QUOTIENT; - return INTDIV; -} -"intmod" { - yylval.integer = BRW_MATH_FUNCTION_INT_DIV_REMAINDER; - return INTMOD; -} -"intdivmod" { - yylval.integer = BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER; - return INTDIVMOD; -} - -"signed" { return SIGNED; } -"scalar" { return SCALAR; } - - /* predicate control */ -".anyv" { return ANYV; } -".allv" { return ALLV; } -".any2h" { return ANY2H; } -".all2h" { return ALL2H; } -".any4h" { return ANY4H; } -".all4h" { return ALL4H; } -".any8h" { return ANY8H; } -".all8h" { return ALL8H; } -".any16h" { return ANY16H; } -".all16h" { return ALL16H; } - -".z" { yylval.integer = BRW_CONDITIONAL_Z; return ZERO; } -".e" { yylval.integer = BRW_CONDITIONAL_Z; return EQUAL; } -".nz" { yylval.integer = BRW_CONDITIONAL_NZ; return NOT_ZERO; } -".ne" { yylval.integer = BRW_CONDITIONAL_NZ; return NOT_EQUAL; } -".g" { yylval.integer = BRW_CONDITIONAL_G; return GREATER; } -".ge" { yylval.integer = BRW_CONDITIONAL_GE; return GREATER_EQUAL; } -".l" { yylval.integer = BRW_CONDITIONAL_L; return LESS; } -".le" { yylval.integer = BRW_CONDITIONAL_LE; return LESS_EQUAL; } -".r" { yylval.integer = BRW_CONDITIONAL_R; return ROUND_INCREMENT; } -".o" { yylval.integer = BRW_CONDITIONAL_O; return OVERFLOW; } -".u" { yylval.integer = BRW_CONDITIONAL_U; return UNORDERED; } - -[a-zA-Z_][0-9a-zA-Z_]* { - yylval.string = strdup(yytext); - return STRING; -} - -0x[0-9a-fA-F][0-9a-fA-F]* { - yylval.integer = strtoul(yytext + 2, NULL, 16); - return INTEGER; -} -[0-9][0-9]* { - yylval.integer = strtoul(yytext, NULL, 10); - return INTEGER; -} - -<INITIAL>[-]?[0-9]+"."[0-9]+ { - yylval.number = strtod(yytext, NULL); - return NUMBER; -} - -[ \t]+ { } /* eat up whitespace */ - -\n { yycolumn = 1; } - -. { - fprintf(stderr, "%s: %d: %s at \"%s\"\n", - input_filename, yylineno, "unexpected token", lex_text()); - } -%% - -char * -lex_text(void) -{ - return yytext; - (void) yyunput; -} - -#ifndef yywrap -int yywrap() { return 1; } -#endif - diff --git a/assembler/main.c b/assembler/main.c deleted file mode 100644 index a1eca525..00000000 --- a/assembler/main.c +++ /dev/null @@ -1,478 +0,0 @@ -/* -*- c-basic-offset: 8 -*- */ -/* - * Copyright © 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <getopt.h> -#include <unistd.h> -#include <assert.h> - -#include "ralloc.h" -#include "gen4asm.h" -#include "brw_eu.h" - -extern FILE *yyin; -extern void set_branch_two_offsets(struct brw_program_instruction *insn, int jip_offset, int uip_offset); -extern void set_branch_one_offset(struct brw_program_instruction *insn, int jip_offset); - -long int gen_level = 40; -int advanced_flag = 0; /* 0: in unit of byte, 1: in unit of data element size */ -unsigned int warning_flags = WARN_ALWAYS; -int need_export = 0; -char *input_filename = "<stdin>"; -int errors; - -struct brw_context genasm_brw_context; -struct brw_compile genasm_compile; - -struct brw_program compiled_program; -struct program_defaults program_defaults = {.register_type = BRW_REGISTER_TYPE_F}; - -/* 0: default output style, 1: nice C-style output */ -static int binary_like_output = 0; -static char *export_filename = NULL; -static const char binary_prepend[] = "static const char gen_eu_bytes[] = {\n"; - -#define HASH_SIZE 37 - -struct hash_item { - char *key; - void *value; - struct hash_item *next; -}; - -typedef struct hash_item *hash_table[HASH_SIZE]; - -static hash_table declared_register_table; - -struct label_item { - char *name; - int addr; - struct label_item *next; -}; -static struct label_item *label_table; - -static const struct option longopts[] = { - {"advanced", no_argument, 0, 'a'}, - {"binary", no_argument, 0, 'b'}, - {"export", required_argument, 0, 'e'}, - {"input_list", required_argument, 0, 'l'}, - {"output", required_argument, 0, 'o'}, - {"gen", required_argument, 0, 'g'}, - { NULL, 0, NULL, 0 } -}; - -static void usage(void) -{ - fprintf(stderr, "usage: intel-gen4asm [options] inputfile\n"); - fprintf(stderr, "OPTIONS:\n"); - fprintf(stderr, "\t-a, --advanced Set advanced flag\n"); - fprintf(stderr, "\t-b, --binary C style binary output\n"); - fprintf(stderr, "\t-e, --export {exportfile} Export label file\n"); - fprintf(stderr, "\t-l, --input_list {entrytablefile} Input entry_table_list file\n"); - fprintf(stderr, "\t-o, --output {outputfile} Specify output file\n"); - fprintf(stderr, "\t-g, --gen <4|5|6|7|8|9> Specify GPU generation\n"); -} - -static int hash(char *key) -{ - unsigned ret = 0; - while(*key) - ret = (ret << 1) + (*key++); - return ret % HASH_SIZE; -} - -static void *find_hash_item(hash_table t, char *key) -{ - struct hash_item *p; - for(p = t[hash(key)]; p; p = p->next) - if(strcasecmp(p->key, key) == 0) - return p->value; - return NULL; -} - -static void insert_hash_item(hash_table t, char *key, void *v) -{ - int index = hash(key); - struct hash_item *p = malloc(sizeof(*p)); - p->key = key; - p->value = v; - p->next = t[index]; - t[index] = p; -} - -static void free_hash_table(hash_table t) -{ - struct hash_item *p, *next; - int i; - for (i = 0; i < HASH_SIZE; i++) { - p = t[i]; - while(p) { - next = p->next; - free(p->key); - free(p->value); - free(p); - p = next; - } - } -} - -struct declared_register *find_register(char *name) -{ - return find_hash_item(declared_register_table, name); -} - -void insert_register(struct declared_register *reg) -{ - insert_hash_item(declared_register_table, reg->name, reg); -} - -static void add_label(struct brw_program_instruction *i) -{ - struct label_item **p = &label_table; - - assert(is_label(i)); - - while(*p) - p = &((*p)->next); - *p = calloc(1, sizeof(**p)); - (*p)->name = label_name(i); - (*p)->addr = i->inst_offset; -} - -/* Some assembly code have duplicated labels. - Start from start_addr. Search as a loop. Return the first label found. */ -static int label_to_addr(char *name, int start_addr) -{ - /* return the first label just after start_addr, or the first label from the head */ - struct label_item *p; - int r = -1; - for(p = label_table; p; p = p->next) { - if(strcmp(p->name, name) == 0) { - if(p->addr >= start_addr) // the first label just after start_addr - return p->addr; - else if(r == -1) // the first label from the head - r = p->addr; - } - } - if(r == -1) { - fprintf(stderr, "Can't find label %s\n", name); - exit(1); - } - return r; -} - -static void free_label_table(struct label_item *p) -{ - if(p) { - free_label_table(p->next); - free(p); - } -} - -struct entry_point_item { - char *str; - struct entry_point_item *next; -} *entry_point_table; - -static int read_entry_file(char *fn) -{ - FILE *entry_table_file; - char buf[2048]; - struct entry_point_item **p = &entry_point_table; - if (!fn) - return 0; - if ((entry_table_file = fopen(fn, "r")) == NULL) - return -1; - while (fgets(buf, sizeof(buf)-1, entry_table_file) != NULL) { - // drop the final char '\n' - if(buf[strlen(buf)-1] == '\n') - buf[strlen(buf)-1] = 0; - *p = calloc(1, sizeof(struct entry_point_item)); - (*p)->str = strdup(buf); - p = &((*p)->next); - } - fclose(entry_table_file); - return 0; -} - -static int is_entry_point(struct brw_program_instruction *i) -{ - struct entry_point_item *p; - - assert(i->type == GEN4ASM_INSTRUCTION_LABEL); - - for (p = entry_point_table; p; p = p->next) { - if (strcmp(p->str, i->insn.label.name) == 0) - return 1; - } - return 0; -} - -static void free_entry_point_table(struct entry_point_item *p) { - if (p) { - free_entry_point_table(p->next); - free(p->str); - free(p); - } -} - -static void -print_instruction(FILE *output, struct brw_instruction *instruction) -{ - if (binary_like_output) { - fprintf(output, "\t0x%02x, 0x%02x, 0x%02x, 0x%02x, " - "0x%02x, 0x%02x, 0x%02x, 0x%02x,\n" - "\t0x%02x, 0x%02x, 0x%02x, 0x%02x, " - "0x%02x, 0x%02x, 0x%02x, 0x%02x,\n", - ((unsigned char *)instruction)[0], - ((unsigned char *)instruction)[1], - ((unsigned char *)instruction)[2], - ((unsigned char *)instruction)[3], - ((unsigned char *)instruction)[4], - ((unsigned char *)instruction)[5], - ((unsigned char *)instruction)[6], - ((unsigned char *)instruction)[7], - ((unsigned char *)instruction)[8], - ((unsigned char *)instruction)[9], - ((unsigned char *)instruction)[10], - ((unsigned char *)instruction)[11], - ((unsigned char *)instruction)[12], - ((unsigned char *)instruction)[13], - ((unsigned char *)instruction)[14], - ((unsigned char *)instruction)[15]); - } else { - fprintf(output, " { 0x%08x, 0x%08x, 0x%08x, 0x%08x },\n", - ((int *)instruction)[0], - ((int *)instruction)[1], - ((int *)instruction)[2], - ((int *)instruction)[3]); - } -} -int main(int argc, char **argv) -{ - char *output_file = NULL; - char *entry_table_file = NULL; - FILE *output = stdout; - FILE *export_file; - struct brw_program_instruction *entry, *entry1, *tmp_entry; - int err, inst_offset; - char o; - void *mem_ctx; - - while ((o = getopt_long(argc, argv, "e:l:o:g:abW", longopts, NULL)) != -1) { - switch (o) { - case 'o': - if (strcmp(optarg, "-") != 0) - output_file = optarg; - - break; - - case 'g': { - char *dec_ptr, *end_ptr; - unsigned long decimal; - - gen_level = strtol(optarg, &dec_ptr, 10) * 10; - - if (*dec_ptr == '.') { - decimal = strtoul(++dec_ptr, &end_ptr, 10); - if (end_ptr != dec_ptr && *end_ptr == '\0') { - if (decimal > 10) { - fprintf(stderr, "Invalid Gen X decimal version\n"); - exit(1); - } - gen_level += decimal; - } - } - - if (gen_level < 40 || gen_level > 90) { - usage(); - exit(1); - } - - break; - } - - case 'a': - advanced_flag = 1; - break; - case 'b': - binary_like_output = 1; - break; - - case 'e': - need_export = 1; - if (strcmp(optarg, "-") != 0) - export_filename = optarg; - break; - - case 'l': - if (strcmp(optarg, "-") != 0) - entry_table_file = optarg; - break; - - case 'W': - warning_flags |= WARN_ALL; - break; - - default: - usage(); - exit(1); - } - } - argc -= optind; - argv += optind; - if (argc != 1) { - usage(); - exit(1); - } - - if (strcmp(argv[0], "-") != 0) { - input_filename = argv[0]; - yyin = fopen(input_filename, "r"); - if (yyin == NULL) { - perror("Couldn't open input file"); - exit(1); - } - } - - brw_init_context(&genasm_brw_context, gen_level); - mem_ctx = ralloc_context(NULL); - brw_init_compile(&genasm_brw_context, &genasm_compile, mem_ctx); - - err = yyparse(); - - if (strcmp(argv[0], "-")) - fclose(yyin); - - yylex_destroy(); - - if (err || errors) - exit (1); - - if (output_file) { - output = fopen(output_file, "w"); - if (output == NULL) { - perror("Couldn't open output file"); - exit(1); - } - - } - - if (read_entry_file(entry_table_file)) { - fprintf(stderr, "Read entry file error\n"); - exit(1); - } - inst_offset = 0 ; - for (entry = compiled_program.first; - entry != NULL; entry = entry->next) { - entry->inst_offset = inst_offset; - entry1 = entry->next; - if (entry1 && is_label(entry1) && is_entry_point(entry1)) { - // insert NOP instructions until (inst_offset+1) % 4 == 0 - while (((inst_offset+1) % 4) != 0) { - tmp_entry = calloc(sizeof(*tmp_entry), 1); - tmp_entry->insn.gen.header.opcode = BRW_OPCODE_NOP; - entry->next = tmp_entry; - tmp_entry->next = entry1; - entry = tmp_entry; - tmp_entry->inst_offset = ++inst_offset; - } - } - if (!is_label(entry)) - inst_offset++; - } - - for (entry = compiled_program.first; entry; entry = entry->next) - if (is_label(entry)) - add_label(entry); - - if (need_export) { - if (export_filename) { - export_file = fopen(export_filename, "w"); - } else { - export_file = fopen("export.inc", "w"); - } - for (entry = compiled_program.first; - entry != NULL; entry = entry->next) { - if (is_label(entry)) - fprintf(export_file, "#define %s_IP %d\n", - label_name(entry), (IS_GENx(5) ? 2 : 1)*(entry->inst_offset)); - } - fclose(export_file); - } - - for (entry = compiled_program.first; entry; entry = entry->next) { - struct relocation *reloc = &entry->reloc; - - if (!is_relocatable(entry)) - continue; - - if (reloc->first_reloc_target) - reloc->first_reloc_offset = label_to_addr(reloc->first_reloc_target, entry->inst_offset) - entry->inst_offset; - - if (reloc->second_reloc_target) - reloc->second_reloc_offset = label_to_addr(reloc->second_reloc_target, entry->inst_offset) - entry->inst_offset; - - if (reloc->second_reloc_offset) { // this is a branch instruction with two offset arguments - set_branch_two_offsets(entry, reloc->first_reloc_offset, reloc->second_reloc_offset); - } else if (reloc->first_reloc_offset) { - set_branch_one_offset(entry, reloc->first_reloc_offset); - } - } - - if (binary_like_output) - fprintf(output, "%s", binary_prepend); - - for (entry = compiled_program.first; - entry != NULL; - entry = entry1) { - entry1 = entry->next; - if (!is_label(entry)) - print_instruction(output, &entry->insn.gen); - else - free(entry->insn.label.name); - free(entry); - } - if (binary_like_output) - fprintf(output, "};"); - - free_entry_point_table(entry_point_table); - free_hash_table(declared_register_table); - free_label_table(label_table); - - fflush (output); - if (ferror (output)) { - perror ("Could not flush output file"); - if (output_file) - unlink (output_file); - err = 1; - } - return err; -} diff --git a/assembler/ralloc.c b/assembler/ralloc.c deleted file mode 100644 index 59e71c48..00000000 --- a/assembler/ralloc.c +++ /dev/null @@ -1,482 +0,0 @@ -/* - * Copyright © 2010 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <assert.h> -#include <stdlib.h> -#include <stdarg.h> -#include <stdio.h> -#include <string.h> -#include <stdint.h> - -/* Android defines SIZE_MAX in limits.h, instead of the standard stdint.h */ -#ifdef ANDROID -#include <limits.h> -#endif - -/* Some versions of MinGW are missing _vscprintf's declaration, although they - * still provide the symbol in the import library. */ -#ifdef __MINGW32__ -_CRTIMP int _vscprintf(const char *format, va_list argptr); -#endif - -#include "ralloc.h" - -#ifndef va_copy -#ifdef __va_copy -#define va_copy(dest, src) __va_copy((dest), (src)) -#else -#define va_copy(dest, src) (dest) = (src) -#endif -#endif - -#define CANARY 0x5A1106 - -struct ralloc_header -{ - /* A canary value used to determine whether a pointer is ralloc'd. */ - unsigned canary; - - struct ralloc_header *parent; - - /* The first child (head of a linked list) */ - struct ralloc_header *child; - - /* Linked list of siblings */ - struct ralloc_header *prev; - struct ralloc_header *next; - - void (*destructor)(void *); -}; - -typedef struct ralloc_header ralloc_header; - -static void unlink_block(ralloc_header *info); -static void unsafe_free(ralloc_header *info); - -static ralloc_header * -get_header(const void *ptr) -{ - ralloc_header *info = (ralloc_header *) (((char *) ptr) - - sizeof(ralloc_header)); - assert(info->canary == CANARY); - return info; -} - -#define PTR_FROM_HEADER(info) (((char *) info) + sizeof(ralloc_header)) - -static void -add_child(ralloc_header *parent, ralloc_header *info) -{ - if (parent != NULL) { - info->parent = parent; - info->next = parent->child; - parent->child = info; - - if (info->next != NULL) - info->next->prev = info; - } -} - -void * -ralloc_context(const void *ctx) -{ - return ralloc_size(ctx, 0); -} - -void * -ralloc_size(const void *ctx, size_t size) -{ - void *block = calloc(1, size + sizeof(ralloc_header)); - - ralloc_header *info = (ralloc_header *) block; - ralloc_header *parent = ctx != NULL ? get_header(ctx) : NULL; - - add_child(parent, info); - - info->canary = CANARY; - - return PTR_FROM_HEADER(info); -} - -void * -rzalloc_size(const void *ctx, size_t size) -{ - void *ptr = ralloc_size(ctx, size); - if (likely(ptr != NULL)) - memset(ptr, 0, size); - return ptr; -} - -/* helper function - assumes ptr != NULL */ -static void * -resize(void *ptr, size_t size) -{ - ralloc_header *child, *old, *info; - - old = get_header(ptr); - info = realloc(old, size + sizeof(ralloc_header)); - - if (info == NULL) - return NULL; - - /* Update parent and sibling's links to the reallocated node. */ - if (info != old && info->parent != NULL) { - if (info->parent->child == old) - info->parent->child = info; - - if (info->prev != NULL) - info->prev->next = info; - - if (info->next != NULL) - info->next->prev = info; - } - - /* Update child->parent links for all children */ - for (child = info->child; child != NULL; child = child->next) - child->parent = info; - - return PTR_FROM_HEADER(info); -} - -void * -reralloc_size(const void *ctx, void *ptr, size_t size) -{ - if (unlikely(ptr == NULL)) - return ralloc_size(ctx, size); - - assert(ralloc_parent(ptr) == ctx); - return resize(ptr, size); -} - -void * -ralloc_array_size(const void *ctx, size_t size, unsigned count) -{ - if (count > SIZE_MAX/size) - return NULL; - - return ralloc_size(ctx, size * count); -} - -void * -rzalloc_array_size(const void *ctx, size_t size, unsigned count) -{ - if (count > SIZE_MAX/size) - return NULL; - - return rzalloc_size(ctx, size * count); -} - -void * -reralloc_array_size(const void *ctx, void *ptr, size_t size, unsigned count) -{ - if (count > SIZE_MAX/size) - return NULL; - - return reralloc_size(ctx, ptr, size * count); -} - -void -ralloc_free(void *ptr) -{ - ralloc_header *info; - - if (ptr == NULL) - return; - - info = get_header(ptr); - unlink_block(info); - unsafe_free(info); -} - -static void -unlink_block(ralloc_header *info) -{ - /* Unlink from parent & siblings */ - if (info->parent != NULL) { - if (info->parent->child == info) - info->parent->child = info->next; - - if (info->prev != NULL) - info->prev->next = info->next; - - if (info->next != NULL) - info->next->prev = info->prev; - } - info->parent = NULL; - info->prev = NULL; - info->next = NULL; -} - -static void -unsafe_free(ralloc_header *info) -{ - /* Recursively free any children...don't waste time unlinking them. */ - ralloc_header *temp; - while (info->child != NULL) { - temp = info->child; - info->child = temp->next; - unsafe_free(temp); - } - - /* Free the block itself. Call the destructor first, if any. */ - if (info->destructor != NULL) - info->destructor(PTR_FROM_HEADER(info)); - - free(info); -} - -void -ralloc_steal(const void *new_ctx, void *ptr) -{ - ralloc_header *info, *parent; - - if (unlikely(ptr == NULL)) - return; - - info = get_header(ptr); - parent = get_header(new_ctx); - - unlink_block(info); - - add_child(parent, info); -} - -void * -ralloc_parent(const void *ptr) -{ - ralloc_header *info; - - if (unlikely(ptr == NULL)) - return NULL; - - info = get_header(ptr); - return info->parent ? PTR_FROM_HEADER(info->parent) : NULL; -} - -static void *autofree_context = NULL; - -static void -autofree(void) -{ - ralloc_free(autofree_context); -} - -void * -ralloc_autofree_context(void) -{ - if (unlikely(autofree_context == NULL)) { - autofree_context = ralloc_context(NULL); - atexit(autofree); - } - return autofree_context; -} - -void -ralloc_set_destructor(const void *ptr, void(*destructor)(void *)) -{ - ralloc_header *info = get_header(ptr); - info->destructor = destructor; -} - -char * -ralloc_strdup(const void *ctx, const char *str) -{ - size_t n; - char *ptr; - - if (unlikely(str == NULL)) - return NULL; - - n = strlen(str); - ptr = ralloc_array(ctx, char, n + 1); - memcpy(ptr, str, n); - ptr[n] = '\0'; - return ptr; -} - -char * -ralloc_strndup(const void *ctx, const char *str, size_t max) -{ - size_t n; - char *ptr; - - if (unlikely(str == NULL)) - return NULL; - - n = strlen(str); - if (n > max) - n = max; - - ptr = ralloc_array(ctx, char, n + 1); - memcpy(ptr, str, n); - ptr[n] = '\0'; - return ptr; -} - -/* helper routine for strcat/strncat - n is the exact amount to copy */ -static bool -cat(char **dest, const char *str, size_t n) -{ - char *both; - size_t existing_length; - assert(dest != NULL && *dest != NULL); - - existing_length = strlen(*dest); - both = resize(*dest, existing_length + n + 1); - if (unlikely(both == NULL)) - return false; - - memcpy(both + existing_length, str, n); - both[existing_length + n] = '\0'; - - *dest = both; - return true; -} - - -bool -ralloc_strcat(char **dest, const char *str) -{ - return cat(dest, str, strlen(str)); -} - -bool -ralloc_strncat(char **dest, const char *str, size_t n) -{ - /* Clamp n to the string length */ - size_t str_length = strlen(str); - if (str_length < n) - n = str_length; - - return cat(dest, str, n); -} - -char * -ralloc_asprintf(const void *ctx, const char *fmt, ...) -{ - char *ptr; - va_list args; - va_start(args, fmt); - ptr = ralloc_vasprintf(ctx, fmt, args); - va_end(args); - return ptr; -} - -/* Return the length of the string that would be generated by a printf-style - * format and argument list, not including the \0 byte. - */ -static size_t -printf_length(const char *fmt, va_list untouched_args) -{ - int size; - char junk; - - /* Make a copy of the va_list so the original caller can still use it */ - va_list args; - va_copy(args, untouched_args); - -#ifdef _WIN32 - /* We need to use _vcsprintf to calculate the size as vsnprintf returns -1 - * if the number of characters to write is greater than count. - */ - size = _vscprintf(fmt, args); - (void)junk; -#else - size = vsnprintf(&junk, 1, fmt, args); -#endif - assert(size >= 0); - - va_end(args); - - return size; -} - -char * -ralloc_vasprintf(const void *ctx, const char *fmt, va_list args) -{ - size_t size = printf_length(fmt, args) + 1; - - char *ptr = ralloc_size(ctx, size); - if (ptr != NULL) - vsnprintf(ptr, size, fmt, args); - - return ptr; -} - -bool -ralloc_asprintf_append(char **str, const char *fmt, ...) -{ - bool success; - va_list args; - va_start(args, fmt); - success = ralloc_vasprintf_append(str, fmt, args); - va_end(args); - return success; -} - -bool -ralloc_vasprintf_append(char **str, const char *fmt, va_list args) -{ - size_t existing_length; - assert(str != NULL); - existing_length = *str ? strlen(*str) : 0; - return ralloc_vasprintf_rewrite_tail(str, &existing_length, fmt, args); -} - -bool -ralloc_asprintf_rewrite_tail(char **str, size_t *start, const char *fmt, ...) -{ - bool success; - va_list args; - va_start(args, fmt); - success = ralloc_vasprintf_rewrite_tail(str, start, fmt, args); - va_end(args); - return success; -} - -bool -ralloc_vasprintf_rewrite_tail(char **str, size_t *start, const char *fmt, - va_list args) -{ - size_t new_length; - char *ptr; - - assert(str != NULL); - - if (unlikely(*str == NULL)) { - // Assuming a NULL context is probably bad, but it's expected behavior. - *str = ralloc_vasprintf(NULL, fmt, args); - return true; - } - - new_length = printf_length(fmt, args); - - ptr = resize(*str, *start + new_length + 1); - if (unlikely(ptr == NULL)) - return false; - - vsnprintf(ptr + *start, new_length + 1, fmt, args); - *str = ptr; - *start += new_length; - return true; -} diff --git a/assembler/ralloc.h b/assembler/ralloc.h deleted file mode 100644 index 6228d5bd..00000000 --- a/assembler/ralloc.h +++ /dev/null @@ -1,407 +0,0 @@ -/* - * Copyright © 2010 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/** - * \file ralloc.h - * - * ralloc: a recursive memory allocator - * - * The ralloc memory allocator creates a hierarchy of allocated - * objects. Every allocation is in reference to some parent, and - * every allocated object can in turn be used as the parent of a - * subsequent allocation. This allows for extremely convenient - * discarding of an entire tree/sub-tree of allocations by calling - * ralloc_free on any particular object to free it and all of its - * children. - * - * The conceptual working of ralloc was directly inspired by Andrew - * Tridgell's talloc, but ralloc is an independent implementation - * released under the MIT license and tuned for Mesa. - * - * The talloc implementation is available under the GNU Lesser - * General Public License (GNU LGPL), version 3 or later. It is - * more sophisticated than ralloc in that it includes reference - * counting and debugging features. See: http://talloc.samba.org/ - */ - -#ifndef RALLOC_H -#define RALLOC_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include <stddef.h> -#include <stdarg.h> -#include <stdbool.h> -#include "brw_compat.h" - -/** - * \def ralloc(ctx, type) - * Allocate a new object chained off of the given context. - * - * This is equivalent to: - * \code - * ((type *) ralloc_size(ctx, sizeof(type)) - * \endcode - */ -#define ralloc(ctx, type) ((type *) ralloc_size(ctx, sizeof(type))) - -/** - * \def rzalloc(ctx, type) - * Allocate a new object out of the given context and initialize it to zero. - * - * This is equivalent to: - * \code - * ((type *) rzalloc_size(ctx, sizeof(type)) - * \endcode - */ -#define rzalloc(ctx, type) ((type *) rzalloc_size(ctx, sizeof(type))) - -/** - * Allocate a new ralloc context. - * - * While any ralloc'd pointer can be used as a context, sometimes it is useful - * to simply allocate a context with no associated memory. - * - * It is equivalent to: - * \code - * ((type *) ralloc_size(ctx, 0) - * \endcode - */ -void *ralloc_context(const void *ctx); - -/** - * Allocate memory chained off of the given context. - * - * This is the core allocation routine which is used by all others. It - * simply allocates storage for \p size bytes and returns the pointer, - * similar to \c malloc. - */ -void *ralloc_size(const void *ctx, size_t size); - -/** - * Allocate zero-initialized memory chained off of the given context. - * - * This is similar to \c calloc with a size of 1. - */ -void *rzalloc_size(const void *ctx, size_t size); - -/** - * Resize a piece of ralloc-managed memory, preserving data. - * - * Similar to \c realloc. Unlike C89, passing 0 for \p size does not free the - * memory. Instead, it resizes it to a 0-byte ralloc context, just like - * calling ralloc_size(ctx, 0). This is different from talloc. - * - * \param ctx The context to use for new allocation. If \p ptr != NULL, - * it must be the same as ralloc_parent(\p ptr). - * \param ptr Pointer to the memory to be resized. May be NULL. - * \param size The amount of memory to allocate, in bytes. - */ -void *reralloc_size(const void *ctx, void *ptr, size_t size); - -/// \defgroup array Array Allocators @{ - -/** - * \def ralloc_array(ctx, type, count) - * Allocate an array of objects chained off the given context. - * - * Similar to \c calloc, but does not initialize the memory to zero. - * - * More than a convenience function, this also checks for integer overflow when - * multiplying \c sizeof(type) and \p count. This is necessary for security. - * - * This is equivalent to: - * \code - * ((type *) ralloc_array_size(ctx, sizeof(type), count) - * \endcode - */ -#define ralloc_array(ctx, type, count) \ - ((type *) ralloc_array_size(ctx, sizeof(type), count)) - -/** - * \def rzalloc_array(ctx, type, count) - * Allocate a zero-initialized array chained off the given context. - * - * Similar to \c calloc. - * - * More than a convenience function, this also checks for integer overflow when - * multiplying \c sizeof(type) and \p count. This is necessary for security. - * - * This is equivalent to: - * \code - * ((type *) rzalloc_array_size(ctx, sizeof(type), count) - * \endcode - */ -#define rzalloc_array(ctx, type, count) \ - ((type *) rzalloc_array_size(ctx, sizeof(type), count)) - -/** - * \def reralloc(ctx, ptr, type, count) - * Resize a ralloc-managed array, preserving data. - * - * Similar to \c realloc. Unlike C89, passing 0 for \p size does not free the - * memory. Instead, it resizes it to a 0-byte ralloc context, just like - * calling ralloc_size(ctx, 0). This is different from talloc. - * - * More than a convenience function, this also checks for integer overflow when - * multiplying \c sizeof(type) and \p count. This is necessary for security. - * - * \param ctx The context to use for new allocation. If \p ptr != NULL, - * it must be the same as ralloc_parent(\p ptr). - * \param ptr Pointer to the array to be resized. May be NULL. - * \param type The element type. - * \param count The number of elements to allocate. - */ -#define reralloc(ctx, ptr, type, count) \ - ((type *) reralloc_array_size(ctx, ptr, sizeof(type), count)) - -/** - * Allocate memory for an array chained off the given context. - * - * Similar to \c calloc, but does not initialize the memory to zero. - * - * More than a convenience function, this also checks for integer overflow when - * multiplying \p size and \p count. This is necessary for security. - */ -void *ralloc_array_size(const void *ctx, size_t size, unsigned count); - -/** - * Allocate a zero-initialized array chained off the given context. - * - * Similar to \c calloc. - * - * More than a convenience function, this also checks for integer overflow when - * multiplying \p size and \p count. This is necessary for security. - */ -void *rzalloc_array_size(const void *ctx, size_t size, unsigned count); - -/** - * Resize a ralloc-managed array, preserving data. - * - * Similar to \c realloc. Unlike C89, passing 0 for \p size does not free the - * memory. Instead, it resizes it to a 0-byte ralloc context, just like - * calling ralloc_size(ctx, 0). This is different from talloc. - * - * More than a convenience function, this also checks for integer overflow when - * multiplying \c sizeof(type) and \p count. This is necessary for security. - * - * \param ctx The context to use for new allocation. If \p ptr != NULL, - * it must be the same as ralloc_parent(\p ptr). - * \param ptr Pointer to the array to be resized. May be NULL. - * \param size The size of an individual element. - * \param count The number of elements to allocate. - * - * \return True unless allocation failed. - */ -void *reralloc_array_size(const void *ctx, void *ptr, size_t size, - unsigned count); -/// @} - -/** - * Free a piece of ralloc-managed memory. - * - * This will also free the memory of any children allocated this context. - */ -void ralloc_free(void *ptr); - -/** - * "Steal" memory from one context, changing it to another. - * - * This changes \p ptr's context to \p new_ctx. This is quite useful if - * memory is allocated out of a temporary context. - */ -void ralloc_steal(const void *new_ctx, void *ptr); - -/** - * Return the given pointer's ralloc context. - */ -void *ralloc_parent(const void *ptr); - -/** - * Return a context whose memory will be automatically freed at program exit. - * - * The first call to this function creates a context and registers a handler - * to free it using \c atexit. This may cause trouble if used in a library - * loaded with \c dlopen. - */ -void *ralloc_autofree_context(void); - -/** - * Set a callback to occur just before an object is freed. - */ -void ralloc_set_destructor(const void *ptr, void(*destructor)(void *)); - -/// \defgroup array String Functions @{ -/** - * Duplicate a string, allocating the memory from the given context. - */ -char *ralloc_strdup(const void *ctx, const char *str); - -/** - * Duplicate a string, allocating the memory from the given context. - * - * Like \c strndup, at most \p n characters are copied. If \p str is longer - * than \p n characters, \p n are copied, and a termining \c '\0' byte is added. - */ -char *ralloc_strndup(const void *ctx, const char *str, size_t n); - -/** - * Concatenate two strings, allocating the necessary space. - * - * This appends \p str to \p *dest, similar to \c strcat, using ralloc_resize - * to expand \p *dest to the appropriate size. \p dest will be updated to the - * new pointer unless allocation fails. - * - * The result will always be null-terminated. - * - * \return True unless allocation failed. - */ -bool ralloc_strcat(char **dest, const char *str); - -/** - * Concatenate two strings, allocating the necessary space. - * - * This appends at most \p n bytes of \p str to \p *dest, using ralloc_resize - * to expand \p *dest to the appropriate size. \p dest will be updated to the - * new pointer unless allocation fails. - * - * The result will always be null-terminated; \p str does not need to be null - * terminated if it is longer than \p n. - * - * \return True unless allocation failed. - */ -bool ralloc_strncat(char **dest, const char *str, size_t n); - -/** - * Print to a string. - * - * This is analogous to \c sprintf, but allocates enough space (using \p ctx - * as the context) for the resulting string. - * - * \return The newly allocated string. - */ -char *ralloc_asprintf (const void *ctx, const char *fmt, ...) PRINTFLIKE(2, 3); - -/** - * Print to a string, given a va_list. - * - * This is analogous to \c vsprintf, but allocates enough space (using \p ctx - * as the context) for the resulting string. - * - * \return The newly allocated string. - */ -char *ralloc_vasprintf(const void *ctx, const char *fmt, va_list args); - -/** - * Rewrite the tail of an existing string, starting at a given index. - * - * Overwrites the contents of *str starting at \p start with newly formatted - * text, including a new null-terminator. Allocates more memory as necessary. - * - * This can be used to append formatted text when the length of the existing - * string is already known, saving a strlen() call. - * - * \sa ralloc_asprintf_append - * - * \param str The string to be updated. - * \param start The index to start appending new data at. - * \param fmt A printf-style formatting string - * - * \p str will be updated to the new pointer unless allocation fails. - * \p start will be increased by the length of the newly formatted text. - * - * \return True unless allocation failed. - */ -bool ralloc_asprintf_rewrite_tail(char **str, size_t *start, - const char *fmt, ...) - PRINTFLIKE(3, 4); - -/** - * Rewrite the tail of an existing string, starting at a given index. - * - * Overwrites the contents of *str starting at \p start with newly formatted - * text, including a new null-terminator. Allocates more memory as necessary. - * - * This can be used to append formatted text when the length of the existing - * string is already known, saving a strlen() call. - * - * \sa ralloc_vasprintf_append - * - * \param str The string to be updated. - * \param start The index to start appending new data at. - * \param fmt A printf-style formatting string - * \param args A va_list containing the data to be formatted - * - * \p str will be updated to the new pointer unless allocation fails. - * \p start will be increased by the length of the newly formatted text. - * - * \return True unless allocation failed. - */ -bool ralloc_vasprintf_rewrite_tail(char **str, size_t *start, const char *fmt, - va_list args); - -/** - * Append formatted text to the supplied string. - * - * This is equivalent to - * \code - * ralloc_asprintf_rewrite_tail(str, strlen(*str), fmt, ...) - * \endcode - * - * \sa ralloc_asprintf - * \sa ralloc_asprintf_rewrite_tail - * \sa ralloc_strcat - * - * \p str will be updated to the new pointer unless allocation fails. - * - * \return True unless allocation failed. - */ -bool ralloc_asprintf_append (char **str, const char *fmt, ...) - PRINTFLIKE(2, 3); - -/** - * Append formatted text to the supplied string, given a va_list. - * - * This is equivalent to - * \code - * ralloc_vasprintf_rewrite_tail(str, strlen(*str), fmt, args) - * \endcode - * - * \sa ralloc_vasprintf - * \sa ralloc_vasprintf_rewrite_tail - * \sa ralloc_strcat - * - * \p str will be updated to the new pointer unless allocation fails. - * - * \return True unless allocation failed. - */ -bool ralloc_vasprintf_append(char **str, const char *fmt, va_list args); -/// @} - -#ifdef __cplusplus -} /* end of extern "C" */ -#endif - -#endif diff --git a/assembler/test/.gitignore b/assembler/test/.gitignore deleted file mode 100644 index 898d10ac..00000000 --- a/assembler/test/.gitignore +++ /dev/null @@ -1,24 +0,0 @@ -*.out -*.log -*.trs -mov -frc -rndd -rnde -rnde-intsrc -rndu -rndz -lzd -not -jmpi -if -iff -while -else -break -cont -halt -wait -endif -immediate -declare diff --git a/assembler/test/Makefile.am b/assembler/test/Makefile.am deleted file mode 100644 index f1131198..00000000 --- a/assembler/test/Makefile.am +++ /dev/null @@ -1,93 +0,0 @@ -check_SCRIPTS = run-test.sh - -TESTS_ENVIRONMENT = top_builddir=${top_builddir} -TESTS = \ - mov \ - frc \ - rndd \ - rndu \ - rnde \ - rnde-intsrc \ - rndz \ - lzd \ - not \ - immediate - -# Tests that are expected to fail because they contain some inccorect code. -XFAIL_TESTS = - -# Those tests were already failing when the assembler was imported from -# the intel-gen4asm git repository: -# http://cgit.freedesktop.org/xorg/app/intel-gen4asm/ -# We disable them "for now" as a workaround to be able to release i-g-t -disabled_tests = \ - declare \ - jmpi \ - if \ - iff \ - while \ - else \ - break \ - cont \ - halt \ - wait \ - endif - -disabled_xfail_tests = \ - rnde-intsrc - -TESTDATA = \ - mov.expected \ - mov.g4a \ - frc.expected \ - frc.g4a \ - rndd.expected \ - rndd.g4a \ - rndu.expected \ - rndu.g4a \ - rnde.expected \ - rnde.g4a \ - rnde-intsrc.expected \ - rnde-intsrc.g4a \ - rndz.expected \ - rndz.g4a \ - lzd.expected \ - lzd.g4a \ - not.expected \ - not.g4a \ - jmpi.expected \ - jmpi.g4a \ - if.expected \ - if.g4a \ - iff.expected \ - iff.g4a \ - while.expected \ - while.g4a \ - else.expected \ - else.g4a \ - break.expected \ - break.g4a \ - cont.expected \ - cont.g4a \ - halt.expected \ - halt.g4a \ - wait.expected \ - wait.g4a \ - endif.expected \ - endif.g4a \ - declare.expected \ - declare.g4a \ - immediate.g4a \ - immediate.expected - -EXTRA_DIST = \ - ${TESTDATA} \ - run-test.sh - -$(TESTS): run-test.sh - sed "s|TEST|$@|g" ${srcdir}/run-test.sh > $@ - chmod +x $@ - -CLEANFILES = \ - *.out \ - ${TESTS} diff --git a/assembler/test/break.expected b/assembler/test/break.expected deleted file mode 100644 index 4e3e4ebe..00000000 --- a/assembler/test/break.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000028, 0x34001c00, 0x00011400, 0x00010002 }, diff --git a/assembler/test/break.g4a b/assembler/test/break.g4a deleted file mode 100644 index f23a0bac..00000000 --- a/assembler/test/break.g4a +++ /dev/null @@ -1,6 +0,0 @@ -/* The break instruction syntax, which is currently just what was in the BNF, - * is bad. It really needs 2 arguments -- pop count (19:16, how many - * loops to break out of), and the IP count (15:0). For now, this argument - * should cover 1 loop, and jumping 2 instructions. - */ -break 65538; diff --git a/assembler/test/cont.expected b/assembler/test/cont.expected deleted file mode 100644 index a1cd9360..00000000 --- a/assembler/test/cont.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000029, 0x34001c00, 0x00011400, 0x00010002 }, diff --git a/assembler/test/cont.g4a b/assembler/test/cont.g4a deleted file mode 100644 index 300e7d8f..00000000 --- a/assembler/test/cont.g4a +++ /dev/null @@ -1,6 +0,0 @@ -/* The cont instruction syntax, which is currently just what was in the BNF, - * is bad. It really needs 2 arguments -- pop count (19:16, how many - * loops to break out of), and the IP count (15:0). For now, this argument - * should cover 1 loop, and jumping 2 instructions. - */ -cont 65538; diff --git a/assembler/test/declare.expected b/assembler/test/declare.expected deleted file mode 100644 index 36ad68f2..00000000 --- a/assembler/test/declare.expected +++ /dev/null @@ -1,3 +0,0 @@ - { 0x00e00040, 0x20007fbd, 0x008d0f64, 0x3f9d70a4 }, - { 0x00e00040, 0x200077bd, 0x008d0f64, 0x008d0020 }, - { 0x00e00040, 0x2f6477bd, 0x008d0000, 0x008d0020 }, diff --git a/assembler/test/declare.g4a b/assembler/test/declare.g4a deleted file mode 100644 index d3414e49..00000000 --- a/assembler/test/declare.g4a +++ /dev/null @@ -1,5 +0,0 @@ -.declare X1 Base=g99.0 ElementSize=1 SrcRegion=<8,8,1> DstRegion=<1> Type=F -.declare X1 Base=g123.4 ElementSize=4 SrcRegion=<8,8,1> DstRegion=<1> Type=F -add g0<1>:f X1 1.23:f; -add g0<1>:f X1 g1<8,8,1>:f; -add X1 g0<8,8,1>:f g1<8,8,1>:f; diff --git a/assembler/test/else.expected b/assembler/test/else.expected deleted file mode 100644 index bdc77e40..00000000 --- a/assembler/test/else.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000024, 0x34001c00, 0x00011400, 0x00010002 }, diff --git a/assembler/test/else.g4a b/assembler/test/else.g4a deleted file mode 100644 index f4103800..00000000 --- a/assembler/test/else.g4a +++ /dev/null @@ -1 +0,0 @@ -else 2; diff --git a/assembler/test/endif.expected b/assembler/test/endif.expected deleted file mode 100644 index b8a3003b..00000000 --- a/assembler/test/endif.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000025, 0x00001c00, 0x00000000, 0x00010000 }, diff --git a/assembler/test/endif.g4a b/assembler/test/endif.g4a deleted file mode 100644 index b3b09fab..00000000 --- a/assembler/test/endif.g4a +++ /dev/null @@ -1 +0,0 @@ -endif; diff --git a/assembler/test/frc.expected b/assembler/test/frc.expected deleted file mode 100644 index e93f8f77..00000000 --- a/assembler/test/frc.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000001, 0x20000021, 0x00000020, 0x00000000 }, diff --git a/assembler/test/frc.g4a b/assembler/test/frc.g4a deleted file mode 100644 index 8844f676..00000000 --- a/assembler/test/frc.g4a +++ /dev/null @@ -1 +0,0 @@ -mov (1) g0<1>UD g1<0,1,0>UD { align1 }; diff --git a/assembler/test/halt.expected b/assembler/test/halt.expected deleted file mode 100644 index b92db85f..00000000 --- a/assembler/test/halt.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x0000002a, 0x34001c00, 0x00011400, 0x00000002 }, diff --git a/assembler/test/halt.g4a b/assembler/test/halt.g4a deleted file mode 100644 index e6952b19..00000000 --- a/assembler/test/halt.g4a +++ /dev/null @@ -1 +0,0 @@ -halt 2; diff --git a/assembler/test/if.expected b/assembler/test/if.expected deleted file mode 100644 index d2fa54dc..00000000 --- a/assembler/test/if.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000022, 0x34001c00, 0x00011400, 0x00000002 }, diff --git a/assembler/test/if.g4a b/assembler/test/if.g4a deleted file mode 100644 index 60ba4da4..00000000 --- a/assembler/test/if.g4a +++ /dev/null @@ -1 +0,0 @@ -if 2; diff --git a/assembler/test/iff.expected b/assembler/test/iff.expected deleted file mode 100644 index b5dd6f65..00000000 --- a/assembler/test/iff.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000023, 0x34001c00, 0x00011400, 0x00000002 }, diff --git a/assembler/test/iff.g4a b/assembler/test/iff.g4a deleted file mode 100644 index d728ed06..00000000 --- a/assembler/test/iff.g4a +++ /dev/null @@ -1 +0,0 @@ -iff 2; diff --git a/assembler/test/immediate.expected b/assembler/test/immediate.expected deleted file mode 100644 index b1aa921f..00000000 --- a/assembler/test/immediate.expected +++ /dev/null @@ -1,3 +0,0 @@ - { 0x00000001, 0x20000061, 0x00000000, 0xffffffff }, - { 0x00000001, 0x200000e1, 0x00000000, 0x7fffffff }, - { 0x00000001, 0x200000e1, 0x00000000, 0x80000000 }, diff --git a/assembler/test/immediate.g4a b/assembler/test/immediate.g4a deleted file mode 100644 index 4b9e2d32..00000000 --- a/assembler/test/immediate.g4a +++ /dev/null @@ -1,3 +0,0 @@ -mov (1) g0<1>UD 4294967295UD { align1 }; -mov (1) g0<1>UD 2147483647D { align1 }; -mov (1) g0<1>UD -2147483648D { align1 }; diff --git a/assembler/test/jmpi.expected b/assembler/test/jmpi.expected deleted file mode 100644 index a53a0369..00000000 --- a/assembler/test/jmpi.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000020, 0x34001c00, 0x00011400, 0x00000002 }, diff --git a/assembler/test/jmpi.g4a b/assembler/test/jmpi.g4a deleted file mode 100644 index 7503dd4a..00000000 --- a/assembler/test/jmpi.g4a +++ /dev/null @@ -1 +0,0 @@ -jmpi 2; diff --git a/assembler/test/lzd.expected b/assembler/test/lzd.expected deleted file mode 100644 index 1df4db99..00000000 --- a/assembler/test/lzd.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x0000004a, 0x20000021, 0x00000020, 0x00000000 }, diff --git a/assembler/test/lzd.g4a b/assembler/test/lzd.g4a deleted file mode 100644 index b644d76a..00000000 --- a/assembler/test/lzd.g4a +++ /dev/null @@ -1 +0,0 @@ -lzd (1) g0<1>UD g1<0,1,0>UD { align1 }; diff --git a/assembler/test/mov.expected b/assembler/test/mov.expected deleted file mode 100644 index e93f8f77..00000000 --- a/assembler/test/mov.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000001, 0x20000021, 0x00000020, 0x00000000 }, diff --git a/assembler/test/mov.g4a b/assembler/test/mov.g4a deleted file mode 100644 index 8844f676..00000000 --- a/assembler/test/mov.g4a +++ /dev/null @@ -1 +0,0 @@ -mov (1) g0<1>UD g1<0,1,0>UD { align1 }; diff --git a/assembler/test/not.expected b/assembler/test/not.expected deleted file mode 100644 index 072d7ab7..00000000 --- a/assembler/test/not.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000004, 0x20000021, 0x00000020, 0x00000000 }, diff --git a/assembler/test/not.g4a b/assembler/test/not.g4a deleted file mode 100644 index 69d9f8c0..00000000 --- a/assembler/test/not.g4a +++ /dev/null @@ -1 +0,0 @@ -not (1) g0<1>UD g1<0,1,0>UD { align1 }; diff --git a/assembler/test/rndd.expected b/assembler/test/rndd.expected deleted file mode 100644 index a841e25e..00000000 --- a/assembler/test/rndd.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000045, 0x200003a1, 0x00000020, 0x00000000 }, diff --git a/assembler/test/rndd.g4a b/assembler/test/rndd.g4a deleted file mode 100644 index 832a5446..00000000 --- a/assembler/test/rndd.g4a +++ /dev/null @@ -1 +0,0 @@ -rndd (1) g0<1>UD g1<0,1,0>F { align1 }; diff --git a/assembler/test/rnde-intsrc.expected b/assembler/test/rnde-intsrc.expected deleted file mode 100644 index 1138d733..00000000 --- a/assembler/test/rnde-intsrc.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000046, 0x20000021, 0x00000020, 0x00000000 }, diff --git a/assembler/test/rnde-intsrc.g4a b/assembler/test/rnde-intsrc.g4a deleted file mode 100644 index 68562fa2..00000000 --- a/assembler/test/rnde-intsrc.g4a +++ /dev/null @@ -1,2 +0,0 @@ -/* Non-float types are not permitted in the sources of round instructions. */ -rnde (1) g0<1>UD g1<0,1,0>UD { align1 }; diff --git a/assembler/test/rnde.expected b/assembler/test/rnde.expected deleted file mode 100644 index 21553790..00000000 --- a/assembler/test/rnde.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000046, 0x200003a1, 0x00000020, 0x00000000 }, diff --git a/assembler/test/rnde.g4a b/assembler/test/rnde.g4a deleted file mode 100644 index 9bc13cb3..00000000 --- a/assembler/test/rnde.g4a +++ /dev/null @@ -1 +0,0 @@ -rnde (1) g0<1>UD g1<0,1,0>F { align1 }; diff --git a/assembler/test/rndu.expected b/assembler/test/rndu.expected deleted file mode 100644 index 46e26c12..00000000 --- a/assembler/test/rndu.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000044, 0x200003a1, 0x00000020, 0x00000000 }, diff --git a/assembler/test/rndu.g4a b/assembler/test/rndu.g4a deleted file mode 100644 index 6321f2e9..00000000 --- a/assembler/test/rndu.g4a +++ /dev/null @@ -1 +0,0 @@ -rndu (1) g0<1>UD g1<0,1,0>F { align1 }; diff --git a/assembler/test/rndz.expected b/assembler/test/rndz.expected deleted file mode 100644 index 9045cfca..00000000 --- a/assembler/test/rndz.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000047, 0x200003a1, 0x00000020, 0x00000000 }, diff --git a/assembler/test/rndz.g4a b/assembler/test/rndz.g4a deleted file mode 100644 index 6dd60f7d..00000000 --- a/assembler/test/rndz.g4a +++ /dev/null @@ -1 +0,0 @@ -rndz (1) g0<1>UD g1<0,1,0>F { align1 }; diff --git a/assembler/test/run-test.sh b/assembler/test/run-test.sh deleted file mode 100644 index 27c5c2d3..00000000 --- a/assembler/test/run-test.sh +++ /dev/null @@ -1,11 +0,0 @@ -#!/bin/sh - -SRCDIR=${srcdir-`pwd`} -BUILDDIR=${top_builddir-`pwd`} - -${BUILDDIR}/assembler/intel-gen4asm -o TEST.out $SRCDIR/TEST.g4a -if cmp TEST.out ${SRCDIR}/TEST.expected 2> /dev/null; then : ; else - echo "Output comparison for TEST" - diff -u ${SRCDIR}/TEST.expected TEST.out - exit 1; -fi diff --git a/assembler/test/wait.expected b/assembler/test/wait.expected deleted file mode 100644 index 06a055b9..00000000 --- a/assembler/test/wait.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000030, 0x20000000, 0x00001200, 0x00010000 }, diff --git a/assembler/test/wait.g4a b/assembler/test/wait.g4a deleted file mode 100644 index 59d11fa9..00000000 --- a/assembler/test/wait.g4a +++ /dev/null @@ -1 +0,0 @@ -wait n0; diff --git a/assembler/test/while.expected b/assembler/test/while.expected deleted file mode 100644 index adad7030..00000000 --- a/assembler/test/while.expected +++ /dev/null @@ -1 +0,0 @@ - { 0x00000027, 0x34001c00, 0x00011400, 0x0000fffe }, diff --git a/assembler/test/while.g4a b/assembler/test/while.g4a deleted file mode 100644 index 4f5e1dff..00000000 --- a/assembler/test/while.g4a +++ /dev/null @@ -1 +0,0 @@ -while -2; diff --git a/benchmarks/.gitignore b/benchmarks/.gitignore deleted file mode 100644 index 09e5bd88..00000000 --- a/benchmarks/.gitignore +++ /dev/null @@ -1,6 +0,0 @@ -gem_userptr_benchmark -intel_upload_blit_large -intel_upload_blit_large_gtt -intel_upload_blit_large_map -intel_upload_blit_small -# Please keep sorted alphabetically diff --git a/benchmarks/Android.mk b/benchmarks/Android.mk deleted file mode 100644 index 14fc0a7e..00000000 --- a/benchmarks/Android.mk +++ /dev/null @@ -1,36 +0,0 @@ -LOCAL_PATH := $(call my-dir) - -include $(LOCAL_PATH)/Makefile.sources - -#================# - -define add_benchmark - include $(CLEAR_VARS) - - LOCAL_SRC_FILES := $1.c - - LOCAL_CFLAGS += -DHAVE_STRUCT_SYSINFO_TOTALRAM - LOCAL_CFLAGS += -DANDROID -UNDEBUG -include "check-ndebug.h" - LOCAL_CFLAGS += -std=gnu99 - # FIXME: drop once Bionic correctly annotates "noreturn" on pthread_exit - LOCAL_CFLAGS += -Wno-error=return-type - # Excessive complaining for established cases. Rely on the Linux version warnings. - LOCAL_CFLAGS += -Wno-sign-compare - - LOCAL_MODULE := $1 - LOCAL_MODULE_TAGS := optional - - LOCAL_STATIC_LIBRARIES := libintel_gpu_tools - - LOCAL_SHARED_LIBRARIES := libpciaccess \ - libdrm \ - libdrm_intel - - include $(BUILD_EXECUTABLE) -endef - -#================# - -benchmark_list := $(bin_PROGRAMS) - -$(foreach item,$(benchmark_list),$(eval $(call add_benchmark,$(item)))) diff --git a/benchmarks/Makefile.am b/benchmarks/Makefile.am deleted file mode 100644 index 86f755a0..00000000 --- a/benchmarks/Makefile.am +++ /dev/null @@ -1,6 +0,0 @@ - -include Makefile.sources - -AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib -AM_CFLAGS = $(DRM_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS) -LDADD = $(top_builddir)/lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS) diff --git a/benchmarks/Makefile.sources b/benchmarks/Makefile.sources deleted file mode 100644 index 60bdae2d..00000000 --- a/benchmarks/Makefile.sources +++ /dev/null @@ -1,6 +0,0 @@ -bin_PROGRAMS = \ - intel_upload_blit_large \ - intel_upload_blit_large_gtt \ - intel_upload_blit_large_map \ - intel_upload_blit_small \ - gem_userptr_benchmark diff --git a/benchmarks/gem_userptr_benchmark.c b/benchmarks/gem_userptr_benchmark.c deleted file mode 100644 index 4d7442bf..00000000 --- a/benchmarks/gem_userptr_benchmark.c +++ /dev/null @@ -1,500 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Tvrtko Ursulin <tvrtko.ursulin@intel.com> - * - */ - -/** @file gem_userptr_benchmark.c - * - * Benchmark the userptr code and impact of having userptr surfaces - * in process address space on some normal operations. - * - */ - -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <fcntl.h> -#include <inttypes.h> -#include <errno.h> -#include <assert.h> -#include <sys/stat.h> -#include <sys/time.h> -#include <sys/mman.h> -#include <signal.h> - -#include "drm.h" -#include "i915_drm.h" - -#include "drmtest.h" -#include "intel_bufmgr.h" -#include "intel_batchbuffer.h" -#include "intel_chipset.h" -#include "ioctl_wrappers.h" -#include "igt_aux.h" - -#ifndef PAGE_SIZE - #define PAGE_SIZE 4096 -#endif - -#define LOCAL_I915_GEM_USERPTR 0x33 -#define LOCAL_IOCTL_I915_GEM_USERPTR DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_USERPTR, struct local_i915_gem_userptr) -struct local_i915_gem_userptr { - uint64_t user_ptr; - uint64_t user_size; - uint32_t flags; -#define LOCAL_I915_USERPTR_READ_ONLY (1<<0) -#define LOCAL_I915_USERPTR_UNSYNCHRONIZED (1<<31) - uint32_t handle; -}; - -static uint32_t userptr_flags = LOCAL_I915_USERPTR_UNSYNCHRONIZED; - -#define BO_SIZE (65536) - -static void gem_userptr_test_unsynchronized(void) -{ - userptr_flags = LOCAL_I915_USERPTR_UNSYNCHRONIZED; -} - -static void gem_userptr_test_synchronized(void) -{ - userptr_flags = 0; -} - -static int gem_userptr(int fd, void *ptr, int size, int read_only, uint32_t *handle) -{ - struct local_i915_gem_userptr userptr; - int ret; - - userptr.user_ptr = (uintptr_t)ptr; - userptr.user_size = size; - userptr.flags = userptr_flags; - if (read_only) - userptr.flags |= LOCAL_I915_USERPTR_READ_ONLY; - - ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr); - if (ret) - ret = errno; - igt_skip_on_f(ret == ENODEV && - (userptr_flags & LOCAL_I915_USERPTR_UNSYNCHRONIZED) == 0 && - !read_only, - "Skipping, synchronized mappings with no kernel CONFIG_MMU_NOTIFIER?"); - if (ret == 0) - *handle = userptr.handle; - - return ret; -} - -static void **handle_ptr_map; -static unsigned int num_handle_ptr_map; - -static void add_handle_ptr(uint32_t handle, void *ptr) -{ - if (handle >= num_handle_ptr_map) { - handle_ptr_map = realloc(handle_ptr_map, - (handle + 1000) * sizeof(void*)); - num_handle_ptr_map = handle + 1000; - } - - handle_ptr_map[handle] = ptr; -} - -static void *get_handle_ptr(uint32_t handle) -{ - return handle_ptr_map[handle]; -} - -static void free_handle_ptr(uint32_t handle) -{ - igt_assert(handle < num_handle_ptr_map); - igt_assert(handle_ptr_map[handle]); - - free(handle_ptr_map[handle]); - handle_ptr_map[handle] = NULL; -} - -static uint32_t create_userptr_bo(int fd, int size) -{ - void *ptr; - uint32_t handle; - int ret; - - ret = posix_memalign(&ptr, PAGE_SIZE, size); - igt_assert(ret == 0); - - ret = gem_userptr(fd, (uint32_t *)ptr, size, 0, &handle); - igt_assert(ret == 0); - add_handle_ptr(handle, ptr); - - return handle; -} - -static void free_userptr_bo(int fd, uint32_t handle) -{ - gem_close(fd, handle); - free_handle_ptr(handle); -} - -static int has_userptr(int fd) -{ - uint32_t handle = 0; - void *ptr; - uint32_t oldflags; - int ret; - - assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0); - oldflags = userptr_flags; - gem_userptr_test_unsynchronized(); - ret = gem_userptr(fd, ptr, PAGE_SIZE, 0, &handle); - userptr_flags = oldflags; - if (ret != 0) { - free(ptr); - return 0; - } - - gem_close(fd, handle); - free(ptr); - - return handle != 0; -} - -static const unsigned int nr_bos[] = {0, 1, 10, 100, 1000}; -static const unsigned int test_duration_sec = 3; - -static volatile unsigned int run_test; - -static void alarm_handler(int sig) -{ - assert(run_test == 1); - run_test = 0; -} - -static void start_test(unsigned int duration) -{ - run_test = 1; - if (duration == 0) - duration = test_duration_sec; - signal(SIGALRM, alarm_handler); - alarm(duration); -} - -static void exchange_ptr(void *array, unsigned i, unsigned j) -{ - void **arr, *tmp; - arr = (void **)array; - - tmp = arr[i]; - arr[i] = arr[j]; - arr[j] = tmp; -} - -static void test_malloc_free(int random) -{ - unsigned long iter = 0; - unsigned int i, tot = 1000; - void *ptr[tot]; - - start_test(test_duration_sec); - - while (run_test) { - for (i = 0; i < tot; i++) { - ptr[i] = malloc(1000); - assert(ptr[i]); - } - if (random) - igt_permute_array(ptr, tot, exchange_ptr); - for (i = 0; i < tot; i++) - free(ptr[i]); - iter++; - } - - printf("%8lu iter/s\n", iter / test_duration_sec); -} - -static void test_malloc_realloc_free(int random) -{ - unsigned long iter = 0; - unsigned int i, tot = 1000; - void *ptr[tot]; - - start_test(test_duration_sec); - - while (run_test) { - for (i = 0; i < tot; i++) { - ptr[i] = malloc(1000); - assert(ptr[i]); - } - if (random) - igt_permute_array(ptr, tot, exchange_ptr); - for (i = 0; i < tot; i++) { - ptr[i] = realloc(ptr[i], 2000); - assert(ptr[i]); - } - if (random) - igt_permute_array(ptr, tot, exchange_ptr); - for (i = 0; i < tot; i++) - free(ptr[i]); - iter++; - } - - printf("%8lu iter/s\n", iter / test_duration_sec); -} - -static void test_mmap_unmap(int random) -{ - unsigned long iter = 0; - unsigned int i, tot = 1000; - void *ptr[tot]; - - start_test(test_duration_sec); - - while (run_test) { - for (i = 0; i < tot; i++) { - ptr[i] = mmap(NULL, 1000, PROT_READ | PROT_WRITE, - MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); - assert(ptr[i] != MAP_FAILED); - } - if (random) - igt_permute_array(ptr, tot, exchange_ptr); - for (i = 0; i < tot; i++) - munmap(ptr[i], 1000); - iter++; - } - - printf("%8lu iter/s\n", iter / test_duration_sec); -} - -static void test_ptr_read(void *ptr) -{ - unsigned long iter = 0; - volatile unsigned long *p; - unsigned long i, loops; - - loops = BO_SIZE / sizeof(unsigned long) / 4; - - start_test(test_duration_sec); - - while (run_test) { - p = (unsigned long *)ptr; - for (i = 0; i < loops; i++) { - (void)*p++; - (void)*p++; - (void)*p++; - (void)*p++; - } - iter++; - } - - printf("%8lu MB/s\n", iter / test_duration_sec * BO_SIZE / 1000000); -} - -static void test_ptr_write(void *ptr) -{ - unsigned long iter = 0; - volatile unsigned long *p; - register unsigned long i, loops; - - loops = BO_SIZE / sizeof(unsigned long) / 4; - - start_test(test_duration_sec); - - while (run_test) { - p = (unsigned long *)ptr; - for (i = 0; i < loops; i++) { - *p++ = i; - *p++ = i; - *p++ = i; - *p++ = i; - } - iter++; - } - - printf("%8lu MB/s\n", iter / test_duration_sec * BO_SIZE / 1000000); -} - -static void test_impact(int fd) -{ - unsigned int total = sizeof(nr_bos) / sizeof(nr_bos[0]); - unsigned int subtest, i; - uint32_t handles[nr_bos[total-1]]; - void *ptr; - char buffer[BO_SIZE]; - - for (subtest = 0; subtest < total; subtest++) { - for (i = 0; i < nr_bos[subtest]; i++) - handles[i] = create_userptr_bo(fd, BO_SIZE); - - if (nr_bos[subtest] > 0) - ptr = get_handle_ptr(handles[0]); - else - ptr = buffer; - - printf("ptr-read, %5u bos = ", nr_bos[subtest]); - test_ptr_read(ptr); - - printf("ptr-write %5u bos = ", nr_bos[subtest]); - test_ptr_write(ptr); - - printf("malloc-free, %5u bos = ", nr_bos[subtest]); - test_malloc_free(0); - printf("malloc-free-random %5u bos = ", nr_bos[subtest]); - test_malloc_free(1); - - printf("malloc-realloc-free, %5u bos = ", nr_bos[subtest]); - test_malloc_realloc_free(0); - printf("malloc-realloc-free-random, %5u bos = ", nr_bos[subtest]); - test_malloc_realloc_free(1); - - printf("mmap-unmap, %5u bos = ", nr_bos[subtest]); - test_mmap_unmap(0); - printf("mmap-unmap-random, %5u bos = ", nr_bos[subtest]); - test_mmap_unmap(1); - - for (i = 0; i < nr_bos[subtest]; i++) - free_userptr_bo(fd, handles[i]); - } -} - -static void test_single(int fd) -{ - char *ptr, *bo_ptr; - uint32_t handle = 0; - unsigned long iter = 0; - int ret; - unsigned long map_size = BO_SIZE + PAGE_SIZE - 1; - - ptr = mmap(NULL, map_size, PROT_READ | PROT_WRITE, - MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); - assert(ptr != MAP_FAILED); - - bo_ptr = (char *)ALIGN((unsigned long)ptr, PAGE_SIZE); - - start_test(test_duration_sec); - - while (run_test) { - ret = gem_userptr(fd, bo_ptr, BO_SIZE, 0, &handle); - assert(ret == 0); - gem_close(fd, handle); - iter++; - } - - munmap(ptr, map_size); - - printf("%8lu iter/s\n", iter / test_duration_sec); -} - -static void test_multiple(int fd, unsigned int batch, int random) -{ - char *ptr, *bo_ptr; - uint32_t handles[10000]; - int map[10000]; - unsigned long iter = 0; - int ret; - int i; - unsigned long map_size = batch * BO_SIZE + PAGE_SIZE - 1; - - assert(batch < (sizeof(handles) / sizeof(handles[0]))); - assert(batch < (sizeof(map) / sizeof(map[0]))); - - ptr = mmap(NULL, map_size, PROT_READ | PROT_WRITE, - MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); - assert(ptr != MAP_FAILED); - - bo_ptr = (char *)ALIGN((unsigned long)ptr, PAGE_SIZE); - - for (i = 0; i < batch; i++) - map[i] = i; - - start_test(test_duration_sec); - - while (run_test) { - if (random) - igt_permute_array(map, batch, igt_exchange_int); - for (i = 0; i < batch; i++) { - ret = gem_userptr(fd, bo_ptr + map[i] * BO_SIZE, - BO_SIZE, - 0, &handles[i]); - assert(ret == 0); - } - if (random) - igt_permute_array(map, batch, igt_exchange_int); - for (i = 0; i < batch; i++) - gem_close(fd, handles[map[i]]); - iter++; - } - - munmap(ptr, map_size); - - printf("%8lu iter/s\n", iter * batch / test_duration_sec); -} - -static void test_userptr(int fd) -{ - printf("create-destroy = "); - test_single(fd); - - printf("multi-create-destroy = "); - test_multiple(fd, 100, 0); - - printf("multi-create-destroy-random = "); - test_multiple(fd, 100, 1); -} - -int main(int argc, char **argv) -{ - int fd = -1, ret; - - igt_skip_on_simulation(); - - igt_subtest_init(argc, argv); - - fd = drm_open_any(); - igt_assert(fd >= 0); - - ret = has_userptr(fd); - igt_skip_on_f(ret == 0, "No userptr support - %s (%d)\n", - strerror(errno), ret); - - - gem_userptr_test_unsynchronized(); - - igt_subtest("userptr-unsync") - test_userptr(fd); - - igt_subtest("userptr-impact-unsync") - test_impact(fd); - - gem_userptr_test_synchronized(); - - igt_subtest("userptr-sync") - test_userptr(fd); - - igt_subtest("userptr-impact-sync") - test_impact(fd); - - igt_exit(); - - return 0; -} diff --git a/benchmarks/intel_upload_blit_large.c b/benchmarks/intel_upload_blit_large.c deleted file mode 100644 index 689f9c41..00000000 --- a/benchmarks/intel_upload_blit_large.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * Copyright © 2009 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -/** - * Roughly simulates repeatedly uploading frames of images, by uploading - * the data all at once with pwrite, and then blitting it to another buffer. - * - * You might think of this like a movie player, but that wouldn't be entirely - * accurate, since the access patterns of the memory would be different - * (generally, smaller source image, upscaled, an thus different memory access - * pattern in both texel fetch for the stretching and the destination writes). - * However, some things like swfdec would be doing something like this since - * they compute their data in host memory and upload the full sw rendered - * frame. - * - * Additionally, those applications should be rendering at the screen refresh - * rate, while this test has no limits, and so can get itself into the - * working set larger than aperture size performance disaster. - * - * The current workload doing this path is pixmap upload for non-KMS. - */ - -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <assert.h> -#include <fcntl.h> -#include <inttypes.h> -#include <errno.h> -#include <sys/stat.h> -#include <sys/time.h> - -#include <drm.h> -#include <i915_drm.h> - -#include "drmtest.h" -#include "intel_bufmgr.h" -#include "intel_batchbuffer.h" -#include "intel_io.h" -#include "intel_chipset.h" - -#define OBJECT_WIDTH 1280 -#define OBJECT_HEIGHT 720 - -static double -get_time_in_secs(void) -{ - struct timeval tv; - - gettimeofday(&tv, NULL); - - return (double)tv.tv_sec + tv.tv_usec / 1000000.0; -} - -static void -do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, - drm_intel_bo *dst_bo, int width, int height) -{ - uint32_t data[width * height]; - drm_intel_bo *src_bo; - int i; - static uint32_t seed = 1; - - /* Generate some junk. Real workloads would be doing a lot more - * work to generate the junk. - */ - for (i = 0; i < width * height; i++) { - data[i] = seed++; - } - - /* Upload the junk. */ - src_bo = drm_intel_bo_alloc(bufmgr, "src", sizeof(data), 4096); - drm_intel_bo_subdata(src_bo, 0, sizeof(data), data); - - /* Render the junk to the dst. */ - BLIT_COPY_BATCH_START(0); - OUT_BATCH((3 << 24) | /* 32 bits */ - (0xcc << 16) | /* copy ROP */ - (width * 4) /* dst pitch */); - OUT_BATCH(0); /* dst x1,y1 */ - OUT_BATCH((height << 16) | width); /* dst x2,y2 */ - OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); - OUT_BATCH(0); /* src x1,y1 */ - OUT_BATCH(width * 4); /* src pitch */ - OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); - ADVANCE_BATCH(); - - intel_batchbuffer_flush(batch); - - drm_intel_bo_unreference(src_bo); -} - -int main(int argc, char **argv) -{ - int fd; - int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4; - double start_time, end_time; - drm_intel_bo *dst_bo; - drm_intel_bufmgr *bufmgr; - struct intel_batchbuffer *batch; - int i; - - fd = drm_open_any(); - - bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); - drm_intel_bufmgr_gem_enable_reuse(bufmgr); - - batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); - - dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); - - /* Prep loop to get us warmed up. */ - for (i = 0; i < 60; i++) { - do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); - } - drm_intel_bo_wait_rendering(dst_bo); - - /* Do the actual timing. */ - start_time = get_time_in_secs(); - for (i = 0; i < 200; i++) { - do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); - } - drm_intel_bo_wait_rendering(dst_bo); - end_time = get_time_in_secs(); - - printf("%d iterations in %.03f secs: %.01f MB/sec\n", i, - end_time - start_time, - (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 / - (end_time - start_time)); - - intel_batchbuffer_free(batch); - drm_intel_bufmgr_destroy(bufmgr); - - close(fd); - - return 0; -} diff --git a/benchmarks/intel_upload_blit_large_gtt.c b/benchmarks/intel_upload_blit_large_gtt.c deleted file mode 100644 index 601496dd..00000000 --- a/benchmarks/intel_upload_blit_large_gtt.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright © 2009 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -/** - * Roughly simulates repeatedly uploading frames of images, by uploading - * the data all at once with pwrite, and then blitting it to another buffer. - * - * You might think of this like a movie player, but that wouldn't be entirely - * accurate, since the access patterns of the memory would be different - * (generally, smaller source image, upscaled, an thus different memory access - * pattern in both texel fetch for the stretching and the destination writes). - * However, some things like swfdec would be doing something like this since - * they compute their data in host memory and upload the full sw rendered - * frame. - * - * Additionally, those applications should be rendering at the screen refresh - * rate, while this test has no limits, and so can get itself into the - * working set larger than aperture size performance disaster. - * - * The current workload doing this path is pixmap upload in 2D with KMS. - */ - -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <assert.h> -#include <fcntl.h> -#include <inttypes.h> -#include <errno.h> -#include <sys/stat.h> -#include <sys/time.h> -#include "drm.h" -#include "i915_drm.h" -#include "drmtest.h" -#include "intel_bufmgr.h" -#include "intel_batchbuffer.h" -#include "intel_io.h" -#include "intel_chipset.h" - -#define OBJECT_WIDTH 1280 -#define OBJECT_HEIGHT 720 - -static double -get_time_in_secs(void) -{ - struct timeval tv; - - gettimeofday(&tv, NULL); - - return (double)tv.tv_sec + tv.tv_usec / 1000000.0; -} - -static void -do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, - drm_intel_bo *dst_bo, int width, int height) -{ - uint32_t *data; - drm_intel_bo *src_bo; - int i; - static uint32_t seed = 1; - - src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096); - - drm_intel_gem_bo_map_gtt(src_bo); - - data = src_bo->virtual; - for (i = 0; i < width * height; i++) { - data[i] = seed++; - } - - drm_intel_gem_bo_unmap_gtt(src_bo); - - /* Render the junk to the dst. */ - BLIT_COPY_BATCH_START(0); - OUT_BATCH((3 << 24) | /* 32 bits */ - (0xcc << 16) | /* copy ROP */ - (width * 4) /* dst pitch */); - OUT_BATCH(0); /* dst x1,y1 */ - OUT_BATCH((height << 16) | width); /* dst x2,y2 */ - OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); - OUT_BATCH(0); /* src x1,y1 */ - OUT_BATCH(width * 4); /* src pitch */ - OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); - ADVANCE_BATCH(); - - intel_batchbuffer_flush(batch); - - drm_intel_bo_unreference(src_bo); -} - -int main(int argc, char **argv) -{ - int fd; - int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4; - double start_time, end_time; - drm_intel_bo *dst_bo; - drm_intel_bufmgr *bufmgr; - struct intel_batchbuffer *batch; - int i; - - fd = drm_open_any(); - - bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); - drm_intel_bufmgr_gem_enable_reuse(bufmgr); - - batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); - - dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); - - /* Prep loop to get us warmed up. */ - for (i = 0; i < 60; i++) { - do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); - } - drm_intel_bo_wait_rendering(dst_bo); - - /* Do the actual timing. */ - start_time = get_time_in_secs(); - for (i = 0; i < 200; i++) { - do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); - } - drm_intel_bo_wait_rendering(dst_bo); - end_time = get_time_in_secs(); - - printf("%d iterations in %.03f secs: %.01f MB/sec\n", i, - end_time - start_time, - (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 / - (end_time - start_time)); - - intel_batchbuffer_free(batch); - drm_intel_bufmgr_destroy(bufmgr); - - close(fd); - - return 0; -} diff --git a/benchmarks/intel_upload_blit_large_map.c b/benchmarks/intel_upload_blit_large_map.c deleted file mode 100644 index d9167376..00000000 --- a/benchmarks/intel_upload_blit_large_map.c +++ /dev/null @@ -1,162 +0,0 @@ -/* - * Copyright © 2009 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -/** - * Roughly simulates repeatedly uploading frames of images, by uploading - * the data all at once with pwrite, and then blitting it to another buffer. - * - * You might think of this like a movie player, but that wouldn't be entirely - * accurate, since the access patterns of the memory would be different - * (generally, smaller source image, upscaled, an thus different memory access - * pattern in both texel fetch for the stretching and the destination writes). - * However, some things like swfdec would be doing something like this since - * they compute their data in host memory and upload the full sw rendered - * frame. - * - * Additionally, those applications should be rendering at the screen refresh - * rate, while this test has no limits, and so can get itself into the - * working set larger than aperture size performance disaster. - * - * The current workload we have that does large drm_intel_bo_map() - * uploads is texture upload for OpenGL (as it frequently is doing - * reformatting as it uploads the user's data, making bo_subdata less - * suitable) - */ - -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <assert.h> -#include <fcntl.h> -#include <inttypes.h> -#include <errno.h> -#include <sys/stat.h> -#include <sys/time.h> -#include "drm.h" -#include "i915_drm.h" -#include "drmtest.h" -#include "intel_bufmgr.h" -#include "intel_batchbuffer.h" -#include "intel_io.h" -#include "intel_chipset.h" - -#define OBJECT_WIDTH 1280 -#define OBJECT_HEIGHT 720 - -static double -get_time_in_secs(void) -{ - struct timeval tv; - - gettimeofday(&tv, NULL); - - return (double)tv.tv_sec + tv.tv_usec / 1000000.0; -} - -static void -do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, - drm_intel_bo *dst_bo, int width, int height) -{ - uint32_t *data; - drm_intel_bo *src_bo; - int i; - static uint32_t seed = 1; - - src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096); - - drm_intel_bo_map(src_bo, 1); - - data = src_bo->virtual; - for (i = 0; i < width * height; i++) { - data[i] = seed++; - } - - drm_intel_bo_unmap(src_bo); - - /* Render the junk to the dst. */ - BLIT_COPY_BATCH_START(0); - OUT_BATCH((3 << 24) | /* 32 bits */ - (0xcc << 16) | /* copy ROP */ - (width * 4) /* dst pitch */); - OUT_BATCH(0); /* dst x1,y1 */ - OUT_BATCH((height << 16) | width); /* dst x2,y2 */ - OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); - OUT_BATCH(0); /* src x1,y1 */ - OUT_BATCH(width * 4); /* src pitch */ - OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); - ADVANCE_BATCH(); - - intel_batchbuffer_flush(batch); - - drm_intel_bo_unreference(src_bo); -} - -int main(int argc, char **argv) -{ - int fd; - int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4; - double start_time, end_time; - drm_intel_bo *dst_bo; - drm_intel_bufmgr *bufmgr; - struct intel_batchbuffer *batch; - int i; - - fd = drm_open_any(); - - bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); - drm_intel_bufmgr_gem_enable_reuse(bufmgr); - - batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); - - dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); - - /* Prep loop to get us warmed up. */ - for (i = 0; i < 60; i++) { - do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); - } - drm_intel_bo_wait_rendering(dst_bo); - - /* Do the actual timing. */ - start_time = get_time_in_secs(); - for (i = 0; i < 200; i++) { - do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); - } - drm_intel_bo_wait_rendering(dst_bo); - end_time = get_time_in_secs(); - - printf("%d iterations in %.03f secs: %.01f MB/sec\n", i, - end_time - start_time, - (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 / - (end_time - start_time)); - - intel_batchbuffer_free(batch); - drm_intel_bufmgr_destroy(bufmgr); - - close(fd); - - return 0; -} diff --git a/benchmarks/intel_upload_blit_small.c b/benchmarks/intel_upload_blit_small.c deleted file mode 100644 index b9640a4f..00000000 --- a/benchmarks/intel_upload_blit_small.c +++ /dev/null @@ -1,172 +0,0 @@ -/* - * Copyright © 2009 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -/** - * Roughly simulates Mesa's current vertex buffer behavior: do a series of - * small pwrites on a moderately-sized buffer, then render using it. - * - * The vertex buffer uploads - * - * You might think of this like a movie player, but that wouldn't be entirely - * accurate, since the access patterns of the memory would be different - * (generally, smaller source image, upscaled, an thus different memory access - * pattern in both texel fetch for the stretching and the destination writes). - * However, some things like swfdec would be doing something like this since - * they compute their data in host memory and upload the full sw rendered - * frame. - */ - -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <assert.h> -#include <fcntl.h> -#include <inttypes.h> -#include <errno.h> -#include <sys/stat.h> -#include <sys/time.h> -#include "drm.h" -#include "i915_drm.h" -#include "drmtest.h" -#include "intel_bufmgr.h" -#include "intel_batchbuffer.h" -#include "intel_io.h" -#include "intel_chipset.h" - -/* Happens to be 128k, the size of the VBOs used by i965's Mesa driver. */ -#define OBJECT_WIDTH 256 -#define OBJECT_HEIGHT 128 - -static double -get_time_in_secs(void) -{ - struct timeval tv; - - gettimeofday(&tv, NULL); - - return (double)tv.tv_sec + tv.tv_usec / 1000000.0; -} - -static void -do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, - drm_intel_bo *dst_bo, int width, int height) -{ - uint32_t data[64]; - drm_intel_bo *src_bo; - int i; - static uint32_t seed = 1; - - src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096); - - /* Upload some junk. Real workloads would be doing a lot more - * work to generate the junk. - */ - for (i = 0; i < width * height;) { - int size, j; - - /* Choose a size from 1 to 64 dwords to upload. - * Normal workloads have a distribution of sizes with a - * large tail (something in your scene's going to have a big - * pile of vertices, most likely), but I'm trying to get at - * the cost of the small uploads here. - */ - size = random() % 64 + 1; - if (i + size > width * height) - size = width * height - i; - - for (j = 0; j < size; j++) - data[j] = seed++; - - /* Upload the junk. */ - drm_intel_bo_subdata(src_bo, i * 4, size * 4, data); - - i += size; - } - - /* Render the junk to the dst. */ - BLIT_COPY_BATCH_START(0); - OUT_BATCH((3 << 24) | /* 32 bits */ - (0xcc << 16) | /* copy ROP */ - (width * 4) /* dst pitch */); - OUT_BATCH(0); /* dst x1,y1 */ - OUT_BATCH((height << 16) | width); /* dst x2,y2 */ - OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); - OUT_BATCH(0); /* src x1,y1 */ - OUT_BATCH(width * 4); /* src pitch */ - OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); - ADVANCE_BATCH(); - - intel_batchbuffer_flush(batch); - - drm_intel_bo_unreference(src_bo); -} - -int main(int argc, char **argv) -{ - int fd; - int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4; - double start_time, end_time; - drm_intel_bo *dst_bo; - drm_intel_bufmgr *bufmgr; - struct intel_batchbuffer *batch; - int i; - - fd = drm_open_any(); - - bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); - drm_intel_bufmgr_gem_enable_reuse(bufmgr); - - batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); - - dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096); - - /* Prep loop to get us warmed up. */ - for (i = 0; i < 20; i++) { - do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); - } - drm_intel_bo_wait_rendering(dst_bo); - - /* Do the actual timing. */ - start_time = get_time_in_secs(); - for (i = 0; i < 1000; i++) { - do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT); - } - drm_intel_bo_wait_rendering(dst_bo); - end_time = get_time_in_secs(); - - printf("%d iterations in %.03f secs: %.01f MB/sec\n", i, - end_time - start_time, - (double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 / - (end_time - start_time)); - - intel_batchbuffer_free(batch); - drm_intel_bufmgr_destroy(bufmgr); - - close(fd); - - return 0; -} diff --git a/debugger/.gitignore b/debugger/.gitignore deleted file mode 100644 index 873cd273..00000000 --- a/debugger/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -debug_rdata -eudb diff --git a/debugger/Makefile.am b/debugger/Makefile.am deleted file mode 100644 index f1e49b92..00000000 --- a/debugger/Makefile.am +++ /dev/null @@ -1,17 +0,0 @@ - -SUBDIRS = system_routine - -bin_PROGRAMS = eudb -noinst_PROGRAMS = debug_rdata - -AM_CPPFLAGS = \ - -I$(top_srcdir) \ - -I$(top_srcdir)/lib - -AM_CFLAGS = \ - $(DRM_CFLAGS) \ - $(PCIACCESS_CFLAGS) \ - $(CAIRO_CFLAGS) \ - $(CWARNFLAGS) - -LDADD = $(top_builddir)/lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS) diff --git a/debugger/debug_rdata.c b/debugger/debug_rdata.c deleted file mode 100644 index 61d82d9e..00000000 --- a/debugger/debug_rdata.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Ben Widawsky <ben@bwidawsk.net> - * - */ - -#include <stdint.h> -#include <stdio.h> -#include <stdlib.h> -#include "intel_io.h" -#include "intel_chipset.h" - -struct eu_rdata { - union { - struct { - uint8_t sendc_dep : 1; - uint8_t swh_dep : 1; - uint8_t pwc_dep : 1; - uint8_t n2_dep : 1; - uint8_t n1_dep : 1; - uint8_t n0_dep : 1; - uint8_t flag1_dep : 1; - uint8_t flag0_dep : 1; - uint8_t indx_dep : 1; - uint8_t mrf_dep : 1; - uint8_t dst_dep : 1; - uint8_t src2_dep : 1; - uint8_t src1_dep : 1; - uint8_t src0_dep : 1; - uint8_t mp_dep_pin : 1; - uint8_t sp_dep_pin : 1; - uint8_t fftid : 8; - uint8_t ffid : 4; - uint8_t instruction_valid : 1; - uint8_t thread_status : 3; - }; - uint32_t dword; - } ud0; - - union { - struct { - uint8_t mrf_addr : 4; - uint8_t dst_addr : 7; - uint8_t src2_addr : 7; - uint8_t src1_addr : 7; - uint8_t src0_addr : 7; - }; - uint32_t dword; - } ud1; - - union { - struct { - uint16_t exip : 12; - uint8_t opcode : 7; - uint8_t pwc : 8; - uint8_t instruction_valid : 1; - uint8_t mbz : 4; - }; - uint32_t dword; - } ud2; -}; - -const char *thread_status[] = - {"INVALID", "invalid/no thread", "standby (dependency)", "INVALID", "Executing", - "INVALID" , "INVALID" , "INVALID"}; - -static struct eu_rdata -collect_rdata(int eu, int tid) { - struct eu_rdata rdata; - - intel_register_write(0x7800, eu << 16 | (3 * tid) << 8); - rdata.ud0.dword = intel_register_read(0x7840); - - intel_register_write(0x7800, eu << 16 | (3 * tid + 1) << 8); - rdata.ud1.dword = intel_register_read(0x7840); - - intel_register_write(0x7800, eu << 16 | (3 * tid + 2) << 8); - rdata.ud2.dword = intel_register_read(0x7840); - - return rdata; -} -static void -print_rdata(struct eu_rdata rdata) { - printf("\t%s\n", thread_status[rdata.ud0.thread_status]); - printf("\tn1_dep: %d\n", rdata.ud0.n1_dep); - printf("\tpwc_dep: %d\n", rdata.ud0.pwc_dep); - printf("\tswh_dep: %d\n", rdata.ud0.swh_dep); - printf("\tsource 0 %x\n", rdata.ud1.src0_addr); - printf("\tsource 1 %x\n", rdata.ud1.src1_addr); - printf("\tsource 2 %x\n", rdata.ud1.src2_addr); - printf("\tdest %x\n", rdata.ud1.dst_addr); - printf("\tmrf %x\n", rdata.ud1.mrf_addr); - printf("\tIP: %x\n", rdata.ud2.exip); - printf("\topcode: %x\n", rdata.ud2.opcode); -} - -static void -find_stuck_threads(void) -{ - int i, j; - for (i = 0; i < 15; i++) - for (j = 0; j < 5; j++) { - struct eu_rdata rdata; - rdata = collect_rdata(i, j); - if (rdata.ud0.thread_status == 2 || - rdata.ud0.thread_status == 4) { - printf("%d %d:\n", i, j); - print_rdata(rdata); - } - } -} - -int main(int argc, char *argv[]) { - struct pci_device *pci_dev; - pci_dev = intel_get_pci_device(); - - intel_register_access_init(pci_dev, 1); - find_stuck_threads(); -// collect_rdata(atoi(argv[1]), atoi(argv[2])); - return 0; -} diff --git a/debugger/eudb.c b/debugger/eudb.c deleted file mode 100644 index 0e810db1..00000000 --- a/debugger/eudb.c +++ /dev/null @@ -1,606 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Ben Widawsky <ben@bwidawsk.net> - * - * Notes: - * - */ - -#include <signal.h> -#include <stdlib.h> -#include <fcntl.h> -#include <unistd.h> -#include <string.h> -#include <strings.h> -#include <assert.h> -#include <sys/types.h> -#include <sys/stat.h> -#include <sys/mman.h> -#include <sys/un.h> -#include <sys/socket.h> -#include "drm.h" -#include "i915_drm.h" -#include "drmtest.h" -#include "intel_chipset.h" -#include "intel_bufmgr.h" -#include "intel_io.h" -#include "intel_batchbuffer.h" -#include "intel_debug.h" -#include "debug.h" - -#define EU_ATT 0x7810 -#define EU_ATT_CLR 0x7830 - -#define RSVD_EU -1 -#define RSVD_THREAD -1 -#define RSVD_ID EUID(-1, -1, -1) - -enum { - EBAD_SHMEM, - EBAD_PROTOCOL, - EBAD_MAGIC, - EBAD_WRITE -}; - -struct debuggee { - int euid; - int tid; - int fd; - int clr; - uint32_t reg; -}; - -struct debugger { - struct debuggee *debuggees; - int num_threads; - int real_num_threads; - int threads_per_eu; -} *eu_info; - -drm_intel_bufmgr *bufmgr; -struct intel_batchbuffer *batch; -drm_intel_bo *scratch_bo; - -int handle; -int drm_fd; -int debug_fd = 0; -const char *debug_file = "dump_debug.bin"; -int debug; -int clear_waits; -int shutting_down = 0; -struct intel_debug_handshake dh; -int force_clear = 0; -uint32_t old_td_ctl; - -/* - * The docs are wrong about the attention clear bits. The clear bits are - * provided as part of the structure in case they change in future generations. - */ -#define EUID(eu, td, clear) \ - { .euid = eu, .tid = td, .reg = EU_ATT, .fd = -1, .clr = clear } -#define EUID2(eu, td, clear) \ - { .euid = eu, .tid = td, .reg = EU_ATT + 4, .fd = -1, .clr = clear } -struct debuggee gt1_debug_ids[] = { - RSVD_ID, RSVD_ID, - RSVD_ID, EUID(6, 3, 28), EUID(6, 2, 27), EUID(6, 1, 26), EUID(6, 0, 25), - RSVD_ID, EUID(5, 3, 23), EUID(5, 2, 22), EUID(5, 1, 21), EUID(5, 0, 20), - RSVD_ID, EUID(4, 3, 18), EUID(4, 2, 17), EUID(4, 1, 16), EUID(4, 0, 15), - RSVD_ID, EUID(2, 3, 13), EUID(2, 2, 12), EUID(2, 1, 11), EUID(2, 0, 10), - RSVD_ID, EUID(1, 3, 8), EUID(1, 2, 7), EUID(1, 1, 6), EUID(1, 0, 5), - RSVD_ID, EUID(0, 3, 3), EUID(0, 2, 2), EUID(0, 1, 1), EUID(0, 0, 0) -}; - -struct debuggee gt2_debug_ids[] = { - EUID(8, 1, 31), EUID(8, 0, 30), - EUID(6, 4, 29), EUID(6, 3, 28), EUID(6, 2, 27), EUID(6, 1, 26), EUID(6, 0, 25), - EUID(5, 4, 24), EUID(5, 3, 23), EUID(5, 2, 22), EUID(5, 1, 21), EUID(5, 0, 20), - EUID(4, 4, 19), EUID(4, 3, 18), EUID(4, 2, 17), EUID(4, 1, 16), EUID(4, 0, 15), - EUID(2, 4, 14), EUID(2, 3, 13), EUID(2, 2, 12), EUID(2, 1, 11), EUID(2, 0, 10), - EUID(1, 4, 9), EUID(1, 3, 8), EUID(1, 2, 7), EUID(1, 1, 6), EUID(1, 0, 5), - EUID(0, 4, 4), EUID(0, 3, 3), EUID(0, 2, 2), EUID(0, 1, 1), EUID(0, 0, 0), - RSVD_ID, RSVD_ID, RSVD_ID, RSVD_ID, - EUID2(14, 4, 27), EUID2(14, 3, 26), EUID2(14, 2, 25), EUID2(14, 1, 24), EUID2(14, 0, 23), - EUID2(13, 4, 22), EUID2(13, 3, 21), EUID2(13, 2, 20), EUID2(13, 1, 19), EUID2(13, 0, 18), - EUID2(12, 4, 17), EUID2(12, 3, 16), EUID2(12, 2, 15), EUID2(12, 1, 14), EUID2(12, 0, 13), - EUID2(10, 4, 12), EUID2(10, 3, 11), EUID2(10, 2, 10), EUID2(10, 1, 9), EUID2(10, 0, 8), - EUID2(9, 4, 7), EUID2(9, 3, 6), EUID2(9, 2, 5), EUID2(9, 1, 4), EUID2(9, 0, 3), - EUID2(8, 4, 2), EUID2(8, 3, 1), EUID2(8, 2, 0) -}; - -struct debugger gt1 = { - .debuggees = gt1_debug_ids, - .num_threads = 32, - .real_num_threads = 24, - .threads_per_eu = 4 -}; - -struct debugger gt2 = { - .debuggees = gt2_debug_ids, - .num_threads = 64, - .real_num_threads = 60, - .threads_per_eu = 5 -}; - -static void -dump_debug(void *buf, size_t count) { - if (!debug_fd) - debug_fd = open(debug_file, O_CREAT | O_WRONLY | O_TRUNC, S_IRWXO); - - write(debug_fd, buf, count); -} - -static volatile void * -map_debug_buffer(void) { - int ret; - - ret = drm_intel_bo_map(scratch_bo, 0); - assert(ret == 0); - return scratch_bo->virtual; -} - -static void -unmap_debug_buffer(void) { - drm_intel_bo_unmap(scratch_bo); -} - -static int -wait_for_attn(int timeout, int *out_bits) { - int step = 1; - int eus_waiting = 0; - int i,j; - - if (timeout <= 0) { - timeout = 1; - step = 0; - } - - for (i = 0; i < timeout; i += step) { - for (j = 0; j < 8; j += 4) { - uint32_t attn = intel_register_read(EU_ATT + j); - if (attn) { - int bit = 0; - while( (bit = ffs(attn)) != 0) { - bit--; // ffs is 1 based - assert(bit >= 0); - out_bits[eus_waiting] = bit + (j * 8); - attn &= ~(1 << bit); - eus_waiting++; - } - } - } - - if (intel_register_read(EU_ATT + 8) || - intel_register_read(EU_ATT + 0xc)) { - fprintf(stderr, "Unknown attention bits\n"); - } - - if (eus_waiting || shutting_down) - break; - } - - return eus_waiting; -} - -#define eu_fd(bit) eu_info->debuggees[bit].fd -#define eu_id(bit) eu_info->debuggees[bit].euid -#define eu_tid(bit) eu_info->debuggees[bit].tid -static struct eu_state * -find_eu_shmem(int bit, volatile uint8_t *buf) { - struct per_thread_data { - uint8_t ____[dh.per_thread_scratch]; - }__attribute__((packed)) *data; - struct eu_state *eu; - int mem_tid, mem_euid, i; - - data = (struct per_thread_data *)buf; - for(i = 0; i < eu_info->num_threads; i++) { - eu = (struct eu_state *)&data[i]; - mem_tid = eu->sr0 & 0x7; - mem_euid = (eu->sr0 >> 8) & 0xf; - if (mem_tid == eu_tid(bit) && mem_euid == eu_id(bit)) - break; - eu = NULL; - } - - return eu; -} - -#define GRF_CMP(a, b) memcmp(a, b, sizeof(grf)) -#define GRF_CPY(a, b) memcpy(a, b, sizeof(grf)) -static int -verify(struct eu_state *eu) { - if (GRF_CMP(eu->version, protocol_version)) { - if (debug) { - printf("Bad EU protocol version %x %x\n", - ((uint32_t *)&eu->version)[0], - DEBUG_PROTOCOL_VERSION); - dump_debug((void *)eu, sizeof(*eu)); - } - return -EBAD_PROTOCOL; - } - - if (GRF_CMP(eu->state_magic, eu_msg)) { - if (debug) { - printf("Bad EU state magic %x %x\n", - ((uint32_t *)&eu->state_magic)[0], - ((uint32_t *)&eu->state_magic)[1]); - dump_debug((void *)eu, sizeof(*eu)); - } - return -EBAD_MAGIC; - } else { - GRF_CPY(eu->state_magic, cpu_ack); - } - - eu->sr0 = RSVD_EU << 8 | RSVD_THREAD; - return 0; -} - -static int -collect_data(int bit, volatile uint8_t *buf) { - struct eu_state *eu; - ssize_t num; - int ret; - - assert(eu_id(bit) != RSVD_EU); - - if (eu_fd(bit) == -1) { - char name[128]; - sprintf(name, "dump_eu_%02d_%d.bin", eu_id(bit), eu_tid(bit)); - eu_fd(bit) = open(name, O_CREAT | O_WRONLY | O_TRUNC, S_IRWXO); - if (eu_fd(bit) == -1) - return -1; - } - - eu = find_eu_shmem(bit, buf); - - if (eu == NULL) { - if (debug) - printf("Bad offset %d %d\n", eu_id(bit), eu_tid(bit)); - return -EBAD_SHMEM; - } - - ret = verify(eu); - if (ret) - return ret; - - num = write(eu_fd(bit), (void *)eu, sizeof(*eu)); - if (num != sizeof(*eu)) { - perror("unhandled write failure"); - return EBAD_WRITE; - } - - - return 0; -} - -static void -clear_attn(int bit) { -#if 0 -/* - * This works but doesn't allow for easily changed clearing bits - */ -static void -clear_attn_old(int bit) { - int bit_to_clear = bit % 32; - bit_to_clear = 31 - bit_to_clear; - intel_register_write(0x7830 + (bit/32) * 4, 0); - intel_register_write(0x7830 + (bit/32) * 4, 1 << bit_to_clear); -} -#else - if (!force_clear) { - int bit_to_clear; - bit_to_clear = eu_info->debuggees[bit].clr; - intel_register_write(EU_ATT_CLR + (bit/32) * 4, 0); - intel_register_write(EU_ATT_CLR + (bit/32) * 4, 1 << bit_to_clear); - } else { - intel_register_write(EU_ATT_CLR + 0, 0); - intel_register_write(EU_ATT_CLR + 4, 0); - intel_register_write(EU_ATT_CLR + 0, 0xffffffff); - intel_register_write(EU_ATT_CLR + 4, 0xffffffff); - } -#endif -} - -static void -db_shutdown(int sig) { - shutting_down = 1; - printf("Shutting down...\n"); -} - -static void -die(int reason) { - int i = 0; - - intel_register_write(EU_ATT_CLR, 0); - intel_register_write(EU_ATT_CLR + 4, 0); - - if (debug_fd) - close(debug_fd); - - for (i = 0; i < eu_info->num_threads; i++) { - if (eu_info->debuggees[i].fd != -1) - close(eu_info->debuggees[i].fd); - } - - unmap_debug_buffer(); - - if (old_td_ctl) - intel_register_write(TD_CTL, old_td_ctl); - intel_register_access_fini(); - exit(reason); -} - -static int -identify_device(int devid) { - switch(devid) { - case PCI_CHIP_SANDYBRIDGE_GT1: - case PCI_CHIP_SANDYBRIDGE_M_GT1: - case PCI_CHIP_SANDYBRIDGE_S: - eu_info = >1; - break; - case PCI_CHIP_SANDYBRIDGE_GT2: - case PCI_CHIP_SANDYBRIDGE_GT2_PLUS: - case PCI_CHIP_SANDYBRIDGE_M_GT2: - case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS: - eu_info = >2; - break; - default: - return 1; - } - - return 0; -} - -static void -parse_data(const char *file_name) { - struct eu_state *eu_state = NULL; - struct stat st; - int fd = -1; - int ret, i, elements; - - fd = open(file_name, O_RDONLY); - if (fd == -1) { - perror("open"); - goto out; - } - - ret = fstat(fd, &st); - if (ret == -1) { - perror("fstat"); - goto out; - } - - elements = st.st_size / sizeof(struct eu_state); - if (elements == 0) { - fprintf(stderr, "File not big enough for 1 entry\n"); - goto out; - } - - eu_state = mmap(0, st.st_size, PROT_READ, MAP_SHARED, fd, 0); - if (eu_state == MAP_FAILED) { - perror("mmap"); - goto out; - } - - for(i = 0; i < elements; i++) { - printf("AIP: "); - printf("%x\n", ((uint32_t *)eu_state[i].cr0)[2]); - } -out: - if (eu_state) - munmap(eu_state, st.st_size); - if (fd != -1) - close(fd); -} - -static int -wait_for_scratch_bo(void) { - struct sockaddr_un addr; - uint32_t version; - int fd, ret, dh_handle = -1; - - assert(sizeof(version) == sizeof(dh.version)); - - fd = socket(AF_UNIX, SOCK_STREAM, 0); - if (fd == -1) - return -1; - - /* Clean up previous runs */ - remove(SHADER_DEBUG_SOCKET); - - memset(&addr, 0, sizeof(addr)); - addr.sun_family = AF_UNIX; - strncpy(addr.sun_path, SHADER_DEBUG_SOCKET, sizeof(addr.sun_path) - 1); - - ret = bind(fd, (const struct sockaddr *)&addr, sizeof(addr)); - if (ret == -1) { - perror("listen"); - return -1; - } - - ret = listen(fd, 1); - if (ret == -1) { - perror("listen"); - goto done; - } - - while(1) { - int client_fd; - size_t count; - char ack[] = DEBUG_HANDSHAKE_ACK; - - client_fd = accept(fd, NULL, NULL); - if (client_fd == -1) { - perror("accept"); - goto done; - } - - count = read(client_fd, &version, sizeof(version)); - if (count != sizeof(version)) { - perror("read version"); - goto loop_out; - } - - if (version != DEBUG_HANDSHAKE_VERSION) { - fprintf(stderr, "Bad debug handshake\n"); - goto loop_out; - } - - count = read(client_fd, ((char *)&dh) + 1, sizeof(dh) - 1); - if (count != sizeof(dh) - 1) { - perror("read handshake"); - goto loop_out; - } - - count = write(client_fd, ack, sizeof(ack)); - if (count != sizeof(ack)) { - perror("write ack"); - goto loop_out; - } - dh_handle = dh.flink_handle; - if (debug > 0) { - printf("Handshake completed successfully\n" - "\tprotocol version = %d\n" - "\tflink handle = %d\n" - "\tper thread scratch = %x\n", version, - dh.flink_handle, dh.per_thread_scratch); - } - - loop_out: - close(client_fd); - break; - } - -done: - close(fd); - return dh_handle; -} - -static void -setup_hw_bits(void) -{ - intel_register_write(INST_PM, GEN6_GLOBAL_DEBUG_ENABLE | - GEN6_GLOBAL_DEBUG_ENABLE << 16); - old_td_ctl = intel_register_read(GEN6_TD_CTL); - intel_register_write(GEN6_TD_CTL, GEN6_TD_CTL_FORCE_TD_BKPT); -} - -int main(int argc, char* argv[]) { - struct pci_device *pci_dev; - volatile uint8_t *scratch = NULL; - int bits[64]; - int devid = -1, opt; - - while ((opt = getopt(argc, argv, "cdr:pf?h")) != -1) { - switch (opt) { - case 'c': - clear_waits = 1; - break; - case 'd': - debug = 1; - break; - case 'r': - parse_data(optarg); - exit(0); - break; - case 'p': - devid = atoi(optarg); - break; - case 'f': - force_clear = 1; - break; - case '?': - case 'h': - default: - exit(0); - } - } - - pci_dev = intel_get_pci_device(); - if (devid == -1) - devid = pci_dev->device_id; - if (identify_device(devid)) { - abort(); - } - - assert(intel_register_access_init(pci_dev, 1) == 0); - - memset(bits, -1, sizeof(bits)); - /* - * These events have to occur before the SR runs, or we need - * non-blocking versions of the functions. - */ - if (!clear_waits) { - int dh_handle; - drm_fd = drm_open_any(); - bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); - - setup_hw_bits(); - - /* We are probably root, make files world friendly */ - umask(0); - dh_handle = wait_for_scratch_bo(); - if (dh_handle == -1) { - printf("No handle from mesa, please enter manually: "); - if (fscanf(stdin, "%1d", &dh_handle) == 0) - exit(1); - } - scratch_bo = intel_bo_gem_create_from_name(bufmgr, "scratch", dh_handle); - if (scratch_bo == NULL) { - fprintf(stderr, "Couldn't flink buffer\n"); - abort(); - } - signal(SIGINT, db_shutdown); - printf("Press Ctrl-C to stop\n"); - } else { - int time = force_clear ? 0 : 20000; - while (wait_for_attn(time, bits)) { - clear_attn(bits[0]); - memset(bits, -1, sizeof(bits)); - } - die(0); - } - - scratch = map_debug_buffer(); - while (shutting_down == 0) { - int num_events, i; - - memset(bits, -1, sizeof(bits)); - num_events = wait_for_attn(-1, bits); - if (num_events == 0) - break; - - for (i = 0; i < num_events; i++) { - assert(bits[i] < 64 && bits[i] >= 0); - if (collect_data(bits[i], scratch)) { - bits[i] = -1; - continue; - } - clear_attn(bits[i]); - } - } - - die(0); - return 0; -} diff --git a/debugger/system_routine/.gitignore b/debugger/system_routine/.gitignore deleted file mode 100644 index d19500cf..00000000 --- a/debugger/system_routine/.gitignore +++ /dev/null @@ -1,10 +0,0 @@ -evict.h -eviction_macro -sr -sr.asm -sr.c -sr.cpp -tiny -tiny.asm -tiny.c -tiny.cpp diff --git a/debugger/system_routine/Makefile.am b/debugger/system_routine/Makefile.am deleted file mode 100644 index 95d8fb6f..00000000 --- a/debugger/system_routine/Makefile.am +++ /dev/null @@ -1,43 +0,0 @@ - -noinst_PROGRAMS = eviction_macro sr tiny -nodist_sr_SOURCES = sr.c -nodist_tiny_SOURCES = tiny.c - -GEN4ASM = $(top_builddir)/assembler/intel-gen4asm -GEN4ASM_FLAGS = -g6 -a -b -ASM_CPPFLAGS = \ - -x assembler-with-cpp \ - -P -DGEN_ASM -DSANDYBRIDGE \ - -I$(top_srcdir)/lib \ - -I$(builddir) - -evict.h : eviction_macro - $(builddir)/eviction_macro > evict.h - -sr.cpp : sr.g4a - $(srcdir)/pre_cpp.py $(srcdir)/sr.g4a > $@.tmp && mv $@.tmp $@ -sr.asm : sr.cpp evict.h - $(CPP) $(ASM_CPPFLAGS) -o $@ sr.cpp -sr.c: sr.asm - $(GEN4ASM) $(GEN4ASM_FLAGS) sr.asm -o $@ -sr.o : sr.c - $(CC) -c -o $@ sr.c -sr$(EXEEXT) : sr.o - $(OBJCOPY) -O binary -K gen_eu_bytes sr.o $@ - -# Test.g4a is the simplest possible system routine we can run on the GPU -# without actually hanging the system. The system routine kernel is very -# simple and doesn't depend on any external communication to run. -tiny.cpp : test.g4a - $(srcdir)/pre_cpp.py $(srcdir)/test.g4a > $@.tmp && mv $@.tmp $@ -tiny.asm : tiny.cpp - $(CPP) $(ASM_CPPFLAGS) -o $@ tiny.cpp -tiny.c: tiny.asm - $(GEN4ASM) $(GEN4ASM_FLAGS) tiny.asm -o $@ -tiny.o : tiny.c - $(CC) -c -o $@ tiny.c -tiny$(EXEEXT) : tiny.o - $(OBJCOPY) -O binary -K gen_eu_bytes tiny.o $@ - -CLEANFILES = evict.h sr.cpp sr.asm sr.c tiny.cpp tiny.asm tiny.c -EXTRA_DIST = pre_cpp.py sr.g4a test.g4a diff --git a/debugger/system_routine/eviction_macro.c b/debugger/system_routine/eviction_macro.c deleted file mode 100644 index 1da22332..00000000 --- a/debugger/system_routine/eviction_macro.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Ben Widawsky <ben@bwidawsk.net> - * - */ - -#include <stdio.h> - -#define START 0x100 -#define END ((128 << 10) / 4) - -int main(int argc, char *argv[]) { - int i; - printf("#ifdef SANDYBRIDGE\n"); - printf("#define EVICT_CACHE \\\n"); - printf("\tmov (1) m0.5:ud g0.5:ud FLAGS; \\\n"); - for (i = START; i < END - 8; i+=0x8) { - printf("\tmov (1) m0.2:ud 0x%04x:ud FLAGS; \\\n", i); - printf("\tWRITE_SCRATCH4(m0); \\\n"); - } - - printf("\tmov (1) m0.2:ud 0x%04x:ud FLAGS; \\\n", i); - printf("\tWRITE_SCRATCH4(m0)\n"); - printf("#else\n"); - printf("#define EVICT_CACHE\n"); - printf("#endif\n"); -} diff --git a/debugger/system_routine/pre_cpp.py b/debugger/system_routine/pre_cpp.py deleted file mode 100755 index 584d2af0..00000000 --- a/debugger/system_routine/pre_cpp.py +++ /dev/null @@ -1,126 +0,0 @@ -#!/usr/bin/env python3 - -# Copyright © 2011 Intel Corporation -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice (including the next -# paragraph) shall be included in all copies or substantial portions of the -# Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -# SOFTWARE. -# -# Authors: -# Ben Widawsky <ben@bwidawsk.net> - -#very limited C-like preprocessor - -#limitations: -# no macro substitutions -# no multiline definitions -# divide operator is // - -import sys,re - -# make sure both input file and stdout are handled as utf-8 text, regardless -# of current locale (eg. LANG=C which tells python to use ascii encoding) -sys.stdout = open(sys.__stdout__.fileno(), "a", encoding="utf-8") -file = open(sys.argv[1], "r", encoding="utf-8") - -lines = file.readlines() -len(lines) -out = dict() -defines = dict() - -count = 0 -#create a dict for our output -for line in lines: - out[count] = line - count = count + 1 - -#done is considered #define <name> <number> -def is_done(string): - m = re.match("#define\s+(\w+?)\s+([a-fA-F0-9\-]+?)\s*$", string) - return m - -#skip macros, the real cpp will handle it -def skip(string): - #macro - m = re.match("#define\s+\w+\(.+", string) - return m != None - -#put contants which are done being evaluated into the dictionary -def easy_constants(): - ret = 0 - for lineno, string in out.items(): - if skip(string): - continue - m = is_done(string) - if m != None: - key = m.group(1) - value = m.group(2) - if not key in defines: - defines[key] = int(eval(value)) - ret = 1 - return ret - -#replace names with dictionary values -def simple_replace(): - ret = 0 - for lineno, string in out.items(): - if skip(string): - continue - for key, value in defines.items(): - if is_done(string): - continue - s = re.subn(key, repr(value), string) - if s[1] > 0: - out[lineno] = s[0] - ret = s[1] - return ret - -#evaluate expressions to try to simplify them -def collapse_constants(): - ret = 0 - for lineno, string in out.items(): - if skip(string): - continue - if is_done(string): - continue - m = re.match("#define\s+(.+?)\s+(.+)$", string) - if m != None: - try: - out[lineno] = "#define " + m.group(1) + " " + repr(eval(m.group(2))) - ret = 1 - except NameError as ne: - #this happens before a variable is resolved in simple_replace - continue - except SyntaxError: - #this happens with something like #define foo bar, which the - #regular cpp can handle - continue - except: - raise KeyboardInterrupt - return ret; - -while True: - ret = 0 - ret += easy_constants() - ret += simple_replace() - ret += collapse_constants() - if ret == 0: - break; - -for lineno, string in out.items(): - print(string.rstrip()) diff --git a/debugger/system_routine/sr.g4a b/debugger/system_routine/sr.g4a deleted file mode 100644 index a70e7712..00000000 --- a/debugger/system_routine/sr.g4a +++ /dev/null @@ -1,277 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Ben Widawsky <ben@bwidawsk.net> - * - */ - -#include "debug.h" -#include "evict.h" - -#define CR0_0_ME_STATE_CTRL (1 << 31) -#define CR0_0_BP_SUPPRESS (1 << 15) -#define CR0_0_SPF_EN (1 << 2) -#define CR0_0_ACC_DIS (1 << 1) -#define CR0_1_BES_CTRL (1 << 31) -#define CR0_1_HALT_CTRL (1 << 30) -#define CR0_1_SOFT_EXCEPTION_CTRL (1 << 29) -#define CR0_1_ILLGL_OP_STS (1 << 28) -#define CR0_1_STACK_OVRFLW_STS (1 << 27) - -#define CR0_0_ENTRY_UNMASK (CR0_0_SPF_EN | CR0_0_ACC_DIS) -// TODO: Need to fix this for non breakpoint case -#define CR0_1_ENTRY_UNMASK ~(CR0_1_BES_CTRL) -#define CR0_0_RETURN_MASK ~(CR0_0_ME_STATE_CTRL | CR0_0_SPF_EN | CR0_0_ACC_DIS) - -// TODO: not sure how to make this not hardcoded -#define PER_THREAD_SCRATCH_SIZE (1 << 20) -#define PER_THREAD_QWORDS (PER_THREAD_SCRATCH_SIZE >> 4) - -/* Should get this from brw_defines.h */ -#define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2 -#define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3 -#define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4 -#define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 8 -#define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 - -/* desc field, ie. dword3 6.3.66.2 and 2.11.2.1.4 */ -#define SEND_MLEN_5 (5<<25) -#define SEND_MLEN_3 (3<<25) -#define SEND_MLEN_2 (2<<25) -#define SEND_MLEN_1 (1<<25) -#define SEND_RLEN_1 (1<<20) -#define SEND_RLEN_0 (0<<20) -#define SEND_HEADER_PRESENT (1<<19) -#define SEND_WRITE_COMMIT (1<<17) -#define SEND_TYPE_WRITE (GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE<<13) -#define SEND_TYPE_READ (BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ<<13) -#define SEND_BLOCK_SIZE1 (BRW_DATAPORT_OWORD_BLOCK_2_OWORDS<<8) -#define SEND_BLOCK_SIZE2 (BRW_DATAPORT_OWORD_BLOCK_4_OWORDS<<8) -#define SEND_BLOCK_SIZE4 (BRW_DATAPORT_OWORD_BLOCK_8_OWORDS<<8) -#define SEND_BINDING_TABLE (255<<0) -// No write commit -#define WRITE_DESC1_XXX SEND_BINDING_TABLE | SEND_BLOCK_SIZE1 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_2 -#define WRITE_DESC1_WC SEND_BINDING_TABLE | SEND_BLOCK_SIZE1 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_2 | SEND_WRITE_COMMIT -#define WRITE_DESC2 SEND_BINDING_TABLE | SEND_BLOCK_SIZE2 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_3 -#define WRITE_DESC4 SEND_BINDING_TABLE | SEND_BLOCK_SIZE4 | SEND_TYPE_WRITE | SEND_HEADER_PRESENT | SEND_MLEN_5 -#define RECV_DESC1 SEND_BINDING_TABLE | SEND_BLOCK_SIZE1 | SEND_TYPE_READ | SEND_HEADER_PRESENT | SEND_MLEN_1 | SEND_RLEN_1 -//#define SEND_DESC1 0x40902FF -#define SEND_DESC1_WC 0x40b02FF - -/* ex_desc field 6.3.66.2 */ -#define SEND_DP_RENDER_CACHE (5<<0) -#define SEND_EOT (1<<5) -#define SEND_EX_DESC SEND_DP_RENDER_CACHE - -/** - * WRITE_SCRATCH1 - Write 2 owords. - * cdst.2 - offset - * cdst.5 - per thread scratch base, relative to gsba?? - * cdst+1 - data to be written. - */ -#define WRITE_SCRATCH1(cdst) \ - send (16) null cdst SEND_EX_DESC WRITE_DESC1_XXX FLAGS -#define WRITE_SCRATCH1_WC(cdst) \ - send (16) g1 cdst SEND_EX_DESC WRITE_DESC1_WC FLAGS -#define WRITE_SCRATCH2(cdst) \ - send (16) null cdst SEND_EX_DESC WRITE_DESC2 FLAGS -#define WRITE_SCRATCH4(cdst) \ - send (16) null cdst SEND_EX_DESC WRITE_DESC4 FLAGS - -/** - * READ_SCRATCH1 - Read 2 owords. - * cdst.2 - offset - * cdst.5 - per thread scratch base, relative to gsba?? - * grf - register where read data is populated. - */ -#define READ_SCRATCH1(grf, cdst) \ - send (16) grf:ud cdst SEND_EX_DESC RECV_DESC1 FLAGS - -/** - * SET_OFFSET - setup mrf for the given offset prior to a send instruction. - * mrf - message register to be used as the header. - * offset - offset. - * - * If a WRITE_SCRATCH follows, mrf+1 -> mrf+1+n should contain the data to be - * written. - */ -#define SET_OFFSET(mrf, offset) \ - mov (1) mrf.5:ud g0.5:ud FLAGS; \ - mov (1) mrf.2:ud offset:ud FLAGS - -/** - * SAVE_CRF - save the control register - * clobbers: m0.2, m0.5 - */ -#define CR_OFFSET 0x40 -#define SAVE_CRF \ - SET_OFFSET(m0, CR_OFFSET); \ - mov (8) m1:ud 0xdeadbeef:ud FLAGS; \ - mov (1) m1.0:ud cr0.0 FLAGS; \ - mov (1) m1.1:ud cr0.1 FLAGS; \ - mov (1) m1.2:ud cr0.2 FLAGS; \ - mov (1) m1.3:ud sr0:ud FLAGS; \ - WRITE_SCRATCH1(m0) - -/* - * clobbers: m0.2, m0.5 - */ -#define STORE_GRF(grf, offset) \ - SET_OFFSET(m0, offset); \ - mov (8) m1:ud grf:ud FLAGS; \ - WRITE_SCRATCH1(m0) - -/* - * clobbers: m0.2, m0.5 - */ -#define LOAD_GRF(grf, offset) \ - SET_OFFSET(m0, offset); \ - READ_SCRATCH1(grf, m0) - -/* - * clobbers: mrf.2 mrf.5 - */ -#define STORE_MRF(mrf, offset) \ - SET_OFFSET(mrf, offset); \ - WRITE_SCRATCH1(mrf) - -/* - * non-quirky semantics, unlike STORE_MRF - * clobbers: g1 - */ -#define LOAD_MRF(mrf, offset) \ - LOAD_GRF(g1, offset); \ - mov (8) mrf:ud g1:ud FLAGS - -#define SAVE_ALL_MRF \ - /* m1 is saved already */ \ - STORE_MRF(m1, 0x2); \ - STORE_MRF(m2, 0x4); \ - STORE_MRF(m3, 0x6); \ - STORE_MRF(m4, 0x8); \ - STORE_MRF(m5, 0xa); \ - STORE_MRF(m6, 0xc); \ - STORE_MRF(m7, 0xe); \ - STORE_MRF(m8, 0x10); \ - STORE_MRF(m9, 0x12); \ - STORE_MRF(m10, 0x14); \ - STORE_MRF(m11, 0x16); \ - STORE_MRF(m12, 0x18); \ - STORE_MRF(m13, 0x1a); \ - STORE_MRF(m14, 0x1c) - -#define RESTORE_ALL_MRF \ - LOAD_MRF(m15, 0x1c); \ - LOAD_MRF(m14, 0x1a); \ - LOAD_MRF(m13, 0x18); \ - LOAD_MRF(m12, 0x16); \ - LOAD_MRF(m11, 0x14); \ - LOAD_MRF(m10, 0x12); \ - LOAD_MRF(m9, 0x10); \ - LOAD_MRF(m8, 0xe); \ - LOAD_MRF(m7, 0xc); \ - LOAD_MRF(m6, 0xa); \ - LOAD_MRF(m5, 0x8); \ - LOAD_MRF(m4, 0x6); \ - LOAD_MRF(m3, 0x4); \ - LOAD_MRF(m2, 0x2); \ - LOAD_MRF(m1, 0x0) - -#ifndef SANDYBRIDGE - #error Only SandyBridge is supported -#endif - -/* Default flags for an instruction */ -#define FLAGS { ALIGN1, SWITCH, MASK_DISABLE, ACCWRCTRL} - -/* - * We can clobber m0, and g0.4, everything else must be saved. - */ -Enter: - nop; - - or (1) cr0.0 cr0.0 CR0_0_ENTRY_UNMASK:ud FLAGS; - - /* - * g0.5 has the per thread scratch space when running in FS or VS. - * If we don't have a valid g0.5, we can calculate a per thread scratch offset - * using the system registers. The problem is we do not have a good way to know - * the offset from GSBA. The system routine will have to be hardcoded or - * dynamically patched with the correct offset. - * TID is in sr0.0[2:0] - * EUID is in sr0.0[11:8] - */ - -#ifdef GPGPU - mov (1) g0.4:ud 0:ud FLAGS; -#if 0 - /* This should work according to the docs, the add blows up */ - shr (1) g0.8:uw sr0.0:uw 5 FLAGS; - add (1) g0.16:ub gr0.16:ub sr0.0:ub FLAGS; -#else - shr (1) g0.8:uw sr0.0:uw 5 FLAGS; - mov (1) g0.9:uw sr0.0:uw FLAGS; - and (1) g0.9:uw g0.9:uw 0x7:uw FLAGS; - add (1) g0.8:uw g0.8:uw g0.9:uw FLAGS; - mov (1) g0.9:uw 0:uw FLAGS; - mul (1) g0.4:ud g0.4:ud PER_THREAD_QWORDS FLAGS; -#endif -#endif - - mov (8) m0:ud 0:ud FLAGS; - - /* Saves must occur in order so as not to clobber the next register */ - STORE_MRF(m0, 0); - STORE_GRF(g0, 0x20); - STORE_GRF(g1, 0x22); - SAVE_ALL_MRF; - - mov (8) g1:ud STATE_EU_MSG:ud FLAGS; - STORE_GRF(g1, STATE_QWORD); - - mov (8) g1:ud DEBUG_PROTOCOL_VERSION:ud FLAGS; - STORE_GRF(g1, COMMUNICATION_QWORD); - - SAVE_CRF; - - EVICT_CACHE; - wait n1:ud; - EVICT_CACHE; - - /* Using this to try to keep coherency */ - LOAD_GRF(g1, CR_OFFSET); - LOAD_GRF(g1, COMMUNICATION_QWORD); - LOAD_GRF(g1, STATE_QWORD); - - RESTORE_ALL_MRF; - LOAD_GRF(g1, 0x22); - LOAD_GRF(g0, 0x20); - - /* Clear breakpoint status */ - and (1) cr0.1 cr0.1 CR0_1_ENTRY_UNMASK:ud FLAGS; - - /* set breakpoint suppress this should be conditional on bes */ - or (1) cr0.0 cr0.0 CR0_0_BP_SUPPRESS:ud FLAGS; - - and (1) cr0.0 cr0.0 CR0_0_RETURN_MASK:ud FLAGS; - nop; diff --git a/debugger/system_routine/test.g4a b/debugger/system_routine/test.g4a deleted file mode 100644 index e4296e01..00000000 --- a/debugger/system_routine/test.g4a +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Ben Widawsky <ben@bwidawsk.net> - * - */ - -#include "debug.h" - -#define CR0_0_ME_STATE_CTRL (1 << 31) -#define CR0_0_BP_SUPPRESS (1 << 15) -#define CR0_0_SPF_EN (1 << 2) -#define CR0_0_ACC_DIS (1 << 1) -#define CR0_1_BES_CTRL (1 << 31) -#define CR0_1_HALT_CTRL (1 << 30) -#define CR0_1_SOFT_EXCEPTION_CTRL (1 << 29) -#define CR0_1_ILLGL_OP_STS (1 << 28) -#define CR0_1_STACK_OVRFLW_STS (1 << 27) - -#define CR0_0_ENTRY_UNMASK (CR0_0_SPF_EN | CR0_0_ACC_DIS) -// TODO: Need to fix this for non breakpoint case -#define CR0_1_ENTRY_UNMASK ~(CR0_1_BES_CTRL) -#define CR0_0_RETURN_MASK ~(CR0_0_ME_STATE_CTRL | CR0_0_SPF_EN | CR0_0_ACC_DIS) - -#ifndef SANDYBRIDGE - #error Only SandyBridge is supported -#endif - -/* Default flags for an instruction */ -#define FLAGS { ALIGN1, SWITCH, MASK_DISABLE, ACCWRCTRL} - -Enter: - nop; - - or (1) cr0.0 cr0.0 CR0_0_ENTRY_UNMASK:ud FLAGS; - - /* Clear breakpoint status */ - and (1) cr0.1 cr0.1 CR0_1_ENTRY_UNMASK:ud FLAGS; - - /* set breakpoint suppress this should be conditional on bes */ - or (1) cr0.0 cr0.0 CR0_0_BP_SUPPRESS:ud FLAGS; - - and (1) cr0.0 cr0.0 CR0_0_RETURN_MASK:ud FLAGS; - nop; diff --git a/demos/.gitignore b/demos/.gitignore deleted file mode 100644 index cd80b0b5..00000000 --- a/demos/.gitignore +++ /dev/null @@ -1 +0,0 @@ -intel_sprite_on diff --git a/demos/Android.mk b/demos/Android.mk deleted file mode 100644 index 7d06c9af..00000000 --- a/demos/Android.mk +++ /dev/null @@ -1,28 +0,0 @@ -LOCAL_PATH := $(call my-dir) - -#================# - -include $(CLEAR_VARS) - -LOCAL_SRC_FILES := intel_sprite_on.c - - -LOCAL_CFLAGS += -DHAVE_TERMIOS_H -LOCAL_CFLAGS += -DANDROID -UNDEBUG -LOCAL_CFLAGS += -std=gnu99 -# Excessive complaining for established cases. Rely on the Linux version warnings. -LOCAL_CFLAGS += -Wno-sign-compare - -LOCAL_C_INCLUDES = $(LOCAL_PATH)/../lib - -LOCAL_MODULE := intel_sprite_on - -LOCAL_MODULE_TAGS := optional - -LOCAL_STATIC_LIBRARIES := libintel_gpu_tools - -LOCAL_SHARED_LIBRARIES := libdrm - -include $(BUILD_EXECUTABLE) - -#================# diff --git a/demos/Makefile.am b/demos/Makefile.am deleted file mode 100644 index 49804d79..00000000 --- a/demos/Makefile.am +++ /dev/null @@ -1,7 +0,0 @@ -bin_PROGRAMS = \ - intel_sprite_on \ - $(NULL) - -AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib -AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS) -LDADD = $(top_builddir)/lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS) diff --git a/demos/intel_sprite_on.c b/demos/intel_sprite_on.c deleted file mode 100644 index 23fc56c9..00000000 --- a/demos/intel_sprite_on.c +++ /dev/null @@ -1,953 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * - * Author: - * Armin Reese <armin.c.reese@intel.com> - */ - -/* - * This program is intended for testing sprite functionality. - */ -#include <assert.h> -#include <errno.h> -#include <math.h> -#include <stdint.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <unistd.h> -#include <termios.h> -#include <sys/time.h> -#include <sys/poll.h> -#include <sys/time.h> -#include <sys/mman.h> -#include <sys/ioctl.h> - -#include "i915_drm.h" -#include "drmtest.h" -#include "igt_kms.h" - -#include "ioctl_wrappers.h" - -/* - * Mode setting with the kernel interfaces is a bit of a chore. - * First you have to find the connector in question and make sure the - * requested mode is available. - * Then you need to find the encoder attached to that connector so you - * can bind it with a free crtc. - */ -struct connector { - uint32_t id; - int mode_valid; - drmModeModeInfo mode; - drmModeEncoder *encoder; - drmModeConnector *connector; - int crtc; - int pipe; -}; - -static void dump_mode(drmModeModeInfo *mode) -{ - printf(" %s %d %d %d %d %d %d %d %d %d 0x%x 0x%x %d\n", - mode->name, - mode->vrefresh, - mode->hdisplay, - mode->hsync_start, - mode->hsync_end, - mode->htotal, - mode->vdisplay, - mode->vsync_start, - mode->vsync_end, - mode->vtotal, - mode->flags, - mode->type, - mode->clock); -} - -static void dump_connectors(int gfx_fd, drmModeRes *resources) -{ - int i, j; - - printf("Connectors:\n"); - printf("id\tencoder\tstatus\t\ttype\tsize (mm)\tmodes\n"); - for (i = 0; i < resources->count_connectors; i++) { - drmModeConnector *connector; - - connector = drmModeGetConnector(gfx_fd, resources->connectors[i]); - if (!connector) { - printf("could not get connector %i: %s\n", - resources->connectors[i], strerror(errno)); - continue; - } - - printf("%d\t%d\t%s\t%s\t%dx%d\t\t%d\n", - connector->connector_id, - connector->encoder_id, - kmstest_connector_status_str(connector->connection), - kmstest_connector_type_str(connector->connector_type), - connector->mmWidth, connector->mmHeight, - connector->count_modes); - - if (!connector->count_modes) - continue; - - printf(" modes:\n"); - printf(" name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot flags type clock\n"); - for (j = 0; j < connector->count_modes; j++) - dump_mode(&connector->modes[j]); - - drmModeFreeConnector(connector); - } - printf("\n"); -} - -static void dump_crtcs(int gfx_fd, drmModeRes *resources) -{ - int i; - - printf("CRTCs:\n"); - printf("id\tfb\tpos\tsize\n"); - for (i = 0; i < resources->count_crtcs; i++) { - drmModeCrtc *crtc; - - crtc = drmModeGetCrtc(gfx_fd, resources->crtcs[i]); - if (!crtc) { - printf("could not get crtc %i: %s\n", - resources->crtcs[i], - strerror(errno)); - continue; - } - printf("%d\t%d\t(%d,%d)\t(%dx%d)\n", - crtc->crtc_id, - crtc->buffer_id, - crtc->x, crtc->y, - crtc->width, crtc->height); - dump_mode(&crtc->mode); - - drmModeFreeCrtc(crtc); - } - printf("\n"); -} - -static void dump_planes(int gfx_fd, drmModeRes *resources) -{ - drmModePlaneRes *plane_resources; - drmModePlane *ovr; - int i; - - plane_resources = drmModeGetPlaneResources(gfx_fd); - if (!plane_resources) { - printf("drmModeGetPlaneResources failed: %s\n", - strerror(errno)); - return; - } - - printf("Planes:\n"); - printf("id\tcrtc\tfb\tCRTC x,y\tx,y\tgamma size\n"); - for (i = 0; i < plane_resources->count_planes; i++) { - ovr = drmModeGetPlane(gfx_fd, plane_resources->planes[i]); - if (!ovr) { - printf("drmModeGetPlane failed: %s\n", - strerror(errno)); - continue; - } - - printf("%d\t%d\t%d\t%d,%d\t\t%d,%d\t%d\n", - ovr->plane_id, ovr->crtc_id, ovr->fb_id, - ovr->crtc_x, ovr->crtc_y, ovr->x, ovr->y, - ovr->gamma_size); - - drmModeFreePlane(ovr); - } - printf("\n"); - - return; -} - -static void connector_find_preferred_mode(int gfx_fd, - drmModeRes *gfx_resources, - struct connector *c) -{ - drmModeConnector *connector; - drmModeEncoder *encoder = NULL; - int i, j; - - /* First, find the connector & mode */ - c->mode_valid = 0; - connector = drmModeGetConnector(gfx_fd, c->id); - if (!connector) { - printf("could not get connector %d: %s\n", - c->id, - strerror(errno)); - drmModeFreeConnector(connector); - return; - } - - if (connector->connection != DRM_MODE_CONNECTED) { - drmModeFreeConnector(connector); - return; - } - - if (!connector->count_modes) { - printf("connector %d has no modes\n", - c->id); - drmModeFreeConnector(connector); - return; - } - - if (connector->connector_id != c->id) { - printf("connector id doesn't match (%d != %d)\n", - connector->connector_id, - c->id); - drmModeFreeConnector(connector); - return; - } - - for (j = 0; j < connector->count_modes; j++) { - c->mode = connector->modes[j]; - if (c->mode.type & DRM_MODE_TYPE_PREFERRED) { - c->mode_valid = 1; - break; - } - } - - if (!c->mode_valid) { - if (connector->count_modes > 0) { - /* use the first mode as test mode */ - c->mode = connector->modes[0]; - c->mode_valid = 1; - } else { - printf("failed to find any modes on connector %d\n", - c->id); - return; - } - } - - /* Now get the encoder */ - for (i = 0; i < connector->count_encoders; i++) { - encoder = drmModeGetEncoder(gfx_fd, connector->encoders[i]); - - if (!encoder) { - printf("could not get encoder %i: %s\n", - gfx_resources->encoders[i], - strerror(errno)); - drmModeFreeEncoder(encoder); - continue; - } - - break; - } - - c->encoder = encoder; - - if (i == gfx_resources->count_encoders) { - printf("failed to find encoder\n"); - c->mode_valid = 0; - return; - } - - /* Find first CRTC not in use */ - for (i = 0; i < gfx_resources->count_crtcs; i++) { - if (gfx_resources->crtcs[i] && (c->encoder->possible_crtcs & (1<<i))) - break; - } - c->crtc = gfx_resources->crtcs[i]; - c->pipe = i; - - gfx_resources->crtcs[i] = 0; - - c->connector = connector; -} - -static int connector_find_plane(int gfx_fd, struct connector *c, - unsigned int **sprite_plane_id) -{ - drmModePlaneRes *plane_resources; - drmModePlane *ovr; - int i, sprite_plane_count = 0; - - plane_resources = drmModeGetPlaneResources(gfx_fd); - if (!plane_resources) { - printf("drmModeGetPlaneResources failed: %s\n", - strerror(errno)); - return 0; - } - - /* Allocating buffer to hold sprite plane ids of the - * current connector. - */ - *sprite_plane_id = (unsigned int *) malloc(plane_resources->count_planes * - sizeof(unsigned int)); - - for (i = 0; i < plane_resources->count_planes; i++) { - ovr = drmModeGetPlane(gfx_fd, plane_resources->planes[i]); - if (!ovr) { - printf("drmModeGetPlane failed: %s\n", - strerror(errno)); - continue; - } - /* Add the available sprite id to the buffer sprite_plane_id. - */ - if (ovr->possible_crtcs & (1 << c->pipe)) { - (*sprite_plane_id)[sprite_plane_count++] = ovr->plane_id; - } - drmModeFreePlane(ovr); - } - - return sprite_plane_count; -} - -static int prepare_primary_surface(int fd, int prim_width, int prim_height, - uint32_t *prim_handle, uint32_t *prim_stride, - uint32_t *prim_size, int tiled) -{ - uint32_t bytes_per_pixel = sizeof(uint32_t); - uint32_t *prim_fb_ptr; - - if (bytes_per_pixel != sizeof(uint32_t)) { - printf("Bad bytes_per_pixel for primary surface: %d\n", - bytes_per_pixel); - return -EINVAL; - } - - if (tiled) { - int v; - - /* Round the tiling up to the next power-of-two and the - * region up to the next pot fence size so that this works - * on all generations. - * - * This can still fail if the framebuffer is too large to - * be tiled. But then that failure is expected. - */ - - v = prim_width * bytes_per_pixel; - for (*prim_stride = 512; *prim_stride < v; *prim_stride *= 2) - ; - - v = *prim_stride * prim_height; - for (*prim_size = 1024*1024; *prim_size < v; *prim_size *= 2) - ; - } else { - /* Scan-out has a 64 byte alignment restriction */ - *prim_stride = (prim_width * bytes_per_pixel + 63) & ~63; - *prim_size = *prim_stride * prim_height; - } - - *prim_handle = gem_create(fd, *prim_size); - - if (tiled) - gem_set_tiling(fd, *prim_handle, I915_TILING_X, *prim_stride); - - prim_fb_ptr = gem_mmap(fd, *prim_handle, *prim_size, PROT_READ | PROT_WRITE); - - if (prim_fb_ptr != NULL) { - // Write primary surface with gray background - memset(prim_fb_ptr, 0x3f, *prim_size); - munmap(prim_fb_ptr, *prim_size); - } - - return 0; -} - -static void fill_sprite(int sprite_width, int sprite_height, int sprite_stride, - int sprite_index, void *sprite_fb_ptr) -{ - __u32 *pLinePat0, - *pLinePat1, - *pLinePtr; - int i, - line; - int stripe_width; - - stripe_width = ((sprite_width > 64) && - (sprite_height > 64)) ? (sprite_index + 1) * 8 : - (sprite_index + 1) * 2; - - // Note: sprite_stride is in bytes. pLinePat0 and pLinePat1 - // are both __u32 pointers - pLinePat0 = sprite_fb_ptr; - pLinePat1 = pLinePat0 + (stripe_width * (sprite_stride / sizeof(*pLinePat0))); - - for (i = 0; i < sprite_width; i++) { - *(pLinePat0 + i) = ((i / stripe_width) & 0x1) ? 0 : ~0; - *(pLinePat1 + i) = ~(*(pLinePat0 + i)); - } - - for (line = 1; line < sprite_height; line++) { - if (line == stripe_width) { - continue; - } - - pLinePtr = ((line / stripe_width) & 0x1) ? pLinePat1 : pLinePat0; - memcpy( pLinePat0 + ((sprite_stride / sizeof(*pLinePat0)) * line), - pLinePtr, - sprite_width * sizeof(*pLinePat0)); - } - - return; -} - -static int prepare_sprite_surfaces(int fd, int sprite_width, int sprite_height, - uint32_t num_surfaces, uint32_t *sprite_handles, - uint32_t *sprite_stride, uint32_t *sprite_size, - int tiled) -{ - uint32_t bytes_per_pixel = sizeof(uint32_t); - uint32_t *sprite_fb_ptr; - int i; - - if (bytes_per_pixel != sizeof(uint32_t)) { - printf("Bad bytes_per_pixel for sprite: %d\n", bytes_per_pixel); - return -EINVAL; - } - - if (tiled) { - int v; - - /* Round the tiling up to the next power-of-two and the - * region up to the next pot fence size so that this works - * on all generations. - * - * This can still fail if the framebuffer is too large to - * be tiled. But then that failure is expected. - */ - - v = sprite_width * bytes_per_pixel; - for (*sprite_stride = 512; *sprite_stride < v; *sprite_stride *= 2) - ; - - v = *sprite_stride * sprite_height; - for (*sprite_size = 1024*1024; *sprite_size < v; *sprite_size *= 2) - ; - } else { - /* Scan-out has a 64 byte alignment restriction */ - *sprite_stride = (sprite_width * bytes_per_pixel + 63) & ~63; - *sprite_size = *sprite_stride * sprite_height; - } - - for (i = 0; i < num_surfaces; i++) { - // Create the sprite surface - sprite_handles[i] = gem_create(fd, *sprite_size); - - if (tiled) - gem_set_tiling(fd, sprite_handles[i], I915_TILING_X, *sprite_stride); - - // Get pointer to the surface - sprite_fb_ptr = gem_mmap(fd, - sprite_handles[i], *sprite_size, - PROT_READ | PROT_WRITE); - - if (sprite_fb_ptr != NULL) { - // Fill with checkerboard pattern - fill_sprite(sprite_width, sprite_height, *sprite_stride, i, sprite_fb_ptr); - - munmap(sprite_fb_ptr, *sprite_size); - } else { - i--; - while (i >= 0) { - gem_close(fd, sprite_handles[i]); - i--; - } - } - } - - return 0; -} - -static void ricochet(int tiled, int sprite_w, int sprite_h, - int out_w, int out_h, int dump_info) -{ - int ret; - int gfx_fd; - int keep_moving; - const int num_surfaces = 3; - uint32_t sprite_handles[num_surfaces]; - uint32_t sprite_fb_id[num_surfaces]; - int *sprite_x = NULL; - int *sprite_y = NULL; - uint32_t sprite_stride; - uint32_t sprite_size; - uint32_t handles[4], - pitches[4], - offsets[4]; /* we only use [0] */ - uint32_t prim_width, - prim_height, - prim_handle, - prim_stride, - prim_size, - prim_fb_id; - struct drm_intel_sprite_colorkey set; - struct connector curr_connector; - drmModeRes *gfx_resources; - struct termios orig_term, - curr_term; - int c_index; - int sprite_index; - unsigned int *sprite_plane_id = NULL; - uint32_t plane_flags = 0; - int *delta_x = NULL, - *delta_y = NULL; - struct timeval stTimeVal; - long long currTime, - prevFlipTime, - prevMoveTime, - deltaFlipTime, - deltaMoveTime, - SleepTime; - char key; - int sprite_plane_count = 0; - int i; - // Open up I915 graphics device - gfx_fd = drmOpen("i915", NULL); - if (gfx_fd < 0) { - printf("Failed to load i915 driver: %s\n", strerror(errno)); - return; - } - - // Obtain pointer to struct containing graphics resources - gfx_resources = drmModeGetResources(gfx_fd); - if (!gfx_resources) { - printf("drmModeGetResources failed: %s\n", strerror(errno)); - return; - } - - if (dump_info != 0) { - dump_connectors(gfx_fd, gfx_resources); - dump_crtcs(gfx_fd, gfx_resources); - dump_planes(gfx_fd, gfx_resources); - } - - // Save previous terminal settings - if (tcgetattr( 0, &orig_term) != 0) { - printf("tcgetattr failure: %s\n", - strerror(errno)); - return; - } - - // Set up input to return characters immediately - curr_term = orig_term; - curr_term.c_lflag &= ~(ICANON | ECHO | ECHONL); - curr_term.c_cc[VMIN] = 0; // No minimum number of characters - curr_term.c_cc[VTIME] = 0 ; // Return immediately, even if - // nothing has been entered. - if (tcsetattr( 0, TCSANOW, &curr_term) != 0) { - printf("tcgetattr failure: %s\n", strerror(errno)); - return; - } - - // Cycle through all connectors and display the flying sprite - // where there are displays attached and the hardware will support it. - for (c_index = 0; c_index < gfx_resources->count_connectors; c_index++) { - curr_connector.id = gfx_resources->connectors[c_index]; - - // Find the native (preferred) display mode - connector_find_preferred_mode(gfx_fd, gfx_resources, &curr_connector); - if (curr_connector.mode_valid == 0) { - printf("No valid preferred mode detected\n"); - goto out; - } - - // Determine if sprite hardware is available on pipe - // associated with this connector. - sprite_plane_count = connector_find_plane(gfx_fd, &curr_connector, - &sprite_plane_id); - if (!sprite_plane_count) { - printf("Failed to find sprite plane on crtc\n"); - goto out; - } - - // Width and height of preferred mode - prim_width = curr_connector.mode.hdisplay; - prim_height = curr_connector.mode.vdisplay; - - // Allocate and fill memory for primary surface - ret = prepare_primary_surface( - gfx_fd, - prim_width, - prim_height, - &prim_handle, - &prim_stride, - &prim_size, - tiled); - if (ret != 0) { - printf("Failed to add primary fb (%dx%d): %s\n", - prim_width, prim_height, strerror(errno)); - goto out; - } - - // Add the primary surface framebuffer - ret = drmModeAddFB(gfx_fd, prim_width, prim_height, 24, 32, - prim_stride, prim_handle, &prim_fb_id); - gem_close(gfx_fd, prim_handle); - - if (ret != 0) { - printf("Failed to add primary fb (%dx%d): %s\n", - prim_width, prim_height, strerror(errno)); - goto out; - } - - // Allocate and fill sprite surfaces - ret = prepare_sprite_surfaces(gfx_fd, sprite_w, sprite_h, num_surfaces, - &sprite_handles[0], - &sprite_stride, &sprite_size, - tiled); - if (ret != 0) { - printf("Preparation of sprite surfaces failed %dx%d\n", - sprite_w, sprite_h); - goto out; - } - - // Add the sprite framebuffers - for (sprite_index = 0; sprite_index < num_surfaces; sprite_index++) { - handles[0] = sprite_handles[sprite_index]; - handles[1] = handles[0]; - handles[2] = handles[0]; - handles[3] = handles[0]; - pitches[0] = sprite_stride; - pitches[1] = sprite_stride; - pitches[2] = sprite_stride; - pitches[3] = sprite_stride; - memset(offsets, 0, sizeof(offsets)); - - ret = drmModeAddFB2(gfx_fd, sprite_w, sprite_h, - DRM_FORMAT_XRGB8888, - handles, pitches, offsets, - &sprite_fb_id[sprite_index], plane_flags); - gem_close(gfx_fd, sprite_handles[sprite_index]); - - if (ret) { - printf("Failed to add sprite fb (%dx%d): %s\n", - sprite_w, sprite_h, strerror(errno)); - - sprite_index--; - while (sprite_index >= 0) { - drmModeRmFB(gfx_fd, sprite_fb_id[sprite_index]); - sprite_index--; - } - goto out; - } - } - - if (dump_info != 0) { - printf("Displayed Mode Connector struct:\n" - " .id = %d\n" - " .mode_valid = %d\n" - " .crtc = %d\n" - " .pipe = %d\n" - " drmModeModeInfo ...\n" - " .name = %s\n" - " .type = %d\n" - " .flags = %08x\n" - " drmModeEncoder ...\n" - " .encoder_id = %d\n" - " .encoder_type = %d (%s)\n" - " .crtc_id = %d\n" - " .possible_crtcs = %d\n" - " .possible_clones = %d\n" - " drmModeConnector ...\n" - " .connector_id = %d\n" - " .encoder_id = %d\n" - " .connector_type = %d (%s)\n" - " .connector_type_id = %d\n\n", - curr_connector.id, - curr_connector.mode_valid, - curr_connector.crtc, - curr_connector.pipe, - curr_connector.mode.name, - curr_connector.mode.type, - curr_connector.mode.flags, - curr_connector.encoder->encoder_id, - curr_connector.encoder->encoder_type, - kmstest_encoder_type_str(curr_connector.encoder->encoder_type), - curr_connector.encoder->crtc_id, - curr_connector.encoder->possible_crtcs, - curr_connector.encoder->possible_clones, - curr_connector.connector->connector_id, - curr_connector.connector->encoder_id, - curr_connector.connector->connector_type, - kmstest_connector_type_str(curr_connector.connector->connector_type), - curr_connector.connector->connector_type_id); - - printf("Sprite surface dimensions = %dx%d\n" - "Sprite output dimensions = %dx%d\n" - "Press any key to continue >\n", - sprite_w, sprite_h, out_w, out_h); - - // Wait for a key-press - while( read(0, &key, 1) == 0); - // Purge unread characters - tcflush(0, TCIFLUSH); - } - - // Set up the primary display mode - ret = drmModeSetCrtc(gfx_fd, curr_connector.crtc, prim_fb_id, - 0, 0, &curr_connector.id, 1, &curr_connector.mode); - if (ret != 0) { - printf("Failed to set mode (%dx%d@%dHz): %s\n", - prim_width, prim_height, curr_connector.mode.vrefresh, - strerror(errno)); - continue; - } - - // Set the sprite colorkey state - for(i = 0; i < sprite_plane_count; i++) { - set.plane_id = sprite_plane_id[i]; - set.min_value = 0; - set.max_value = 0; - set.flags = I915_SET_COLORKEY_NONE; - ret = drmCommandWrite(gfx_fd, DRM_I915_SET_SPRITE_COLORKEY, &set, - sizeof(set)); - assert(ret == 0); - } - - // Set up sprite output dimensions, initial position, etc. - if (out_w > prim_width / 2) - out_w = prim_width / 2; - if (out_h > prim_height / 2) - out_h = prim_height / 2; - - delta_x = (int *) malloc(sprite_plane_count * sizeof(int)); - delta_y = (int *) malloc(sprite_plane_count * sizeof(int)); - sprite_x = (int *) malloc(sprite_plane_count * sizeof(int)); - sprite_y = (int *) malloc(sprite_plane_count * sizeof(int)); - - /* Initializing the coordinates (x,y) of the available sprites on the - * connector, equally spaced along the diagonal of the rectangle - * {(0,0),(prim_width/2, prim_height/2)}. - */ - for(i = 0; i < sprite_plane_count; i++) { - delta_x[i] = 3; - delta_y[i] = 4; - sprite_x[i] = i * (prim_width / (2 * sprite_plane_count)); - sprite_y[i] = i * (prim_height / (2 * sprite_plane_count)); - } - - currTime = 0; - prevFlipTime = 0; // Will force immediate sprite flip - prevMoveTime = 0; // Will force immediate sprite move - deltaFlipTime = 500000; // Flip sprite surface every 1/2 second - deltaMoveTime = 100000; // Move sprite every 100 ms - sprite_index = num_surfaces - 1; - keep_moving = 1; - - // Bounce sprite off the walls - while (keep_moving) { - // Obtain system time in usec. - if (gettimeofday( &stTimeVal, NULL ) != 0) - printf("gettimeofday error: %s\n", strerror(errno)); - else - currTime = ((long long)stTimeVal.tv_sec * 1000000) + stTimeVal.tv_usec; - - // Check if it's time to flip the sprite surface - if (currTime - prevFlipTime > deltaFlipTime) { - sprite_index = (sprite_index + 1) % num_surfaces; - - prevFlipTime = currTime; - } - - // Move the sprite on the screen and flip - // the surface if the index has changed - // NB: sprite_w and sprite_h must be 16.16 fixed point, herego << 16 - for(i = 0; i < sprite_plane_count; i++) { - if (drmModeSetPlane(gfx_fd, sprite_plane_id[i], - curr_connector.crtc, - sprite_fb_id[sprite_index], - plane_flags, - sprite_x[i], sprite_y[i], - out_w, out_h, - 0, 0, - sprite_w << 16, sprite_h << 16)) - printf("Failed to enable sprite plane: %s\n", - strerror(errno)); - } - - // Check if it's time to move the sprite surface - if (currTime - prevMoveTime > deltaMoveTime) { - - // Compute the next position for sprite - for(i = 0; i < sprite_plane_count; i++) { - sprite_x[i] += delta_x[i]; - sprite_y[i] += delta_y[i]; - if (sprite_x[i] < 0) { - sprite_x[i] = 0; - delta_x[i] = -delta_x[i]; - } - else if (sprite_x[i] > prim_width - out_w) { - sprite_x[i] = prim_width - out_w; - delta_x[i] = -delta_x[i]; - } - - if (sprite_y[i] < 0) { - sprite_y[i] = 0; - delta_y[i] = -delta_y[i]; - } - else if (sprite_y[i] > prim_height - out_h) { - sprite_y[i] = prim_height - out_h; - delta_y[i] = -delta_y[i]; - } - } - prevMoveTime = currTime; - } - - // Fetch a key from input (non-blocking) - if (read(0, &key, 1) == 1) { - switch (key) { - case 'q': // Kill the program - case 'Q': - goto out; - break; - case 's': // Slow down sprite movement; - deltaMoveTime = (deltaMoveTime * 100) / 90; - if (deltaMoveTime > 800000) { - deltaMoveTime = 800000; - } - break; - case 'S': // Speed up sprite movement; - deltaMoveTime = (deltaMoveTime * 100) / 110; - if (deltaMoveTime < 2000) { - deltaMoveTime = 2000; - } - break; - case 'f': // Slow down sprite flipping; - deltaFlipTime = (deltaFlipTime * 100) / 90; - if (deltaFlipTime > 1000000) - deltaFlipTime = 1000000; - break; - case 'F': // Speed up sprite flipping; - deltaFlipTime = (deltaFlipTime * 100) / 110; - if (deltaFlipTime < 20000) - deltaFlipTime = 20000; - break; - case 'n': // Next connector - case 'N': - keep_moving = 0; - break; - default: - break; - } - - // Purge unread characters - tcflush(0, TCIFLUSH); - } - - // Wait for min of flip or move deltas - SleepTime = (deltaFlipTime < deltaMoveTime) ? - deltaFlipTime : deltaMoveTime; - usleep(SleepTime); - } - - free(sprite_plane_id); - free(sprite_x); - free(sprite_y); - free(delta_x); - free(delta_y); - sprite_plane_id = NULL; - sprite_plane_count = 0; - sprite_x = sprite_y = delta_x = delta_y = NULL; - } - -out: - // Purge unread characters - tcflush(0, TCIFLUSH); - // Restore previous terminal settings - if (tcsetattr( 0, TCSANOW, &orig_term) != 0) { - printf("tcgetattr failure: %s\n", strerror(errno)); - return; - } - - drmModeFreeResources(gfx_resources); -} - -static void usage(char *name) -{ - printf("usage: %s -s <plane width>x<plane height> [-dhto]\n" - "\t-d\t[optional] dump mode information\n" - "\t-h\t[optional] output help message\n" - "\t-t\t[optional] enable tiling\n" - "\t-o\t[optional] <output rect width>x<output rect height>\n\n" - "Keyboard control for sprite movement and flip rate ...\n" - "\t'q' or 'Q' - Quit the program\n" - "\t'n' or 'N' - Switch to next display\n" - "\t's' - Slow sprite movement\n" - "\t'S' - Speed up sprite movement\n" - "\t'f' - Slow sprite surface flipping\n" - "\t'F' - Speed up sprite surface flipping\n", - name); -} - -int main(int argc, char **argv) -{ - int c; - int test_overlay = 0, - enable_tiling = 0, - dump_info = 0; - int plane_width = 0, - plane_height = 0, - out_width = 0, - out_height = 0; - static char optstr[] = "ds:o:th"; - - opterr = 0; - while ((c = getopt(argc, argv, optstr)) != -1) { - switch (c) { - case 'd': // Dump information - dump_info = 1; - break; - case 't': // Tiling enable - enable_tiling = 1; - break; - case 's': // Surface dimensions - if (sscanf(optarg, "%dx%d", &plane_width, &plane_height) != 2) - usage(argv[0]); - test_overlay = 1; - break; - case 'o': // Output dimensions - if (sscanf(optarg, "%dx%d", &out_width, &out_height) != 2) - usage(argv[0]); - break; - default: - printf("unknown option %c\n", c); - /* fall through */ - case 'h': // Help! - usage(argv[0]); - goto out; - } - } - - if (test_overlay) { - if (out_width < (plane_width / 2)) - out_width = plane_width; - - if (out_height < (plane_height / 2)) - out_height = plane_height; - - ricochet(enable_tiling, plane_width, plane_height, out_width, out_height, dump_info); - } else { - printf("Sprite dimensions are required:\n"); - usage(argv[0]); - } - -out: - exit(0); -} diff --git a/docs/Makefile.am b/docs/Makefile.am deleted file mode 100644 index b68c7745..00000000 --- a/docs/Makefile.am +++ /dev/null @@ -1 +0,0 @@ -SUBDIRS=reference diff --git a/docs/reference/Makefile.am b/docs/reference/Makefile.am deleted file mode 100644 index 4f579b58..00000000 --- a/docs/reference/Makefile.am +++ /dev/null @@ -1 +0,0 @@ -SUBDIRS = intel-gpu-tools diff --git a/docs/reference/intel-gpu-tools/.gitignore b/docs/reference/intel-gpu-tools/.gitignore deleted file mode 100644 index 00c1b023..00000000 --- a/docs/reference/intel-gpu-tools/.gitignore +++ /dev/null @@ -1,27 +0,0 @@ -/gtkdoc-check.log -/gtkdoc-check.trs -/html-build.stamp -/html.stamp -/html/ -/igt_test_programs_*.xml -/intel-gpu-tools-decl-list.txt -/intel-gpu-tools-decl.txt -/intel-gpu-tools-overrides.txt -/intel-gpu-tools-sections.txt -/intel-gpu-tools-undeclared.txt -/intel-gpu-tools-undocumented.txt -/intel-gpu-tools-unused.txt -/intel-gpu-tools.args -/intel-gpu-tools.hierarchy -/intel-gpu-tools.interfaces -/intel-gpu-tools.prerequisites -/intel-gpu-tools.signals -/intel-gpu-tools.types -/scan-build.stamp -/setup-build.stamp -/sgml-build.stamp -/sgml.stamp -/test-suite.log -/version.xml -/xml/ - diff --git a/docs/reference/intel-gpu-tools/Makefile.am b/docs/reference/intel-gpu-tools/Makefile.am deleted file mode 100644 index 0f10eaab..00000000 --- a/docs/reference/intel-gpu-tools/Makefile.am +++ /dev/null @@ -1,190 +0,0 @@ -## Process this file with automake to produce Makefile.in - -TESTLISTS = $(top_builddir)/tests/single-tests.txt $(top_builddir)/tests/multi-tests.txt -KEYWORDS = (invalid|hang|swap|thrash|crc|tiled|tiling|rte|ctx|render|blt|bsd|vebox|exec|rpm) - -xml/igt_test_programs_%_programs.xml: $(TESTLISTS) - mkdir -p `dirname $@` - echo "<?xml version=\"1.0\"?>" > $@ - echo "<!DOCTYPE refsect1 PUBLIC \"-//OASIS//DTD DocBook XML V4.3//EN\"" >> $@ - echo " \"http://www.oasis-open.org/docbook/xml/4.3/docbookx.dtd\"" >> $@ - echo "[" >> $@ - echo " <!ENTITY % local.common.attrib \"xmlns:xi CDATA #FIXED 'http://www.w3.org/2003/XInclude'\">" >> $@ - echo " <!ENTITY version SYSTEM \"version.xml\">" >> $@ - echo "]>" >> $@ - echo "<refsect1>" >> $@ - echo "<title>Programs</title>" >> $@ - echo "<informaltable pgwide=\"1\" frame=\"none\"><tgroup cols=\"2\"><tbody>" >> $@ - for test in `cat $(TESTLISTS) | tr ' ' '\n' | grep "^$*" | sort`; do \ - echo "<row><entry role=\"program_name\">" >> $@; \ - echo "<link linkend=\"$$test\">$$test</link></entry></row>" >> $@; \ - done; - echo "</tbody></tgroup></informaltable>" >> $@ - echo "</refsect1>" >> $@ - -xml/igt_test_programs_%_description.xml: $(TESTLISTS) - mkdir -p `dirname $@` - echo "<?xml version=\"1.0\"?>" > $@ - echo "<!DOCTYPE refsect1 PUBLIC \"-//OASIS//DTD DocBook XML V4.3//EN\"" >> $@ - echo " \"http://www.oasis-open.org/docbook/xml/4.3/docbookx.dtd\"" >> $@ - echo "[" >> $@ - echo " <!ENTITY % local.common.attrib \"xmlns:xi CDATA #FIXED 'http://www.w3.org/2003/XInclude'\">" >> $@ - echo " <!ENTITY version SYSTEM \"version.xml\">" >> $@ - echo "]>" >> $@ - echo "<refsect1>" >> $@ - echo "<title>Description</title>" >> $@ - for test in `cat $(TESTLISTS) | tr ' ' '\n' | grep "^$*" | sort`; do \ - echo "<refsect2 id=\"$$test\"><title>" >> $@; \ - echo "$$test" | perl -pe 's/(?<=_)$(KEYWORDS)(?=(_|\W))/<acronym>\1<\/acronym>/g' >> $@; \ - echo "</title><para><![CDATA[" >> $@; \ - if [ -x $(top_builddir)/tests/$$test ]; then \ - testprog=$(top_builddir)/tests/$$test; \ - else \ - testprog=$(top_srcdir)/tests/$$test; \ - fi; \ - ./$$testprog --help-description >> $@; \ - echo "]]></para>" >> $@; \ - if ./$$testprog --list-subtests > /dev/null ; then \ - echo "<refsect3><title>Subtests</title>" >> $@; \ - echo "<simplelist>" >> $@; \ - for subtest in `./$$testprog --list-subtests`; do \ - echo "<member>" >> $@; \ - echo "$$subtest" | perl -pe 's/\b$(KEYWORDS)\b/<acronym>\1<\/acronym>/g' >> $@; \ - echo "</member>" >> $@; \ - done; \ - echo "</simplelist></refsect3>" >> $@; \ - fi; \ - echo "</refsect2>" >> $@; \ - done; - echo "</refsect1>" >> $@ - -# We require automake 1.6 at least. -AUTOMAKE_OPTIONS = 1.6 - -# This is a blank Makefile.am for using gtk-doc. -# Copy this to your project's API docs directory and modify the variables to -# suit your project. See the GTK+ Makefiles in gtk+/docs/reference for examples -# of using the various options. - -# The name of the module, e.g. 'glib'. -DOC_MODULE=intel-gpu-tools - -# Uncomment for versioned docs and specify the version of the module, e.g. '2'. -#DOC_MODULE_VERSION=2 - - -# The top-level XML file (SGML in the past). You can change this if you want to. -DOC_MAIN_SGML_FILE=$(DOC_MODULE)-docs.xml - -# Directories containing the source code. -# gtk-doc will search all .c and .h files beneath these paths -# for inline comments documenting functions and macros. -# e.g. DOC_SOURCE_DIR=$(top_srcdir)/gtk $(top_srcdir)/gdk -DOC_SOURCE_DIR=$(top_srcdir)/lib - -# Extra options to pass to gtkdoc-scangobj. Not normally needed. -SCANGOBJ_OPTIONS= - -# Extra options to supply to gtkdoc-scan. -# e.g. SCAN_OPTIONS=--deprecated-guards="GTK_DISABLE_DEPRECATED" -SCAN_OPTIONS=--rebuild-sections - -# Extra options to supply to gtkdoc-mkdb. -# e.g. MKDB_OPTIONS=--xml-mode --output-format=xml -MKDB_OPTIONS=--xml-mode --output-format=xml - -# Extra options to supply to gtkdoc-mktmpl -# e.g. MKTMPL_OPTIONS=--only-section-tmpl -MKTMPL_OPTIONS= - -# Extra options to supply to gtkdoc-mkhtml -MKHTML_OPTIONS= - -# Extra options to supply to gtkdoc-fixref. Not normally needed. -# e.g. FIXXREF_OPTIONS=--extra-dir=../gdk-pixbuf/html --extra-dir=../gdk/html -FIXXREF_OPTIONS= - -# Used for dependencies. The docs will be rebuilt if any of these change. -# e.g. HFILE_GLOB=$(top_srcdir)/gtk/*.h -# e.g. CFILE_GLOB=$(top_srcdir)/gtk/*.c -HFILE_GLOB=$(top_srcdir)/lib/*.h -CFILE_GLOB=$(top_srcdir)/lib/*.c - -# Extra header to include when scanning, which are not under DOC_SOURCE_DIR -# e.g. EXTRA_HFILES=$(top_srcdir}/contrib/extra.h -EXTRA_HFILES= - -# Header files or dirs to ignore when scanning. Use base file/dir names -# e.g. IGNORE_HFILES=gtkdebug.h gtkintl.h private_code -IGNORE_HFILES=gen6_render.h gen7_media.h gen7_render.h gen8_media.h \ - gen8_render.h i830_reg.h i915_3d.h i915_pciids.h i915_reg.h \ - intel_reg.h debug.h instdone.h media_fill.h rendercopy.h - -# Images to copy into HTML directory. -# e.g. HTML_IMAGES=$(top_srcdir)/gtk/stock-icons/stock_about_24.png -HTML_IMAGES= - -test_program_files = xml/igt_test_programs_core_description.xml \ - xml/igt_test_programs_core_programs.xml \ - xml/igt_test_programs_debugfs_description.xml \ - xml/igt_test_programs_debugfs_programs.xml \ - xml/igt_test_programs_drm_description.xml \ - xml/igt_test_programs_drm_programs.xml \ - xml/igt_test_programs_drv_description.xml \ - xml/igt_test_programs_drv_programs.xml \ - xml/igt_test_programs_gem_description.xml \ - xml/igt_test_programs_gem_programs.xml \ - xml/igt_test_programs_gen3_description.xml \ - xml/igt_test_programs_gen3_programs.xml \ - xml/igt_test_programs_kms_description.xml \ - xml/igt_test_programs_kms_programs.xml \ - xml/igt_test_programs_pm_description.xml \ - xml/igt_test_programs_pm_programs.xml \ - xml/igt_test_programs_prime_description.xml \ - xml/igt_test_programs_prime_programs.xml \ - xml/igt_test_programs_sysfs_description.xml \ - xml/igt_test_programs_sysfs_programs.xml \ - $(NULL) - -# Extra SGML files that are included by $(DOC_MAIN_SGML_FILE). -# e.g. content_files=running.sgml building.sgml changes-2.0.sgml -content_files=igt_test_programs.xml $(test_program_files) \ - $(NULL) - -# SGML files where gtk-doc abbrevations (#GtkWidget) are expanded -# These files must be listed here *and* in content_files -# e.g. expand_content_files=running.sgml -expand_content_files=igt_test_programs.xml - -# CFLAGS and LDFLAGS for compiling gtkdoc-scangobj with your library. -# Only needed if you are using gtkdoc-scangobj to dynamically query widget -# signals and properties. -# e.g. GTKDOC_CFLAGS=-I$(top_srcdir) -I$(top_builddir) $(GTK_DEBUG_FLAGS) -# e.g. GTKDOC_LIBS=$(top_builddir)/gtk/$(gtktargetlib) -GTKDOC_CFLAGS= -GTKDOC_LIBS= - -# This includes the standard gtk-doc make rules, copied by gtkdocize. -include $(top_srcdir)/gtk-doc.make - -# Other files to distribute -# e.g. EXTRA_DIST += version.xml.in -# EXTRA_DIST += - -# Files not to distribute -# for --rebuild-types in $(SCAN_OPTIONS), e.g. $(DOC_MODULE).types -# for --rebuild-sections in $(SCAN_OPTIONS) e.g. $(DOC_MODULE)-sections.txt -DISTCLEANFILES = $(DOC_MODULE)-sections.txt $(test_program_files) - -CLEANFILES += $(test_program_files) - -# Comment this out if you want 'make check' to test you doc status -# and run some sanity checks -if ENABLE_GTK_DOC -TESTS_ENVIRONMENT = cd $(srcdir) && \ - DOC_MODULE=$(DOC_MODULE) DOC_MAIN_SGML_FILE=$(DOC_MAIN_SGML_FILE) \ - SRCDIR=$(abs_srcdir) BUILDDIR=$(abs_builddir) -#TESTS = $(GTKDOC_CHECK) -endif - --include $(top_srcdir)/git.mk diff --git a/docs/reference/intel-gpu-tools/igt_test_programs.xml b/docs/reference/intel-gpu-tools/igt_test_programs.xml deleted file mode 100644 index bf8a939d..00000000 --- a/docs/reference/intel-gpu-tools/igt_test_programs.xml +++ /dev/null @@ -1,305 +0,0 @@ -<?xml version="1.0"?> -<!DOCTYPE chapter PUBLIC "-//OASIS//DTD DocBook XML V4.3//EN" - "http://www.oasis-open.org/docbook/xml/4.3/docbookx.dtd" -[ - <!ENTITY % local.common.attrib "xmlns:xi CDATA #FIXED 'http://www.w3.org/2003/XInclude'"> - <!ENTITY version SYSTEM "version.xml"> -]> - -<chapter id="test-programs"> - <title>Test Programs</title> - - <refentry id="igt-test-programs-common-features"> - <refnamediv> - <refname>Common Features</refname> - <refpurpose>Features available in all test programs</refpurpose> - </refnamediv> - <refsect1> - <title>Command Line Options</title> - <para> - All tests support the following command line options: - - <variablelist> - <varlistentry> - <term><option>--list-subtests</option></term> - <listitem><para> - list the available subtests and exit - </para></listitem> - </varlistentry> - - <varlistentry> - <term><option>--run-subtest <replaceable>subtest</replaceable></option></term> - <listitem><para> - run the specified subtest - </para></listitem> - </varlistentry> - - <varlistentry> - <term><option>--debug[=log-domain]</option></term> - <listitem><para> - print extra debugging information when running tests and - optionaly only show the messages from the specified log domain - (use "application" to specifiy the default application domain) - </para></listitem> - </varlistentry> - - <varlistentry> - <term><option>--help-description</option></term> - <listitem><para> - print a short description of the test and exit - </para></listitem> - </varlistentry> - - <varlistentry> - <term><option>--help</option></term> - <listitem><para> - print help and exit - </para></listitem> - </varlistentry> - </variablelist> - </para> - </refsect1> - - <refsect1> - <title>Exit Status</title> - <para> - The following exit status codes are defined: - - <informaltable pgwide="1" frame="none"> - <tgroup cols="3" align="left"> - <thead> - <row><entry>Name</entry><entry>Value</entry><entry>Description</entry></row> - </thead> - <tbody> - <row> - <entry>#IGT_EXIT_SUCCESS</entry> - <entry>0</entry> - <entry>The test was succesful</entry> - </row> - <row> - <entry>#IGT_EXIT_SKIP</entry> - <entry>77</entry> - <entry>The test was skipped</entry> - </row> - <row> - <entry>#IGT_EXIT_TIMEOUT</entry> - <entry>78</entry> - <entry>The test took longer than expected and was stopped</entry> - </row> - <row> - <entry>#IGT_EXIT_INVALID</entry> - <entry>79</entry> - <entry>An invalid option or subtest was specified</entry> - </row> - </tbody> - </tgroup> - </informaltable> - - Any other exit status indicates a test failure. - </para> - </refsect1> - </refentry> - - <refentry id="igt-core-tests"> - <refnamediv> - <refname>Core Tests</refname> - <refpurpose>Tests for core drm ioctls and behaviour.</refpurpose> - </refnamediv> - <xi:include href="igt_test_programs_core_programs.xml"/> - <xi:include href="igt_test_programs_core_description.xml"/> - </refentry> - - <refentry id="igt-drm-tests"> - <refnamediv> - <refname>DRM Tests</refname> - <refpurpose>Tests for libdrm behaviour.</refpurpose> - </refnamediv> - <xi:include href="igt_test_programs_drm_programs.xml"/> - <xi:include href="igt_test_programs_drm_description.xml"/> - </refentry> - - <refentry id="igt-drv-tests"> - <refnamediv> - <refname>DRV Tests</refname> - <refpurpose>Tests for overall driver behaviour.</refpurpose> - </refnamediv> - <xi:include href="igt_test_programs_drv_programs.xml"/> - <xi:include href="igt_test_programs_drv_description.xml"/> - </refentry> - - <refentry id="igt-gem-tests"> - <refnamediv> - <refname>GEM Tests</refname> - <refpurpose>Tests for core drm ioctls and behaviour.</refpurpose> - </refnamediv> - <xi:include href="igt_test_programs_gem_programs.xml"/> - <xi:include href="igt_test_programs_gem_description.xml"/> - </refentry> - - <refentry id="igt-kms-tests"> - <refnamediv> - <refname>KMS Tests</refname> - <refpurpose>Mode setting tests</refpurpose> - </refnamediv> - <xi:include href="igt_test_programs_kms_programs.xml"/> - <xi:include href="igt_test_programs_kms_description.xml"/> - </refentry> - - <refentry id="igt-pm-tests"> - <refnamediv> - <refname>PM Tests</refname> - <refpurpose>Tests for power management features</refpurpose> - </refnamediv> - <xi:include href="igt_test_programs_pm_programs.xml"/> - <xi:include href="igt_test_programs_pm_description.xml"/> - </refentry> - - <refentry id="igt-prime-tests"> - <refnamediv> - <refname>Prime Tests</refname> - <refpurpose>Buffer sharing tests</refpurpose> - </refnamediv> - <xi:include href="igt_test_programs_prime_programs.xml"/> - <xi:include href="igt_test_programs_prime_description.xml"/> - </refentry> - - <refentry id="igt-gen3-tests"> - <refnamediv> - <refname>Gen 3 Tests</refname> - <refpurpose>Gen 3 specific tests</refpurpose> - </refnamediv> - <xi:include href="igt_test_programs_gen3_programs.xml"/> - <xi:include href="igt_test_programs_gen3_description.xml"/> - </refentry> - - <refentry id="igt-sysfs-tests"> - <refnamediv> - <refname>Sysfs Tests</refname> - <refpurpose>Sysfs tests</refpurpose> - </refnamediv> - <xi:include href="igt_test_programs_sysfs_programs.xml"/> - <xi:include href="igt_test_programs_sysfs_description.xml"/> - </refentry> - - <refentry id="igt-debugfs-tests"> - <refnamediv> - <refname>Debugfs Tests</refname> - <refpurpose>Debugfs tests</refpurpose> - </refnamediv> - <xi:include href="igt_test_programs_debugfs_programs.xml"/> - <xi:include href="igt_test_programs_debugfs_description.xml"/> - </refentry> - - <glossary> - <title>Gloassary</title> - - <para>The following terms are commonly used in test names to describe - various features of the test and can be used to filter and select - particular tests.</para> - - <glossentry id="invalid"> - <glossterm>invalid</glossterm> - <glossdef> - <para>Negative tests to validate kernel interface input validation.</para> - </glossdef> - </glossentry> - - <glossentry id="hang"> - <glossterm>hang</glossterm> - <glossdef> - <para>Tests that provoke gpu hangs.</para> - </glossdef> - </glossentry> - - <glossentry id="swap"> - <glossterm>swap</glossterm> - <glossdef> - <para>Tests that force their full working sets through swap.</para> - </glossdef> - </glossentry> - - <glossentry id="thrash"> - <glossterm>thrash</glossterm> - <glossdef> - <para>Tests that tend to have really slow forward progress due to gtt/memory/.. thrashing.</para> - </glossdef> - </glossentry> - - <glossentry id="crc"> - <glossterm>crc</glossterm> - <glossdef> - <para>Tests that use the display CRC infrastructure to check the results.</para> - </glossdef> - </glossentry> - - <glossentry id="tiled"> - <glossterm>tiled</glossterm> - <glossdef> - <para>Tests that exercise behaviour on tiled buffers.</para> - </glossdef> - </glossentry> - - <glossentry id="tiling"> - <glossterm>tiling</glossterm> - <glossdef> - <para>Tests that exercise behaviour on tiled buffers.</para> - </glossdef> - </glossentry> - - <glossentry id="rte"> - <glossterm>rte</glossterm> - <glossdef> - <para>Runtime enviroment checks.</para> - </glossdef> - </glossentry> - - <glossentry id="ctx"> - <glossterm>ctx</glossterm> - <glossdef> - <para>Tests that exercise the hardware context support.</para> - </glossdef> - </glossentry> - - <glossentry id="render"> - <glossterm>render</glossterm> - <glossdef> - <para>Tests which apply to the render ring.</para> - </glossdef> - </glossentry> - - <glossentry id="blt"> - <glossterm>blt</glossterm> - <glossdef> - <para>Tests which apply to the blt ring.</para> - </glossdef> - </glossentry> - - <glossentry id="bsd"> - <glossterm>bsd</glossterm> - <glossdef> - <para>Tests which apply to the bsd ring.</para> - </glossdef> - </glossentry> - - <glossentry id="vebox"> - <glossterm>vebox</glossterm> - <glossdef> - <para>Tests which apply to the vebox ring.</para> - </glossdef> - </glossentry> - - <glossentry id="exec"> - <glossterm>exec</glossterm> - <glossdef> - <para>Tests that exercise the execbuf code in various ways.</para> - </glossdef> - </glossentry> - - <glossentry id="rpm"> - <glossterm>rpm</glossterm> - <glossdef> - <para>Runtime power management tests.</para> - </glossdef> - </glossentry> - </glossary> -</chapter> diff --git a/docs/reference/intel-gpu-tools/intel-gpu-tools-docs.xml b/docs/reference/intel-gpu-tools/intel-gpu-tools-docs.xml deleted file mode 100644 index 6c953fd6..00000000 --- a/docs/reference/intel-gpu-tools/intel-gpu-tools-docs.xml +++ /dev/null @@ -1,39 +0,0 @@ -<?xml version="1.0"?> -<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.3//EN" - "http://www.oasis-open.org/docbook/xml/4.3/docbookx.dtd" -[ - <!ENTITY % local.common.attrib "xmlns:xi CDATA #FIXED 'http://www.w3.org/2003/XInclude'"> - <!ENTITY version SYSTEM "version.xml"> -]> -<book id="index"> - <bookinfo> - <title>intel-gpu-tools Reference Manual</title> - <releaseinfo> - for intel-gpu-tools &version;. - </releaseinfo> - </bookinfo> - - <chapter> - <title>API Reference</title> - <xi:include href="xml/drmtest.xml"/> - <xi:include href="xml/igt_core.xml"/> - <xi:include href="xml/igt_debugfs.xml"/> - <xi:include href="xml/igt_kms.xml"/> - <xi:include href="xml/igt_fb.xml"/> - <xi:include href="xml/igt_aux.xml"/> - <xi:include href="xml/igt_gt.xml"/> - <xi:include href="xml/ioctl_wrappers.xml"/> - <xi:include href="xml/intel_batchbuffer.xml"/> - <xi:include href="xml/intel_chipset.xml"/> - <xi:include href="xml/intel_io.xml"/> - </chapter> - <xi:include href="xml/igt_test_programs.xml"/> - <index id="api-index-full"> - <title>API Index</title> - <xi:include href="xml/api-index-full.xml"><xi:fallback /></xi:include> - </index> - <index id="deprecated-api-index" role="deprecated"> - <title>Index of deprecated API</title> - <xi:include href="xml/api-index-deprecated.xml"><xi:fallback /></xi:include> - </index> -</book> diff --git a/docs/reference/intel-gpu-tools/version.xml.in b/docs/reference/intel-gpu-tools/version.xml.in deleted file mode 100644 index a24f9877..00000000 --- a/docs/reference/intel-gpu-tools/version.xml.in +++ /dev/null @@ -1 +0,0 @@ -@PACKAGE_VERSION@ diff --git a/man/Makefile.am b/man/Makefile.am deleted file mode 100644 index dcd79528..00000000 --- a/man/Makefile.am +++ /dev/null @@ -1,31 +0,0 @@ -appmandir = $(APP_MAN_DIR) -appman_PRE = \ - intel_audio_dump.man \ - intel_bios_dumper.man \ - intel_bios_reader.man \ - intel_error_decode.man \ - intel_gpu_frequency.man \ - intel_gpu_top.man \ - intel_gtt.man \ - intel_infoframes.man \ - intel_lid.man \ - intel_panel_fitter.man \ - intel_reg_dumper.man \ - intel_reg_read.man \ - intel_reg_write.man \ - intel_stepping.man \ - intel_upload_blit_large.man \ - intel_upload_blit_large_gtt.man \ - intel_upload_blit_large_map.man \ - intel_upload_blit_small.man - -appman_DATA = $(appman_PRE:man=$(APP_MAN_SUFFIX)) - -EXTRA_DIST = $(appman_PRE) -CLEANFILES = $(appman_DATA) - -# String replacements in MAN_SUBSTS now come from xorg-macros.m4 via configure -SUFFIXES = .$(APP_MAN_SUFFIX) .man - -.man.$(APP_MAN_SUFFIX): - $(AM_V_GEN)$(SED) $(MAN_SUBSTS) < $< > $@ diff --git a/man/intel_audio_dump.man b/man/intel_audio_dump.man deleted file mode 100644 index 89a81ec4..00000000 --- a/man/intel_audio_dump.man +++ /dev/null @@ -1,11 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_audio_dump __appmansuffix__ __xorgversion__ -.SH NAME -intel_audio_dump \- Dumps the Intel GPU registers for HDMI audio setup. -.SH SYNOPSIS -.B intel_audio_dump -.SH DESCRIPTION -.B intel_audio_dump -dumps and decodes registers containing the configuration of HDMI audio -handling on Intel GPUs. diff --git a/man/intel_bios_dumper.man b/man/intel_bios_dumper.man deleted file mode 100644 index c9acaa46..00000000 --- a/man/intel_bios_dumper.man +++ /dev/null @@ -1,14 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_bios_dumper __appmansuffix__ __xorgversion__ -.SH NAME -intel_bios_dumper \- Saves the Intel video BIOS contents to a file. -.SH SYNOPSIS -.B intel_bios_dumper \fIfilename\fR -.SH DESCRIPTION -.B intel_bios_dumper -is a tool to save the contents of the Intel video BIOS to a file. It -can then be parsed offline for debugging issues with the video bios -table handling. -.SH SEE ALSO -.BR intel_bios_reader(1) diff --git a/man/intel_bios_reader.man b/man/intel_bios_reader.man deleted file mode 100644 index 2f125fc9..00000000 --- a/man/intel_bios_reader.man +++ /dev/null @@ -1,15 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_bios_reader __appmansuffix__ __xorgversion__ -.SH NAME -intel_bios_reader \- Parses an Intel BIOS and displays many of its tables -.SH SYNOPSIS -.B intel_bios_reader \fIfilename\fR -.SH DESCRIPTION -.B intel_bios_reader -is a tool to parse the contents of an Intel video BIOS file. The file -can come from intel_bios_dumper. This can be used for quick debugging -of video bios table handling, which is harder when done inside of the -kernel graphics driver. -.SH SEE ALSO -.BR intel_bios_dumper (1) diff --git a/man/intel_error_decode.man b/man/intel_error_decode.man deleted file mode 100644 index e53d898d..00000000 --- a/man/intel_error_decode.man +++ /dev/null @@ -1,20 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_error_decode __appmansuffix__ __xorgversion__ -.SH NAME -intel_error_decode \- Decodes an Intel GPU dump automatically captured by the kernel at the time of an error. -.SH SYNOPSIS -.nf -.B intel_error_decode -.B intel_error_decode [ filename ] -.fi -.SH DESCRIPTION -.B intel_error_decode -is a tool that decodes the instructions and state of the GPU at the time of -an error. It requires kernel 2.6.34 or newer, and either debugfs mounted on -/sys/kernel/debug or /debug containing a current i915_error_state or you can -pass a file containing a saved error. -.SS Options -.TP -.B filename -Decodes a previously saved error. diff --git a/man/intel_gpu_frequency.man b/man/intel_gpu_frequency.man deleted file mode 100644 index 71448481..00000000 --- a/man/intel_gpu_frequency.man +++ /dev/null @@ -1,58 +0,0 @@ -.TH INTEL_FREQUENCY: "1" "January 2015" "intel_gpu_frequency" "User Commands" -.SH NAME -intel_gpu_frequency: \- manual page for intel_gpu_frequency -.SH SYNOPSIS -.B intel_gpu_frequency -[\fI\,-e\/\fR] [\fI\,--min | --max\/\fR] [\fI\,-g\/\fR] [\fI\,-s frequency_mhz\/\fR] -.SH DESCRIPTION -\&A program to manipulate Intel GPU frequencies. Intel GPUs -will automatically throttle the frequencies based on system demands, up when -needed, down when not. This tool should only be used for debugging performance -problems, or trying to get a stable frequency while benchmarking. - -Intel GPUs only accept specific frequencies. The tool may, or may not attempt to -adjust requests to the proper frequency if they aren't correct. This may lead to -non-obvious failures when setting frequency. Multiples of 50MHz is usually a -safe bet. -.SH OPTIONS -.TP -\fB\-e\fR -Lock frequency to the most efficient frequency -.TP -\fB\-g\fR, \fB\-\-get\fR -Get all the current frequency settings -.TP -\fB\-s\fR, \fB\-\-set\fR -Lock frequency to an absolute value (MHz) -.TP -\fB\-c\fR, \fB\-\-custom\fR -Set a min, or max frequency "min=X | max=Y" -.TP -\fB\-m\fR \fB\-\-max\fR -Lock frequency to max frequency -.TP -\fB\-i\fR \fB\-\-min\fR -Lock frequency to min (never a good idea, DEBUG ONLY) -.TP -\fB\-d\fR \fB\-\-defaults\fR -Return the system to hardware defaults -.TP -\fB\-h\fR \fB\-\-help\fR -Returns this -.HP -\fB\-v\fR \fB\-\-version\fR Version -.SH EXAMPLES -.TP -\fbintel_gpu_frequency \-gmin,cur\fR -Get the current and minimum frequency -.TP -\fbintel_gpu_frequency \-s 400\fR -Lock frequency to 400Mhz -.TP -\fbintel_gpu_frequency \-c max=750\fR -Set the max frequency to 750MHz -.PP -.SH "REPORTING BUGS" -Report bugs to https://bugs.freedesktop.org -.SH COPYRIGHT -Copyright (C) 2015 Intel Corporation diff --git a/man/intel_gpu_top.man b/man/intel_gpu_top.man deleted file mode 100644 index b307a238..00000000 --- a/man/intel_gpu_top.man +++ /dev/null @@ -1,41 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_gpu_top __appmansuffix__ __xorgversion__ -.SH NAME -intel_gpu_top \- Display a top-like summary of Intel GPU usage -.SH SYNOPSIS -.nf -.B intel_gpu_top -.B intel_gpu_top [ parameters ] -.SH DESCRIPTION -.B intel_gpu_top -is a tool to display usage information of an Intel GPU. It requires root -privilege to map the graphics device. -.SS Options -.TP -.B -s [samples per second] -number of samples to acquire per second -.TP -.B -o [output file] -collect usage statistics to [file]. If file is "-", run non-interactively -and output statistics to stdout. -.TP -.B -e ["command to profile"] -execute a command, and leave when it is finished. Note that the entire command -with all parameters should be included as one parameter. -.TP -.B -h -show usage notes -.SH EXAMPLES -.TP -intel_gpu_top -o "cairo-trace-gvim.log" -s 100 -e "cairo-perf-trace /tmp/gvim" -will run cairo-perf-trace with /tmp/gvim trace, non-interactively, saving the -statistics into cairo-trace-gvim.log file, and collecting 100 samples per -second. -.PP -Note that idle units are not -displayed, so an entirely idle GPU will only display the ring status and -header. -.SH BUGS -Some GPUs report some units as busy when they aren't, such that even when -idle and not hung, it will show up as 100% busy. diff --git a/man/intel_gtt.man b/man/intel_gtt.man deleted file mode 100644 index 8b23f287..00000000 --- a/man/intel_gtt.man +++ /dev/null @@ -1,14 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_gtt __appmansuffix__ __xorgversion__ -.SH NAME -intel_gtt \- Dump the contents of an Intel GPU's GTT -.SH SYNOPSIS -.B intel_gtt -.SH DESCRIPTION -.B intel_gtt -is a tool to view the contents of the GTT on an Intel GPU. The GTT is -the page table that maps between GPU addresses and system memory. -This tool can be useful in debugging the Linux AGP driver -initialization of the chip or in debugging later overwriting of the -GTT with garbage data. diff --git a/man/intel_infoframes.man b/man/intel_infoframes.man deleted file mode 100644 index b0159492..00000000 --- a/man/intel_infoframes.man +++ /dev/null @@ -1,26 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_infoframes __appmansuffix__ __xorgversion__ -.SH NAME -intel_infoframes \- View and change HDMI InfoFrames -.SH SYNOPSIS -.B intel_infoframes -.SH DESCRIPTION -.B intel_infoframes -is a tool to view and change the HDMI InfoFrames sent by the GPU. Its main -purpose is to be used as a debugging tool. In some cases (e.g., when -changing modes) the Kernel will undo the changes made by this tool. - -Descriptions of the InfoFrame fields can be found on the HDMI and CEA-861 -specifications. - -Use the -.B -h -or -.B --help -options to learn how to use the command -.SH LIMITATIONS -Not all HDMI monitors respect the InfoFrames sent to them. Only GEN 4 -or newer hardware is supported yet. -.SH SEE ALSO -HDMI specification, CEA-861 specification. diff --git a/man/intel_lid.man b/man/intel_lid.man deleted file mode 100644 index fd554e8d..00000000 --- a/man/intel_lid.man +++ /dev/null @@ -1,12 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_lid __appmansuffix__ __xorgversion__ -.SH NAME -intel_lid \- Polls the values of different reports about laptop lid state. -.SH SYNOPSIS -.B intel_lid -.SH DESCRIPTION -.B intel_lid -is a tool to poll ACPI and the BIOS scratch register's reporting of -laptop lid state. This can be used for debugging issues with laptop -modesetting for lid opening and closing. diff --git a/man/intel_panel_fitter.man b/man/intel_panel_fitter.man deleted file mode 100644 index 9a46a2ed..00000000 --- a/man/intel_panel_fitter.man +++ /dev/null @@ -1,50 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_panel_fitter __appmansuffix__ __xorgversion__ -.SH NAME -intel_panel_fitter \- Change the panel fitter settings -.SH SYNOPSIS -.B intel_panel_fitter [options] -.SH DESCRIPTION -.B intel_panel_fitter -is a tool that allows you to change the panel fitter settings, so you can change -the size of the screen being displayed on your monitor without changing the real -pixel size of your desktop. The biggest use case for this tool is to work around -overscan done by TVs and some monitors in interlaced mode. -.SS Options -.TP -.B -p [pipe] -pipe to be used (A, B or C, but C is only present on Ivy Bridge and newer). -.TP -.B -x [value] -final screen width size in pixels (needs -p option). -.TP -.B -y [value] -final screen height size in pixels (needs -p option). -.TP -.B -d -disable panel fitter (needs -p option, ignores -x and -y options). -.TP -.B -l -list current state of each pipe. -.TP -.B -h -prints the help message. -.SS - -.SH EXAMPLES -.TP -.B intel_panel_fitter -l -will list the current status of each pipe, so you can decide what to do. -.TP -.B intel_panel_fitter -p A -x 1850 -y 1040 -will change the pipe A size to 1850x1040 pixels. -.TP -.B intel_panel_fitter -p A -d -will disable the panel fitter for pipe A. - -.SH NOTES -In the future, there will be support for this feature inside the Linux Kernel. - -Machines older than Ironlake are still not supported, but support may be -possible to implement. diff --git a/man/intel_reg_dumper.man b/man/intel_reg_dumper.man deleted file mode 100644 index 89f6b9f9..00000000 --- a/man/intel_reg_dumper.man +++ /dev/null @@ -1,33 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_reg_dumper __appmansuffix__ __xorgversion__ -.SH NAME -intel_reg_dumper \- Decode a bunch of Intel GPU registers for debugging -.SH SYNOPSIS -.B intel_reg_dumper [ options ] [ file ] -.SH DESCRIPTION -.B intel_reg_dumper -is a tool to read and decode the values of many Intel GPU registers. It is -commonly used in debugging video mode setting issues. If the -.B file -argument is present, the registers will be decoded from the given file -instead of the current registers. Use the -.B intel_reg_snapshot -tool to generate such files. - -When the -.B file -argument is present and the -.B -d -argument is not present, -.B intel_reg_dumper -will assume the file was generated on an Ironlake machine. -.SH OPTIONS -.TP -.B -d id -when a dump file is used, use 'id' as device id (in hex) -.TP -.B -h -prints a help message -.SH SEE ALSO -.BR intel_reg_snapshot(1) diff --git a/man/intel_reg_read.man b/man/intel_reg_read.man deleted file mode 100644 index cc2bf612..00000000 --- a/man/intel_reg_read.man +++ /dev/null @@ -1,15 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_reg_read __appmansuffix__ __xorgversion__ -.SH NAME -intel_reg_read \- Reads an Intel GPU register value -.SH SYNOPSIS -.B intel_reg_read \fIregister\fR -.SH DESCRIPTION -.B intel_reg_read -is a tool to read Intel GPU registers, for use in debugging. The -\fIregister\fR argument is given as hexadecimal. -.SH EXAMPLES -.TP -intel_reg_read 0x61230 -Shows the register value for the first internal panel fitter. diff --git a/man/intel_reg_snapshot.man b/man/intel_reg_snapshot.man deleted file mode 100644 index 1930f613..00000000 --- a/man/intel_reg_snapshot.man +++ /dev/null @@ -1,15 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_reg_snapshot __appmansuffix__ __xorgversion__ -.SH NAME -intel_reg_snapshot \- Take a GPU register snapshot -.SH SYNOPSIS -.B intel_reg_snapshot -.SH DESCRIPTION -.B intel_reg_snapshot -takes a snapshot of the registers of an Intel GPU, and writes it to standard -output. These files can be inspected later with the -.B intel_reg_dumper -tool. -.SH SEE ALSO -.BR intel_reg_dumper(1) diff --git a/man/intel_reg_write.man b/man/intel_reg_write.man deleted file mode 100644 index cb1731c6..00000000 --- a/man/intel_reg_write.man +++ /dev/null @@ -1,16 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_reg_write __appmansuffix__ __xorgversion__ -.SH NAME -intel_reg_write \- Set an Intel GPU register to a value -.SH SYNOPSIS -.B intel_reg_write \fIregister\fR \fIvalue\fR -.SH DESCRIPTION -.B intel_reg_write -is a tool to set Intel GPU registers to values, for use in speeding up -debugging. The \fIregister\fR and \fIvalue\fR arguments are given as -hexadecimal. -.SH EXAMPLES -.TP -intel_reg_write 0x61230 0x0 -Disables the first internal panel fitter. diff --git a/man/intel_stepping.man b/man/intel_stepping.man deleted file mode 100644 index fe172107..00000000 --- a/man/intel_stepping.man +++ /dev/null @@ -1,15 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_stepping __appmansuffix__ __xorgversion__ -.SH NAME -intel_stepping \- Display the stepping information for an Intel GPU -.SH SYNOPSIS -.B intel_stepping -.SH DESCRIPTION -.B intel_stepping -is a tool to print the stepping information for an Intel GPU, along with -the PCI ID and revision used to determine it. -It requires root privilege to map the graphics device. -.SH BUGS -Not all the known stepping IDs or chipsets are included, so the output -on some devices may not be as specific as possible. diff --git a/man/intel_upload_blit_large.man b/man/intel_upload_blit_large.man deleted file mode 100644 index 9c75e1a1..00000000 --- a/man/intel_upload_blit_large.man +++ /dev/null @@ -1,18 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_upload_blit_large __appmansuffix__ __xorgversion__ -.SH NAME -intel_upload_blit_large \- microbenchmark of Intel GPU performance -.SH SYNOPSIS -.nf -.B intel_upload_blit_large -.fi -.SH DESCRIPTION -.B intel_upload_blit_large -is a microbenchmark tool for DRM performance. It should be run with kernel -modesetting enabled, and may require root privilege for correct operation. -It does not require X to be running. -.PP -Given that it is a microbenchmark, its utility is largely for regression -testing of the kernel, and not for general conclusions on graphics -performance. diff --git a/man/intel_upload_blit_large_gtt.man b/man/intel_upload_blit_large_gtt.man deleted file mode 100644 index fbe4623c..00000000 --- a/man/intel_upload_blit_large_gtt.man +++ /dev/null @@ -1,18 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_upload_blit_large_gtt __appmansuffix__ __xorgversion__ -.SH NAME -intel_upload_blit_large_gtt \- microbenchmark of Intel GPU performance -.SH SYNOPSIS -.nf -.B intel_upload_blit_large_gtt -.fi -.SH DESCRIPTION -.B intel_upload_blit_large_gtt -is a microbenchmark tool for DRM performance. It should be run with kernel -modesetting enabled, and may require root privilege for correct operation. -It does not require X to be running. -.PP -Given that it is a microbenchmark, its utility is largely for regression -testing of the kernel, and not for general conclusions on graphics -performance. diff --git a/man/intel_upload_blit_large_map.man b/man/intel_upload_blit_large_map.man deleted file mode 100644 index 04123f3d..00000000 --- a/man/intel_upload_blit_large_map.man +++ /dev/null @@ -1,18 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_upload_blit_large_map __appmansuffix__ __xorgversion__ -.SH NAME -intel_upload_blit_large_map \- microbenchmark of Intel GPU performance -.SH SYNOPSIS -.nf -.B intel_upload_blit_large_map -.fi -.SH DESCRIPTION -.B intel_upload_blit_large_map -is a microbenchmark tool for DRM performance. It should be run with kernel -modesetting enabled, and may require root privilege for correct operation. -It does not require X to be running. -.PP -Given that it is a microbenchmark, its utility is largely for regression -testing of the kernel, and not for general conclusions on graphics -performance. diff --git a/man/intel_upload_blit_small.man b/man/intel_upload_blit_small.man deleted file mode 100644 index 478bbfc5..00000000 --- a/man/intel_upload_blit_small.man +++ /dev/null @@ -1,18 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_upload_blit_small __appmansuffix__ __xorgversion__ -.SH NAME -intel_upload_blit_small \- microbenchmark of Intel GPU performance -.SH SYNOPSIS -.nf -.B intel_upload_blit_small -.fi -.SH DESCRIPTION -.B intel_upload_blit_small -is a microbenchmark tool for DRM performance. It should be run with kernel -modesetting enabled, and may require root privilege for correct operation. -It does not require X to be running. -.PP -Given that it is a microbenchmark, its utility is largely for regression -testing of the kernel, and not for general conclusions on graphics -performance. diff --git a/overlay/.gitignore b/overlay/.gitignore deleted file mode 100644 index 0aa81847..00000000 --- a/overlay/.gitignore +++ /dev/null @@ -1 +0,0 @@ -intel-gpu-overlay diff --git a/overlay/Makefile.am b/overlay/Makefile.am deleted file mode 100644 index c648875d..00000000 --- a/overlay/Makefile.am +++ /dev/null @@ -1,70 +0,0 @@ -if BUILD_OVERLAY -bin_PROGRAMS = intel-gpu-overlay -endif - -AM_CPPFLAGS = -I. -AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS) $(OVERLAY_CFLAGS) -LDADD = $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS) $(OVERLAY_LIBS) - -intel_gpu_overlay_SOURCES = \ - i915_pciids.h \ - chart.h \ - chart.c \ - config.c \ - cpu-top.h \ - cpu-top.c \ - debugfs.h \ - debugfs.c \ - gem-interrupts.h \ - gem-interrupts.c \ - gem-objects.h \ - gem-objects.c \ - gpu-top.h \ - gpu-top.c \ - gpu-perf.h \ - gpu-perf.c \ - gpu-freq.h \ - gpu-freq.c \ - igfx.h \ - igfx.c \ - overlay.h \ - overlay.c \ - perf.h \ - perf.c \ - power.h \ - power.c \ - rc6.h \ - rc6.c \ - $(NULL) - -if BUILD_OVERLAY_XLIB -both_x11_sources = x11/position.c x11/position.h -AM_CFLAGS += $(OVERLAY_XLIB_CFLAGS) $(XRANDR_CFLAGS) -LDADD += $(OVERLAY_XLIB_LIBS) $(XRANDR_LIBS) -intel_gpu_overlay_SOURCES += \ - x11/x11-window.c \ - $(NULL) -endif - -if BUILD_OVERLAY_XVLIB -both_x11_sources = x11/position.c -AM_CFLAGS += $(OVERLAY_XVLIB_CFLAGS) $(XRANDR_CFLAGS) -LDADD += $(OVERLAY_XVLIB_LIBS) $(XRANDR_LIBS) -intel_gpu_overlay_SOURCES += \ - x11/dri2.c \ - x11/dri2.h \ - x11/rgb2yuv.c \ - x11/rgb2yuv.h \ - x11/x11-overlay.c \ - $(NULL) -endif - -intel_gpu_overlay_SOURCES += \ - kms/kms-overlay.c \ - $(NULL) - -intel_gpu_overlay_SOURCES += $(both_x11_sources) - -intel_gpu_overlay_LDADD = $(LDADD) -lrt - -EXTRA_DIST=README diff --git a/overlay/README b/overlay/README deleted file mode 100644 index c4ed9702..00000000 --- a/overlay/README +++ /dev/null @@ -1,8 +0,0 @@ -This is a simple overlay showing current GPU activity. An asynchronous -overlay is used, rendered by the CPU to avoid introducing any extra work -on the GPU that we wish to monitor. - -The x11-overlay backend requires xf86-video-intel 2.21.15 or later, with -SNA enabled. - -As it requires access to debug information, it needs to be run as root. diff --git a/overlay/chart.c b/overlay/chart.c deleted file mode 100644 index 734e911f..00000000 --- a/overlay/chart.c +++ /dev/null @@ -1,240 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <stdlib.h> -#include <string.h> -#include <errno.h> -#include <cairo.h> - -#include <stdio.h> - -#include "chart.h" - -int chart_init(struct chart *chart, const char *name, int num_samples) -{ - memset(chart, 0, sizeof(*chart)); - chart->name = name; - chart->samples = malloc(sizeof(*chart->samples)*num_samples); - if (chart->samples == NULL) - return ENOMEM; - - chart->num_samples = num_samples; - chart->range_automatic = 1; - chart->stroke_width = 2; - chart->smooth = CHART_CURVE; - return 0; -} - -void chart_set_mode(struct chart *chart, enum chart_mode mode) -{ - chart->mode = mode; -} - -void chart_set_smooth(struct chart *chart, enum chart_smooth smooth) -{ - chart->smooth = smooth; -} - -void chart_set_stroke_width(struct chart *chart, float width) -{ - chart->stroke_width = width; -} - -void chart_set_stroke_rgba(struct chart *chart, float red, float green, float blue, float alpha) -{ - chart->stroke_rgb[0] = red; - chart->stroke_rgb[1] = green; - chart->stroke_rgb[2] = blue; - chart->stroke_rgb[3] = alpha; -} - -void chart_set_fill_rgba(struct chart *chart, float red, float green, float blue, float alpha) -{ - chart->fill_rgb[0] = red; - chart->fill_rgb[1] = green; - chart->fill_rgb[2] = blue; - chart->fill_rgb[3] = alpha; -} - -void chart_set_position(struct chart *chart, int x, int y) -{ - chart->x = x; - chart->y = y; -} - -void chart_set_size(struct chart *chart, int w, int h) -{ - chart->w = w; - chart->h = h; -} - -void chart_set_range(struct chart *chart, double min, double max) -{ - chart->range[0] = min; - chart->range[1] = max; - chart->range_automatic = 0; -} - -void chart_get_range(struct chart *chart, double *range) -{ - int n, max = chart->current_sample; - if (max > chart->num_samples) - max = chart->num_samples; - for (n = 0; n < max; n++) { - if (chart->samples[n] < range[0]) - range[0] = chart->samples[n]; - else if (chart->samples[n] > range[1]) - range[1] = chart->samples[n]; - } -} - -void chart_add_sample(struct chart *chart, double value) -{ - int pos; - - if (chart->num_samples == 0) - return; - - pos = chart->current_sample++ % chart->num_samples; - chart->samples[pos] = value; -} - -static void chart_update_range(struct chart *chart) -{ - int n, max = chart->current_sample; - if (max > chart->num_samples) - max = chart->num_samples; - chart->range[0] = chart->range[1] = chart->samples[0]; - for (n = 1; n < max; n++) { - if (chart->samples[n] < chart->range[0]) - chart->range[0] = chart->samples[n]; - else if (chart->samples[n] > chart->range[1]) - chart->range[1] = chart->samples[n]; - } - if (strcmp(chart->name, "power") == 0) - printf ("chart_update_range [%f, %f]\n", chart->range[0], chart->range[1]); -} - -static double value_at(struct chart *chart, int n) -{ - if (n < chart->current_sample - chart->num_samples) - n = chart->current_sample; - else if (n >= chart->current_sample) - n = chart->current_sample - 1; - - n %= chart->num_samples; - if (n < 0) - n += chart->num_samples; - - return chart->samples[n]; -} - -static double gradient_at(struct chart *chart, int n) -{ - double y0, y1; - - y0 = value_at(chart, n-1); - y1 = value_at(chart, n+1); - - return (y1 - y0) / 2.; -} - -void chart_draw(struct chart *chart, cairo_t *cr) -{ - int i, n, max, x; - - if (chart->current_sample == 0) - return; - - if (chart->range_automatic) - chart_update_range(chart); - - if (chart->range[1] <= chart->range[0]) - return; - - cairo_save(cr); - - cairo_translate(cr, chart->x, chart->y + chart->h); - cairo_scale(cr, - chart->w / (double)(chart->num_samples-1), - -chart->h / (chart->range[1] - chart->range[0])); - - x = 0; - max = chart->current_sample; - if (max >= chart->num_samples) { - max = chart->num_samples; - i = chart->current_sample - max; - } else { - i = 0; - x = chart->num_samples - max; - } - cairo_translate(cr, x, -chart->range[0]); - - cairo_new_path(cr); - if (chart->mode != CHART_STROKE) - cairo_move_to(cr, 0, 0); - for (n = 0; n < max; n++) { - switch (chart->smooth) { - case CHART_LINE: - cairo_line_to(cr, - n, value_at(chart, i + n)); - break; - case CHART_CURVE: - cairo_curve_to(cr, - n-2/3., value_at(chart, i + n -1) + gradient_at(chart, i + n - 1)/3., - n-1/3., value_at(chart, i + n) - gradient_at(chart, i + n)/3., - n, value_at(chart, i + n)); - break; - } - } - if (chart->mode != CHART_STROKE) - cairo_line_to(cr, n-1, 0); - - cairo_identity_matrix(cr); - cairo_set_line_width(cr, chart->stroke_width); - switch (chart->mode) { - case CHART_STROKE: - cairo_set_source_rgba(cr, chart->stroke_rgb[0], chart->stroke_rgb[1], chart->stroke_rgb[2], chart->stroke_rgb[3]); - cairo_stroke(cr); - break; - case CHART_FILL: - cairo_set_source_rgba(cr, chart->fill_rgb[0], chart->fill_rgb[1], chart->fill_rgb[2], chart->fill_rgb[3]); - cairo_fill(cr); - break; - case CHART_FILL_STROKE: - cairo_set_antialias(cr, CAIRO_ANTIALIAS_NONE); - cairo_set_source_rgba(cr, chart->fill_rgb[0], chart->fill_rgb[1], chart->fill_rgb[2], chart->fill_rgb[3]); - cairo_fill_preserve(cr); - cairo_set_antialias(cr, CAIRO_ANTIALIAS_DEFAULT); - cairo_set_source_rgba(cr, chart->stroke_rgb[0], chart->stroke_rgb[1], chart->stroke_rgb[2], chart->stroke_rgb[3]); - cairo_stroke(cr); - break; - } - cairo_restore(cr); -} - -void chart_fini(struct chart *chart) -{ - free(chart->samples); -} diff --git a/overlay/chart.h b/overlay/chart.h deleted file mode 100644 index 16def7a4..00000000 --- a/overlay/chart.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef CHART_H -#define CHART_H - -struct chart { - const char *name; - int x, y, w, h; - int num_samples; - int current_sample; - int range_automatic; - enum chart_mode { - CHART_STROKE = 0, - CHART_FILL, - CHART_FILL_STROKE, - } mode; - enum chart_smooth { - CHART_LINE = 0, - CHART_CURVE, - } smooth; - float fill_rgb[4]; - float stroke_rgb[4]; - double stroke_width; - double range[2]; - double *samples; -}; - -int chart_init(struct chart *chart, const char *name, int num_samples); -void chart_set_mode(struct chart *chart, enum chart_mode mode); -void chart_set_smooth(struct chart *chart, enum chart_smooth smooth); -void chart_set_fill_rgba(struct chart *chart, float red, float green, float blue, float alpha); -void chart_set_stroke_width(struct chart *chart, float width); -void chart_set_stroke_rgba(struct chart *chart, float red, float green, float blue, float alpha); -void chart_set_position(struct chart *chart, int x, int y); -void chart_set_size(struct chart *chart, int w, int h); -void chart_set_range(struct chart *chart, double min, double max); -void chart_add_sample(struct chart *chart, double value); -void chart_draw(struct chart *chart, cairo_t *cr); -void chart_fini(struct chart *chart); - -void chart_get_range(struct chart *chart, double *range); - -#endif /* CHART_H */ diff --git a/overlay/config.c b/overlay/config.c deleted file mode 100644 index b6bd8dc3..00000000 --- a/overlay/config.c +++ /dev/null @@ -1,302 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <sys/types.h> -#include <sys/stat.h> -#include <sys/mman.h> -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <ctype.h> -#include <unistd.h> -#include <fcntl.h> -#include <errno.h> - -#include "overlay.h" - -#define DEFAULT_SECTION "window" - -static const char *skip_whitespace(const char *s, const char *end) -{ - while (s < end && isspace(*s)) - s++; - return s; -} - -static const char *trim_whitespace(const char *s, const char *end) -{ - if (end == NULL) - return end; - - while (end > s && isspace(*--end)) - ; - - return end + 1; -} - -static int is_eol(int c) -{ - return c == '\n' || c == '\r'; -} - -static const char *skip_past_eol(const char *s, const char *end) -{ - while (s < end && !is_eol(*s++)) - ; - - return s; -} - -static const char *find(const char *s, const char *end, int c) -{ - while (s < end && *s != c) { - if (*s == '#') - break; - - if (*s == '\n') - return NULL; - s++; - } - - return c == '\n' ? s : s < end ? s : NULL; -} - -static int parse(const char *buf, int len, - int (*func)(const char *section, - const char *name, - const char *value, - void *data), - void *data) -{ - char section[128] = DEFAULT_SECTION, name[128], value[128]; - const char *buf_end = buf + len; - const char *end; - int has_section = 0; - int line; - - for (line = 0 ; ++line; buf = skip_past_eol(buf, buf_end)) { - buf = skip_whitespace(buf, buf_end); - if (buf >= buf_end) - break; - - if (*buf == ';' || *buf == '#') { - /* comment */ - } else if (*buf == '[') { /* new section */ - end = find(++buf, buf_end, ']'); - if (end == NULL) - return line; - - end = trim_whitespace(buf, end); - if (end <= buf) - continue; - - len = end - buf; - if (len == 0 || len >= sizeof(section)) - return line; - - memcpy(section, buf, len); - section[len] = '\0'; - has_section = 1; - } else { /* name = value */ - const char *sep; - int has_value = 1; - - sep = find(buf, buf_end, '='); - if (sep == NULL) - sep = find(buf, buf_end, ':'); - if (sep == NULL) { - sep = find(buf, buf_end, '\n'); - has_value = 0; - } - end = trim_whitespace(buf, sep); - if (end <= buf) - continue; - - len = end - buf; - if (len == 0 || len >= sizeof(name)) - return line; - - memcpy(name, buf, len); - name[len] = '\0'; - - if (has_value) { - buf = skip_whitespace(sep + 1, buf_end); - end = find(buf, buf_end, '\n'); - end = trim_whitespace(buf, end); - - len = end - buf; - if (len >= sizeof(name)) - return line; - - memcpy(value, buf, len); - value[len] = '\0'; - } else - *value = '\0'; - - if (!has_section) { - char *dot; - - dot = strchr(name, '.'); - if (dot && dot[1]) { - *dot = '\0'; - - if (!func(name, dot+1, value, data)) - return line; - - continue; - } - } - - if (!func(section, name, value, data)) - return line; - } - } - - return 0; -} - -static int add_value(const char *section, - const char *name, - const char *value, - void *data) -{ - struct config *c = data; - struct config_section *s; - struct config_value *v, **prev; - - for (s = c->sections; s != NULL; s = s->next) - if (strcmp(s->name, section) == 0) - break; - if (s == NULL) { - int len = strlen(section) + 1; - - s = malloc(sizeof(*s)+len); - if (s == NULL) - return 0; - - memcpy(s->name, section, len); - s->values = NULL; - s->next = c->sections; - c->sections = s; - } - - for (prev = &s->values; (v = *prev) != NULL; prev = &v->next) { - if (strcmp(v->name, name) == 0) { - *prev = v->next; - free(v); - break; - } - } - { - int name_len = strlen(name) + 1; - int value_len = strlen(value) + 1; - - v = malloc(sizeof(*v) + name_len + value_len); - if (v == NULL) - return 0; - - v->name = memcpy(v+1, name, name_len); - v->value = memcpy(v->name + name_len, value, value_len); - - v->next = s->values; - s->values = v; - } - - return 1; -} - -static int config_init_from_file(struct config *config, const char *filename) -{ - struct stat st; - int fd, err = -1; - char *str; - - fd = open(filename, 0); - if (fd < 0) - return -1; - - if (fstat(fd, &st) < 0) - goto err_fd; - - if ((str = mmap(0, st.st_size, PROT_READ, MAP_SHARED, fd, 0)) == (void *)-1) - goto err_fd; - - err = parse(str, st.st_size, add_value, config); - munmap(str, st.st_size); - -err_fd: - close(fd); - return err; -} - -void config_init(struct config *config) -{ - memset(config, 0, sizeof(*config)); -} - -void config_parse_string(struct config *config, const char *str) -{ - int err; - - if (str == NULL) - return; - - err = config_init_from_file(config, str); - if (err == -1) - err = parse(str, strlen(str), add_value, config); - if (err) { - fprintf(stderr, "Failed to parse config string at line %d\n", err); - exit(1); - } -} - -void config_set_value(struct config *c, - const char *section, - const char *name, - const char *value) -{ - add_value(section, name, value, c); -} - -const char *config_get_value(struct config *c, - const char *section, - const char *name) -{ - struct config_section *s; - struct config_value *v; - - for (s = c->sections; s != NULL; s = s->next) { - if (strcmp(s->name, section)) - continue; - - for (v = s->values; v != NULL; v = v->next) { - if (strcmp(v->name, name)) - continue; - - return v->value; - } - } - - return NULL; -} diff --git a/overlay/cpu-top.c b/overlay/cpu-top.c deleted file mode 100644 index 13ae70d4..00000000 --- a/overlay/cpu-top.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <stdio.h> -#include <stdlib.h> -#include <unistd.h> -#include <fcntl.h> -#include <string.h> -#include <errno.h> - -#include "cpu-top.h" - -int cpu_top_init(struct cpu_top *cpu) -{ - memset(cpu, 0, sizeof(*cpu)); - - cpu->nr_cpu = sysconf(_SC_NPROCESSORS_ONLN); - - return 0; -} - -int cpu_top_update(struct cpu_top *cpu) -{ - struct cpu_stat *s = &cpu->stat[cpu->count++&1]; - struct cpu_stat *d = &cpu->stat[cpu->count&1]; - uint64_t d_total, d_idle; - char buf[4096], *b; - int fd, len = -1; - - fd = open("/proc/stat", 0); - if (fd < 0) - return errno; - - len = read(fd, buf, sizeof(buf)-1); - close(fd); - - if (len < 0) - return EIO; - buf[len] = '\0'; - -#ifdef __x86_64__ - sscanf(buf, "cpu %lu %lu %lu %lu", - &s->user, &s->nice, &s->sys, &s->idle); -#else - sscanf(buf, "cpu %llu %llu %llu %llu", - &s->user, &s->nice, &s->sys, &s->idle); -#endif - - b = strstr(buf, "procs_running"); - if (b) - cpu->nr_running = atoi(b+sizeof("procs_running")) - 1; - - s->total = s->user + s->nice + s->sys + s->idle; - if (cpu->count == 1) - return EAGAIN; - - d_total = s->total - d->total; - d_idle = s->idle - d->idle; - cpu->busy = 100 - 100 * d_idle / d_total; - - return 0; -} diff --git a/overlay/cpu-top.h b/overlay/cpu-top.h deleted file mode 100644 index a061a488..00000000 --- a/overlay/cpu-top.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef CPU_TOP_H -#define CPU_TOP_H - -#include <stdint.h> - -struct cpu_top { - uint8_t busy; - int nr_cpu; - int nr_running; - - int count; - struct cpu_stat { - uint64_t user, nice, sys, idle; - uint64_t total; - } stat[2]; -}; - -int cpu_top_init(struct cpu_top *cpu); -int cpu_top_update(struct cpu_top *cpu); - -#endif /* CPU_TOP_H */ diff --git a/overlay/debugfs.c b/overlay/debugfs.c deleted file mode 100644 index 9f3e5ccb..00000000 --- a/overlay/debugfs.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <sys/stat.h> -#include <sys/mount.h> -#include <errno.h> -#include <stdio.h> -#include <string.h> - -#include "debugfs.h" - -char debugfs_path[128]; -char debugfs_dri_path[128]; - -int debugfs_init(void) -{ - const char *path = "/sys/kernel/debug"; - struct stat st; - int n; - - if (stat("/debug/dri", &st) == 0) { - path = "/debug/dri"; - goto find_minor; - } - - if (stat("/sys/kernel/debug/dri", &st) == 0) - goto find_minor; - - if (stat("/sys/kernel/debug", &st)) - return errno; - - if (mount("debug", "/sys/kernel/debug", "debugfs", 0, 0)) - return errno; - -find_minor: - strcpy(debugfs_path, path); - for (n = 0; n < 16; n++) { - int len = sprintf(debugfs_dri_path, "%s/dri/%d", path, n); - sprintf(debugfs_dri_path + len, "/i915_error_state"); - if (stat(debugfs_dri_path, &st) == 0) { - debugfs_dri_path[len] = '\0'; - return 0; - } - } - - debugfs_dri_path[0] = '\0'; - return ENOENT; -} diff --git a/overlay/debugfs.h b/overlay/debugfs.h deleted file mode 100644 index 8a1c60a5..00000000 --- a/overlay/debugfs.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef DEBUGFS_H -#define DEBUGFS_H - -extern char debugfs_path[128]; -extern char debugfs_dri_path[128]; - -int debugfs_init(void); - -#endif /* DEBUGFS_H */ diff --git a/overlay/gem-interrupts.c b/overlay/gem-interrupts.c deleted file mode 100644 index 48a36b85..00000000 --- a/overlay/gem-interrupts.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <sys/stat.h> -#include <unistd.h> -#include <fcntl.h> -#include <errno.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <ctype.h> - -#include "gem-interrupts.h" -#include "debugfs.h" -#include "perf.h" - -static int perf_open(void) -{ - struct perf_event_attr attr; - - memset(&attr, 0, sizeof (attr)); - - attr.type = i915_type_id(); - if (attr.type == 0) - return -ENOENT; - attr.config = I915_PERF_INTERRUPTS; - - return perf_event_open(&attr, -1, 0, -1, 0); -} - -static long long debugfs_read(void) -{ - char buf[8192], *b; - int fd, len; - - sprintf(buf, "%s/i915_gem_interrupt", debugfs_dri_path); - fd = open(buf, 0); - if (fd < 0) - return -1; - - len = read(fd, buf, sizeof(buf)-1); - close(fd); - - if (len < 0) - return -1; - - buf[len] = '\0'; - - b = strstr(buf, "Interrupts received:"); - if (b == NULL) - return -1; - - return strtoull(b + sizeof("Interrupts received:"), 0, 0); -} - -static long long procfs_read(void) -{ - char buf[8192], *b; - int fd, len; - unsigned long long val; - -/* 44: 51 42446 0 0 PCI-MSI-edge i915*/ - fd = open("/proc/interrupts", 0); - if (fd < 0) - return -1; - - len = read(fd, buf, sizeof(buf)-1); - close(fd); - - if (len < 0) - return -1; - - buf[len] = '\0'; - - b = strstr(buf, "i915"); - if (b == NULL) - return -1; - while (*--b != ':') - ; - - val = 0; - do { - while (isspace(*++b)) - ; - if (!isdigit(*b)) - break; - - val += strtoull(b, &b, 0); - } while(1); - - return val; -} - -static long long interrupts_read(void) -{ - long long val; - - val = debugfs_read(); - if (val < 0) - val = procfs_read(); - return val; -} - -int gem_interrupts_init(struct gem_interrupts *irqs) -{ - memset(irqs, 0, sizeof(*irqs)); - - irqs->fd = perf_open(); - if (irqs->fd < 0 && interrupts_read() < 0) - irqs->error = ENODEV; - - return irqs->error; -} - -int gem_interrupts_update(struct gem_interrupts *irqs) -{ - uint64_t val; - int update; - - if (irqs->error) - return irqs->error; - - if (irqs->fd < 0) { - val = interrupts_read(); - if (val < 0) - return irqs->error = ENODEV; - } else { - if (read(irqs->fd, &val, sizeof(val)) < 0) - return irqs->error = errno; - } - - update = irqs->last_count == 0; - irqs->last_count = irqs->count; - irqs->count = val; - irqs->delta = irqs->count - irqs->last_count; - return update ? EAGAIN : 0; -} diff --git a/overlay/gem-interrupts.h b/overlay/gem-interrupts.h deleted file mode 100644 index a818ec8b..00000000 --- a/overlay/gem-interrupts.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef GEM_INTERRUPTS_H -#define GEM_INTERRUPTS_H - -#include <stdint.h> - -struct gem_interrupts { - long unsigned last_count, count, delta; - int error; - int fd; -}; - -int gem_interrupts_init(struct gem_interrupts *irqs); -int gem_interrupts_update(struct gem_interrupts *irqs); - -#endif /* GEM_INTERRUPTS_H */ diff --git a/overlay/gem-objects.c b/overlay/gem-objects.c deleted file mode 100644 index 4d60299a..00000000 --- a/overlay/gem-objects.c +++ /dev/null @@ -1,165 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <unistd.h> -#include <fcntl.h> -#include <errno.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> - -#include "gem-objects.h" -#include "debugfs.h" - -/* /sys/kernel/debug/dri/0/i915_gem_objects: - * 46 objects, 20107264 bytes - * 42 [42] objects, 15863808 [15863808] bytes in gtt - * 0 [0] active objects, 0 [0] bytes - * 42 [42] inactive objects, 15863808 [15863808] bytes - * 0 unbound objects, 0 bytes - * 3 purgeable objects, 4456448 bytes - * 30 pinned mappable objects, 3821568 bytes - * 1 fault mappable objects, 3145728 bytes - * 2145386496 [536870912] gtt total - * - * Xorg: 35 objects, 16347136 bytes (0 active, 12103680 inactive, 0 unbound) - */ - -int gem_objects_init(struct gem_objects *obj) -{ - char buf[8192], *b; - int fd, len; - - memset(obj, 0, sizeof(*obj)); - - sprintf(buf, "%s/i915_gem_objects", debugfs_dri_path); - fd = open(buf, 0); - if (fd < 0) - return errno; - len = read(fd, buf+1, sizeof(buf)-2); - close(fd); - - if (len < 0) - return EIO; - - /* Add sentinel values for the string searches */ - buf[0] = '\n'; - buf[len+1] = '\0'; - - b = strstr(buf, "gtt total"); - if (b == NULL) - return EIO; - - while (*b != '\n') - b--; - - sscanf(b, "%ld [%ld]", - &obj->max_gtt, &obj->max_aperture); - - return 0; -} - -static void insert_sorted(struct gem_objects *obj, - struct gem_objects_comm *comm) -{ - struct gem_objects_comm *next, **prev; - - for (prev = &obj->comm; (next = *prev) != NULL; prev = &next->next) - if (comm->bytes > next->bytes) - break; - - comm->next = *prev; - *prev = comm; -} - -int gem_objects_update(struct gem_objects *obj) -{ - char buf[8192], *b; - struct gem_objects_comm *comm; - struct gem_objects_comm *freed; - int fd, len, ret; - - freed = obj->comm; - obj->comm = NULL; - - sprintf(buf, "%s/i915_gem_objects", debugfs_dri_path); - fd = open(buf, 0); - if (fd < 0) { - ret = errno; - goto done; - } - len = read(fd, buf, sizeof(buf)-1); - close(fd); - - if (len < 0) { - ret = EIO; - goto done; - } - - buf[len] = '\0'; - while (buf[--len] == '\n') - buf[len] = '\0'; - - b = buf; - - sscanf(b, "%lu objects, %lu bytes", - &obj->total_count, &obj->total_bytes); - - b = strchr(b, '\n'); - sscanf(b, "%*d [%*d] objects, %lu [%lu] bytes in gtt", - &obj->total_gtt, &obj->total_aperture); - - ret = 0; - b = strchr(b, ':'); - if (b == NULL) - goto done; - - while (*b != '\n') - b--; - - do { - comm = freed; - if (comm) - freed = comm->next; - else - comm = malloc(sizeof(*comm)); - if (comm == NULL) - break; - - /* Xorg: 35 objects, 16347136 bytes (0 active, 12103680 inactive, 0 unbound) */ - sscanf(++b, "%256s %lu objects, %lu bytes", - comm->name, &comm->count, &comm->bytes); - - insert_sorted(obj, comm); - } while ((b = strchr(b, '\n')) != NULL); - -done: - while (freed) { - comm = freed; - freed = comm->next; - free(comm); - } - - return ret; -} diff --git a/overlay/gem-objects.h b/overlay/gem-objects.h deleted file mode 100644 index 2019ad4d..00000000 --- a/overlay/gem-objects.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef GEM_OBJECTS_H -#define GEM_OBJECTS_H - -#include <stdint.h> - -struct gem_objects { - long unsigned total_bytes, total_count; - long unsigned total_gtt, total_aperture; - long unsigned max_gtt, max_aperture; - struct gem_objects_comm { - struct gem_objects_comm *next; - char name[256]; - long unsigned bytes; - long unsigned count; - } *comm; -}; - -int gem_objects_init(struct gem_objects *obj); -int gem_objects_update(struct gem_objects *obj); - -#endif /* GEM_OBJECTS_H */ diff --git a/overlay/gpu-freq.c b/overlay/gpu-freq.c deleted file mode 100644 index a2d8f084..00000000 --- a/overlay/gpu-freq.c +++ /dev/null @@ -1,198 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <unistd.h> -#include <fcntl.h> -#include <errno.h> -#include <string.h> -#include <stdio.h> - -#include "gpu-freq.h" -#include "debugfs.h" -#include "perf.h" - -static int perf_i915_open(int config, int group) -{ - struct perf_event_attr attr; - - memset(&attr, 0, sizeof (attr)); - - attr.type = i915_type_id(); - if (attr.type == 0) - return -ENOENT; - attr.config = config; - - attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED; - if (group == -1) - attr.read_format |= PERF_FORMAT_GROUP; - - return perf_event_open(&attr, -1, 0, group, 0); -} - -static int perf_open(void) -{ - int fd; - - fd = perf_i915_open(I915_PERF_ACTUAL_FREQUENCY, -1); - if (perf_i915_open(I915_PERF_REQUESTED_FREQUENCY, fd) < 0) { - close(fd); - fd = -1; - } - - return fd; -} - -int gpu_freq_init(struct gpu_freq *gf) -{ - char buf[4096], *s; - int fd, len = -1; - - memset(gf, 0, sizeof(*gf)); - - gf->fd = perf_open(); - - sprintf(buf, "%s/i915_frequency_info", debugfs_dri_path); - fd = open(buf, 0); - if (fd < 0) { - sprintf(buf, "%s/i915_cur_delayinfo", debugfs_dri_path); - fd = open(buf, 0); - } - if (fd < 0) - return gf->error = errno; - - len = read(fd, buf, sizeof(buf)-1); - close(fd); - if (len < 0) - goto err; - - buf[len] = '\0'; - - if (strstr(buf, "PUNIT_REG_GPU_FREQ_STS")) { - /* Baytrail is special, ofc. */ - gf->is_byt = 1; - s = strstr(buf, "max"); - if (s == NULL) - goto err; - sscanf(s, "max GPU freq: %d MHz", &gf->max); - sscanf(s, "min GPU freq: %d MHz", &gf->min); - - gf->rp0 = gf->rp1 = gf->max; - gf->rpn = gf->min; - } else { - s = strstr(buf, "(RPN)"); - if (s == NULL) - goto err; - sscanf(s, "(RPN) frequency: %dMHz", &gf->rpn); - - s = strstr(s, "(RP1)"); - if (s == NULL) - goto err; - sscanf(s, "(RP1) frequency: %dMHz", &gf->rp1); - - s = strstr(s, "(RP0)"); - if (s == NULL) - goto err; - sscanf(s, "(RP0) frequency: %dMHz", &gf->rp0); - - s = strstr(s, "Max"); - if (s == NULL) - goto err; - sscanf(s, "Max overclocked frequency: %dMHz", &gf->max); - gf->min = gf->rpn; - } - - return 0; - -err: - return gf->error = EIO; -} - -int gpu_freq_update(struct gpu_freq *gf) -{ - if (gf->error) - return gf->error; - - if (gf->fd < 0) { - char buf[4096], *s; - int fd, len = -1; - - sprintf(buf, "%s/i915_frequency_info", debugfs_dri_path); - fd = open(buf, 0); - if (fd < 0) { - sprintf(buf, "%s/i915_cur_delayinfo", debugfs_dri_path); - fd = open(buf, 0); - } - if (fd < 0) - return gf->error = errno; - - len = read(fd, buf, sizeof(buf)-1); - close(fd); - if (len < 0) - return gf->error = EIO; - - buf[len] = '\0'; - - if (gf->is_byt) { - s = strstr(buf, "current"); - if (s) - sscanf(s, "current GPU freq: %d MHz", &gf->current); - gf->request = gf->current; - } else { - s = strstr(buf, "RPNSWREQ:"); - if (s) - sscanf(s, "RPNSWREQ: %dMHz", &gf->request); - - s = strstr(buf, "CAGF:"); - if (s) - sscanf(s, "CAGF: %dMHz", &gf->current); - } - } else { - struct gpu_freq_stat *s = &gf->stat[gf->count++&1]; - struct gpu_freq_stat *d = &gf->stat[gf->count&1]; - uint64_t data[4], d_time; - int len; - - len = read(gf->fd, data, sizeof(data)); - if (len < 0) - return gf->error = errno; - - s->timestamp = data[1]; - s->act = data[2]; - s->req = data[3]; - - if (gf->count == 1) - return EAGAIN; - - d_time = s->timestamp - d->timestamp; - if (d_time == 0) { - gf->count--; - return EAGAIN; - } - - gf->current = (s->act - d->act) / d_time; - gf->request = (s->req - d->req) / d_time; - } - - return 0; -} diff --git a/overlay/gpu-freq.h b/overlay/gpu-freq.h deleted file mode 100644 index 62b21f3b..00000000 --- a/overlay/gpu-freq.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef GPU_FREQ_H -#define GPU_FREQ_H - -#include <stdint.h> - -struct gpu_freq { - struct gpu_freq_stat { - uint64_t act, req; - uint64_t timestamp; - } stat[2]; - int fd; - int count; - int is_byt; - int min, max; - int rpn, rp1, rp0; - int request; - int current; - int error; -}; - -int gpu_freq_init(struct gpu_freq *gf); -int gpu_freq_update(struct gpu_freq *gf); - -#endif /* GPU_FREQ_H */ diff --git a/overlay/gpu-perf.c b/overlay/gpu-perf.c deleted file mode 100644 index 42ac44d5..00000000 --- a/overlay/gpu-perf.c +++ /dev/null @@ -1,408 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <stdint.h> -#include <stdbool.h> -#include <sys/types.h> -#include <sys/mman.h> -#include <sys/ioctl.h> -#include <unistd.h> -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <fcntl.h> -#include <errno.h> - -#include "perf.h" -#include "gpu-perf.h" -#include "debugfs.h" - -#if defined(__i386__) -#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") -#define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") -#endif - -#if defined(__x86_64__) -#define rmb() asm volatile("lfence" ::: "memory") -#define wmb() asm volatile("sfence" ::: "memory") -#endif - -#define N_PAGES 32 - -struct sample_event { - struct perf_event_header header; - uint32_t pid, tid; - uint64_t time; - uint64_t id; - uint32_t raw_size; - uint32_t raw_hdr0; - uint32_t raw_hdr1; - uint32_t raw[0]; -}; - -static uint64_t tracepoint_id(const char *sys, const char *name) -{ - char buf[1024]; - int fd, n; - - snprintf(buf, sizeof(buf), "%s/tracing/events/%s/%s/id", debugfs_path, sys, name); - fd = open(buf, 0); - if (fd < 0) - return 0; - n = read(fd, buf, sizeof(buf)-1); - close(fd); - if (n < 0) - return 0; - - buf[n] = '\0'; - return strtoull(buf, 0, 0); -} - -static int perf_tracepoint_open(struct gpu_perf *gp, - const char *sys, const char *name, - int (*func)(struct gpu_perf *, const void *)) -{ - struct perf_event_attr attr; - struct gpu_perf_sample *sample; - int n, *fd; - - memset(&attr, 0, sizeof (attr)); - - attr.type = PERF_TYPE_TRACEPOINT; - attr.config = tracepoint_id(sys, name); - if (attr.config == 0) - return ENOENT; - - attr.sample_period = 1; - attr.sample_type = (PERF_SAMPLE_TIME | PERF_SAMPLE_STREAM_ID | PERF_SAMPLE_TID | PERF_SAMPLE_RAW); - attr.read_format = PERF_FORMAT_ID; - - attr.exclude_guest = 1; - - n = gp->nr_cpus * (gp->nr_events+1); - fd = realloc(gp->fd, n*sizeof(int)); - sample = realloc(gp->sample, n*sizeof(*gp->sample)); - if (fd == NULL || sample == NULL) - return ENOMEM; - gp->fd = fd; - gp->sample = sample; - - fd += gp->nr_events * gp->nr_cpus; - sample += gp->nr_events * gp->nr_cpus; - for (n = 0; n < gp->nr_cpus; n++) { - uint64_t track[2]; - - fd[n] = perf_event_open(&attr, -1, n, -1, 0); - if (fd[n] == -1) - return errno; - - /* read back the event to establish id->tracepoint */ - if (read(fd[n], track, sizeof(track)) < 0) - return errno; - sample[n].id = track[1]; - sample[n].func = func; - } - - gp->nr_events++; - return 0; -} - -static int perf_mmap(struct gpu_perf *gp) -{ - int size = (1 + N_PAGES) * gp->page_size; - int *fd, i, j; - - gp->map = malloc(sizeof(void *)*gp->nr_cpus); - if (gp->map == NULL) - return ENOMEM; - - fd = gp->fd; - for (j = 0; j < gp->nr_cpus; j++) { - gp->map[j] = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, *fd++, 0); - if (gp->map[j] == (void *)-1) - goto err; - } - - for (i = 1; i < gp->nr_events; i++) { - for (j = 0; j < gp->nr_cpus; j++) - ioctl(*fd++, PERF_EVENT_IOC_SET_OUTPUT, gp->fd[j]); - } - - return 0; - -err: - while (--j > 0) - munmap(gp->map[j], size); - free(gp->map); - gp->map = NULL; - return EINVAL; -} - -static int get_comm(pid_t pid, char *comm, int len) -{ - char filename[1024]; - int fd; - - *comm = '\0'; - snprintf(filename, sizeof(filename), "/proc/%d/comm", pid); - - fd = open(filename, 0); - if (fd >= 0) { - len = read(fd, comm, len-1); - if (len >= 0) - comm[len-1] = '\0'; - close(fd); - } else - len = -1; - - return len; -} - -static struct gpu_perf_comm * -lookup_comm(struct gpu_perf *gp, pid_t pid) -{ - struct gpu_perf_comm *comm; - - if (pid == 0) - return NULL; - - for (comm = gp->comm; comm != NULL; comm = comm->next) { - if (comm->pid == pid) - break; - } - if (comm == NULL) { - comm = calloc(1, sizeof(*comm)); - if (comm == NULL) - return NULL; - - if (get_comm(pid, comm->name, sizeof(comm->name)) < 0) { - free(comm); - return NULL; - } - - comm->pid = pid; - comm->next = gp->comm; - gp->comm = comm; - } - - return comm; -} - -static int request_add(struct gpu_perf *gp, const void *event) -{ - const struct sample_event *sample = event; - struct gpu_perf_comm *comm; - - comm = lookup_comm(gp, sample->pid); - if (comm == NULL) - return 0; - - comm->nr_requests[sample->raw[1]]++; - return 1; -} - -static int flip_complete(struct gpu_perf *gp, const void *event) -{ - const struct sample_event *sample = event; - - gp->flip_complete[sample->raw[0]]++; - return 1; -} - -static int ctx_switch(struct gpu_perf *gp, const void *event) -{ - const struct sample_event *sample = event; - - gp->ctx_switch[sample->raw[1]]++; - return 1; -} - -static int ring_sync(struct gpu_perf *gp, const void *event) -{ - const struct sample_event *sample = event; - struct gpu_perf_comm *comm; - - comm = lookup_comm(gp, sample->pid); - if (comm == NULL) - return 0; - - comm->nr_sema++; - return 1; -} - -static int wait_begin(struct gpu_perf *gp, const void *event) -{ - const struct sample_event *sample = event; - struct gpu_perf_comm *comm; - struct gpu_perf_time *wait; - - comm = lookup_comm(gp, sample->pid); - if (comm == NULL) - return 0; - - wait = malloc(sizeof(*wait)); - if (wait == NULL) - return 0; - - wait->comm = comm; - wait->comm->active = true; - wait->seqno = sample->raw[2]; - wait->time = sample->time; - wait->next = gp->wait[sample->raw[1]]; - gp->wait[sample->raw[1]] = wait; - - return 0; -} - -static int wait_end(struct gpu_perf *gp, const void *event) -{ - const struct sample_event *sample = event; - struct gpu_perf_time *wait, **prev; - - for (prev = &gp->wait[sample->raw[1]]; (wait = *prev) != NULL; prev = &wait->next) { - if (wait->seqno != sample->raw[2]) - continue; - - wait->comm->wait_time += sample->time - wait->time; - wait->comm->active = false; - - *prev = wait->next; - free(wait); - return 1; - } - - return 0; -} - -void gpu_perf_init(struct gpu_perf *gp, unsigned flags) -{ - memset(gp, 0, sizeof(*gp)); - gp->nr_cpus = sysconf(_SC_NPROCESSORS_ONLN); - gp->page_size = getpagesize(); - - perf_tracepoint_open(gp, "i915", "i915_gem_request_add", request_add); - if (perf_tracepoint_open(gp, "i915", "i915_gem_request_wait_begin", wait_begin) == 0) - perf_tracepoint_open(gp, "i915", "i915_gem_request_wait_end", wait_end); - perf_tracepoint_open(gp, "i915", "i915_flip_complete", flip_complete); - perf_tracepoint_open(gp, "i915", "i915_gem_ring_sync_to", ring_sync); - perf_tracepoint_open(gp, "i915", "i915_gem_ring_switch_context", ctx_switch); - - if (gp->nr_events == 0) { - gp->error = "i915.ko tracepoints not available"; - return; - } - - if (perf_mmap(gp)) - return; -} - -static int process_sample(struct gpu_perf *gp, int cpu, - const struct perf_event_header *header) -{ - const struct sample_event *sample = (const struct sample_event *)header; - int n, update = 0; - - /* hash me! */ - for (n = 0; n < gp->nr_events; n++) { - int m = n * gp->nr_cpus + cpu; - if (gp->sample[m].id != sample->id) - continue; - - update = gp->sample[m].func(gp, sample); - break; - } - - return update; -} - -int gpu_perf_update(struct gpu_perf *gp) -{ - const int size = N_PAGES * gp->page_size; - const int mask = size - 1; - uint8_t *buffer = NULL; - int buffer_size = 0; - int n, update = 0; - - if (gp->map == NULL) - return 0; - - for (n = 0; n < gp->nr_cpus; n++) { - struct perf_event_mmap_page *mmap = gp->map[n]; - const uint8_t *data; - uint64_t head, tail; - int wrap = 0; - - tail = mmap->data_tail; - head = mmap->data_head; - rmb(); - - if (head < tail) { - wrap = 1; - tail &= mask; - head &= mask; - head += size; - } - - data = (uint8_t *)mmap + gp->page_size; - while (head - tail >= sizeof (struct perf_event_header)) { - const struct perf_event_header *header; - - header = (const struct perf_event_header *)(data + (tail & mask)); - if (header->size > head - tail) - break; - - if ((const uint8_t *)header + header->size > data + size) { - int before; - - if (header->size > buffer_size) { - uint8_t *b = realloc(buffer, header->size); - if (b == NULL) - break; - - buffer = b; - buffer_size = header->size; - } - - before = data + size - (const uint8_t *)header; - - memcpy(buffer, header, before); - memcpy(buffer + before, data, header->size - before); - - header = (struct perf_event_header *)buffer; - } - - if (header->type == PERF_RECORD_SAMPLE) - update += process_sample(gp, n, header); - tail += header->size; - } - - if (wrap) - tail &= mask; - mmap->data_tail = tail; - wmb(); - } - - free(buffer); - return update; -} diff --git a/overlay/gpu-perf.h b/overlay/gpu-perf.h deleted file mode 100644 index 3e363fb7..00000000 --- a/overlay/gpu-perf.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef GPU_PERF_H -#define GPU_PERF_H - -#include <stdint.h> -#include <stdbool.h> - -#define MAX_RINGS 4 - -struct gpu_perf { - const char *error; - int page_size; - int nr_cpus; - int nr_events; - int *fd; - void **map; - struct gpu_perf_sample { - uint64_t id; - int (*func)(struct gpu_perf *, const void *); - } *sample; - - unsigned flip_complete[MAX_RINGS]; - unsigned ctx_switch[MAX_RINGS]; - - struct gpu_perf_comm { - struct gpu_perf_comm *next; - char name[256]; - pid_t pid; - bool active; - int nr_requests[4]; - void *user_data; - - uint64_t wait_time; - uint32_t nr_sema; - - time_t show; - } *comm; - struct gpu_perf_time { - struct gpu_perf_time *next; - struct gpu_perf_comm *comm; - uint32_t seqno; - uint64_t time; - } *wait[MAX_RINGS]; -}; - -void gpu_perf_init(struct gpu_perf *gp, unsigned flags); -int gpu_perf_update(struct gpu_perf *gp); - -#endif /* GPU_PERF_H */ diff --git a/overlay/gpu-top.c b/overlay/gpu-top.c deleted file mode 100644 index 77166953..00000000 --- a/overlay/gpu-top.c +++ /dev/null @@ -1,323 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <stdint.h> -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <unistd.h> -#include <fcntl.h> -#include <errno.h> - -#include "perf.h" -#include "igfx.h" -#include "gpu-top.h" - -#define RING_TAIL 0x00 -#define RING_HEAD 0x04 -#define ADDR_MASK 0x001FFFFC -#define RING_CTL 0x0C -#define RING_WAIT (1<<11) -#define RING_WAIT_SEMAPHORE (1<<10) - -#define __I915_PERF_RING(n) (4*n) -#define I915_PERF_RING_BUSY(n) (__I915_PERF_RING(n) + 0) -#define I915_PERF_RING_WAIT(n) (__I915_PERF_RING(n) + 1) -#define I915_PERF_RING_SEMA(n) (__I915_PERF_RING(n) + 2) - -static int perf_i915_open(int config, int group) -{ - struct perf_event_attr attr; - - memset(&attr, 0, sizeof (attr)); - - attr.type = i915_type_id(); - if (attr.type == 0) - return -ENOENT; - attr.config = config; - - attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED; - if (group == -1) - attr.read_format |= PERF_FORMAT_GROUP; - - return perf_event_open(&attr, -1, 0, group, 0); -} - -static int perf_init(struct gpu_top *gt) -{ - const char *names[] = { - "RCS", - "VCS", - "BCS", - NULL, - }; - int n; - - gt->fd = perf_i915_open(I915_PERF_RING_BUSY(0), -1); - if (gt->fd < 0) - return -1; - - if (perf_i915_open(I915_PERF_RING_WAIT(0), gt->fd) >= 0) - gt->have_wait = 1; - - if (perf_i915_open(I915_PERF_RING_SEMA(0), gt->fd) >= 0) - gt->have_sema = 1; - - gt->ring[0].name = names[0]; - gt->num_rings = 1; - - for (n = 1; names[n]; n++) { - if (perf_i915_open(I915_PERF_RING_BUSY(n), gt->fd) >= 0) { - if (gt->have_wait && - perf_i915_open(I915_PERF_RING_WAIT(n), gt->fd) < 0) - return -1; - - if (gt->have_sema && - perf_i915_open(I915_PERF_RING_SEMA(n), gt->fd) < 0) - return -1; - - gt->ring[gt->num_rings++].name = names[n]; - } - } - - return 0; -} - -struct mmio_ring { - int id; - uint32_t base; - void *mmio; - int idle, wait, sema; -}; - -static uint32_t mmio_ring_read(struct mmio_ring *ring, uint32_t reg) -{ - return igfx_read(ring->mmio, ring->base + reg); -} - -static void mmio_ring_init(struct mmio_ring *ring, void *mmio) -{ - uint32_t ctl; - - ring->mmio = mmio; - - ctl = mmio_ring_read(ring, RING_CTL); - if ((ctl & 1) == 0) - ring->id = -1; -} - -static void mmio_ring_reset(struct mmio_ring *ring) -{ - ring->idle = 0; - ring->wait = 0; - ring->sema = 0; -} - -static void mmio_ring_sample(struct mmio_ring *ring) -{ - uint32_t head, tail, ctl; - - if (ring->id == -1) - return; - - head = mmio_ring_read(ring, RING_HEAD) & ADDR_MASK; - tail = mmio_ring_read(ring, RING_TAIL) & ADDR_MASK; - ring->idle += head == tail; - - ctl = mmio_ring_read(ring, RING_CTL); - ring->wait += !!(ctl & RING_WAIT); - ring->sema += !!(ctl & RING_WAIT_SEMAPHORE); -} - -static void mmio_ring_emit(struct mmio_ring *ring, int samples, union gpu_top_payload *payload) -{ - if (ring->id == -1) - return; - - payload[ring->id].u.busy = 100 - 100 * ring->idle / samples; - payload[ring->id].u.wait = 100 * ring->wait / samples; - payload[ring->id].u.sema = 100 * ring->sema / samples; -} - -static void mmio_init(struct gpu_top *gt) -{ - struct mmio_ring render_ring = { - .base = 0x2030, - .id = 0, - }, bsd_ring = { - .base = 0x4030, - .id = 1, - }, bsd6_ring = { - .base = 0x12030, - .id = 1, - }, blt_ring = { - .base = 0x22030, - .id = 2, - }; - const struct igfx_info *info; - struct pci_device *igfx; - void *mmio; - int fd[2], i; - - igfx = igfx_get(); - if (!igfx) - return; - - if (pipe(fd) < 0) - return; - - info = igfx_get_info(igfx); - - switch (fork()) { - case -1: return; - default: - fcntl(fd[0], F_SETFL, fcntl(fd[0], F_GETFL) | O_NONBLOCK); - gt->fd = fd[0]; - gt->type = MMIO; - gt->ring[0].name = "render"; - gt->num_rings = 1; - if (info->gen >= 040) { - gt->ring[1].name = "bitstream"; - gt->num_rings++; - } - if (info->gen >= 060) { - gt->ring[2].name = "blt"; - gt->num_rings++; - } - close(fd[1]); - return; - case 0: - close(fd[0]); - break; - } - - mmio = igfx_get_mmio(igfx); - if (mmio == NULL) - exit(127); - - mmio_ring_init(&render_ring, mmio); - if (info->gen >= 060) { - bsd_ring = bsd6_ring; - mmio_ring_init(&blt_ring, mmio); - } - if (info->gen >= 040) { - mmio_ring_init(&bsd_ring, mmio); - } - - for (;;) { - union gpu_top_payload payload[MAX_RINGS]; - - mmio_ring_reset(&render_ring); - mmio_ring_reset(&bsd_ring); - mmio_ring_reset(&blt_ring); - - for (i = 0; i < 1000; i++) { - mmio_ring_sample(&render_ring); - mmio_ring_sample(&bsd_ring); - mmio_ring_sample(&blt_ring); - usleep(1000); - } - - mmio_ring_emit(&render_ring, 1000, payload); - mmio_ring_emit(&bsd_ring, 1000, payload); - mmio_ring_emit(&blt_ring, 1000, payload); - - write(fd[1], payload, sizeof(payload)); - } -} - -void gpu_top_init(struct gpu_top *gt) -{ - memset(gt, 0, sizeof(*gt)); - gt->fd = -1; - - if (perf_init(gt) == 0) - return; - - mmio_init(gt); -} - -int gpu_top_update(struct gpu_top *gt) -{ - uint32_t data[1024]; - int update, len; - - if (gt->fd < 0) - return 0; - - if (gt->type == PERF) { - struct gpu_top_stat *s = >->stat[gt->count++&1]; - struct gpu_top_stat *d = >->stat[gt->count&1]; - uint64_t *sample, d_time; - int n, m; - - len = read(gt->fd, data, sizeof(data)); - if (len < 0) - return 0; - - sample = (uint64_t *)data + 1; - - s->time = *sample++; - for (n = m = 0; n < gt->num_rings; n++) { - s->busy[n] = sample[m++]; - if (gt->have_wait) - s->wait[n] = sample[m++]; - if (gt->have_sema) - s->sema[n] = sample[m++]; - } - - if (gt->count == 1) - return 0; - - d_time = s->time - d->time; - for (n = 0; n < gt->num_rings; n++) { - gt->ring[n].u.u.busy = (100 * (s->busy[n] - d->busy[n]) + d_time/2) / d_time; - if (gt->have_wait) - gt->ring[n].u.u.wait = (100 * (s->wait[n] - d->wait[n]) + d_time/2) / d_time; - if (gt->have_sema) - gt->ring[n].u.u.sema = (100 * (s->sema[n] - d->sema[n]) + d_time/2) / d_time; - - /* in case of rounding + sampling errors, fudge */ - if (gt->ring[n].u.u.busy > 100) - gt->ring[n].u.u.busy = 100; - if (gt->ring[n].u.u.wait > 100) - gt->ring[n].u.u.wait = 100; - if (gt->ring[n].u.u.sema > 100) - gt->ring[n].u.u.sema = 100; - } - - update = 1; - } else { - while ((len = read(gt->fd, data, sizeof(data))) > 0) { - uint32_t *ptr = &data[len/sizeof(uint32_t) - MAX_RINGS]; - gt->ring[0].u.payload = ptr[0]; - gt->ring[1].u.payload = ptr[1]; - gt->ring[2].u.payload = ptr[2]; - gt->ring[3].u.payload = ptr[3]; - update = 1; - } - } - - return update; -} diff --git a/overlay/gpu-top.h b/overlay/gpu-top.h deleted file mode 100644 index cdff0cf9..00000000 --- a/overlay/gpu-top.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef GPU_TOP_H -#define GPU_TOP_H - -#define MAX_RINGS 4 - -#include <stdint.h> - -struct gpu_top { - enum { PERF, MMIO } type; - int fd; - - int num_rings; - int have_wait; - int have_sema; - - struct gpu_top_ring { - const char *name; - union gpu_top_payload { - struct { - uint8_t busy; - uint8_t wait; - uint8_t sema; - } u; - uint32_t payload; - } u; - } ring[MAX_RINGS]; - - struct gpu_top_stat { - uint64_t time; - uint64_t busy[MAX_RINGS]; - uint64_t wait[MAX_RINGS]; - uint64_t sema[MAX_RINGS]; - } stat[2]; - int count; -}; - -void gpu_top_init(struct gpu_top *gt); -int gpu_top_update(struct gpu_top *gt); - -#endif /* GPU_TOP_H */ diff --git a/overlay/i915_pciids.h b/overlay/i915_pciids.h deleted file mode 100644 index 8a10f5c3..00000000 --- a/overlay/i915_pciids.h +++ /dev/null @@ -1,211 +0,0 @@ -/* - * Copyright 2013 Intel Corporation - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#ifndef _I915_PCIIDS_H -#define _I915_PCIIDS_H - -/* - * A pci_device_id struct { - * __u32 vendor, device; - * __u32 subvendor, subdevice; - * __u32 class, class_mask; - * kernel_ulong_t driver_data; - * }; - * Don't use C99 here because "class" is reserved and we want to - * give userspace flexibility. - */ -#define INTEL_VGA_DEVICE(id, info) { \ - 0x8086, id, \ - ~0, ~0, \ - 0x030000, 0xff0000, \ - (unsigned long) info } - -#define INTEL_QUANTA_VGA_DEVICE(info) { \ - 0x8086, 0x16a, \ - 0x152d, 0x8990, \ - 0x030000, 0xff0000, \ - (unsigned long) info } - -#define INTEL_I830_IDS(info) \ - INTEL_VGA_DEVICE(0x3577, info) - -#define INTEL_I845G_IDS(info) \ - INTEL_VGA_DEVICE(0x2562, info) - -#define INTEL_I85X_IDS(info) \ - INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \ - INTEL_VGA_DEVICE(0x358e, info) - -#define INTEL_I865G_IDS(info) \ - INTEL_VGA_DEVICE(0x2572, info) /* I865_G */ - -#define INTEL_I915G_IDS(info) \ - INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \ - INTEL_VGA_DEVICE(0x258a, info) /* E7221_G */ - -#define INTEL_I915GM_IDS(info) \ - INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */ - -#define INTEL_I945G_IDS(info) \ - INTEL_VGA_DEVICE(0x2772, info) /* I945_G */ - -#define INTEL_I945GM_IDS(info) \ - INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \ - INTEL_VGA_DEVICE(0x27ae, info) /* I945_GME */ - -#define INTEL_I965G_IDS(info) \ - INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */ \ - INTEL_VGA_DEVICE(0x2982, info), /* G35_G */ \ - INTEL_VGA_DEVICE(0x2992, info), /* I965_Q */ \ - INTEL_VGA_DEVICE(0x29a2, info) /* I965_G */ - -#define INTEL_G33_IDS(info) \ - INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \ - INTEL_VGA_DEVICE(0x29c2, info), /* G33_G */ \ - INTEL_VGA_DEVICE(0x29d2, info) /* Q33_G */ - -#define INTEL_I965GM_IDS(info) \ - INTEL_VGA_DEVICE(0x2a02, info), /* I965_GM */ \ - INTEL_VGA_DEVICE(0x2a12, info) /* I965_GME */ - -#define INTEL_GM45_IDS(info) \ - INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */ - -#define INTEL_G45_IDS(info) \ - INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \ - INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \ - INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \ - INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \ - INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \ - INTEL_VGA_DEVICE(0x2e92, info) /* B43_G.1 */ - -#define INTEL_PINEVIEW_IDS(info) \ - INTEL_VGA_DEVICE(0xa001, info), \ - INTEL_VGA_DEVICE(0xa011, info) - -#define INTEL_IRONLAKE_D_IDS(info) \ - INTEL_VGA_DEVICE(0x0042, info) - -#define INTEL_IRONLAKE_M_IDS(info) \ - INTEL_VGA_DEVICE(0x0046, info) - -#define INTEL_SNB_D_IDS(info) \ - INTEL_VGA_DEVICE(0x0102, info), \ - INTEL_VGA_DEVICE(0x0112, info), \ - INTEL_VGA_DEVICE(0x0122, info), \ - INTEL_VGA_DEVICE(0x010A, info) - -#define INTEL_SNB_M_IDS(info) \ - INTEL_VGA_DEVICE(0x0106, info), \ - INTEL_VGA_DEVICE(0x0116, info), \ - INTEL_VGA_DEVICE(0x0126, info) - -#define INTEL_IVB_M_IDS(info) \ - INTEL_VGA_DEVICE(0x0156, info), /* GT1 mobile */ \ - INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */ - -#define INTEL_IVB_D_IDS(info) \ - INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \ - INTEL_VGA_DEVICE(0x015a, info), /* GT1 server */ \ - INTEL_VGA_DEVICE(0x016a, info) /* GT2 server */ - -#define INTEL_IVB_Q_IDS(info) \ - INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */ - -#define INTEL_HSW_D_IDS(info) \ - INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ - INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \ - INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ - INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ - INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ - INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ - INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ - INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \ - INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ - INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ - INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ - INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \ - INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ - INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ - INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ - INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ - INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ - INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \ - INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ - INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ - INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ - INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \ - INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ - INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ - INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \ - INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ - INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ - INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ - INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0D2E, info) /* CRW GT3 reserved */ \ - -#define INTEL_HSW_M_IDS(info) \ - INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ - INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ - INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ - INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ - INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ - INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \ - INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ - INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ - INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ - INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ - -#define INTEL_VLV_M_IDS(info) \ - INTEL_VGA_DEVICE(0x0f30, info), \ - INTEL_VGA_DEVICE(0x0f31, info), \ - INTEL_VGA_DEVICE(0x0f32, info), \ - INTEL_VGA_DEVICE(0x0f33, info), \ - INTEL_VGA_DEVICE(0x0157, info) - -#define INTEL_VLV_D_IDS(info) \ - INTEL_VGA_DEVICE(0x0155, info) - -#endif /* _I915_PCIIDS_H */ diff --git a/overlay/igfx.c b/overlay/igfx.c deleted file mode 100644 index d53ebc7d..00000000 --- a/overlay/igfx.c +++ /dev/null @@ -1,241 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <pciaccess.h> -#include <sys/stat.h> -#include <unistd.h> -#include <fcntl.h> -#include <stdio.h> - -#include "igfx.h" -#include "i915_pciids.h" - -static const struct igfx_info generic_info = { - .gen = -1, -}; - -static const struct igfx_info i81x_info = { - .gen = 010, -}; - -static const struct igfx_info i830_info = { - .gen = 020, -}; -static const struct igfx_info i845_info = { - .gen = 020, -}; -static const struct igfx_info i855_info = { - .gen = 021, -}; -static const struct igfx_info i865_info = { - .gen = 022, -}; - -static const struct igfx_info i915_info = { - .gen = 030, -}; -static const struct igfx_info i945_info = { - .gen = 031, -}; - -static const struct igfx_info g33_info = { - .gen = 033, -}; - -static const struct igfx_info i965_info = { - .gen = 040, -}; - -static const struct igfx_info g4x_info = { - .gen = 045, -}; - -static const struct igfx_info ironlake_info = { - .gen = 050, -}; - -static const struct igfx_info sandybridge_info = { - .gen = 060, -}; - -static const struct igfx_info ivybridge_info = { - .gen = 070, -}; - -static const struct igfx_info valleyview_info = { - .gen = 071, -}; - -static const struct igfx_info haswell_info = { - .gen = 075, -}; - -static const struct pci_id_match match[] = { -#if 0 - INTEL_VGA_DEVICE(PCI_CHIP_I810, &i81x_info), - INTEL_VGA_DEVICE(PCI_CHIP_I810_DC100, &i81x_info), - INTEL_VGA_DEVICE(PCI_CHIP_I810_E, &i81x_info), - INTEL_VGA_DEVICE(PCI_CHIP_I815, &i81x_info), -#endif - - INTEL_I830_IDS(&i830_info), - INTEL_I845G_IDS(&i830_info), - INTEL_I85X_IDS(&i855_info), - INTEL_I865G_IDS(&i865_info), - - INTEL_I915G_IDS(&i915_info), - INTEL_I915GM_IDS(&i915_info), - INTEL_I945G_IDS(&i945_info), - INTEL_I945GM_IDS(&i945_info), - - INTEL_G33_IDS(&g33_info), - INTEL_PINEVIEW_IDS(&g33_info), - - INTEL_I965G_IDS(&i965_info), - INTEL_I965GM_IDS(&i965_info), - - INTEL_G45_IDS(&g4x_info), - INTEL_GM45_IDS(&g4x_info), - - INTEL_IRONLAKE_D_IDS(&ironlake_info), - INTEL_IRONLAKE_M_IDS(&ironlake_info), - - INTEL_SNB_D_IDS(&sandybridge_info), - INTEL_SNB_M_IDS(&sandybridge_info), - - INTEL_IVB_D_IDS(&ivybridge_info), - INTEL_IVB_M_IDS(&ivybridge_info), - - INTEL_HSW_D_IDS(&haswell_info), - INTEL_HSW_M_IDS(&haswell_info), - - INTEL_VLV_D_IDS(&valleyview_info), - INTEL_VLV_M_IDS(&valleyview_info), - - INTEL_VGA_DEVICE(PCI_MATCH_ANY, &generic_info), - - { 0, 0, 0 }, -}; - -struct pci_device *igfx_get(void) -{ - struct pci_device *dev; - - if (pci_system_init()) - return 0; - - dev = pci_device_find_by_slot(0, 0, 2, 0); - if (dev == NULL || dev->vendor_id != 0x8086) { - struct pci_device_iterator *iter; - - iter = pci_id_match_iterator_create(match); - if (!iter) - return 0; - - dev = pci_device_next(iter); - pci_iterator_destroy(iter); - } - - return dev; -} - -const struct igfx_info *igfx_get_info(struct pci_device *dev) -{ - int i; - - if (!dev) - return 0; - - for (i = 0; match[i].device_id != PCI_MATCH_ANY; i++) - if (dev->device_id == match[i].device_id) - return (const struct igfx_info *)match[i].match_data; - - return &generic_info; -} - -static int forcewake = -1; - -static void -igfx_forcewake(void) -{ - char buf[1024]; - const char *path[] = { - "/sys/kernel/debug/dri/", - "/debug/dri/", - 0, - }; - int i, j; - - for (j = 0; path[j]; j++) { - struct stat st; - - if (stat(path[j], &st)) - continue; - - for (i = 0; i < 16; i++) { - snprintf(buf, sizeof(buf), - "%s/%i/i915_forcewake_user", - path[j], i); - forcewake = open(buf, 0); - if (forcewake != -1) - return; - } - } -} - -void *igfx_get_mmio(struct pci_device *dev) -{ - const struct igfx_info *info; - int mmio_bar, mmio_size; - void *mmio; - - info = igfx_get_info(dev); - if (info->gen >> 3 == 2) - mmio_bar = 1; - else - mmio_bar = 0; - - if (info->gen < 030) - mmio_size = 512*1024; - else if (info->gen < 050) - mmio_size = 512*1024; - else - mmio_size = 2*1024*1024; - - if (pci_device_probe(dev)) - return 0; - - if (pci_device_map_range(dev, - dev->regions[mmio_bar].base_addr, - mmio_size, - PCI_DEV_MAP_FLAG_WRITABLE, - &mmio)) - return 0; - - if (info->gen >= 060) - igfx_forcewake(); - - return mmio; -} - diff --git a/overlay/igfx.h b/overlay/igfx.h deleted file mode 100644 index c99af186..00000000 --- a/overlay/igfx.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef IGFX_H -#define IGFX_H - -struct igfx_info { - int gen; -}; - -struct pci_device; - -struct pci_device *igfx_get(void); -const struct igfx_info *igfx_get_info(struct pci_device *pci_dev); -void *igfx_get_mmio(struct pci_device *pci_dev); - -static inline uint32_t -igfx_read(void *mmio, uint32_t reg) -{ - return *(volatile uint32_t *)((volatile char *)mmio + reg); -} - -#endif /* IGFX_H */ diff --git a/overlay/kms/kms-overlay.c b/overlay/kms/kms-overlay.c deleted file mode 100644 index cfb3d5ae..00000000 --- a/overlay/kms/kms-overlay.c +++ /dev/null @@ -1,334 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <sys/types.h> -#include <sys/mman.h> -#include <cairo.h> -#include <stdio.h> -#include <stdlib.h> -#include <stdbool.h> -#include <string.h> -#include <unistd.h> -#include <fcntl.h> - -#include <drm.h> -#include <drm_fourcc.h> -#include <xf86drm.h> -#include <xf86drmMode.h> -#include <i915_drm.h> -#include "../overlay.h" -//#include "rgb2yuv.h" - -#ifndef ALIGN -#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) -#endif - -struct kms_image { - uint32_t handle, name; - uint32_t format; - uint32_t width, height, stride; - uint32_t size; - void *map; -}; - -struct kms_overlay { - struct overlay base; - struct kms_image image; - int fd; - int crtc; - - int x, y; - int visible; - - void *mem; - int size; -}; - -static inline struct kms_overlay *to_kms_overlay(struct overlay *o) -{ - return (struct kms_overlay *)o; -} - -static int kms_create_fb(int fd, struct kms_image *image) -{ - uint32_t offsets[4], pitches[4], handles[4]; - - handles[0] = image->handle; - pitches[0] = image->stride; - offsets[0] = 0; - - return drmModeAddFB2(fd, - image->width, image->height, image->format, - handles, pitches, offsets, - &image->name, 0) == 0; -} - -static int attach_to_crtc(int fd, int crtc, int x, int y, struct kms_image *image) -{ - struct drm_mode_set_plane s; - - s.crtc_id = crtc; - s.fb_id = image->name; - s.flags = 0; - s.crtc_x = x; - s.crtc_y = y; - s.crtc_w = image->width; - s.crtc_h = image->height; - s.src_x = 0; - s.src_y = 0; - s.src_w = image->width << 16; - s.src_h = image->height << 16; - - return drmIoctl(fd, DRM_IOCTL_MODE_SETPLANE, &s) == 0; -} - -static int detach_from_crtc(int fd, int crtc) -{ - struct drm_mode_set_plane s; - - memset(&s, 0, sizeof(s)); - s.crtc_id = crtc; - return drmIoctl(fd, DRM_IOCTL_MODE_SETPLANE, &s) == 0; -} - -static void kms_overlay_show(struct overlay *overlay) -{ - struct kms_overlay *priv = to_kms_overlay(overlay); - - memcpy(priv->image.map, priv->mem, priv->size); - - if (!priv->visible) { - attach_to_crtc(priv->fd, priv->crtc, priv->x, priv->y, &priv->image); - priv->visible = true; - } -} - -static void kms_overlay_hide(struct overlay *overlay) -{ - struct kms_overlay *priv = to_kms_overlay(overlay); - - if (priv->visible) { - detach_from_crtc(priv->fd, priv->crtc); - priv->visible = false; - } -} - -static void kms_overlay_destroy(void *data) -{ - struct kms_overlay *priv = data; - drmIoctl(priv->fd, DRM_IOCTL_MODE_RMFB, &priv->image.name); - munmap(priv->image.map, priv->image.size); - free(priv->mem); - close(priv->fd); - free(priv); -} - -static int is_i915_device(int fd) -{ - drm_version_t version; - char name[5] = ""; - - memset(&version, 0, sizeof(version)); - version.name_len = 4; - version.name = name; - - if (drmIoctl(fd, DRM_IOCTL_VERSION, &version)) - return 0; - - return strcmp("i915", name) == 0; -} - -static int check_device(int fd) -{ - int ret; - - /* Confirm that this is a i915.ko device with GEM/KMS enabled */ - ret = is_i915_device(fd); - if (ret) { - struct drm_i915_getparam gp; - gp.param = I915_PARAM_HAS_GEM; - gp.value = &ret; - if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) - ret = 0; - } - if (ret) { - struct drm_mode_card_res res; - - memset(&res, 0, sizeof(res)); - if (drmIoctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res)) - ret = 0; - } - - return ret; -} - -static int i915_open(void) -{ - char buf[80]; - int fd, n; - - for (n = 0; n < 16; n++) { - sprintf(buf, "/dev/dri/card%d", n); - fd = open(buf, O_RDWR); - if (fd == -1) - continue; - - if (!check_device(fd)) { - close(fd); - continue; - } - return fd; - } - - return -1; -} - -static int config_get_pipe(struct config *config) -{ - const char *str; - - str = config_get_value(config, "kms", "pipe"); - if (str == NULL) - return 0; - - return atoi(str); -} - -cairo_surface_t * -kms_overlay_create(struct config *config, int *width, int *height) -{ - struct drm_i915_gem_create create; - struct drm_i915_gem_mmap_gtt map; - struct kms_overlay *priv; - drmModeResPtr kmode; - int i, pipe; - - priv = malloc(sizeof(*priv)); - if (priv == NULL) - return NULL; - - priv->fd = i915_open(); - if (priv->fd == -1) - goto err_priv; - - kmode = drmModeGetResources(priv->fd); - if (kmode == 0) - goto err_fd; - - pipe = config_get_pipe(config); - priv->crtc = 0; - - for (i = 0; i < kmode->count_crtcs; i++) { - struct drm_i915_get_pipe_from_crtc_id get_pipe; - - get_pipe.pipe = 0; - get_pipe.crtc_id = kmode->crtcs[i]; - if (drmIoctl(priv->fd, - DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID, - &get_pipe)) { - continue; - } - - if (get_pipe.pipe != pipe) - continue; - - priv->crtc = get_pipe.crtc_id; - } - - if (priv->crtc == 0) - goto err_fd; - - priv->image.format = DRM_FORMAT_XRGB8888; - priv->image.width = ALIGN(*width, 4); - priv->image.height = ALIGN(*height, 2); - priv->image.stride = ALIGN(4*priv->image.width, 64); - priv->image.size = ALIGN(priv->image.stride * priv->image.height, 4096); - - create.handle = 0; - create.size = ALIGN(priv->image.size, 4096); - drmIoctl(priv->fd, DRM_IOCTL_I915_GEM_CREATE, &create); - if (create.handle == 0) - goto err_fd; - - priv->image.handle = create.handle; - - if (!kms_create_fb(priv->fd, &priv->image)) - goto err_create; - - /* XXX set color keys */ - - if (!attach_to_crtc(priv->fd, priv->crtc, 0, 0, &priv->image)) - goto err_fb; - detach_from_crtc(priv->fd, priv->crtc); - - map.handle = create.handle; - if (drmIoctl(priv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &map)) - goto err_fb; - - priv->image.map = mmap(0, create.size, PROT_READ | PROT_WRITE, MAP_SHARED, priv->fd, map.offset); - if (priv->image.map == (void *)-1) - goto err_fb; - - priv->mem = malloc(create.size); - if (priv->mem == NULL) - goto err_map; - - priv->base.surface = - cairo_image_surface_create_for_data(priv->mem, - CAIRO_FORMAT_RGB24, - priv->image.width, - priv->image.height, - priv->image.stride); - if (cairo_surface_status(priv->base.surface)) - goto err_mem; - - priv->base.show = kms_overlay_show; - priv->base.hide = kms_overlay_hide; - - priv->visible = false; - priv->x = 0; - priv->y = 0; - - cairo_surface_set_user_data(priv->base.surface, &overlay_key, priv, kms_overlay_destroy); - - *width = priv->image.width; - *height = priv->image.height; - - drmIoctl(priv->fd, DRM_IOCTL_GEM_CLOSE, &create.handle); - return priv->base.surface; - -err_mem: - free(priv->mem); -err_map: - munmap(priv->image.map, create.size); -err_fb: - drmIoctl(priv->fd, DRM_IOCTL_MODE_RMFB, &priv->image.name); -err_create: - drmIoctl(priv->fd, DRM_IOCTL_GEM_CLOSE, &create.handle); -err_fd: - close(priv->fd); -err_priv: - free(priv); - return NULL; -} diff --git a/overlay/overlay.c b/overlay/overlay.c deleted file mode 100644 index 36154668..00000000 --- a/overlay/overlay.c +++ /dev/null @@ -1,965 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <sys/types.h> -#include <sys/mman.h> -#include <cairo.h> -#include <stdio.h> -#include <stdlib.h> -#include <stdbool.h> -#include <string.h> -#include <unistd.h> -#include <fcntl.h> -#include <errno.h> -#include <signal.h> -#include <getopt.h> -#include <time.h> - -#include "overlay.h" -#include "chart.h" -#include "config.h" -#include "cpu-top.h" -#include "debugfs.h" -#include "gem-interrupts.h" -#include "gem-objects.h" -#include "gpu-freq.h" -#include "gpu-top.h" -#include "gpu-perf.h" -#include "power.h" -#include "rc6.h" - -#define is_power_of_two(x) (((x) & ((x)-1)) == 0) - -#define PAD 10 -#define HALF_PAD 5 -#define SIZE_PAD (PAD + HALF_PAD) - -#define IDLE_TIME 30 - -const cairo_user_data_key_t overlay_key; - -static void overlay_show(cairo_surface_t *surface) -{ - struct overlay *overlay; - - overlay = cairo_surface_get_user_data(surface, &overlay_key); - if (overlay == NULL) - return; - - overlay->show(overlay); -} - -#if 0 -static void overlay_position(cairo_surface_t *surface, enum position p) -{ - struct overlay *overlay; - - overlay = cairo_surface_get_user_data(surface, &overlay_key); - if (overlay == NULL) - return; - - overlay->position(overlay, p); -} - -static void overlay_hide(cairo_surface_t *surface) -{ - struct overlay *overlay; - - overlay = cairo_surface_get_user_data(surface, &overlay_key); - if (overlay == NULL) - return; - - overlay->hide(overlay); -} -#endif - -struct overlay_gpu_top { - struct gpu_top gpu_top; - struct cpu_top cpu_top; - struct chart busy[MAX_RINGS]; - struct chart wait[MAX_RINGS]; - struct chart cpu; -}; - -struct overlay_gpu_perf { - struct gpu_perf gpu_perf; - time_t show_ctx; - time_t show_flips; -}; - -struct overlay_gpu_freq { - struct gpu_freq gpu_freq; - struct rc6 rc6; - struct gem_interrupts irqs; - struct power power; - struct chart current; - struct chart request; - struct chart power_chart; - double power_max; -}; - -struct overlay_gem_objects { - struct gem_objects gem_objects; - struct chart aperture; - struct chart gtt; - int error; -}; - -struct overlay_context { - cairo_surface_t *surface; - cairo_t *cr; - int width, height; - - time_t time; - - struct overlay_gpu_top gpu_top; - struct overlay_gpu_perf gpu_perf; - struct overlay_gpu_freq gpu_freq; - struct overlay_gem_objects gem_objects; -}; - -static void init_gpu_top(struct overlay_context *ctx, - struct overlay_gpu_top *gt) -{ - const double rgba[][4] = { - { 1, 0.25, 0.25, 1 }, - { 0.25, 1, 0.25, 1 }, - { 0.25, 0.25, 1, 1 }, - { 1, 1, 1, 1 }, - }; - int n; - - cpu_top_init(>->cpu_top); - gpu_top_init(>->gpu_top); - - chart_init(>->cpu, "CPU", 120); - chart_set_position(>->cpu, PAD, PAD); - chart_set_size(>->cpu, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); - chart_set_stroke_rgba(>->cpu, 0.75, 0.25, 0.75, 1.); - chart_set_mode(>->cpu, CHART_STROKE); - chart_set_range(>->cpu, 0, 100); - - for (n = 0; n < gt->gpu_top.num_rings; n++) { - chart_init(>->busy[n], - gt->gpu_top.ring[n].name, - 120); - chart_set_position(>->busy[n], PAD, PAD); - chart_set_size(>->busy[n], ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); - chart_set_stroke_rgba(>->busy[n], - rgba[n][0], rgba[n][1], rgba[n][2], rgba[n][3]); - chart_set_mode(>->busy[n], CHART_STROKE); - chart_set_range(>->busy[n], 0, 100); - } - - for (n = 0; n < gt->gpu_top.num_rings; n++) { - chart_init(>->wait[n], - gt->gpu_top.ring[n].name, - 120); - chart_set_position(>->wait[n], PAD, PAD); - chart_set_size(>->wait[n], ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); - chart_set_fill_rgba(>->wait[n], - rgba[n][0], rgba[n][1], rgba[n][2], rgba[n][3] * 0.70); - chart_set_mode(>->wait[n], CHART_FILL); - chart_set_range(>->wait[n], 0, 100); - } -} - -static void show_gpu_top(struct overlay_context *ctx, struct overlay_gpu_top *gt) -{ - int y, y1, y2, n, update, len; - cairo_pattern_t *linear; - char txt[160]; - int rewind; - int do_rewind; - - update = gpu_top_update(>->gpu_top); - - cairo_rectangle(ctx->cr, PAD-.5, PAD-.5, ctx->width/2-SIZE_PAD+1, ctx->height/2-SIZE_PAD+1); - cairo_set_source_rgb(ctx->cr, .15, .15, .15); - cairo_set_line_width(ctx->cr, 1); - cairo_stroke(ctx->cr); - - if (update && cpu_top_update(>->cpu_top) == 0) - chart_add_sample(>->cpu, gt->cpu_top.busy); - - for (n = 0; n < gt->gpu_top.num_rings; n++) { - if (update) - chart_add_sample(>->wait[n], - gt->gpu_top.ring[n].u.u.wait + gt->gpu_top.ring[n].u.u.sema); - chart_draw(>->wait[n], ctx->cr); - } - for (n = 0; n < gt->gpu_top.num_rings; n++) { - if (update) - chart_add_sample(>->busy[n], - gt->gpu_top.ring[n].u.u.busy); - chart_draw(>->busy[n], ctx->cr); - } - chart_draw(>->cpu, ctx->cr); - - y1 = PAD - 2; - y2 = y1 + (gt->gpu_top.num_rings+1) * 14 + 4; - - cairo_rectangle(ctx->cr, PAD, y1, ctx->width/2-SIZE_PAD, y2-y1); - linear = cairo_pattern_create_linear(PAD, 0, PAD+ctx->width/2-SIZE_PAD, 0); - cairo_pattern_add_color_stop_rgba(linear, 0, 0, 0, 0, .5); - cairo_pattern_add_color_stop_rgba(linear, 1, 0, 0, 0, .0); - cairo_set_source(ctx->cr, linear); - cairo_pattern_destroy(linear); - cairo_fill(ctx->cr); - - y = PAD + 12 - 2; - cairo_set_source_rgba(ctx->cr, 0.75, 0.25, 0.75, 1.); - cairo_move_to(ctx->cr, PAD, y); - rewind = len = sprintf(txt, "CPU: %3d%% busy", gt->cpu_top.busy * gt->cpu_top.nr_cpu); - do_rewind = 1; - len += sprintf(txt + len, " ("); - if (gt->cpu_top.nr_cpu > 1) { - len += sprintf(txt + len, "%s%d cores", do_rewind ? "" : ", ", gt->cpu_top.nr_cpu); - do_rewind = 0; - } - if (gt->cpu_top.nr_running) { - len += sprintf(txt + len, "%s%d processes", do_rewind ? "" : ", ", gt->cpu_top.nr_running); - do_rewind = 0; - } - sprintf(txt + len, ")"); - if (do_rewind) - txt[rewind] = '\0'; - cairo_show_text(ctx->cr, txt); - y += 14; - - for (n = 0; n < gt->gpu_top.num_rings; n++) { - struct chart *c =>->busy[n]; - - len = sprintf(txt, "%s: %3d%% busy", - gt->gpu_top.ring[n].name, - gt->gpu_top.ring[n].u.u.busy); - if (gt->gpu_top.ring[n].u.u.wait) - len += sprintf(txt + len, ", %d%% wait", - gt->gpu_top.ring[n].u.u.wait); - if (gt->gpu_top.ring[n].u.u.sema) - len += sprintf(txt + len, ", %d%% sema", - gt->gpu_top.ring[n].u.u.sema); - - cairo_set_source_rgba(ctx->cr, - c->stroke_rgb[0], - c->stroke_rgb[1], - c->stroke_rgb[2], - c->stroke_rgb[3]); - cairo_move_to(ctx->cr, PAD, y); - cairo_show_text(ctx->cr, txt); - y += 14; - } -} - -static void init_gpu_perf(struct overlay_context *ctx, - struct overlay_gpu_perf *gp) -{ - gpu_perf_init(&gp->gpu_perf, 0); - - gp->show_ctx = 0; - gp->show_flips = 0; -} - -static char *get_comm(pid_t pid, char *comm, int len) -{ - char filename[1024]; - int fd; - - *comm = '\0'; - snprintf(filename, sizeof(filename), "/proc/%d/comm", pid); - - fd = open(filename, 0); - if (fd >= 0) { - len = read(fd, comm, len); - if (len >= 0) - comm[len-1] = '\0'; - close(fd); - } - - return comm; -} - -static void show_gpu_perf(struct overlay_context *ctx, struct overlay_gpu_perf *gp) -{ - static int last_color; - const double rgba[][4] = { - { 1, 0.25, 0.25, 1 }, - { 0.25, 1, 0.25, 1 }, - { 0.25, 0.25, 1, 1 }, - { 1, 1, 1, 1 }, - }; - struct gpu_perf_comm *comm, **prev; - const char *ring_name[] = { - "R", - "V", - "B", - }; - double range[2]; - char buf[1024]; - cairo_pattern_t *linear; - int x, y, y1, y2, n; - int has_ctx = 0; - int has_flips = 0; - - gpu_perf_update(&gp->gpu_perf); - - for (n = 0; n < 4; n++) { - if (gp->gpu_perf.ctx_switch[n]) - has_ctx = n + 1; - if (gp->gpu_perf.flip_complete[n]) - has_flips = n + 1; - } - - cairo_rectangle(ctx->cr, ctx->width/2+HALF_PAD-.5, PAD-.5, ctx->width/2-SIZE_PAD+1, ctx->height/2-SIZE_PAD+1); - cairo_set_source_rgb(ctx->cr, .15, .15, .15); - cairo_set_line_width(ctx->cr, 1); - cairo_stroke(ctx->cr); - - if (gp->gpu_perf.error) { - cairo_text_extents_t extents; - cairo_text_extents(ctx->cr, gp->gpu_perf.error, &extents); - cairo_move_to(ctx->cr, - ctx->width/2+HALF_PAD + (ctx->width/2-SIZE_PAD - extents.width)/2., - PAD + (ctx->height/2-SIZE_PAD + extents.height)/2.); - cairo_show_text(ctx->cr, gp->gpu_perf.error); - return; - } - - if (gp->gpu_perf.comm == NULL && (has_ctx|has_flips) == 0) { - cairo_text_extents_t extents; - cairo_text_extents(ctx->cr, gp->gpu_perf.error, &extents); - cairo_move_to(ctx->cr, - ctx->width/2+HALF_PAD + (ctx->width/2-SIZE_PAD - extents.width)/2., - PAD + (ctx->height/2-SIZE_PAD + extents.height)/2.); - cairo_show_text(ctx->cr, "idle"); - return; - } - - y = PAD + 12 - 2; - x = ctx->width/2 + HALF_PAD; - - for (comm = gp->gpu_perf.comm; comm; comm = comm->next) { - int total; - - if (comm->name[0] == '\0') - continue; - - if (strncmp(comm->name, "kworker", 7) == 0) - continue; - - if (comm->user_data == NULL) { - comm->user_data = malloc(sizeof(struct chart)); - if (comm->user_data == NULL) - continue; - - chart_init(comm->user_data, comm->name, 120); - chart_set_position(comm->user_data, ctx->width/2+HALF_PAD, PAD); - chart_set_size(comm->user_data, ctx->width/2-SIZE_PAD, ctx->height/2 - SIZE_PAD); - chart_set_mode(comm->user_data, CHART_STROKE); - chart_set_stroke_rgba(comm->user_data, - rgba[last_color][0], - rgba[last_color][1], - rgba[last_color][2], - rgba[last_color][3]); - last_color = (last_color + 1) % 4; - chart_set_stroke_width(comm->user_data, 1); - } - - total = 0; - for (n = 0; n < 3; n++) - total += comm->nr_requests[n]; - chart_add_sample(comm->user_data, total); - } - - range[0] = range[1] = 0; - for (comm = gp->gpu_perf.comm; comm; comm = comm->next) { - if (comm->user_data == NULL) - continue; - - chart_get_range(comm->user_data, range); - } - - y2 = y1 = y; - for (comm = gp->gpu_perf.comm; comm; comm = comm->next) { - if (comm->user_data == NULL) - continue; - - chart_set_range(comm->user_data, range[0], range[1]); - chart_draw(comm->user_data, ctx->cr); - y2 += 14; - } - if (has_flips || gp->show_flips) - y2 += 14; - if (has_ctx || gp->show_ctx) - y2 += 14; - y1 += -12 - 2; - y2 += -14 + 4; - - cairo_rectangle(ctx->cr, x, y1, ctx->width/2-SIZE_PAD, y2-y1); - linear = cairo_pattern_create_linear(x, 0, x + ctx->width/2-SIZE_PAD, 0); - cairo_pattern_add_color_stop_rgba(linear, 0, 0, 0, 0, .5); - cairo_pattern_add_color_stop_rgba(linear, 1, 0, 0, 0, .0); - cairo_set_source(ctx->cr, linear); - cairo_pattern_destroy(linear); - cairo_fill(ctx->cr); - - for (prev = &gp->gpu_perf.comm; (comm = *prev) != NULL; ) { - int need_comma = 0, len; - - if (comm->user_data == NULL) - goto skip_comm; - - len = sprintf(buf, "%s:", comm->name); - for (n = 0; n < 3; n++) { - if (comm->nr_requests[n] == 0) - continue; - len += sprintf(buf + len, "%s %d%s", need_comma ? "," : "", comm->nr_requests[n], ring_name[n]); - need_comma = true; - comm->show = ctx->time; - } - if (comm->wait_time) { - if (comm->wait_time > 1000*1000) { - len += sprintf(buf + len, "%s %.1fms waits", - need_comma ? "," : "", - comm->wait_time / (1000*1000.)); - } else if (comm->wait_time > 100) { - len += sprintf(buf + len, "%s %.1fus waits", - need_comma ? "," : "", - comm->wait_time / 1000.); - } else { - len += sprintf(buf, "%s %.0fns waits", - need_comma ? "," : "", - (double)comm->wait_time); - } - need_comma = true; - comm->wait_time = 0; - comm->show = ctx->time; - } - if (comm->nr_sema) { - len += sprintf(buf + len, "%s %d syncs", - need_comma ? "," : "", - comm->nr_sema); - need_comma = true; - comm->nr_sema = 0; - comm->show = ctx->time; - } - - if (comm->user_data) { - struct chart *c = comm->user_data; - cairo_set_source_rgba(ctx->cr, - c->stroke_rgb[0], - c->stroke_rgb[1], - c->stroke_rgb[2], - c->stroke_rgb[3]); - } else - cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); - cairo_move_to(ctx->cr, x, y); - cairo_show_text(ctx->cr, buf); - y += 14; - -skip_comm: - memset(comm->nr_requests, 0, sizeof(comm->nr_requests)); - if (!comm->active && - (comm->show < ctx->time - IDLE_TIME || - strcmp(comm->name, get_comm(comm->pid, buf, sizeof(buf))))) { - *prev = comm->next; - if (comm->user_data) { - chart_fini(comm->user_data); - free(comm->user_data); - } - free(comm); - } else - prev = &comm->next; - } - - cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); - cairo_move_to(ctx->cr, x, y); - if (has_flips) { - int len = sprintf(buf, "Flips:"); - for (n = 0; n < has_flips; n++) - len += sprintf(buf + len, "%s %d", - n ? "," : "", - gp->gpu_perf.flip_complete[n]); - memset(gp->gpu_perf.flip_complete, 0, sizeof(gp->gpu_perf.flip_complete)); - gp->show_flips = ctx->time; - - cairo_show_text(ctx->cr, buf); - y += 14; - } else if (gp->show_flips) { - cairo_show_text(ctx->cr, "Flips: 0"); - if (ctx->time - gp->show_flips > IDLE_TIME) - gp->show_flips = 0; - y += 14; - } - - cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); - cairo_move_to(ctx->cr, x, y); - if (has_ctx) { - int len = sprintf(buf, "Contexts:"); - for (n = 0; n < has_ctx; n++) - len += sprintf(buf + len, "%s %d", - n ? "," : "", - gp->gpu_perf.ctx_switch[n]); - - memset(gp->gpu_perf.ctx_switch, 0, sizeof(gp->gpu_perf.ctx_switch)); - gp->show_ctx = ctx->time; - - cairo_show_text(ctx->cr, buf); - y += 14; - } else if (gp->show_ctx) { - cairo_show_text(ctx->cr, "Contexts: 0"); - y += 14; - if (ctx->time - gp->show_ctx > IDLE_TIME) - gp->show_ctx = 0; - } -} - -static void init_gpu_freq(struct overlay_context *ctx, - struct overlay_gpu_freq *gf) -{ - if (gpu_freq_init(&gf->gpu_freq) == 0) { - chart_init(&gf->current, "current", 120); - chart_set_position(&gf->current, PAD, ctx->height/2 + HALF_PAD); - chart_set_size(&gf->current, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); - chart_set_stroke_rgba(&gf->current, 0.75, 0.25, 0.50, 1.); - chart_set_mode(&gf->current, CHART_STROKE); - chart_set_smooth(&gf->current, CHART_LINE); - chart_set_range(&gf->current, 0, gf->gpu_freq.max); - - chart_init(&gf->request, "request", 120); - chart_set_position(&gf->request, PAD, ctx->height/2 + HALF_PAD); - chart_set_size(&gf->request, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); - chart_set_fill_rgba(&gf->request, 0.25, 0.25, 0.50, 1.); - chart_set_mode(&gf->request, CHART_FILL); - chart_set_smooth(&gf->request, CHART_LINE); - chart_set_range(&gf->request, 0, gf->gpu_freq.max); - } - - if (power_init(&gf->power) == 0) { - chart_init(&gf->power_chart, "power", 120); - chart_set_position(&gf->power_chart, PAD, ctx->height/2 + HALF_PAD); - chart_set_size(&gf->power_chart, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); - chart_set_stroke_rgba(&gf->power_chart, 0.45, 0.55, 0.45, 1.); - gf->power_max = 0; - } - - rc6_init(&gf->rc6); - gem_interrupts_init(&gf->irqs); -} - -static void show_gpu_freq(struct overlay_context *ctx, struct overlay_gpu_freq *gf) -{ - char buf[160]; - int y1, y2, y, len; - - int has_freq = gpu_freq_update(&gf->gpu_freq) == 0; - int has_rc6 = rc6_update(&gf->rc6) == 0; - int has_power = power_update(&gf->power) == 0; - int has_irqs = gem_interrupts_update(&gf->irqs) == 0; - cairo_pattern_t *linear; - - cairo_rectangle(ctx->cr, PAD-.5, ctx->height/2+HALF_PAD-.5, ctx->width/2-SIZE_PAD+1, ctx->height/2-SIZE_PAD+1); - cairo_set_source_rgb(ctx->cr, .15, .15, .15); - cairo_set_line_width(ctx->cr, 1); - cairo_stroke(ctx->cr); - - if (gf->gpu_freq.error) { - const char *txt = "GPU frequency not found in debugfs"; - cairo_text_extents_t extents; - cairo_text_extents(ctx->cr, txt, &extents); - cairo_move_to(ctx->cr, - PAD + (ctx->width/2-SIZE_PAD - extents.width)/2., - ctx->height/2+HALF_PAD + (ctx->height/2-SIZE_PAD + extents.height)/2.); - cairo_show_text(ctx->cr, txt); - return; - } - - if (has_freq) { - if (gf->gpu_freq.current) - chart_add_sample(&gf->current, gf->gpu_freq.current); - if (gf->gpu_freq.request) - chart_add_sample(&gf->request, gf->gpu_freq.request); - - chart_draw(&gf->request, ctx->cr); - chart_draw(&gf->current, ctx->cr); - } - - if (has_power) { - chart_add_sample(&gf->power_chart, gf->power.power_mW); - if (gf->power.new_sample) { - if (gf->power.power_mW > gf->power_max) - gf->power_max = gf->power.power_mW; - chart_set_range(&gf->power_chart, 0, gf->power_max); - gf->power.new_sample = 0; - } - chart_draw(&gf->power_chart, ctx->cr); - } - - y = ctx->height/2 + HALF_PAD + 12 - 2; - - y1 = y2 = y; - if (has_freq) { - y2 += 12; - y2 += 12; - } - if (has_rc6) - y2 += 14; - if (has_power) - y2 += 14; - if (has_irqs) - y2 += 14; - y1 += -12 - 2; - y2 += -14 + 4; - - cairo_rectangle(ctx->cr, PAD, y1, ctx->width/2-SIZE_PAD, y2-y1); - linear = cairo_pattern_create_linear(PAD, 0, PAD+ctx->width/2-SIZE_PAD, 0); - cairo_pattern_add_color_stop_rgba(linear, 0, 0, 0, 0, .5); - cairo_pattern_add_color_stop_rgba(linear, 1, 0, 0, 0, .0); - cairo_set_source(ctx->cr, linear); - cairo_pattern_destroy(linear); - cairo_fill(ctx->cr); - - if (has_freq) { - cairo_text_extents_t extents; - - len = sprintf(buf, "Frequency: %dMHz", gf->gpu_freq.current); - if (gf->gpu_freq.request) - cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); - sprintf(buf + len, " (requested %dMHz)", gf->gpu_freq.request); - cairo_move_to(ctx->cr, PAD, y); - cairo_show_text(ctx->cr, buf); - y += 12; - - cairo_text_extents(ctx->cr, "Frequency: ", &extents); - - cairo_set_font_size(ctx->cr, 8); - sprintf(buf, " min: %dMHz, max: %dMHz", gf->gpu_freq.min, gf->gpu_freq.max); - cairo_set_source_rgba(ctx->cr, .8, .8, .8, 1); - cairo_move_to(ctx->cr, PAD + extents.width, y); - cairo_show_text(ctx->cr, buf); - cairo_set_font_size(ctx->cr, 10); - y += 12; - } - - if (has_rc6) { - len = sprintf(buf, "RC6: %d%%", gf->rc6.rc6_combined); - cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); - cairo_move_to(ctx->cr, PAD, y); - if (gf->rc6.rc6_combined) { - int need_comma = 0; - int rewind = len; - len += sprintf(buf + len, " ("); - if (gf->rc6.rc6) { - len += sprintf(buf + len, "%src6=%d%%", - need_comma ? ", " : "", - gf->rc6.rc6); - need_comma++; - } - if (gf->rc6.rc6p) { - len += sprintf(buf + len, "%src6p=%d%%", - need_comma ? ", " : "", - gf->rc6.rc6p); - need_comma++; - } - if (gf->rc6.rc6pp) { - len += sprintf(buf + len, "%src6pp=%d%%", - need_comma ? ", " : "", - gf->rc6.rc6pp); - need_comma++; - } - sprintf(buf + len, ")"); - if (need_comma <= 1) - buf[rewind] = '\0'; - } - cairo_show_text(ctx->cr, buf); - y += 14; - } - - if (has_power) { - sprintf(buf, "Power: %llumW", (long long unsigned)gf->power.power_mW); - cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); - cairo_move_to(ctx->cr, PAD, y); - cairo_show_text(ctx->cr, buf); - y += 14; - } - - if (has_irqs) { - sprintf(buf, "Interrupts: %llu", (long long unsigned)gf->irqs.delta); - cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); - cairo_move_to(ctx->cr, PAD, y); - cairo_show_text(ctx->cr, buf); - y += 14; - } -} - -static void init_gem_objects(struct overlay_context *ctx, - struct overlay_gem_objects *go) -{ - go->error = gem_objects_init(&go->gem_objects); - if (go->error) - return; - - chart_init(&go->aperture, "aperture", 120); - chart_set_position(&go->aperture, ctx->width/2+HALF_PAD, ctx->height/2 + HALF_PAD); - chart_set_size(&go->aperture, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); - chart_set_stroke_rgba(&go->aperture, 0.75, 0.25, 0.50, 1.); - chart_set_mode(&go->aperture, CHART_STROKE); - chart_set_range(&go->aperture, 0, go->gem_objects.max_gtt); - - chart_init(&go->gtt, "gtt", 120); - chart_set_position(&go->gtt, ctx->width/2+HALF_PAD, ctx->height/2 + HALF_PAD); - chart_set_size(&go->gtt, ctx->width/2 - SIZE_PAD, ctx->height/2 - SIZE_PAD); - chart_set_fill_rgba(&go->gtt, 0.25, 0.5, 0.5, 1.); - chart_set_mode(&go->gtt, CHART_FILL); - chart_set_range(&go->gtt, 0, go->gem_objects.max_gtt); -} - -static void show_gem_objects(struct overlay_context *ctx, struct overlay_gem_objects *go) -{ - struct gem_objects_comm *comm; - char buf[160]; - cairo_pattern_t *linear; - int x, y, y1, y2; - - if (go->error == 0) - go->error = gem_objects_update(&go->gem_objects); - if (go->error) - return; - - cairo_rectangle(ctx->cr, ctx->width/2+HALF_PAD-.5, ctx->height/2+HALF_PAD-.5, ctx->width/2-SIZE_PAD+1, ctx->height/2-SIZE_PAD+1); - cairo_set_source_rgb(ctx->cr, .15, .15, .15); - cairo_set_line_width(ctx->cr, 1); - cairo_stroke(ctx->cr); - - chart_add_sample(&go->gtt, go->gem_objects.total_gtt); - chart_add_sample(&go->aperture, go->gem_objects.total_aperture); - - chart_draw(&go->gtt, ctx->cr); - chart_draw(&go->aperture, ctx->cr); - - - y = ctx->height/2 + HALF_PAD + 12 - 2; - x = ctx->width/2 + HALF_PAD; - - y2 = y1 = y; - y2 += 14; - for (comm = go->gem_objects.comm; comm; comm = comm->next) { - if ((comm->bytes >> 20) == 0) - break; - y2 += 12; - } - y1 += -12 - 2; - y2 += -12 + 4; - - cairo_rectangle(ctx->cr, x, y1, ctx->width/2-SIZE_PAD, y2-y1); - linear = cairo_pattern_create_linear(x, 0, x+ctx->width/2-SIZE_PAD, 0); - cairo_pattern_add_color_stop_rgba(linear, 0, 0, 0, 0, .5); - cairo_pattern_add_color_stop_rgba(linear, 1, 0, 0, 0, .0); - cairo_set_source(ctx->cr, linear); - cairo_pattern_destroy(linear); - cairo_fill(ctx->cr); - - sprintf(buf, "Total: %ldMB, %ld objects", - go->gem_objects.total_bytes >> 20, go->gem_objects.total_count); - cairo_set_source_rgba(ctx->cr, 1, 1, 1, 1); - cairo_move_to(ctx->cr, x, y); - cairo_show_text(ctx->cr, buf); - y += 12; - - cairo_set_source_rgba(ctx->cr, .8, .8, .8, 1); - cairo_set_font_size(ctx->cr, 8); - for (comm = go->gem_objects.comm; comm; comm = comm->next) { - if ((comm->bytes >> 20) == 0) - break; - - sprintf(buf, "%s %ldMB, %ld objects", - comm->name, comm->bytes >> 20, comm->count); - cairo_move_to(ctx->cr, x, y); - cairo_show_text(ctx->cr, buf); - y += 12; - } -} - -static int take_snapshot; - -static void signal_snapshot(int sig) -{ - take_snapshot = sig; -} - -static int get_sample_period(struct config *config) -{ - const char *value; - - value = config_get_value(config, "sampling", "period"); - if (value && atoi(value) > 0) - return atoi(value); - - value = config_get_value(config, "sampling", "frequency"); - if (value && atoi(value) > 0) - return 1000000 / atoi(value); - - return 500000; -} - -static void overlay_snapshot(struct overlay_context *ctx) -{ - char buf[1024]; - sprintf(buf, "/tmp/overlay-snapshot-%ld.png", (long)time(NULL)); - cairo_surface_write_to_png(ctx->surface, buf); -} - -static void usage(const char *progname) -{ - printf("intel-gpu-overlay -- realtime display of GPU statistics\n"); - printf("Usage: %s [options]\n", progname); - printf("\t--config|-c <string> | <filename>\t\t\tSpecify an ini-style configuration string or file\n"); - printf("\t--geometry|-G <width>x<height>+<x-offset>+<y-offset>\tExact window placement and size\n"); - printf("\t--position|-P (top|middle|bottom)-(left|centre|right)\tPlace the window in a particular corner\n"); - printf("\t--size|-S <width>x<height> | <scale>%%\t\t\tWindow size\n"); - printf("\t--help|-h\t\t\t\t\t\tThis help message\n"); -} - -int main(int argc, char **argv) -{ - static struct option long_options[] = { - {"config", 1, 0, 'c'}, - {"geometry", 1, 0, 'G'}, - {"position", 1, 0, 'P'}, - {"size", 1, 0, 'S'}, - {"help", 0, 0, 'h'}, - {NULL, 0, 0, 0,} - }; - struct overlay_context ctx; - struct config config; - int index, sample_period; - int daemonize = 1, renice = 0; - int i; - - config_init(&config); - - opterr = 0; - while ((i = getopt_long(argc, argv, "c:fhn?", long_options, &index)) != -1) { - switch (i) { - case 'c': - config_parse_string(&config, optarg); - break; - case 'G': - config_set_value(&config, "window", "geometry", optarg); - break; - case 'P': - config_set_value(&config, "window", "position", optarg); - break; - case 'S': - config_set_value(&config, "window", "size", optarg); - break; - case 'f': - daemonize = 0; - break; - case 'n': - renice = -20; - if (optarg) - renice = atoi(optarg); - break; - case 'h': - usage(argv[0]); - return 0; - } - } - - if (argc > optind) { - x11_overlay_stop(); - return 0; - } - - ctx.width = 640; - ctx.height = 236; - ctx.surface = NULL; - if (ctx.surface == NULL) - ctx.surface = x11_overlay_create(&config, &ctx.width, &ctx.height); - if (ctx.surface == NULL) - ctx.surface = x11_window_create(&config, &ctx.width, &ctx.height); - if (ctx.surface == NULL) - ctx.surface = kms_overlay_create(&config, &ctx.width, &ctx.height); - if (ctx.surface == NULL) - return ENOMEM; - - if (daemonize && daemon(0, 0)) - return EINVAL; - - if (renice) - nice(renice); - - signal(SIGUSR1, signal_snapshot); - - debugfs_init(); - - init_gpu_top(&ctx, &ctx.gpu_top); - init_gpu_perf(&ctx, &ctx.gpu_perf); - init_gpu_freq(&ctx, &ctx.gpu_freq); - init_gem_objects(&ctx, &ctx.gem_objects); - - sample_period = get_sample_period(&config); - - i = 0; - while (1) { - ctx.time = time(NULL); - - ctx.cr = cairo_create(ctx.surface); - cairo_set_operator(ctx.cr, CAIRO_OPERATOR_CLEAR); - cairo_paint(ctx.cr); - cairo_set_operator(ctx.cr, CAIRO_OPERATOR_OVER); - - show_gpu_top(&ctx, &ctx.gpu_top); - show_gpu_perf(&ctx, &ctx.gpu_perf); - show_gpu_freq(&ctx, &ctx.gpu_freq); - show_gem_objects(&ctx, &ctx.gem_objects); - - { - char buf[80]; - cairo_text_extents_t extents; - gethostname(buf, sizeof(buf)); - cairo_set_source_rgb(ctx.cr, .5, .5, .5); - cairo_set_font_size(ctx.cr, PAD-2); - cairo_text_extents(ctx.cr, buf, &extents); - cairo_move_to(ctx.cr, - (ctx.width-extents.width)/2., - 1+extents.height); - cairo_show_text(ctx.cr, buf); - } - - cairo_destroy(ctx.cr); - - overlay_show(ctx.surface); - - if (take_snapshot) { - overlay_snapshot(&ctx); - take_snapshot = 0; - } - - usleep(sample_period); - } - - return 0; -} diff --git a/overlay/overlay.h b/overlay/overlay.h deleted file mode 100644 index 793816d2..00000000 --- a/overlay/overlay.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef OVERLAY_H -#define OVERLAY_H - -#ifdef HAVE_CONFIG_H -#include"config.h" -#endif - -#include <cairo.h> - -enum position { - POS_UNSET = -1, - - POS_LEFT = 0, - POS_CENTRE = 1, - POS_RIGHT = 2, - - POS_TOP = 0 << 4, - POS_MIDDLE = 1 << 4, - POS_BOTTOM = 2 << 4, - - POS_TOP_LEFT = POS_TOP | POS_LEFT, - POS_TOP_CENTRE = POS_TOP | POS_CENTRE, - POS_TOP_RIGHT = POS_TOP | POS_RIGHT, - - POS_MIDDLE_LEFT = POS_MIDDLE | POS_LEFT, - POS_MIDDLE_CENTRE = POS_MIDDLE | POS_CENTRE, - POS_MIDDLE_RIGHT = POS_MIDDLE | POS_RIGHT, - - POS_BOTTOM_LEFT = POS_BOTTOM | POS_LEFT, - POS_BOTTOM_CENTRE = POS_BOTTOM | POS_CENTRE, - POS_BOTTOM_RIGHT = POS_BOTTOM | POS_RIGHT, -}; - -struct overlay { - cairo_surface_t *surface; - void (*show)(struct overlay *); - void (*hide)(struct overlay *); -}; - -extern const cairo_user_data_key_t overlay_key; - -struct config { - struct config_section { - struct config_section *next; - struct config_value { - struct config_value *next; - char *name; - char *value; - } *values; - char name[0]; - } *sections; -}; - -void config_init(struct config *config); -void config_parse_string(struct config *config, const char *str); -void config_set_value(struct config *config, - const char *section, - const char *name, - const char *value); -const char *config_get_value(struct config *config, - const char *section, - const char *name); - -#ifdef HAVE_OVERLAY_XVLIB -cairo_surface_t *x11_overlay_create(struct config *config, int *width, int *height); -void x11_overlay_stop(void); -#else -static inline cairo_surface_t *x11_overlay_create(struct config *config, int *width, int *height) { return NULL; } -static inline void x11_overlay_stop(void) { } -#endif - -#ifdef HAVE_OVERLAY_XLIB -cairo_surface_t *x11_window_create(struct config *config, int *width, int *height); -#else -static inline cairo_surface_t *x11_window_create(struct config *config, int *width, int *height) { return NULL; } -#endif - -cairo_surface_t *kms_overlay_create(struct config *config, int *width, int *height); - -#endif /* OVERLAY_H */ diff --git a/overlay/perf.c b/overlay/perf.c deleted file mode 100644 index b8fdc675..00000000 --- a/overlay/perf.c +++ /dev/null @@ -1,26 +0,0 @@ -#include <stdint.h> -#include <fcntl.h> -#include <unistd.h> -#include <stdlib.h> - -#include "perf.h" - -uint64_t i915_type_id(void) -{ - char buf[1024]; - int fd, n; - - fd = open("/sys/bus/event_source/devices/i915/type", 0); - if (fd < 0) { - n = -1; - } else { - n = read(fd, buf, sizeof(buf)-1); - close(fd); - } - if (n < 0) - return 0; - - buf[n] = '\0'; - return strtoull(buf, 0, 0); -} - diff --git a/overlay/perf.h b/overlay/perf.h deleted file mode 100644 index c44e65f9..00000000 --- a/overlay/perf.h +++ /dev/null @@ -1,64 +0,0 @@ -#ifndef I915_PERF_H -#define I915_PERF_H - -#include <linux/perf_event.h> - -#define I915_SAMPLE_BUSY 0 -#define I915_SAMPLE_WAIT 1 -#define I915_SAMPLE_SEMA 2 - -#define I915_SAMPLE_RCS 0 -#define I915_SAMPLE_VCS 1 -#define I915_SAMPLE_BCS 2 -#define I915_SAMPLE_VECS 3 - -#define __I915_PERF_COUNT(ring, id) ((ring) << 4 | (id)) - -#define I915_PERF_COUNT_RCS_BUSY __I915_PERF_COUNT(I915_SAMPLE_RCS, I915_SAMPLE_BUSY) -#define I915_PERF_COUNT_RCS_WAIT __I915_PERF_COUNT(I915_SAMPLE_RCS, I915_SAMPLE_WAIT) -#define I915_PERF_COUNT_RCS_SEMA __I915_PERF_COUNT(I915_SAMPLE_RCS, I915_SAMPLE_SEMA) - -#define I915_PERF_COUNT_VCS_BUSY __I915_PERF_COUNT(I915_SAMPLE_VCS, I915_SAMPLE_BUSY) -#define I915_PERF_COUNT_VCS_WAIT __I915_PERF_COUNT(I915_SAMPLE_VCS, I915_SAMPLE_WAIT) -#define I915_PERF_COUNT_VCS_SEMA __I915_PERF_COUNT(I915_SAMPLE_VCS, I915_SAMPLE_SEMA) - -#define I915_PERF_COUNT_BCS_BUSY __I915_PERF_COUNT(I915_SAMPLE_BCS, I915_SAMPLE_BUSY) -#define I915_PERF_COUNT_BCS_WAIT __I915_PERF_COUNT(I915_SAMPLE_BCS, I915_SAMPLE_WAIT) -#define I915_PERF_COUNT_BCS_SEMA __I915_PERF_COUNT(I915_SAMPLE_BCS, I915_SAMPLE_SEMA) - -#define I915_PERF_COUNT_VECS_BUSY __I915_PERF_COUNT(I915_SAMPLE_VECS, I915_SAMPLE_BUSY) -#define I915_PERF_COUNT_VECS_WAIT __I915_PERF_COUNT(I915_SAMPLE_VECS, I915_SAMPLE_WAIT) -#define I915_PERF_COUNT_VECS_SEMA __I915_PERF_COUNT(I915_SAMPLE_VECS, I915_SAMPLE_SEMA) - -#define I915_PERF_ACTUAL_FREQUENCY 32 -#define I915_PERF_REQUESTED_FREQUENCY 33 -#define I915_PERF_ENERGY 34 -#define I915_PERF_INTERRUPTS 35 - -#define I915_PERF_RC6_RESIDENCY 40 -#define I915_PERF_RC6p_RESIDENCY 41 -#define I915_PERF_RC6pp_RESIDENCY 42 - -static inline int -perf_event_open(struct perf_event_attr *attr, - pid_t pid, - int cpu, - int group_fd, - unsigned long flags) -{ -#ifndef __NR_perf_event_open -#if defined(__i386__) -#define __NR_perf_event_open 336 -#elif defined(__x86_64__) -#define __NR_perf_event_open 298 -#else -#define __NR_perf_event_open 0 -#endif -#endif - attr->size = sizeof(*attr); - return syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags); -} - -uint64_t i915_type_id(void); - -#endif /* I915_PERF_H */ diff --git a/overlay/power.c b/overlay/power.c deleted file mode 100644 index 6c5c3749..00000000 --- a/overlay/power.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <stdint.h> -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <unistd.h> -#include <fcntl.h> -#include <time.h> -#include <errno.h> - -#include "perf.h" -#include "power.h" -#include "debugfs.h" - -/* XXX Is this exposed through RAPL? */ - -static int perf_open(void) -{ - struct perf_event_attr attr; - - memset(&attr, 0, sizeof (attr)); - - attr.type = i915_type_id(); - if (attr.type == 0) - return -ENOENT; - attr.config = I915_PERF_ENERGY; - - attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED; - return perf_event_open(&attr, -1, 0, -1, 0); -} - -int power_init(struct power *power) -{ - char buf[4096]; - int fd, len; - - memset(power, 0, sizeof(*power)); - - power->fd = perf_open(); - if (power->fd != -1) - return 0; - - sprintf(buf, "%s/i915_energy_uJ", debugfs_dri_path); - fd = open(buf, 0); - if (fd < 0) - return power->error = errno; - - len = read(fd, buf, sizeof(buf)); - close(fd); - - if (len < 0) - return power->error = errno; - - buf[len] = '\0'; - if (strtoull(buf, 0, 0) == 0) - return power->error = EINVAL; - - return 0; -} - -static uint64_t file_to_u64(const char *name) -{ - char buf[4096]; - int fd, len; - - sprintf(buf, "%s/%s", debugfs_dri_path, name); - fd = open(buf, 0); - if (fd < 0) - return 0; - - len = read(fd, buf, sizeof(buf)-1); - close(fd); - - if (len < 0) - return 0; - - buf[len] = '\0'; - - return strtoull(buf, 0, 0); -} - -static uint64_t clock_ms_to_u64(void) -{ - struct timespec tv; - - if (clock_gettime(CLOCK_MONOTONIC, &tv) < 0) - return 0; - - return (uint64_t)tv.tv_sec * 1000 + tv.tv_nsec / 1000000; -} - -int power_update(struct power *power) -{ - struct power_stat *s = &power->stat[power->count++&1]; - struct power_stat *d = &power->stat[power->count&1]; - uint64_t d_time; - - if (power->error) - return power->error; - - if (power->fd != -1) { - uint64_t data[2]; - int len; - - len = read(power->fd, data, sizeof(data)); - if (len < 0) - return power->error = errno; - - s->energy = data[0]; - s->timestamp = data[1] / (1000*1000); - } else { - s->energy = file_to_u64("i915_energy_uJ"); - s->timestamp = clock_ms_to_u64(); - } - - if (power->count == 1) - return EAGAIN; - - d_time = s->timestamp - d->timestamp; - power->power_mW = (s->energy - d->energy) / d_time; - power->new_sample = 1; - return 0; -} diff --git a/overlay/power.h b/overlay/power.h deleted file mode 100644 index bf8346ce..00000000 --- a/overlay/power.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef POWER_H -#define POWER_H - -#include <stdint.h> - -struct power { - struct power_stat { - uint64_t energy; - uint64_t timestamp; - } stat[2]; - - int fd; - int error; - int count; - int new_sample; - - uint64_t power_mW; -}; - -int power_init(struct power *power); -int power_update(struct power *power); - -#endif /* POWER_H */ diff --git a/overlay/rc6.c b/overlay/rc6.c deleted file mode 100644 index d7047c2f..00000000 --- a/overlay/rc6.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <sys/stat.h> -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <unistd.h> -#include <fcntl.h> -#include <time.h> -#include <errno.h> - -#include "rc6.h" -#include "perf.h" - -static int perf_i915_open(int config, int group) -{ - struct perf_event_attr attr; - - memset(&attr, 0, sizeof (attr)); - - attr.type = i915_type_id(); - if (attr.type == 0) - return -ENOENT; - attr.config = config; - - attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED; - if (group == -1) - attr.read_format |= PERF_FORMAT_GROUP; - - return perf_event_open(&attr, -1, 0, group, 0); -} - -#define RC6 (1<<0) -#define RC6p (1<<1) -#define RC6pp (1<<2) - -static int perf_open(unsigned *flags) -{ - int fd; - - fd = perf_i915_open(I915_PERF_RC6_RESIDENCY, -1); - if (fd < 0) - return -1; - - *flags |= RC6; - if (perf_i915_open(I915_PERF_RC6p_RESIDENCY, fd) >= 0) - *flags |= RC6p; - - if (perf_i915_open(I915_PERF_RC6pp_RESIDENCY, fd) >= 0) - *flags |= RC6pp; - - return fd; -} - -int rc6_init(struct rc6 *rc6) -{ - memset(rc6, 0, sizeof(*rc6)); - - rc6->fd = perf_open(&rc6->flags); - if (rc6->fd == -1) { - struct stat st; - if (stat("/sys/class/drm/card0/power", &st) < 0) - return rc6->error = errno; - } - - return 0; -} - -static uint64_t file_to_u64(const char *path) -{ - char buf[4096]; - int fd, len; - - fd = open(path, 0); - if (fd < 0) - return -1; - - len = read(fd, buf, sizeof(buf)-1); - close(fd); - - if (len < 0) - return -1; - - buf[len] = '\0'; - - return strtoull(buf, 0, 0); -} - -static uint64_t clock_ms_to_u64(void) -{ - struct timespec tv; - - if (clock_gettime(CLOCK_MONOTONIC, &tv) < 0) - return 0; - - return (uint64_t)tv.tv_sec * 1000 + tv.tv_nsec / 1000000; -} - -int rc6_update(struct rc6 *rc6) -{ - struct rc6_stat *s = &rc6->stat[rc6->count++&1]; - struct rc6_stat *d = &rc6->stat[rc6->count&1]; - uint64_t d_time, d_rc6, d_rc6p, d_rc6pp; - - if (rc6->error) - return rc6->error; - - if (rc6->fd == -1) { - struct stat st; - - if (stat("/sys/class/drm/card0/power/rc6_residency_ms", &st) < 0) - return rc6->error = ENOENT; - - s->rc6_residency = file_to_u64("/sys/class/drm/card0/power/rc6_residency_ms"); - s->rc6p_residency = file_to_u64("/sys/class/drm/card0/power/rc6p_residency_ms"); - s->rc6pp_residency = file_to_u64("/sys/class/drm/card0/power/rc6pp_residency_ms"); - s->timestamp = clock_ms_to_u64(); - } else { - uint64_t data[5]; - int len; - - len = read(rc6->fd, data, sizeof(data)); - if (len < 0) - return rc6->error = errno; - - s->timestamp = data[1] / (1000*1000); - - len = 2; - if (rc6->flags & RC6) - s->rc6_residency = data[len++]; - if (rc6->flags & RC6p) - s->rc6p_residency = data[len++]; - if (rc6->flags & RC6pp) - s->rc6pp_residency = data[len++]; - } - - if (rc6->count == 1) - return EAGAIN; - - d_time = s->timestamp - d->timestamp; - if (d_time == 0) { - rc6->count--; - return EAGAIN; - } - - d_rc6 = s->rc6_residency - d->rc6_residency; - rc6->rc6 = (100 * d_rc6 + d_time/2) / d_time; - - d_rc6p = s->rc6p_residency - d->rc6p_residency; - rc6->rc6p = (100 * d_rc6p + d_time/2) / d_time; - - d_rc6pp = s->rc6pp_residency - d->rc6pp_residency; - rc6->rc6pp = (100 * d_rc6pp + d_time/2) / d_time; - - rc6->rc6_combined = (100 * (d_rc6 + d_rc6p + d_rc6pp) + d_time/2) / d_time; - return 0; -} diff --git a/overlay/rc6.h b/overlay/rc6.h deleted file mode 100644 index faffba98..00000000 --- a/overlay/rc6.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef RC6_H -#define RC6_H - -#include <stdint.h> - -struct rc6 { - struct rc6_stat { - uint64_t rc6_residency; - uint64_t rc6p_residency; - uint64_t rc6pp_residency; - uint64_t timestamp; - } stat[2]; - - int fd; - int count; - int error; - - unsigned flags; - - uint8_t rc6; - uint8_t rc6p; - uint8_t rc6pp; - uint8_t rc6_combined; -}; - -int rc6_init(struct rc6 *rc6); -int rc6_update(struct rc6 *rc6); - -#endif /* RC6_H */ diff --git a/overlay/x11/dri2.c b/overlay/x11/dri2.c deleted file mode 100644 index 6c9e90d6..00000000 --- a/overlay/x11/dri2.c +++ /dev/null @@ -1,174 +0,0 @@ -/* - * Copyright © 2008 Red Hat, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Soft- - * ware"), to deal in the Software without restriction, including without - * limitation the rights to use, copy, modify, merge, publish, distribute, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, provided that the above copyright - * notice(s) and this permission notice appear in all copies of the Soft- - * ware and that both the above copyright notice(s) and this permission - * notice appear in supporting documentation. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABIL- - * ITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY - * RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN - * THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSE- - * QUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, - * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER - * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFOR- - * MANCE OF THIS SOFTWARE. - * - * Except as contained in this notice, the name of a copyright holder shall - * not be used in advertising or otherwise to promote the sale, use or - * other dealings in this Software without prior written authorization of - * the copyright holder. - * - * Authors: - * Kristian Høgsberg (krh@redhat.com) - */ - -#include <stdio.h> -#include <X11/Xlibint.h> -#include <X11/extensions/Xext.h> -#include <X11/extensions/extutil.h> -#include <X11/extensions/dri2proto.h> -#include <X11/extensions/dri2tokens.h> -#include <xf86drm.h> -#include <drm.h> -#include <fcntl.h> -#include <unistd.h> - -#include "dri2.h" - -static char dri2ExtensionName[] = DRI2_NAME; -static XExtensionInfo *dri2Info; -static XEXT_GENERATE_CLOSE_DISPLAY (DRI2CloseDisplay, dri2Info) - -static /* const */ XExtensionHooks dri2ExtensionHooks = { - NULL, /* create_gc */ - NULL, /* copy_gc */ - NULL, /* flush_gc */ - NULL, /* free_gc */ - NULL, /* create_font */ - NULL, /* free_font */ - DRI2CloseDisplay, /* close_display */ -}; - -static XEXT_GENERATE_FIND_DISPLAY (DRI2FindDisplay, - dri2Info, - dri2ExtensionName, - &dri2ExtensionHooks, - 0, NULL) - -static Bool -DRI2Connect(Display *dpy, XID window, char **driverName, char **deviceName) -{ - XExtDisplayInfo *info = DRI2FindDisplay(dpy); - xDRI2ConnectReply rep; - xDRI2ConnectReq *req; - - XextCheckExtension(dpy, info, dri2ExtensionName, False); - - LockDisplay(dpy); - GetReq(DRI2Connect, req); - req->reqType = info->codes->major_opcode; - req->dri2ReqType = X_DRI2Connect; - req->window = window; - req->driverType = DRI2DriverDRI; - if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { - UnlockDisplay(dpy); - SyncHandle(); - return False; - } - - if (rep.driverNameLength == 0 && rep.deviceNameLength == 0) { - UnlockDisplay(dpy); - SyncHandle(); - return False; - } - - *driverName = Xmalloc(rep.driverNameLength + 1); - if (*driverName == NULL) { - _XEatData(dpy, - ((rep.driverNameLength + 3) & ~3) + - ((rep.deviceNameLength + 3) & ~3)); - UnlockDisplay(dpy); - SyncHandle(); - return False; - } - _XReadPad(dpy, *driverName, rep.driverNameLength); - (*driverName)[rep.driverNameLength] = '\0'; - - *deviceName = Xmalloc(rep.deviceNameLength + 1); - if (*deviceName == NULL) { - Xfree(*driverName); - _XEatData(dpy, ((rep.deviceNameLength + 3) & ~3)); - UnlockDisplay(dpy); - SyncHandle(); - return False; - } - _XReadPad(dpy, *deviceName, rep.deviceNameLength); - (*deviceName)[rep.deviceNameLength] = '\0'; - - UnlockDisplay(dpy); - SyncHandle(); - - return True; -} - -static Bool -DRI2Authenticate(Display * dpy, XID window, unsigned int magic) -{ - XExtDisplayInfo *info = DRI2FindDisplay(dpy); - xDRI2AuthenticateReq *req; - xDRI2AuthenticateReply rep; - - XextCheckExtension(dpy, info, dri2ExtensionName, False); - - LockDisplay(dpy); - GetReq(DRI2Authenticate, req); - req->reqType = info->codes->major_opcode; - req->dri2ReqType = X_DRI2Authenticate; - req->window = window; - req->magic = magic; - - if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { - UnlockDisplay(dpy); - SyncHandle(); - return False; - } - - UnlockDisplay(dpy); - SyncHandle(); - - return rep.authenticated; -} - -int dri2_open(Display *dpy) -{ - drm_auth_t auth; - char *driver, *device; - int fd; - - if (!DRI2Connect(dpy, DefaultRootWindow(dpy), &driver, &device)) - return -1; - - fd = open(device, O_RDWR); - if (fd < 0) - return -1; - - if (drmIoctl(fd, DRM_IOCTL_GET_MAGIC, &auth)) - goto err_fd; - - if (!DRI2Authenticate(dpy, DefaultRootWindow(dpy), auth.magic)) - goto err_fd; - - return fd; - -err_fd: - close(fd); - return -1; -} diff --git a/overlay/x11/dri2.h b/overlay/x11/dri2.h deleted file mode 100644 index d759c2f4..00000000 --- a/overlay/x11/dri2.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef DRI2_H -#define DRI2_H - -int dri2_open(Display *dpy); - -#endif /* DRI2_H */ diff --git a/overlay/x11/position.c b/overlay/x11/position.c deleted file mode 100644 index cd003539..00000000 --- a/overlay/x11/position.c +++ /dev/null @@ -1,213 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include <X11/Xlib.h> -#ifdef HAVE_XRANDR -#include <X11/extensions/Xrandr.h> -#endif -#include <string.h> -#include <stdio.h> -#include <stdlib.h> - -#include "position.h" -#include "../overlay.h" - -static enum position get_position(struct config *config) -{ - const char *v = config_get_value(config, "window", "position"); - if (v == NULL) - return POS_UNSET; - - if (strcmp(v, "top-left") == 0) - return POS_TOP_LEFT; - - if (strcmp(v, "top-centre") == 0) - return POS_TOP_CENTRE; - - if (strcmp(v, "top-right") == 0) - return POS_TOP_RIGHT; - - if (strcmp(v, "middle-left") == 0) - return POS_MIDDLE_LEFT; - - if (strcmp(v, "middle-centre") == 0) - return POS_MIDDLE_CENTRE; - - if (strcmp(v, "middle-right") == 0) - return POS_MIDDLE_RIGHT; - - if (strcmp(v, "bottom-left") == 0) - return POS_BOTTOM_LEFT; - - if (strcmp(v, "bottom-centre") == 0) - return POS_BOTTOM_CENTRE; - - if (strcmp(v, "bottom-right") == 0) - return POS_BOTTOM_RIGHT; - - return POS_UNSET; -} - -static void screen_size(Display *dpy, struct config *config, - int *scr_x, int *scr_y, int *scr_width, int *scr_height) -{ - Screen *scr; - -#ifdef HAVE_XRANDR - const char *crtc; - - crtc = config_get_value(config, "x11", "crtc"); - if (crtc) { - XRRScreenResources *res; - int i = atoi(crtc); - int ok = 0; - - res = XRRGetScreenResourcesCurrent(dpy, DefaultRootWindow(dpy)); - if (res) { - if (i < res->ncrtc) { - XRRCrtcInfo *info = XRRGetCrtcInfo (dpy, res, res->crtcs[i]); - if (info) { - *scr_x = info->x; - *scr_y = info->y; - *scr_width = info->width; - *scr_height = info->height; - ok = 1; - XRRFreeCrtcInfo(info); - } - } - XRRFreeScreenResources(res); - } - if (ok) - return; - } -#endif - - scr = ScreenOfDisplay(dpy, DefaultScreen(dpy)); - *scr_x = *scr_y = 0; - *scr_width = scr->width; - *scr_height = scr->height; -} - -enum position -x11_position(Display *dpy, int width, int height, - struct config *config, - int *x, int *y, int *w, int *h) -{ - enum position position = POS_UNSET; - const char *geometry; - - *x = *y = 0; - *w = width; - *h = height; - - geometry = config_get_value(config, "window", "geometry"); - if (geometry) { - sscanf(geometry, "%dx%d+%d+%d", w, h, x, y); - if (*w < width/2) - *w = width/2; - if (*h < height/2) - *h = height/2; - } else { - int scr_x, scr_y, scr_width, scr_height; - - screen_size(dpy, config, &scr_x, &scr_y, &scr_width, &scr_height); - position = get_position(config); - - if (position != POS_UNSET) { - if (width == -1) { - *w = scr_width; - switch (position & 7) { - default: - case 0: - case 2: *w >>= 1; break; - } - } - - if (height == -1) { - *h = scr_height; - switch ((position >> 4) & 7) { - default: - case 0: - case 2: *h >>= 1; break; - } - } - } - - geometry = config_get_value(config, "window", "size"); - if (geometry) { - int size_w, size_h; - float scale_x, scale_y; - - if (sscanf(geometry, "%dx%d", &size_w, &size_h) == 2) { - *w = size_w; - *h = size_h; - } else if (sscanf(geometry, "%f%%x%f%%", &scale_x, &scale_y) == 2) { - if (*w != -1) - *w = (*w * scale_x) / 100.; - if (*h != -1) - *h = (*h * scale_y) / 100.; - } else if (sscanf(geometry, "%f%%", &scale_x) == 1) { - if (*w != -1) - *w = (*w * scale_x) / 100.; - if (*h != -1) - *h = (*h * scale_x) / 100.; - } - if ((unsigned)*w < width/2) - *w = width/2; - if ((unsigned)*h < height/2) - *h = height/2; - } - - if ((unsigned)*w > scr_width) - *w = scr_width; - - if ((unsigned)*h > scr_height) - *h = scr_height; - - if (position != POS_UNSET) { - switch (position & 7) { - default: - case 0: *x = 0; break; - case 1: *x = (scr_width - *w)/2; break; - case 2: *x = scr_width - *w; break; - } - - switch ((position >> 4) & 7) { - default: - case 0: *y = 0; break; - case 1: *y = (scr_height - *h)/2; break; - case 2: *y = scr_height - *h; break; - } - } - - *x += scr_x; - *y += scr_y; - } - - return position; -} diff --git a/overlay/x11/position.h b/overlay/x11/position.h deleted file mode 100644 index c0713df6..00000000 --- a/overlay/x11/position.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef X11_POSITION_H -#define X11_POSITION_H - -#include <X11/Xlib.h> - -struct config; -enum position; - -enum position -x11_position(Display *dpy, int width, int height, - struct config *config, - int *x, int *y, int *w, int *h); - -#endif /* X11_POSITION_H */ diff --git a/overlay/x11/rgb2yuv.c b/overlay/x11/rgb2yuv.c deleted file mode 100644 index 83e3d8e0..00000000 --- a/overlay/x11/rgb2yuv.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <stdint.h> -#include <stdlib.h> - -#include "rgb2yuv.h" - -static int RGB2YUV_YR[256], RGB2YUV_YG[256], RGB2YUV_YB[256]; -static int RGB2YUV_UR[256], RGB2YUV_UG[256], RGB2YUV_UBVR[256]; -static int RGB2YUV_VG[256], RGB2YUV_VB[256]; - -void rgb2yuv_init(void) -{ - int i; - - for (i = 0; i < 256; i++) - RGB2YUV_YR[i] = 65.481 * (i << 8); - - for (i = 0; i < 256; i++) - RGB2YUV_YG[i] = 128.553 * (i << 8); - - for (i = 0; i < 256; i++) - RGB2YUV_YB[i] = 24.966 * (i << 8); - - for (i = 0; i < 256; i++) - RGB2YUV_UR[i] = 37.797 * (i << 8); - - for (i = 0; i < 256; i++) - RGB2YUV_UG[i] = 74.203 * (i << 8); - - for (i = 0; i < 256; i++) - RGB2YUV_VG[i] = 93.786 * (i << 8); - - for (i = 0; i < 256; i++) - RGB2YUV_VB[i] = 18.214 * (i << 8); - - for (i = 0; i < 256; i++) - RGB2YUV_UBVR[i] = 112 * (i << 8); -} - -int rgb2yuv(cairo_surface_t *surface, XvImage *image, uint8_t *yuv) -{ - uint8_t *data = cairo_image_surface_get_data(surface); - int rgb_stride = cairo_image_surface_get_stride(surface); - int width = cairo_image_surface_get_width(surface); - int height = cairo_image_surface_get_height(surface); - int y_stride = image->pitches[0]; - int uv_stride = image->pitches[1]; - uint8_t *tmp, *tl, *tr, *bl, *br; - int i, j; - - tmp = malloc(2*width*height); - if (tmp == NULL) - return 0; - - tl = tmp; - bl = tmp + width*height; - - for (i = 0; i < height; i++) { - uint16_t *rgb = (uint16_t *)(data + i * rgb_stride); - for (j = 0; j < width; j++) { - uint8_t r = (rgb[j] >> 11) & 0x1f; - uint8_t g = (rgb[j] >> 5) & 0x3f; - uint8_t b = (rgb[j] >> 0) & 0x1f; - - r = r<<3 | r>>2; - g = g<<2 | g>>4; - b = b<<3 | b>>2; - - yuv[j] = (RGB2YUV_YR[r] + RGB2YUV_YG[g] + RGB2YUV_YB[b] + 1048576) >> 16; - *tl++ = (-RGB2YUV_UR[r] - RGB2YUV_UG[g] + RGB2YUV_UBVR[b] + 8388608) >> 16; - *bl++ = (RGB2YUV_UBVR[r] - RGB2YUV_VG[g] - RGB2YUV_VB[b] + 8388608) >> 16; - } - yuv += y_stride; - } - - tl = tmp; tr = tl + 1; - bl = tl + width; br = bl + 1; - for (i = 0; i < height/2; i ++) { - for (j = 0; j < width/2; j ++) { - yuv[j] = ((int)*tl + *tr + *bl + *br) >> 2; - tl += 2; tr += 2; - bl += 2; br += 2; - } - yuv += uv_stride; - - tl += width; tr += width; - bl += width; br += width; - } - - tl = tmp + width*height; tr = tl + 1; - bl = tl + width; br = bl + 1; - for (i = 0; i < height/2; i++) { - for (j = 0; j < width/2; j++) { - yuv[j] = ((int)*tl + *tr + *bl + *br) >> 2; - tl += 2; tr += 2; - bl += 2; br += 2; - } - yuv += uv_stride; - - tl += width; tr += width; - bl += width; br += width; - } - - free(tmp); - return 1; -} diff --git a/overlay/x11/rgb2yuv.h b/overlay/x11/rgb2yuv.h deleted file mode 100644 index c5cc5624..00000000 --- a/overlay/x11/rgb2yuv.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#ifndef RGB2YUV_H -#define RGB2YUV_H - -#include <X11/Xlib.h> -#include <X11/extensions/Xvlib.h> -#include <cairo.h> -#include <stdint.h> - -void rgb2yuv_init(void); -int rgb2yuv(cairo_surface_t *rgb, XvImage *image, uint8_t *yuv); - -#endif /* RGB2YUV_H */ diff --git a/overlay/x11/x11-overlay.c b/overlay/x11/x11-overlay.c deleted file mode 100644 index 38d58b07..00000000 --- a/overlay/x11/x11-overlay.c +++ /dev/null @@ -1,368 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <X11/Xlib.h> -#include <X11/extensions/Xvlib.h> -#include <sys/types.h> -#include <sys/mman.h> -#include <cairo.h> -#include <stdio.h> -#include <stdlib.h> -#include <stdbool.h> -#include <string.h> -#include <unistd.h> - -#include <drm.h> -#include <xf86drm.h> -#include <i915_drm.h> -#include "../overlay.h" -#include "dri2.h" -#include "position.h" -#include "rgb2yuv.h" - -#ifndef ALIGN -#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) -#endif - -#define FOURCC_XVMC (('C' << 24) + ('M' << 16) + ('V' << 8) + 'X') -#define FOURCC_RGB565 ((16 << 24) + ('B' << 16) + ('G' << 8) + 'R') -#define FOURCC_RGB888 ((24 << 24) + ('B' << 16) + ('G' << 8) + 'R') - -struct x11_overlay { - struct overlay base; - Display *dpy; - GC gc; - XvPortID port; - XvImage *image; - void *map, *mem; - int size; - unsigned name; - int x, y; - int visible; -}; -static inline struct x11_overlay *to_x11_overlay(struct overlay *o) -{ - return (struct x11_overlay *)o; -} - -static int noop(Display *dpy, XErrorEvent *event) -{ - return 0; -} - -static void x11_overlay_show(struct overlay *overlay) -{ - struct x11_overlay *priv = to_x11_overlay(overlay); - - if (priv->image->id == FOURCC_XVMC) - rgb2yuv(priv->base.surface, priv->image, priv->map); - else - memcpy(priv->map, priv->mem, priv->size); - - if (!priv->visible) { - XvPutImage(priv->dpy, priv->port, DefaultRootWindow(priv->dpy), - priv->gc, priv->image, - 0, 0, - priv->image->width, priv->image->height, - priv->x, priv->y, - priv->image->width, priv->image->height); - XFlush(priv->dpy); - priv->visible = true; - } -} - -static void x11_overlay_hide(struct overlay *overlay) -{ - struct x11_overlay *priv = to_x11_overlay(overlay); - if (priv->visible) { - XClearWindow(priv->dpy, DefaultRootWindow(priv->dpy)); - XFlush(priv->dpy); - priv->visible = false; - } -} - -static void x11_overlay_destroy(void *data) -{ - struct x11_overlay *priv = data; - munmap(priv->map, priv->size); - free(priv->mem); - XCloseDisplay(priv->dpy); - free(priv); -} - -cairo_surface_t * -x11_overlay_create(struct config *config, int *width, int *height) -{ - Display *dpy; - Screen *scr; - cairo_surface_t *surface; - struct drm_i915_gem_create create; - struct drm_gem_flink flink; - struct drm_i915_gem_mmap_gtt map; - struct x11_overlay *priv; - unsigned int count, i, j; - int fd, x, y, w, h; - XvAdaptorInfo *info; - XvImage *image; - XvPortID port = -1; - void *ptr, *mem; - enum position position; - - dpy = XOpenDisplay(NULL); - if (dpy == NULL) - return NULL; - - scr = ScreenOfDisplay(dpy, DefaultScreen(dpy)); - - fd = dri2_open(dpy); - if (fd < 0) - goto err_dpy; - - if (XvQueryAdaptors(dpy, DefaultRootWindow(dpy), &count, &info) != Success) - goto err_fd; - - for (i = 0; i < count; i++) { - unsigned long visual = 0; - - if (info[i].num_ports != 1) - continue; - - for (j = 0; j < info[j].num_formats; j++) { - if (info[i].formats[j].depth == 24) { - visual = info[i].formats[j].visual_id; - break; - } - } - - if (visual == 0) - continue; - - port = info[i].base_id; - } - XvFreeAdaptorInfo(info); - if (port == -1) - goto err_fd; - - XSetErrorHandler(noop); - - position = x11_position(dpy, *width, *height, config, &x, &y, &w, &h); - - image = XvCreateImage(dpy, port, FOURCC_RGB565, NULL, w, h); - if (image == NULL) - image = XvCreateImage(dpy, port, FOURCC_RGB888, NULL, w, h); - if (image == NULL) { - image = XvCreateImage(dpy, port, FOURCC_XVMC, NULL, w, h); - if (image->pitches[0] == 4) { - image->pitches[0] = ALIGN(image->width, 1024); - image->pitches[1] = ALIGN(image->width/2, 1024); - image->pitches[2] = ALIGN(image->width/2, 1024); - image->offsets[0] = 0; - image->offsets[1] = image->pitches[0] * image->height; - image->offsets[2] = image->offsets[1] + image->pitches[1] * image->height/2; - } - rgb2yuv_init(); - } - if (image == NULL) - goto err_fd; - - switch (image->id) { - case FOURCC_RGB888: - case FOURCC_RGB565: - create.size = image->pitches[0] * image->height; - break; - case FOURCC_XVMC: - create.size = image->pitches[0] * image->height; - create.size += image->pitches[1] * image->height; - break; - } - - create.handle = 0; - create.size = ALIGN(create.size, 4096); - drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); - if (create.handle == 0) - goto err_image; - - flink.handle = create.handle; - if (drmIoctl(fd, DRM_IOCTL_GEM_FLINK, &flink)) - goto err_create; - - map.handle = create.handle; - if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &map)) - goto err_create; - - ptr = mmap(0, create.size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, map.offset); - if (ptr == (void *)-1) - goto err_create; - - mem = malloc(create.size); - if (mem == NULL) - goto err_map; - - switch (image->id) { - default: - case FOURCC_RGB888: - i = CAIRO_FORMAT_RGB24; - j = image->pitches[0]; - break; - case FOURCC_RGB565: - i = CAIRO_FORMAT_RGB16_565; - j = image->pitches[0]; - break; - case FOURCC_XVMC: - i = CAIRO_FORMAT_RGB16_565; - j = cairo_format_stride_for_width(i, image->width); - break; - } - - surface = cairo_image_surface_create_for_data(mem, i, image->width, image->height, j); - if (cairo_surface_status(surface)) - goto err_mem; - - priv = malloc(sizeof(*priv)); - if (priv == NULL) - goto err_surface; - - priv->base.surface = surface; - priv->base.show = x11_overlay_show; - priv->base.hide = x11_overlay_hide; - - priv->dpy = dpy; - priv->gc = XCreateGC(dpy, DefaultRootWindow(dpy), 0, NULL); - priv->port = port; - priv->map = ptr; - priv->mem = mem; - priv->size = create.size; - priv->name = flink.name; - priv->visible = false; - - priv->x = x; - priv->y = y; - if (position != POS_UNSET) { - switch (position & 7) { - default: - case 0: priv->x = 0; break; - case 1: priv->x = (scr->width - image->width)/2; break; - case 2: priv->x = scr->width - image->width; break; - } - - switch ((position >> 4) & 7) { - default: - case 0: priv->y = 0; break; - case 1: priv->y = (scr->height - image->height)/2; break; - case 2: priv->y = scr->height - image->height; break; - } - } - - - priv->image = image; - priv->image->data = (void *)&priv->name; - - cairo_surface_set_user_data(surface, &overlay_key, priv, x11_overlay_destroy); - - XvSetPortAttribute(dpy, port, XInternAtom(dpy, "XV_ALWAYS_ON_TOP", True), 1); - - close(fd); - - *width = image->width; - *height = image->height; - return surface; - -err_surface: - cairo_surface_destroy(surface); -err_mem: - free(mem); -err_map: - munmap(ptr, create.size); -err_create: - drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &create.handle); -err_image: -err_fd: - close(fd); -err_dpy: - XCloseDisplay(dpy); - return NULL; -} - -void x11_overlay_stop(void) -{ - Display *dpy; - unsigned int count, i, j; - XvAdaptorInfo *info; - XvImage *image; - XvPortID port = -1; - uint32_t name; - - dpy = XOpenDisplay(NULL); - if (dpy == NULL) - return; - - if (XvQueryAdaptors(dpy, DefaultRootWindow(dpy), &count, &info) != Success) - goto close; - - for (i = 0; i < count; i++) { - unsigned long visual = 0; - - if (info[i].num_ports != 1) - continue; - - for (j = 0; j < info[j].num_formats; j++) { - if (info[i].formats[j].depth == 24) { - visual = info[i].formats[j].visual_id; - break; - } - } - - if (visual == 0) - continue; - - port = info[i].base_id; - } - XvFreeAdaptorInfo(info); - if (port == -1) - goto close; - - XSetErrorHandler(noop); - - image = XvCreateImage(dpy, port, FOURCC_RGB565, NULL, 16, 16); - if (image == NULL) - image = XvCreateImage(dpy, port, FOURCC_RGB888, NULL, 16, 16); - if (image == NULL) - image = XvCreateImage(dpy, port, FOURCC_XVMC, NULL, 16, 16); - if (image == NULL) - goto close; - - name = 0; - image->data = (void *)&name; - - XvPutImage(dpy, port, DefaultRootWindow(dpy), - XCreateGC(dpy, DefaultRootWindow(dpy), 0, NULL), image, - 0, 0, - 1, 1, - 0, 0, - 1, 1); - XSync(dpy, True); - -close: - XCloseDisplay(dpy); -} diff --git a/overlay/x11/x11-window.c b/overlay/x11/x11-window.c deleted file mode 100644 index 6bdc48c2..00000000 --- a/overlay/x11/x11-window.c +++ /dev/null @@ -1,177 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include <X11/Xlib.h> -#include <cairo.h> -#include <cairo-xlib.h> -#include <stdio.h> -#include <stdlib.h> -#include <stdbool.h> -#include <string.h> -#include <unistd.h> - -#include "../overlay.h" -#include "position.h" - -struct x11_window { - struct overlay base; - cairo_surface_t *front; - Display *dpy; - Window win; - int width, height; - int visible; -}; - -static inline struct x11_window *to_x11_window(struct overlay *o) -{ - return (struct x11_window *)o; -} - -static int noop(Display *dpy, XErrorEvent *event) -{ - return 0; -} - -static void x11_window_show(struct overlay *overlay) -{ - struct x11_window *priv = to_x11_window(overlay); - cairo_t *cr; - - cr = cairo_create(priv->front); - cairo_set_operator(cr, CAIRO_OPERATOR_SOURCE); - cairo_set_source_surface(cr, priv->base.surface, 0, 0); - cairo_paint(cr); - cairo_destroy(cr); - - cairo_surface_flush(priv->front); - - if (!priv->visible) { - XMapWindow(priv->dpy, priv->win); - priv->visible = true; - } - - XFlush(priv->dpy); -} - -static void x11_window_hide(struct overlay *overlay) -{ - struct x11_window *priv = to_x11_window(overlay); - if (priv->visible) { - XUnmapWindow(priv->dpy, priv->win); - XFlush(priv->dpy); - priv->visible = false; - } -} - -static void x11_window_destroy(void *data) -{ - struct x11_window *priv = data; - cairo_surface_destroy(priv->front); - XDestroyWindow(priv->dpy, priv->win); - XCloseDisplay(priv->dpy); - free(priv); -} - -static int prefer_image(struct config *config) -{ - const char *v = config_get_value(config, "x11", "prefer-image"); - - if (v == NULL) - return 0; - if (*v == '\0') - return 1; - - return atoi(v); -} - -cairo_surface_t * -x11_window_create(struct config *config, int *width, int *height) -{ - Display *dpy; - Window win; - int screen; - cairo_surface_t *surface; - XSetWindowAttributes attr; - struct x11_window *priv; - int x, y, w, h; - - dpy = XOpenDisplay(NULL); - if (dpy == NULL) - return NULL; - - screen = DefaultScreen(dpy); - - XSetErrorHandler(noop); - - x11_position(dpy, *width, *height, config, &x, &y, &w, &h); - - attr.override_redirect = True; - win = XCreateWindow(dpy, DefaultRootWindow(dpy), - x, y, w, h, 0, - DefaultDepth(dpy, screen), - InputOutput, - DefaultVisual(dpy, screen), - CWOverrideRedirect, &attr); - - surface = cairo_xlib_surface_create(dpy, win, DefaultVisual (dpy, screen), w, h); - if (cairo_surface_status(surface)) - goto err_win; - - priv = malloc(sizeof(*priv)); - if (priv == NULL) - goto err_surface; - - if (prefer_image(config)) - priv->base.surface = cairo_image_surface_create(CAIRO_FORMAT_RGB24, w, h); - else - priv->base.surface = cairo_surface_create_similar(surface, CAIRO_CONTENT_COLOR, w, h); - if (cairo_surface_status(priv->base.surface)) - goto err_priv; - - priv->base.show = x11_window_show; - priv->base.hide = x11_window_hide; - - priv->dpy = dpy; - priv->win = win; - priv->front = surface; - priv->visible = false; - - priv->width = w; - priv->height = h; - - cairo_surface_set_user_data(priv->base.surface, &overlay_key, priv, x11_window_destroy); - - *width = w; - *height = h; - return priv->base.surface; - -err_priv: - free(priv); -err_surface: - cairo_surface_destroy(surface); -err_win: - XDestroyWindow(dpy, win); - XCloseDisplay(dpy); - return NULL; -} diff --git a/scripts/Makefile.am b/scripts/Makefile.am deleted file mode 100644 index b77f0eb9..00000000 --- a/scripts/Makefile.am +++ /dev/null @@ -1,3 +0,0 @@ - -dist_noinst_SCRIPTS = who.sh run-tests.sh -noinst_PYTHON = throttle.py diff --git a/scripts/convert_itp.py b/scripts/convert_itp.py deleted file mode 100755 index 4474f34d..00000000 --- a/scripts/convert_itp.py +++ /dev/null @@ -1,17 +0,0 @@ -#!/usr/bin/env python3 - -#this script helps to convert internal debugger scripts given to us into our tools - -import sys -import fileinput - -def replace_with_dict(text, dicto): - for key, val in dicto.items(): - text = text.replace(key, val) - return text - -for lines in fileinput.input([sys.argv[1]], inplace=True): - lines = lines.strip() - if lines == '': continue # strip empty lines - replace_dict = {'dword(' : '../tools/intel_reg_read ', 'MMADDR + ' : '', '//' : '#', ')p;' : '', ')p ' : ' -c '} - print(replace_with_dict(lines, replace_dict)) diff --git a/scripts/display_debug.sh b/scripts/display_debug.sh deleted file mode 100755 index f854f90b..00000000 --- a/scripts/display_debug.sh +++ /dev/null @@ -1,172 +0,0 @@ -#!/bin/bash - -# FBC_CFB_BASE 0x43200 -../tools/intel_reg_read 0x43200 -# FBC_CTL 0x43208 -../tools/intel_reg_read 0x43208 -# ERR_INT 0x44040 -../tools/intel_reg_read 0x44040 -# DE_RRMR 0x44050 -../tools/intel_reg_read 0x44050 -# ARB_CTL 0x45000 -../tools/intel_reg_read 0x45000 -# ARB_CTL2 0x45004 -../tools/intel_reg_read 0x45004 -# MSG_CTL 0x45010 -../tools/intel_reg_read 0x45010 -# Watermarks -../tools/intel_reg_read 0x45100 -../tools/intel_reg_read 0x45104 -../tools/intel_reg_read 0x45200 -../tools/intel_reg_read 0x45108 -../tools/intel_reg_read 0x4510C -../tools/intel_reg_read 0x45110 -../tools/intel_reg_read 0x45120 -../tools/intel_reg_read 0x45124 -../tools/intel_reg_read 0x45128 -# Pipe A timing 0x60000-0x6004C -../tools/intel_reg_read 0x60000 -c 0x13; -# Pipe B timing 0x61000-0x6104C -../tools/intel_reg_read 0x61000 -c 0x13; -# Pipe C timing 0x62000-0x6204C -../tools/intel_reg_read 0x62000 -c 0x13; -# FDI A 0x60100 -# FDI B 0x61100 -# FDI C 0x62100 -# EDP 0x64000 -../tools/intel_reg_read 0x60100 -../tools/intel_reg_read 0x61100 -../tools/intel_reg_read 0x62100 -../tools/intel_reg_read 0x64000 -# Panel fitter A window size 0x68074 -# Panel fitter A control 0x68080 -../tools/intel_reg_read 0x68074 -../tools/intel_reg_read 0x68080 -# Panel fitter B window size 0x68874 -# Panel fitter B control 0x68880 -../tools/intel_reg_read 0x68874 -../tools/intel_reg_read 0x68880 -# Panel fitter C window size 0x69074 -# Panel fitter C control 0x69080 -../tools/intel_reg_read 0x69074 -../tools/intel_reg_read 0x69080 -# Pipe A config 0x70008 -# Pipe B config 0x71008 -# Pipe C config 0x72008 -../tools/intel_reg_read 0x70008 -../tools/intel_reg_read 0x71008 -../tools/intel_reg_read 0x72008 -# Cursor A control 0x70080 -# Cursor B control 0x71080 -# Cursor C control 0x72080 -../tools/intel_reg_read 0x70080 -../tools/intel_reg_read 0x71080 -../tools/intel_reg_read 0x72080 -# Primary A control 0x70180 -# Primary B control 0x71180 -# Primary C control 0x72180 -../tools/intel_reg_read 0x70180 -../tools/intel_reg_read 0x71180 -../tools/intel_reg_read 0x72180 -# Sprite A control 0x70280 -# Sprite B control 0x71280 -# Sprite C control 0x72280 -../tools/intel_reg_read 0x70280 -../tools/intel_reg_read 0x71280 -../tools/intel_reg_read 0x72280 -# Sprite A size 0x70290 -# Sprite B size 0x71290 -# Sprite C size 0x72290 -../tools/intel_reg_read 0x70290 -../tools/intel_reg_read 0x71290 -../tools/intel_reg_read 0x72290 -# Sprite A scaling 0x70304 -# Sprite B scaling 0x71304 -# Sprite C scaling 0x72304 -../tools/intel_reg_read 0x70304 -../tools/intel_reg_read 0x71304 -../tools/intel_reg_read 0x72304 -# PCH DE Interrupt enable 0xC400C -../tools/intel_reg_read 0xC400C -# PCH DE Interrupt IIR 0xC4008 -../tools/intel_reg_read 0xC4008 -# PCH DE hotplug 0xC4030 -../tools/intel_reg_read 0xC4030 -# SERR_INT 0xC4040 -../tools/intel_reg_read 0xC4040 -# PCH DPLL A CTL 0xC6014 -# PCH DPLL A Divisor 0 0xC6040 -# PCH DPLL A Divisor 1 0xC6044 -../tools/intel_reg_read 0xC6014 -../tools/intel_reg_read 0xC6040 -../tools/intel_reg_read 0xC6044 -# PCH DPLL B CTL 0xC6018 -# PCH DPLL B Divisor 0 0xC6048 -# PCH DPLL B Divisor 1 0xC604C -../tools/intel_reg_read 0xC6018 -../tools/intel_reg_read 0xC6048 -../tools/intel_reg_read 0xC604C -# PCH DPLL DREF CTL 0xC6200 -../tools/intel_reg_read 0xC6200 -# PCH DPLL SEL 0xC7000 -../tools/intel_reg_read 0xC7000 -# PCH Panel Status 0xC7200 -../tools/intel_reg_read 0xC7200 -# PCH Panel Control 0xC7204 -../tools/intel_reg_read 0xC7204 -# Transcoder A timing 0xE0000-0xE004F -# Transcoder B timing 0xE1000-0xE104F -# Transcoder C timing 0xE2000-0xE204F -../tools/intel_reg_read 0xE0000 -c 0x14; -../tools/intel_reg_read 0xE1000 -c 0x14; -../tools/intel_reg_read 0xE2000 -c 0x14; -# Transcoder A DP CTL 0xE0300 -# Transcoder B DP CTL 0xE1300 -# Transcoder C DP CTL 0xE2300 -../tools/intel_reg_read 0xE0300 -../tools/intel_reg_read 0xE1300 -../tools/intel_reg_read 0xE2300 -# CRT DAC CTL 0xE1100 -../tools/intel_reg_read 0xE1100 -# HDMI/DVI B CTL 0xE1140 -# HDMI/DVI C CTL 0xE1150 -# HDMI/DVI D CTL 0xE1160 -../tools/intel_reg_read 0xE1140 -../tools/intel_reg_read 0xE1150 -../tools/intel_reg_read 0xE1160 -# LVDS 0xE1180 -../tools/intel_reg_read 0xE1180 -# DP B CTL 0xE4100 -# DP C CTL 0xE4200 -# DP D CTL 0xE4300 -../tools/intel_reg_read 0xE4100 -../tools/intel_reg_read 0xE4200 -../tools/intel_reg_read 0xE4300 -# Transcoder A config 0xF0008 -# FDI RX A CTL 0xF000C -# FDI RX A MISC 0xF0010 -# FDI RX A IIR 0xF0014 -# FDI RX A IMR 0xF0018 -../tools/intel_reg_read 0xF0008 -c 5; -# Transcoder B config 0xF1008 -# FDI RX B CTL 0xF100C -# FDI RX B MISC 0xF1010 -# FDI RX B IIR 0xF1014 -# FDI RX B IMR 0xF1018 -../tools/intel_reg_read 0xF1008 -c 5; -# Transcoder C config 0xF2008 -# FDI RX C CTL 0xF200C -# FDI RX C MISC 0xF2010 -# FDI RX C IIR 0xF2014 -# FDI RX C IMR 0xF2018 -../tools/intel_reg_read 0xF2008 -c 5; -#Check if frame and line counters are running -../tools/intel_reg_read 0x44070 -../tools/intel_reg_read 0x70050 -../tools/intel_reg_read 0x71050 -../tools/intel_reg_read 0x72050 -sleep 2; -../tools/intel_reg_read 0x44070 -../tools/intel_reg_read 0x70050 -../tools/intel_reg_read 0x71050 -../tools/intel_reg_read 0x72050 diff --git a/scripts/list-workarounds b/scripts/list-workarounds deleted file mode 100755 index 620d02fe..00000000 --- a/scripts/list-workarounds +++ /dev/null @@ -1,111 +0,0 @@ -#!/usr/bin/env python3 - -import os,sys -import optparse -import subprocess -import re -import operator - -# map of Workaround names -> (list of platforms) -workarounds = {} -verbose = False - -def find_nth(haystack, needle, n): - start = haystack.find(needle) - while start >= 0 and n > 1: - start = haystack.find(needle, start + len(needle)) - n -= 1 - return start - -valid_platforms = ('ctg', 'elk', 'ilk', 'snb', 'ivb', 'vlv', 'hsw', 'bdw', - 'chv', 'skl') -def parse_platforms(p): - l = p.split(',') - for p in l: - if p not in valid_platforms: - sys.stdout.write("unknown platform %s\n" % p) - return l - -wa_re = re.compile('(?P<name>W[aA][A-Z0-9][a-zA-Z0-9_]+):(?P<platforms>[a-z,]+)') -waname_re = re.compile('(?P<name>W[aA][A-Z0-9][a-zA-Z0-9_]+)') -def parse(me): - for line in me.splitlines(): - match = wa_re.search(str(line)) - if not match: - if not verbose: - continue - - # Those lines come from a git grep that looks for Wa - # names, so if we don't match wa_re here it's because - # no platform has been specified - name = waname_re.search(line).group('name') - path = line[:find_nth(line, ':', 2)] - sys.stdout.write("%s: no platform for %s\n" - % (path, name)) - continue - - wa_name = match.group('name') - platforms = match.group('platforms') - - if wa_name in workarounds: - platforms = parse_platforms(platforms) - for p in platforms: - if not p in workarounds[wa_name]: - workarounds[wa_name].append(p) - else: - workarounds[wa_name] = parse_platforms(platforms) - - -def execute(cmd): - p = subprocess.Popen(cmd, stdout=subprocess.PIPE, - stderr=subprocess.PIPE) - out, err = p.communicate() - return out, err - -def parse_options(args): - usage = "Usage: list-workarounds [options] path-to-kernel" - parser = optparse.OptionParser(usage, version=1.0) - - parser.add_option("-v", "--verbose", action="store_true", - dest="verbose", default=False, - help="be more verbose") - - parser.add_option("-p", "--platform", dest="platform", default=None, - help="List workarounds for the specified platform") - - (options, args) = parser.parse_args() - - return (options, args) - -if __name__ == '__main__': - (options, args) = parse_options(sys.argv[1:]) - verbose = options.verbose - - if not len(args): - sys.stderr.write("error: A path to a kernel tree is required\n") - sys.exit(1) - - kernel_path = args[0] - kconfig = os.path.join(kernel_path, 'Kconfig') - if not os.path.isfile(kconfig): - sys.stderr.write("error: %s does not point to a kernel tree \n" - % kernel_path) - sys.exit(1) - - i915_dir = os.path.join('drivers', 'gpu', 'drm', 'i915') - olddir = os.getcwd() - os.chdir(kernel_path) - work_arounds, err = execute(['git', 'grep', '-n', - '-e', 'W[aA][A-Z0-9][a-zA-Z0-9_]\+', - i915_dir]) - os.chdir(olddir) - if err: - print(err) - sys.exit(1) - - parse(work_arounds) - for wa in sorted(workarounds.keys()): - if not options.platform: - print("%s: %s" % (wa, ', '.join(workarounds[wa]))) - elif options.platform in workarounds[wa]: - print(wa) diff --git a/scripts/run-tests.sh b/scripts/run-tests.sh deleted file mode 100755 index 5f83dcf8..00000000 --- a/scripts/run-tests.sh +++ /dev/null @@ -1,128 +0,0 @@ -#!/bin/bash -# -# Copyright © 2014 Intel Corporation -# -# Permission is hereby granted, free of charge, to any person obtaining a -# copy of this software and associated documentation files (the "Software"), -# to deal in the Software without restriction, including without limitation -# the rights to use, copy, modify, merge, publish, distribute, sublicense, -# and/or sell copies of the Software, and to permit persons to whom the -# Software is furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice (including the next -# paragraph) shall be included in all copies or substantial portions of the -# Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS -# IN THE SOFTWARE. - - -ROOT="`dirname $0`" -ROOT="`readlink -f $ROOT/..`" -IGT_TEST_ROOT="$ROOT/tests" -RESULTS="$ROOT/results" -PIGLIT=`which piglit 2> /dev/null` - -if [ ! -d "$IGT_TEST_ROOT" ]; then - echo "Error: could not find tests directory." - exit 1 -fi - -if [ ! -f "$IGT_TEST_ROOT/single-tests.txt" ]; then - echo "Error: test list not found." - echo "Please run make in the tests directory to generate the test list." -fi - -SINGLE_TEST_LIST=`cat "$IGT_TEST_ROOT/single-tests.txt" | sed -e '/TESTLIST/d' -e 's/ /\n/g'` -MULTI_TEST_LIST=`cat "$IGT_TEST_ROOT/multi-tests.txt" | sed -e '/TESTLIST/d' -e 's/ /\n/g'` - -function download_piglit { - git clone git://anongit.freedesktop.org/piglit "$ROOT/piglit" -} - -function print_help { - echo "Usage: run-tests.sh [options]" - echo "Available options:" - echo " -d download Piglit to $ROOT/piglit" - echo " -h display this help message" - echo " -l list all available tests" - echo " -r <directory> store the results in directory" - echo " (default: $RESULTS)" - echo " -s create html summary" - echo " -t <regex> only include tests that match the regular expression" - echo " (can be used more than once)" - echo " -v enable verbose mode" - echo " -x <regex> exclude tests that match the regular expression" - echo " (can be used more than once)" - echo " -R resume interrupted test where the partial results" - echo " are in the directory given by -r" - echo "" - echo "Useful patterns for test filtering are described in tests/NAMING-CONVENTION" -} - -function list_tests { - echo "$SINGLE_TEST_LIST" - for test in $MULTI_TEST_LIST; do - SUBTESTS=`"$IGT_TEST_ROOT/$test" --list-subtests` - for subtest in $SUBTESTS; do - echo "$test/$subtest" - done - done -} - -while getopts ":dhlr:st:vx:R" opt; do - case $opt in - d) download_piglit; exit ;; - h) print_help; exit ;; - l) list_tests; exit ;; - r) RESULTS="$OPTARG" ;; - s) SUMMARY="html" ;; - t) FILTER="$FILTER -t $OPTARG" ;; - v) VERBOSE="-v" ;; - x) EXCLUDE="$EXCLUDE -x $OPTARG" ;; - R) RESUME="true" ;; - :) - echo "Option -$OPTARG requires an argument." - exit 1 - ;; - \?) - echo "Unknown option: -$OPTARG" - print_help - exit 1 - ;; - esac -done -shift $(($OPTIND-1)) - -if [ "x$1" != "x" ]; then - echo "Unknown option: $1" - print_help - exit 1 -fi - -if [ "x$PIGLIT" == "x" ]; then - PIGLIT="$ROOT/piglit/piglit" -fi - -if [ ! -x "$PIGLIT" ]; then - echo "Could not find Piglit." - echo "Please install Piglit or use -d to download Piglit locally." - exit 1 -fi - -if [ "x$RESUME" != "x" ]; then - sudo IGT_TEST_ROOT="$IGT_TEST_ROOT" "$PIGLIT" resume "$RESULTS" -else - mkdir -p "$RESULTS" - sudo IGT_TEST_ROOT="$IGT_TEST_ROOT" "$PIGLIT" run igt "$RESULTS" $VERBOSE $EXCLUDE $FILTER -fi - -if [ "$SUMMARY" == "html" ]; then - "$PIGLIT" summary html --overwrite "$RESULTS/html" "$RESULTS" - echo "HTML summary has been written to $RESULTS/html/index.html" -fi diff --git a/scripts/throttle.py b/scripts/throttle.py deleted file mode 100755 index 126175ca..00000000 --- a/scripts/throttle.py +++ /dev/null @@ -1,67 +0,0 @@ -#!/usr/bin/env python -# -# Usage: -# scripts/throttle.py trace-dat -# -# Shows how often the trace throttles and for how long. - -import getopt -from tracecmd import * -import sys - -requests = {} -throttle = {} -prev_throttle = 0; - -def read_events(t): - for cpu in range(0, t.cpus): - e = t.read_event(cpu) - while e: - if e.name == 'i915_gem_request_complete': - seqno = e.num_field('seqno') - requests[seqno] = e.ts; - - if e.name == 'i915_gem_request_throttle_begin': - seqno = e.num_field('seqno') - throttle[seqno] = e.ts - - if e.name == 'i915_gem_request_throttle_end': - global prev_throttle - - ts = 0 - sum_dispatch = 0 - num_dispatch = 0 - max_dispatch = 0 - - seqno = e.num_field('seqno') - s = prev_throttle - if s == 0: - s = seqno - while s <= seqno: - if requests.has_key(s): - if ts: - delta = requests[s] - ts - num_dispatch += 1 - sum_dispatch += delta - if delta > max_dispatch: max_dispatch = delta - ts = requests[s] - s += 1 - - if throttle.has_key(seqno) and throttle.has_key(prev_throttle) and num_dispatch: - print "throttle +%d: %dms -- %d dispatch, avg %.3fms, max %dus" % ((throttle[seqno]-throttle[prev_throttle])/1000000, (e.ts - throttle[seqno]) / 1000000, num_dispatch, sum_dispatch / (1000000. * num_dispatch), max_dispatch / 1000) - throttle[seqno] = e.ts - - prev_throttle = seqno - - e = t.read_event(cpu) - -if __name__ == "__main__": - if len(sys.argv) >=2: - filename = sys.argv[1] - else: - filename = "trace.dat" - - print "Initializing trace '%s'..." % (filename) - trace = Trace(filename) - read_events(trace) - diff --git a/scripts/who.sh b/scripts/who.sh deleted file mode 100755 index b2216398..00000000 --- a/scripts/who.sh +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/bash -# -# usage: sudo who.sh -# -# Requires root permissions to both query who has the device open, -# and to read the mappings of likely root-owned processes -# - -for i in `lsof -t /dev/dri/card0`; do - who=`readlink /proc/$i/exe` - count=`grep /dev/dri/card0 /proc/$i/maps | wc -l | cut -f1 -d\ ` - echo "$who [$i]: $count" -done diff --git a/shaders/gpgpu/README b/shaders/gpgpu/README deleted file mode 100644 index 3bf328ad..00000000 --- a/shaders/gpgpu/README +++ /dev/null @@ -1,4 +0,0 @@ - -Commands used to generate the shader on gen7 -$> m4 gpgpu_fill.gxa > gpgpu_fill.gxm -$> intel-gen4asm -g 7 -o <output> gpgpu_fill.gxm diff --git a/shaders/gpgpu/gpgpu_fill.gxa b/shaders/gpgpu/gpgpu_fill.gxa deleted file mode 100644 index fc309f36..00000000 --- a/shaders/gpgpu/gpgpu_fill.gxa +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Registers - * g0 -- header - * g1 -- constant - * g2 -- calculate X/Y offset - * g4-g12 payload for write message - */ -define(`ORIG', `g2.0<2,2,1>UD') -define(`ORIG_X', `g2.0<1>UD') -define(`ORIG_Y', `g2.4<1>UD') -define(`COLOR', `g1.0') -define(`COLORUB', `COLOR<0,1,0>UB') -define(`COLORUD', `COLOR<0,1,0>UD') -define(`X', `g0.4<0,1,0>UD') -define(`Y', `g0.24<0,1,0>UD') - -mov(4) COLOR<1>UB COLORUB {align1}; - -/* WRITE */ -/* count thread group ID for X/Y offset */ -mul(1) ORIG_X X 0x10UD {align1}; -mov(1) ORIG_Y Y {align1}; -mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1}; -mov(2) g4.0<1>UD ORIG {align1}; -/* Normal mode: for block height 1 row and block width 16 bytes */ -mov(1) g4.8<1>UD 0x0000000fUD {align1}; - -mov(16) g5.0<1>UD COLORUD {align1 compr}; -mov(16) g7.0<1>UD COLORUD {align1 compr}; -mov(16) g9.0<1>UD COLORUD {align1 compr}; -mov(16) g11.0<1>UD COLORUD {align1 compr}; - -/* - * comment out the following instruction on Gen7 - * write(0, 0, 10, 12) - * 10: media_block_write - * 12: data cache data port 1 - */ -send(16) 4 acc0<1>UW null write(0, 0, 10, 12) mlen 9 rlen 0 {align1}; - -/* - * uncomment the following instruction on Gen7 - * write(0, 0, 10, 0) - * 10: media_block_write - * 0: reander cache data port - */ -/* send(16) 4 acc0<1>UW null write(0, 0, 10, 0) mlen 9 rlen 0 {align1}; */ - -/* EOT */ -mov(8) g112.0<1>UD g0.0<8,8,1>UD {align1}; -send(16) 112 null<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; diff --git a/shaders/media/README b/shaders/media/README deleted file mode 100644 index 9f296010..00000000 --- a/shaders/media/README +++ /dev/null @@ -1,5 +0,0 @@ -These files are here for reference only. - -Commands used to generate the shader on gen8 -$> m4 media_fill.gxa > media_fill.gxm -$> intel-gen4asm -g 8 -o <output> media_fill.gxm diff --git a/shaders/media/media_fill.gxa b/shaders/media/media_fill.gxa deleted file mode 100644 index 75788906..00000000 --- a/shaders/media/media_fill.gxa +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Registers - * g0 -- header - * g1 -- constant - * g2 -- inline data - * g3 -- reserved - * g4-g12 payload for write message - */ -define(`ORIG', `g2.0<2,2,1>UD') -define(`COLOR', `g1.0') -define(`COLORUB', `COLOR<0,1,0>UB') -define(`COLORUD', `COLOR<0,1,0>UD') - -mov(4) COLOR<1>UB COLORUB {align1}; - -/* WRITE */ -mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1}; -mov(2) g4.0<1>UD ORIG {align1}; -mov(1) g4.8<1>UD 0x000f000fUD {align1}; - -mov(16) g5.0<1>UD COLORUD {align1 compr}; -mov(16) g7.0<1>UD COLORUD {align1 compr}; -mov(16) g9.0<1>UD COLORUD {align1 compr}; -mov(16) g11.0<1>UD COLORUD {align1 compr}; - -/* - * comment out the following instruction on Gen7 - * write(0, 0, 10, 12) - * 10: media_block_write - * 12: data cache data port 1 - */ -send(16) 4 acc0<1>UW null write(0, 0, 10, 12) mlen 9 rlen 0 {align1}; - -/* - * uncomment the following instruction on Gen7 - * write(0, 0, 10, 0) - * 10: media_block_write - * 0: reander cache data port - */ -/* send(16) 4 acc0<1>UW null write(0, 0, 10, 0) mlen 9 rlen 0 {align1}; */ - -/* EOT */ -mov(8) g112.0<1>UD g0.0<8,8,1>UD {align1}; -send(16) 112 null<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; diff --git a/shaders/ps/README b/shaders/ps/README deleted file mode 100644 index b196d025..00000000 --- a/shaders/ps/README +++ /dev/null @@ -1 +0,0 @@ -These files are here for reference only. diff --git a/shaders/ps/blit.g7a b/shaders/ps/blit.g7a deleted file mode 100644 index deeedcc5..00000000 --- a/shaders/ps/blit.g7a +++ /dev/null @@ -1,66 +0,0 @@ -/* Assemble with ".../intel-gen4asm/src/intel-gen4asm -g 7" */ - - -/* Move pixels into g10-g13. The pixel shaader does not load what you want. It - * loads the input data for a plane function to calculate what you want. The - * following is boiler plate code to move our normalized texture coordinates - * (u,v) into g10-g13. It does this 4 subspans (16 pixels) at a time. - * - * This should do the same thing, but it doesn't work for some reason. - * pln(16) g10 g6<0,1,0>F g2<8,8,1>F { align1 }; - * pln(16) g12 g6.16<1>F g2<8,8,1>F { align1 }; - */ -/* U */ -pln (8) g10<1>F g6.0<0,1,0>F g2.0<8,8,1>F { align1 }; /* pixel 0-7 */ -pln (8) g11<1>F g6.0<0,1,0>F g4.0<8,8,1>F { align1 }; /* pixel 8-15 */ -/* V */ -pln (8) g12<1>F g6.16<0,1,0> g2.0<8,8,1>F { align1 }; /* pixel 0-7 */ -pln (8) g13<1>F g6.16<0,1,0> g4.0<8,8,1>F { align1 }; /* pixel 8-15 */ - - -/* Next the we want the sampler to fetch the src texture (ie. src buffer). This - * is done with a pretty simple send message. The output goes to g112, which is - * exactly what we're supposed to use in our final send message. - * In intel-gen4asm, we should end up parsed by the following rule: - * predicate SEND execsize dst sendleadreg sndopr directsrcoperand instoptions - * - * Send message descriptor: - * 28:25 = message len = 4 // our 4 registers have 16 pixels - * 24:20 = response len = 8 // Each pixel is RGBA32, so we need 8 registers - * 19:19 = header present = 0 - * 18:17 = SIMD16 = 2 - * 16:12 = TYPE = 0 (regular sample) - * 11:08 = Sampler index = ignored/0 - * 7:0 = binding table index = src = 1 - * 0x8840001 - * - * Send message extra descriptor - * 5:5 = End of Thread = 0 - * 3:0 = Target Function ID = SFID_SAMPLER (2) - * 0x2 - */ - -send(16) g112 g10 0x2 0x8840001 { align1 }; - -/* g112-g119 now contains the sample source input, and all we must do is write - * it out to the destination render target. This is done with the send message - * as well. The only extra bits are to terminate the pixel shader. - * - * Send message descriptor: - * 28:25 = message len = 8 // 16 pixels RGBA32 - * 24:20 = response len = 0 - * 19:19 = header present = 0 - * 17:14 = message type = Render Target Write (12) - * 12:12 = Last Render Target Select = 1 - * 10:08 = Message Type = SIMD16 (0) - * 07:00 = Binding Table Index = dest = 0 - * 0x10031000 - * - * Send message extra descriptor - * 5:5 = End of Thread = 1 - * 3:0 = Target Function ID = SFID_DP_RC (5) - * 0x25 - */ -send(16) null g112 0x25 0x10031000 { align1, EOT }; - -/* vim: set ft=c ts=4 sw=2 tw=80 et: */ diff --git a/shaders/ps/neg1_test.g7a b/shaders/ps/neg1_test.g7a deleted file mode 100644 index 744a7690..00000000 --- a/shaders/ps/neg1_test.g7a +++ /dev/null @@ -1,9 +0,0 @@ -mov(8) g112:UD 0x3f800000:UD { align1 }; -mov(8) g113:UD 0x3f800000:UD { align1 }; -mov(8) g114:UD 0x3f800000:UD { align1 }; -mov(8) g115:UD 0x3f800000:UD { align1 }; -mov(8) g116:UD 0x3f800000:UD { align1 }; -mov(8) g117:UD 0x3f800000:UD { align1 }; -mov(8) g118:UD 0x3f800000:UD { align1 }; -mov(8) g119:UD 0x3f800000:UD { align1 }; -send(16) null g112 0x25 0x10031000 { align1, EOT }; diff --git a/tools/.gitignore b/tools/.gitignore deleted file mode 100644 index fa3c7a14..00000000 --- a/tools/.gitignore +++ /dev/null @@ -1,40 +0,0 @@ -# Please keep sorted alphabetically -ddi_compute_wrpll -forcewaked -intel_audio_dump -intel_backlight -intel_bios_dumper -intel_bios_reader -intel_display_poller -intel_dpio_read -intel_dpio_write -intel_dump_decode -intel_error_decode -intel_forcewaked -intel_framebuffer_dump -intel_gpu_dump -intel_gpu_frequency -intel_gpu_time -intel_gpu_top -intel_gtt -intel_infoframes -intel_iosf_sb_read -intel_iosf_sb_write -intel_l3_parity -intel_lid -intel_nc_read -intel_nc_write -intel_opregion_decode -intel_panel_fitter -intel_perf_counters -intel_punit_read -intel_punit_write -intel_reg_checker -intel_reg_dumper -intel_reg_read -intel_reg_snapshot -intel_reg_write -intel_stepping -intel_vga_read -intel_vga_write -skl_ddb_allocation diff --git a/tools/Android.mk b/tools/Android.mk deleted file mode 100644 index 39f45124..00000000 --- a/tools/Android.mk +++ /dev/null @@ -1,46 +0,0 @@ -LOCAL_PATH := $(call my-dir) - -include $(LOCAL_PATH)/Makefile.sources - -#================# - -define add_tool - include $(CLEAR_VARS) - - LOCAL_SRC_FILES := $1.c - - LOCAL_CFLAGS += -DHAVE_TERMIOS_H - LOCAL_CFLAGS += -DHAVE_STRUCT_SYSINFO_TOTALRAM - LOCAL_CFLAGS += -DANDROID -UNDEBUG - LOCAL_CFLAGS += -std=gnu99 - # FIXME: drop once Bionic correctly annotates "noreturn" on pthread_exit - LOCAL_CFLAGS += -Wno-error=return-type - # Excessive complaining for established cases. Rely on the Linux version warnings. - LOCAL_CFLAGS += -Wno-sign-compare - - LOCAL_C_INCLUDES = $(LOCAL_PATH)/../lib - LOCAL_C_INCLUDES += ${ANDROID_BUILD_TOP}/external/PRIVATE/drm/include/drm - - LOCAL_MODULE := $1 - LOCAL_MODULE_TAGS := optional - - LOCAL_STATIC_LIBRARIES := libintel_gpu_tools - - LOCAL_SHARED_LIBRARIES := libpciaccess \ - libdrm \ - libdrm_intel - - include $(BUILD_EXECUTABLE) -endef - -#================# - -skip_tools_list := \ - intel_framebuffer_dump \ - intel_reg_dumper \ - intel_vga_read \ - intel_vga_write - -tools_list := $(filter-out $(skip_tools_list),$(bin_PROGRAMS)) - -$(foreach item,$(tools_list),$(eval $(call add_tool,$(item)))) diff --git a/tools/Makefile.am b/tools/Makefile.am deleted file mode 100644 index 64fa0604..00000000 --- a/tools/Makefile.am +++ /dev/null @@ -1,12 +0,0 @@ -include Makefile.sources - -SUBDIRS = null_state_gen - -if HAVE_DUMPER -SUBDIRS += quick_dump -endif - -AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib -AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS) -LDADD = $(top_builddir)/lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS) $(LIBUDEV_LIBS) - diff --git a/tools/Makefile.sources b/tools/Makefile.sources deleted file mode 100644 index b16af8a6..00000000 --- a/tools/Makefile.sources +++ /dev/null @@ -1,55 +0,0 @@ -noinst_PROGRAMS = \ - ddi_compute_wrpll \ - skl_ddb_allocation \ - $(NULL) - -bin_PROGRAMS = \ - intel_audio_dump \ - intel_backlight \ - intel_bios_dumper \ - intel_bios_reader \ - intel_display_poller \ - intel_dpio_read \ - intel_dpio_write \ - intel_dump_decode \ - intel_error_decode \ - intel_forcewaked \ - intel_gpu_frequency \ - intel_framebuffer_dump \ - intel_gpu_time \ - intel_gpu_top \ - intel_gtt \ - intel_infoframes \ - intel_iosf_sb_read \ - intel_iosf_sb_write \ - intel_l3_parity \ - intel_lid \ - intel_opregion_decode \ - intel_panel_fitter \ - intel_perf_counters \ - intel_reg_checker \ - intel_reg_dumper \ - intel_reg_read \ - intel_reg_snapshot \ - intel_reg_write \ - intel_stepping \ - intel_vga_read \ - intel_vga_write - -dist_bin_SCRIPTS = intel_gpu_abrt - -intel_dump_decode_SOURCES = \ - intel_dump_decode.c - -intel_error_decode_SOURCES = \ - intel_error_decode.c - -intel_bios_reader_SOURCES = \ - intel_bios_reader.c \ - intel_bios.h - -intel_l3_parity_SOURCES = \ - intel_l3_parity.c \ - intel_l3_parity.h \ - intel_l3_udev_listener.c - diff --git a/tools/ddi_compute_wrpll.c b/tools/ddi_compute_wrpll.c deleted file mode 100644 index e27cc349..00000000 --- a/tools/ddi_compute_wrpll.c +++ /dev/null @@ -1,649 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <stdio.h> -#include <stdbool.h> -#include <stdint.h> -#include <stdlib.h> - -#include "intel_io.h" -#include "drmtest.h" - -#define LC_FREQ 2700 -#define LC_FREQ_2K (LC_FREQ * 2000) - -#define P_MIN 2 -#define P_MAX 64 -#define P_INC 2 - -/* Constraints for PLL good behavior */ -#define REF_MIN 48 -#define REF_MAX 400 -#define VCO_MIN 2400 -#define VCO_MAX 4800 - -#define ABS_DIFF(a, b) ((a > b) ? (a - b) : (b - a)) - -struct wrpll_rnp { - unsigned p, n2, r2; -}; - -static unsigned wrpll_get_budget_for_freq(int clock) -{ - unsigned budget; - - switch (clock) { - case 25175000: - case 25200000: - case 27000000: - case 27027000: - case 37762500: - case 37800000: - case 40500000: - case 40541000: - case 54000000: - case 54054000: - case 59341000: - case 59400000: - case 72000000: - case 74176000: - case 74250000: - case 81000000: - case 81081000: - case 89012000: - case 89100000: - case 108000000: - case 108108000: - case 111264000: - case 111375000: - case 148352000: - case 148500000: - case 162000000: - case 162162000: - case 222525000: - case 222750000: - case 296703000: - case 297000000: - budget = 0; - break; - case 233500000: - case 245250000: - case 247750000: - case 253250000: - case 298000000: - budget = 1500; - break; - case 169128000: - case 169500000: - case 179500000: - case 202000000: - budget = 2000; - break; - case 256250000: - case 262500000: - case 270000000: - case 272500000: - case 273750000: - case 280750000: - case 281250000: - case 286000000: - case 291750000: - budget = 4000; - break; - case 267250000: - case 268500000: - budget = 5000; - break; - default: - budget = 1000; - break; - } - - return budget; -} - -static void wrpll_update_rnp(uint64_t freq2k, unsigned budget, - unsigned r2, unsigned n2, unsigned p, - struct wrpll_rnp *best) -{ - uint64_t a, b, c, d, diff, diff_best; - - /* No best (r,n,p) yet */ - if (best->p == 0) { - best->p = p; - best->n2 = n2; - best->r2 = r2; - return; - } - - /* - * Output clock is (LC_FREQ_2K / 2000) * N / (P * R), which compares to - * freq2k. - * - * delta = 1e6 * - * abs(freq2k - (LC_FREQ_2K * n2/(p * r2))) / - * freq2k; - * - * and we would like delta <= budget. - * - * If the discrepancy is above the PPM-based budget, always prefer to - * improve upon the previous solution. However, if you're within the - * budget, try to maximize Ref * VCO, that is N / (P * R^2). - */ - a = freq2k * budget * p * r2; - b = freq2k * budget * best->p * best->r2; - diff = ABS_DIFF((freq2k * p * r2), (LC_FREQ_2K * n2)); - diff_best = ABS_DIFF((freq2k * best->p * best->r2), - (LC_FREQ_2K * best->n2)); - c = 1000000 * diff; - d = 1000000 * diff_best; - - if (a < c && b < d) { - /* If both are above the budget, pick the closer */ - if (best->p * best->r2 * diff < p * r2 * diff_best) { - best->p = p; - best->n2 = n2; - best->r2 = r2; - } - } else if (a >= c && b < d) { - /* If A is below the threshold but B is above it? Update. */ - best->p = p; - best->n2 = n2; - best->r2 = r2; - } else if (a >= c && b >= d) { - /* Both are below the limit, so pick the higher n2/(r2*r2) */ - if (n2 * best->r2 * best->r2 > best->n2 * r2 * r2) { - best->p = p; - best->n2 = n2; - best->r2 = r2; - } - } - /* Otherwise a < c && b >= d, do nothing */ -} - -static void -wrpll_compute_rnp(int clock /* in Hz */, - unsigned *r2_out, unsigned *n2_out, unsigned *p_out) -{ - uint64_t freq2k; - unsigned p, n2, r2; - struct wrpll_rnp best = { 0, 0, 0 }; - unsigned budget; - - freq2k = clock / 100; - - budget = wrpll_get_budget_for_freq(clock); - - /* Special case handling for 540 pixel clock: bypass WR PLL entirely - * and directly pass the LC PLL to it. */ - if (freq2k == 5400000) { - *n2_out = 2; - *p_out = 1; - *r2_out = 2; - return; - } - - /* - * Ref = LC_FREQ / R, where Ref is the actual reference input seen by - * the WR PLL. - * - * We want R so that REF_MIN <= Ref <= REF_MAX. - * Injecting R2 = 2 * R gives: - * REF_MAX * r2 > LC_FREQ * 2 and - * REF_MIN * r2 < LC_FREQ * 2 - * - * Which means the desired boundaries for r2 are: - * LC_FREQ * 2 / REF_MAX < r2 < LC_FREQ * 2 / REF_MIN - * - */ - for (r2 = LC_FREQ * 2 / REF_MAX + 1; - r2 <= LC_FREQ * 2 / REF_MIN; - r2++) { - - /* - * VCO = N * Ref, that is: VCO = N * LC_FREQ / R - * - * Once again we want VCO_MIN <= VCO <= VCO_MAX. - * Injecting R2 = 2 * R and N2 = 2 * N, we get: - * VCO_MAX * r2 > n2 * LC_FREQ and - * VCO_MIN * r2 < n2 * LC_FREQ) - * - * Which means the desired boundaries for n2 are: - * VCO_MIN * r2 / LC_FREQ < n2 < VCO_MAX * r2 / LC_FREQ - */ - for (n2 = VCO_MIN * r2 / LC_FREQ + 1; - n2 <= VCO_MAX * r2 / LC_FREQ; - n2++) { - - for (p = P_MIN; p <= P_MAX; p += P_INC) - wrpll_update_rnp(freq2k, budget, - r2, n2, p, &best); - } - } - - *n2_out = best.n2; - *p_out = best.p; - *r2_out = best.r2; -} - -/* WRPLL clock dividers */ -struct wrpll_tmds_clock { - uint32_t clock; - uint16_t p; /* Post divider */ - uint16_t n2; /* Feedback divider */ - uint16_t r2; /* Reference divider */ -}; - -/* Table of matching values for WRPLL clocks programming for each frequency. - * The code assumes this table is sorted. */ -static const struct wrpll_tmds_clock wrpll_tmds_clock_table[] = { - {19750000, 38, 25, 18}, - {20000000, 48, 32, 18}, - {21000000, 36, 21, 15}, - {21912000, 42, 29, 17}, - {22000000, 36, 22, 15}, - {23000000, 36, 23, 15}, - {23500000, 40, 40, 23}, - {23750000, 26, 16, 14}, - {24000000, 36, 24, 15}, - {25000000, 36, 25, 15}, - {25175000, 26, 40, 33}, - {25200000, 30, 21, 15}, - {26000000, 36, 26, 15}, - {27000000, 30, 21, 14}, - {27027000, 18, 100, 111}, - {27500000, 30, 29, 19}, - {28000000, 34, 30, 17}, - {28320000, 26, 30, 22}, - {28322000, 32, 42, 25}, - {28750000, 24, 23, 18}, - {29000000, 30, 29, 18}, - {29750000, 32, 30, 17}, - {30000000, 30, 25, 15}, - {30750000, 30, 41, 24}, - {31000000, 30, 31, 18}, - {31500000, 30, 28, 16}, - {32000000, 30, 32, 18}, - {32500000, 28, 32, 19}, - {33000000, 24, 22, 15}, - {34000000, 28, 30, 17}, - {35000000, 26, 32, 19}, - {35500000, 24, 30, 19}, - {36000000, 26, 26, 15}, - {36750000, 26, 46, 26}, - {37000000, 24, 23, 14}, - {37762500, 22, 40, 26}, - {37800000, 20, 21, 15}, - {38000000, 24, 27, 16}, - {38250000, 24, 34, 20}, - {39000000, 24, 26, 15}, - {40000000, 24, 32, 18}, - {40500000, 20, 21, 14}, - {40541000, 22, 147, 89}, - {40750000, 18, 19, 14}, - {41000000, 16, 17, 14}, - {41500000, 22, 44, 26}, - {41540000, 22, 44, 26}, - {42000000, 18, 21, 15}, - {42500000, 22, 45, 26}, - {43000000, 20, 43, 27}, - {43163000, 20, 24, 15}, - {44000000, 18, 22, 15}, - {44900000, 20, 108, 65}, - {45000000, 20, 25, 15}, - {45250000, 20, 52, 31}, - {46000000, 18, 23, 15}, - {46750000, 20, 45, 26}, - {47000000, 20, 40, 23}, - {48000000, 18, 24, 15}, - {49000000, 18, 49, 30}, - {49500000, 16, 22, 15}, - {50000000, 18, 25, 15}, - {50500000, 18, 32, 19}, - {51000000, 18, 34, 20}, - {52000000, 18, 26, 15}, - {52406000, 14, 34, 25}, - {53000000, 16, 22, 14}, - {54000000, 16, 24, 15}, - {54054000, 16, 173, 108}, - {54500000, 14, 24, 17}, - {55000000, 12, 22, 18}, - {56000000, 14, 45, 31}, - {56250000, 16, 25, 15}, - {56750000, 14, 25, 17}, - {57000000, 16, 27, 16}, - {58000000, 16, 43, 25}, - {58250000, 16, 38, 22}, - {58750000, 16, 40, 23}, - {59000000, 14, 26, 17}, - {59341000, 14, 40, 26}, - {59400000, 16, 44, 25}, - {60000000, 16, 32, 18}, - {60500000, 12, 39, 29}, - {61000000, 14, 49, 31}, - {62000000, 14, 37, 23}, - {62250000, 14, 42, 26}, - {63000000, 12, 21, 15}, - {63500000, 14, 28, 17}, - {64000000, 12, 27, 19}, - {65000000, 14, 32, 19}, - {65250000, 12, 29, 20}, - {65500000, 12, 32, 22}, - {66000000, 12, 22, 15}, - {66667000, 14, 38, 22}, - {66750000, 10, 21, 17}, - {67000000, 14, 33, 19}, - {67750000, 14, 58, 33}, - {68000000, 14, 30, 17}, - {68179000, 14, 46, 26}, - {68250000, 14, 46, 26}, - {69000000, 12, 23, 15}, - {70000000, 12, 28, 18}, - {71000000, 12, 30, 19}, - {72000000, 12, 24, 15}, - {73000000, 10, 23, 17}, - {74000000, 12, 23, 14}, - {74176000, 8, 100, 91}, - {74250000, 10, 22, 16}, - {74481000, 12, 43, 26}, - {74500000, 10, 29, 21}, - {75000000, 12, 25, 15}, - {75250000, 10, 39, 28}, - {76000000, 12, 27, 16}, - {77000000, 12, 53, 31}, - {78000000, 12, 26, 15}, - {78750000, 12, 28, 16}, - {79000000, 10, 38, 26}, - {79500000, 10, 28, 19}, - {80000000, 12, 32, 18}, - {81000000, 10, 21, 14}, - {81081000, 6, 100, 111}, - {81624000, 8, 29, 24}, - {82000000, 8, 17, 14}, - {83000000, 10, 40, 26}, - {83950000, 10, 28, 18}, - {84000000, 10, 28, 18}, - {84750000, 6, 16, 17}, - {85000000, 6, 17, 18}, - {85250000, 10, 30, 19}, - {85750000, 10, 27, 17}, - {86000000, 10, 43, 27}, - {87000000, 10, 29, 18}, - {88000000, 10, 44, 27}, - {88500000, 10, 41, 25}, - {89000000, 10, 28, 17}, - {89012000, 6, 90, 91}, - {89100000, 10, 33, 20}, - {90000000, 10, 25, 15}, - {91000000, 10, 32, 19}, - {92000000, 10, 46, 27}, - {93000000, 10, 31, 18}, - {94000000, 10, 40, 23}, - {94500000, 10, 28, 16}, - {95000000, 10, 44, 25}, - {95654000, 10, 39, 22}, - {95750000, 10, 39, 22}, - {96000000, 10, 32, 18}, - {97000000, 8, 23, 16}, - {97750000, 8, 42, 29}, - {98000000, 8, 45, 31}, - {99000000, 8, 22, 15}, - {99750000, 8, 34, 23}, - {100000000, 6, 20, 18}, - {100500000, 6, 19, 17}, - {101000000, 6, 37, 33}, - {101250000, 8, 21, 14}, - {102000000, 6, 17, 15}, - {102250000, 6, 25, 22}, - {103000000, 8, 29, 19}, - {104000000, 8, 37, 24}, - {105000000, 8, 28, 18}, - {106000000, 8, 22, 14}, - {107000000, 8, 46, 29}, - {107214000, 8, 27, 17}, - {108000000, 8, 24, 15}, - {108108000, 8, 173, 108}, - {109000000, 6, 23, 19}, - {110000000, 6, 22, 18}, - {110013000, 6, 22, 18}, - {110250000, 8, 49, 30}, - {110500000, 8, 36, 22}, - {111000000, 8, 23, 14}, - {111264000, 8, 150, 91}, - {111375000, 8, 33, 20}, - {112000000, 8, 63, 38}, - {112500000, 8, 25, 15}, - {113100000, 8, 57, 34}, - {113309000, 8, 42, 25}, - {114000000, 8, 27, 16}, - {115000000, 6, 23, 18}, - {116000000, 8, 43, 25}, - {117000000, 8, 26, 15}, - {117500000, 8, 40, 23}, - {118000000, 6, 38, 29}, - {119000000, 8, 30, 17}, - {119500000, 8, 46, 26}, - {119651000, 8, 39, 22}, - {120000000, 8, 32, 18}, - {121000000, 6, 39, 29}, - {121250000, 6, 31, 23}, - {121750000, 6, 23, 17}, - {122000000, 6, 42, 31}, - {122614000, 6, 30, 22}, - {123000000, 6, 41, 30}, - {123379000, 6, 37, 27}, - {124000000, 6, 51, 37}, - {125000000, 6, 25, 18}, - {125250000, 4, 13, 14}, - {125750000, 4, 27, 29}, - {126000000, 6, 21, 15}, - {127000000, 6, 24, 17}, - {127250000, 6, 41, 29}, - {128000000, 6, 27, 19}, - {129000000, 6, 43, 30}, - {129859000, 4, 25, 26}, - {130000000, 6, 26, 18}, - {130250000, 6, 42, 29}, - {131000000, 6, 32, 22}, - {131500000, 6, 38, 26}, - {131850000, 6, 41, 28}, - {132000000, 6, 22, 15}, - {132750000, 6, 28, 19}, - {133000000, 6, 34, 23}, - {133330000, 6, 37, 25}, - {134000000, 6, 61, 41}, - {135000000, 6, 21, 14}, - {135250000, 6, 167, 111}, - {136000000, 6, 62, 41}, - {137000000, 6, 35, 23}, - {138000000, 6, 23, 15}, - {138500000, 6, 40, 26}, - {138750000, 6, 37, 24}, - {139000000, 6, 34, 22}, - {139050000, 6, 34, 22}, - {139054000, 6, 34, 22}, - {140000000, 6, 28, 18}, - {141000000, 6, 36, 23}, - {141500000, 6, 22, 14}, - {142000000, 6, 30, 19}, - {143000000, 6, 27, 17}, - {143472000, 4, 17, 16}, - {144000000, 6, 24, 15}, - {145000000, 6, 29, 18}, - {146000000, 6, 47, 29}, - {146250000, 6, 26, 16}, - {147000000, 6, 49, 30}, - {147891000, 6, 23, 14}, - {148000000, 6, 23, 14}, - {148250000, 6, 28, 17}, - {148352000, 4, 100, 91}, - {148500000, 6, 33, 20}, - {149000000, 6, 48, 29}, - {150000000, 6, 25, 15}, - {151000000, 4, 19, 17}, - {152000000, 6, 27, 16}, - {152280000, 6, 44, 26}, - {153000000, 6, 34, 20}, - {154000000, 6, 53, 31}, - {155000000, 6, 31, 18}, - {155250000, 6, 50, 29}, - {155750000, 6, 45, 26}, - {156000000, 6, 26, 15}, - {157000000, 6, 61, 35}, - {157500000, 6, 28, 16}, - {158000000, 6, 65, 37}, - {158250000, 6, 44, 25}, - {159000000, 6, 53, 30}, - {159500000, 6, 39, 22}, - {160000000, 6, 32, 18}, - {161000000, 4, 31, 26}, - {162000000, 4, 18, 15}, - {162162000, 4, 131, 109}, - {162500000, 4, 53, 44}, - {163000000, 4, 29, 24}, - {164000000, 4, 17, 14}, - {165000000, 4, 22, 18}, - {166000000, 4, 32, 26}, - {167000000, 4, 26, 21}, - {168000000, 4, 46, 37}, - {169000000, 4, 104, 83}, - {169128000, 4, 64, 51}, - {169500000, 4, 39, 31}, - {170000000, 4, 34, 27}, - {171000000, 4, 19, 15}, - {172000000, 4, 51, 40}, - {172750000, 4, 32, 25}, - {172800000, 4, 32, 25}, - {173000000, 4, 41, 32}, - {174000000, 4, 49, 38}, - {174787000, 4, 22, 17}, - {175000000, 4, 35, 27}, - {176000000, 4, 30, 23}, - {177000000, 4, 38, 29}, - {178000000, 4, 29, 22}, - {178500000, 4, 37, 28}, - {179000000, 4, 53, 40}, - {179500000, 4, 73, 55}, - {180000000, 4, 20, 15}, - {181000000, 4, 55, 41}, - {182000000, 4, 31, 23}, - {183000000, 4, 42, 31}, - {184000000, 4, 30, 22}, - {184750000, 4, 26, 19}, - {185000000, 4, 37, 27}, - {186000000, 4, 51, 37}, - {187000000, 4, 36, 26}, - {188000000, 4, 32, 23}, - {189000000, 4, 21, 15}, - {190000000, 4, 38, 27}, - {190960000, 4, 41, 29}, - {191000000, 4, 41, 29}, - {192000000, 4, 27, 19}, - {192250000, 4, 37, 26}, - {193000000, 4, 20, 14}, - {193250000, 4, 53, 37}, - {194000000, 4, 23, 16}, - {194208000, 4, 23, 16}, - {195000000, 4, 26, 18}, - {196000000, 4, 45, 31}, - {197000000, 4, 35, 24}, - {197750000, 4, 41, 28}, - {198000000, 4, 22, 15}, - {198500000, 4, 25, 17}, - {199000000, 4, 28, 19}, - {200000000, 4, 37, 25}, - {201000000, 4, 61, 41}, - {202000000, 4, 112, 75}, - {202500000, 4, 21, 14}, - {203000000, 4, 146, 97}, - {204000000, 4, 62, 41}, - {204750000, 4, 44, 29}, - {205000000, 4, 38, 25}, - {206000000, 4, 29, 19}, - {207000000, 4, 23, 15}, - {207500000, 4, 40, 26}, - {208000000, 4, 37, 24}, - {208900000, 4, 48, 31}, - {209000000, 4, 48, 31}, - {209250000, 4, 31, 20}, - {210000000, 4, 28, 18}, - {211000000, 4, 25, 16}, - {212000000, 4, 22, 14}, - {213000000, 4, 30, 19}, - {213750000, 4, 38, 24}, - {214000000, 4, 46, 29}, - {214750000, 4, 35, 22}, - {215000000, 4, 43, 27}, - {216000000, 4, 24, 15}, - {217000000, 4, 37, 23}, - {218000000, 4, 42, 26}, - {218250000, 4, 42, 26}, - {218750000, 4, 34, 21}, - {219000000, 4, 47, 29}, - {220000000, 4, 44, 27}, - {220640000, 4, 49, 30}, - {220750000, 4, 36, 22}, - {221000000, 4, 36, 22}, - {222000000, 4, 23, 14}, - {222525000, 4, 150, 91}, - {222750000, 4, 33, 20}, - {227000000, 4, 37, 22}, - {230250000, 4, 29, 17}, - {233500000, 4, 38, 22}, - {235000000, 4, 40, 23}, - {238000000, 4, 30, 17}, - {241500000, 2, 17, 19}, - {245250000, 2, 20, 22}, - {247750000, 2, 22, 24}, - {253250000, 2, 15, 16}, - {256250000, 2, 18, 19}, - {262500000, 2, 31, 32}, - {267250000, 2, 66, 67}, - {268500000, 2, 94, 95}, - {270000000, 2, 14, 14}, - {272500000, 2, 77, 76}, - {273750000, 2, 57, 56}, - {280750000, 2, 24, 23}, - {281250000, 2, 23, 22}, - {286000000, 2, 17, 16}, - {291750000, 2, 26, 24}, - {296703000, 2, 100, 91}, - {297000000, 2, 22, 20}, - {298000000, 2, 21, 19}, -}; - -int main(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(wrpll_tmds_clock_table); i++) { - const struct wrpll_tmds_clock *ref = &wrpll_tmds_clock_table[i]; - unsigned r2, n2, p; - - wrpll_compute_rnp(ref->clock, &r2, &n2, &p); - igt_fail_on_f(ref->r2 != r2 || ref->n2 != n2 || ref->p != p, - "Computed value differs for %li Hz:\n"" Reference: (%u,%u,%u)\n"" Computed: (%u,%u,%u)\n", (int64_t)ref->clock * 1000, ref->r2, ref->n2, ref->p, r2, n2, p); - } - - return 0; -} diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c deleted file mode 100644 index d4479029..00000000 --- a/tools/intel_audio_dump.c +++ /dev/null @@ -1,2506 +0,0 @@ -/* - * Copyright © 2009 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Zhenyu Wang <zhenyu.z.wang@intel.com> - * Wu Fengguang <fengguang.wu@intel.com> - * - */ - -#define _GNU_SOURCE -#include <unistd.h> -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <err.h> -#include <arpa/inet.h> -#include "intel_io.h" -#include "intel_reg.h" -#include "intel_chipset.h" -#include "drmtest.h" - -static uint32_t devid; - -static int aud_reg_base = 0; /* base address of audio registers */ -static int disp_reg_base = 0; /* base address of display registers */ - -#define IS_HASWELL_PLUS(devid) (IS_HASWELL(devid) || IS_BROADWELL(devid)) - -#define BITSTO(n) (n >= sizeof(long) * 8 ? ~0 : (1UL << (n)) - 1) -#define BITMASK(high, low) (BITSTO(high+1) & ~BITSTO(low)) -#define BITS(reg, high, low) (((reg) & (BITMASK(high, low))) >> (low)) -#define BIT(reg, n) BITS(reg, n, n) - -#define min_t(type, x, y) ({ \ - type __min1 = (x); \ - type __min2 = (y); \ - __min1 < __min2 ? __min1 : __min2; }) - -#define OPNAME(names, index) \ - names[min_t(unsigned int, index, ARRAY_SIZE(names) - 1)] - -#define set_aud_reg_base(base) (aud_reg_base = (base)) - -#define set_reg_base(base, audio_offset) \ - do { \ - disp_reg_base = (base); \ - set_aud_reg_base((base) + (audio_offset)); \ - } while (0) - -#define dump_reg(reg, desc) \ - do { \ - dword = INREG(reg); \ - printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \ - } while (0) - -#define dump_disp_reg(reg, desc) \ - do { \ - dword = INREG(disp_reg_base + reg); \ - printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \ - } while (0) - -#define dump_aud_reg(reg, desc) \ - do { \ - dword = INREG(aud_reg_base + reg); \ - printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \ - } while (0) - -#define read_aud_reg(reg) INREG(aud_reg_base + (reg)) - -static int get_num_pipes(void) -{ - int num_pipes; - - if (IS_VALLEYVIEW(devid)) - num_pipes = 2; /* Valleyview is Gen 7 but only has 2 pipes */ - else if (IS_G4X(devid) || IS_GEN5(devid)) - num_pipes = 2; - else - num_pipes = 3; - - return num_pipes; -} - -static const char * const cts_m_value_index[] = { - [0] = "CTS", - [1] = "M", -}; - -static const char * const pixel_clock[] = { - [0] = "25.2 / 1.001 MHz", - [1] = "25.2 MHz", - [2] = "27 MHz", - [3] = "27 * 1.001 MHz", - [4] = "54 MHz", - [5] = "54 * 1.001 MHz", - [6] = "74.25 / 1.001 MHz", - [7] = "74.25 MHz", - [8] = "148.5 / 1.001 MHz", - [9] = "148.5 MHz", - [10] = "Reserved", -}; - -static const char * const power_state[] = { - [0] = "D0", - [1] = "D1", - [2] = "D2", - [3] = "D3", -}; - -static const char * const stream_type[] = { - [0] = "default samples", - [1] = "one bit stream", - [2] = "DST stream", - [3] = "MLP stream", - [4] = "Reserved", -}; - -static const char * const dip_port[] = { - [0] = "Reserved", - [1] = "Digital Port B", - [2] = "Digital Port C", - [3] = "Digital Port D", -}; - -static const char * const dip_type[] = { - [0] = "Audio DIP Disabled", - [1] = "Audio DIP Enabled", -}; - -static const char * const dip_gen1_state[] = { - [0] = "Generic 1 (ACP) DIP Disabled", - [1] = "Generic 1 (ACP) DIP Enabled", -}; - -static const char * const dip_gen2_state[] = { - [0] = "Generic 2 DIP Disabled", - [1] = "Generic 2 DIP Enabled", -}; - -static const char * const dip_index[] = { - [0] = "Audio DIP", - [1] = "ACP DIP", - [2] = "ISRC1 DIP", - [3] = "ISRC2 DIP", - [4] = "Reserved", -}; - -static const char * const dip_trans[] = { - [0] = "disabled", - [1] = "reserved", - [2] = "send once", - [3] = "best effort", -}; - -static const char * const video_dip_index[] = { - [0] = "AVI DIP", - [1] = "Vendor-specific DIP", - [2] = "Gamut Metadata DIP", - [3] = "Source Product Description DIP", -}; - -static const char * const video_dip_trans[] = { - [0] = "send once", - [1] = "send every vsync", - [2] = "send at least every other vsync", - [3] = "reserved", -}; - -static const char * const trans_to_port_sel[] = { - [0] = "no port", - [1] = "Digital Port B", - [2] = "Digital Port C", - [3] = "Digital Port D", - [4] = "reserved", - [5] = "reserved", - [6] = "reserved", - [7] = "reserved", -}; - -static const char * const ddi_mode[] = { - [0] = "HDMI mode", - [1] = "DVI mode", - [2] = "DP SST mode", - [3] = "DP MST mode", - [4] = "DP FDI mode", - [5] = "reserved", - [6] = "reserved", - [7] = "reserved", -}; - -static const char * const bits_per_color[] = { - [0] = "8 bpc", - [1] = "10 bpc", - [2] = "6 bpc", - [3] = "12 bpc", - [4] = "reserved", - [5] = "reserved", - [6] = "reserved", - [7] = "reserved", -}; - -static const char * const transcoder_select[] = { - [0] = "Transcoder A", - [1] = "Transcoder B", - [2] = "Transcoder C", - [3] = "reserved", -}; - -static const char * const dp_port_width[] = { - [0] = "x1 mode", - [1] = "x2 mode", - [2] = "reserved", - [3] = "x4 mode", - [4] = "reserved", - [5] = "reserved", - [6] = "reserved", - [7] = "reserved", -}; - -static const char * const sample_base_rate[] = { - [0] = "48 kHz", - [1] = "44.1 kHz", -}; - -static const char * const sample_base_rate_mult[] = { - [0] = "x1 (48 kHz, 44.1 kHz or less)", - [1] = "x2 (96 kHz, 88.2 kHz, 32 kHz)", - [2] = "x3 (144 kHz)", - [3] = "x4 (192 kHz, 176.4 kHz)", - [4] = "Reserved", -}; - -static const char * const sample_base_rate_divisor[] = { - [0] = "Divided by 1 (48 kHz, 44.1 kHz)", - [1] = "Divided by 2 (24 kHz, 22.05 kHz)", - [2] = "Divided by 3 (16 kHz, 32 kHz)", - [3] = "Divided by 4 (11.025 kHz)", - [4] = "Divided by 5 (9.6 kHz)", - [5] = "Divided by 6 (8 kHz)", - [6] = "Divided by 7", - [7] = "Divided by 8 (6 kHz)", -}; - -static const char * const connect_list_form[] = { - [0] = "Short Form", - [1] = "Long Form", -}; - - -static const char * const bits_per_sample[] = { - [0] = "reserved", - [1] = "16 bits", - [2] = "24 bits", - [3] = "32 bits", - [4] = "20 bits", - [5] = "reserved", -}; - -static const char * const sdvo_hdmi_encoding[] = { - [0] = "SDVO", - [1] = "reserved", - [2] = "TMDS", - [3] = "reserved", -}; - -static const char * const n_index_value[] = { - [0] = "HDMI", - [1] = "DisplayPort", -}; - -static const char * const immed_result_valid[] = { - [0] = "No immediate response is available", - [1] = "Immediate response is available", -}; - -static const char * const immed_cmd_busy[] = { - [0] = "Can accept an immediate command", - [1] = "Immediate command is available", -}; - -static const char * const vanilla_dp12_en[] = { - [0] = "DP 1.2 features are disabled", - [1] = "DP 1.2 features are enabled", -}; - -static const char * const vanilla_3_widgets_en[] = { - [0] = "2nd & 3rd pin/convertor widgets are disabled", - [1] = "All three pin/convertor widgets are enabled", -}; - -static const char * const block_audio[] = { - [0] = "Allow audio data to reach the port", - [1] = "Block audio data from reaching the port", -}; - -static const char * const dis_eld_valid_pulse_trans[] = { - [0] = "Enable ELD valid pulse transition when unsol is disabled", - [1] = "Disable ELD valid pulse transition when unsol is disabled", -}; - -static const char * const dis_pd_pulse_trans[] = { - [0] = "Enable Presense Detect pulse transition when unsol is disabled", - [1] = "Disable Presense Detect pulse transition when unsol is disabled", -}; - -static const char * const dis_ts_delta_err[] = { - [0] = "Enable timestamp delta error for 32/44 KHz", - [1] = "Disable timestamp delta error for 32/44 KHz", -}; - -static const char * const dis_ts_fix_dp_hbr[] = { - [0] = "Enable timestamp fix for DP HBR", - [1] = "Disable timestamp fix for DP HBR", -}; - -static const char * const pattern_gen_8_ch_en[] = { - [0] = "Disable 8-channel pattern generator", - [1] = "Enable 8-channel pattern generator", -}; - -static const char * const pattern_gen_2_ch_en[] = { - [0] = "Disable 2-channel pattern generator", - [1] = "Enable 2-channel pattern generator", -}; - -static const char * const fabric_32_44_dis[] = { - [0] = "Allow sample fabrication for 32/44 KHz", - [1] = "Disable sample fabrication for 32/44 KHz", -}; - -static const char * const epss_dis[] = { - [0] = "Allow audio EPSS", - [1] = "Disable audio EPSS", -}; - -static const char * const ts_test_mode[] = { - [0] = "Default time stamp mode", - [1] = "Audio time stamp test mode for audio only feature", -}; - -static const char * const en_mmio_program[] = { - [0] = "Programming by HD-Audio Azalia", - [1] = "Programming by MMIO debug registers", -}; - -static const char * const sdi_operate_mode[] = { - [0] = "2T mode with sdi data held for 2 bit clocks", - [1] = "1T mode with sdi data held for 1 bit clock only", -}; - -static const char * const bclk_96mhz[] = { - [0] = "iDisplay audio link 96MHz bclk off", - [1] = "iDisplay audio link 96MHz bclk on", -}; - -static const char * const bclk_48mhz[] = { - [0] = "iDisplay audio link 48MHz bclk off", - [1] = "iDisplay audio link 48MHz bclk on", -}; - -static const char * const audio_dp_dip_status[] = { - [0] = "audfc dp fifo full", - [1] = "audfc dp fifo empty", - [2] = "audfc dp fifo overrun", - [3] = "audfc dip fifo full", - [4] = "audfc dp fifo empty cd", - [5] = "audfb dp fifo full", - [6] = "audfb dp fifo empty", - [7] = "audfb dp fifo overrun", - [8] = "audfb dip fifo full", - [9] = "audfb dp fifo empty cd", - [10] = "audfa dp fifo full", - [11] = "audfa dp fifo empty", - [12] = "audfa dp fifo overrun", - [13] = "audfa dip fifo full", - [14] = "audfa dp fifo empty cd", - [15] = "Pipe c audio overflow", - [16] = "Pipe b audio overflow", - [17] = "Pipe a audio overflow", - [31] = 0, -}; - -#undef TRANSCODER_A -#undef TRANSCODER_B -#undef TRANSCODER_C - -enum { - TRANSCODER_A = 0, - TRANSCODER_B, - TRANSCODER_C, -}; - -enum { - PIPE_A = 0, - PIPE_B, - PIPE_C, -}; - -enum { - PORT_A = 0, - PORT_B, - PORT_C, - PORT_D, - PORT_E, -}; - -enum { - CONVERTER_1 = 0, - CONVERTER_2, - CONVERTER_3, -}; - -static void do_self_tests(void) -{ - if (BIT(1, 0) != 1) - exit(1); - if (BIT(0x80000000, 31) != 1) - exit(2); - if (BITS(0xc0000000, 31, 30) != 3) - exit(3); -} - -/* - * EagleLake registers - */ -#define AUD_CONFIG 0x62000 -#define AUD_DEBUG 0x62010 -#define AUD_VID_DID 0x62020 -#define AUD_RID 0x62024 -#define AUD_SUBN_CNT 0x62028 -#define AUD_FUNC_GRP 0x62040 -#define AUD_SUBN_CNT2 0x62044 -#define AUD_GRP_CAP 0x62048 -#define AUD_PWRST 0x6204c -#define AUD_SUPPWR 0x62050 -#define AUD_SID 0x62054 -#define AUD_OUT_CWCAP 0x62070 -#define AUD_OUT_PCMSIZE 0x62074 -#define AUD_OUT_STR 0x62078 -#define AUD_OUT_DIG_CNVT 0x6207c -#define AUD_OUT_CH_STR 0x62080 -#define AUD_OUT_STR_DESC 0x62084 -#define AUD_PINW_CAP 0x620a0 -#define AUD_PIN_CAP 0x620a4 -#define AUD_PINW_CONNLNG 0x620a8 -#define AUD_PINW_CONNLST 0x620ac -#define AUD_PINW_CNTR 0x620b0 -#define AUD_PINW_UNSOLRESP 0x620b8 -#define AUD_CNTL_ST 0x620b4 -#define AUD_PINW_CONFIG 0x620bc -#define AUD_HDMIW_STATUS 0x620d4 -#define AUD_HDMIW_HDMIEDID 0x6210c -#define AUD_HDMIW_INFOFR 0x62118 -#define AUD_CONV_CHCNT 0x62120 -#define AUD_CTS_ENABLE 0x62128 - -#define VIDEO_DIP_CTL 0x61170 -#define VIDEO_DIP_ENABLE (1<<31) -#define VIDEO_DIP_ENABLE_AVI (1<<21) -#define VIDEO_DIP_ENABLE_VENDOR (1<<22) -#define VIDEO_DIP_ENABLE_SPD (1<<24) -#define VIDEO_DIP_BUF_AVI (0<<19) -#define VIDEO_DIP_BUF_VENDOR (1<<19) -#define VIDEO_DIP_BUF_SPD (3<<19) -#define VIDEO_DIP_TRANS_ONCE (0<<16) -#define VIDEO_DIP_TRANS_1 (1<<16) -#define VIDEO_DIP_TRANS_2 (2<<16) - -#define AUDIO_HOTPLUG_EN (1<<24) - - -static void dump_eaglelake(void) -{ - uint32_t dword; - int i; - - /* printf("%-18s %8s %s\n\n", "register name", "raw value", "description"); */ - - dump_reg(VIDEO_DIP_CTL, "Video DIP Control"); - dump_reg(SDVOB, "Digital Display Port B Control Register"); - dump_reg(SDVOC, "Digital Display Port C Control Register"); - dump_reg(PORT_HOTPLUG_EN, "Hot Plug Detect Enable"); - - dump_reg(AUD_CONFIG, "Audio Configuration"); - dump_reg(AUD_DEBUG, "Audio Debug"); - dump_reg(AUD_VID_DID, "Audio Vendor ID / Device ID"); - dump_reg(AUD_RID, "Audio Revision ID"); - dump_reg(AUD_SUBN_CNT, "Audio Subordinate Node Count"); - dump_reg(AUD_FUNC_GRP, "Audio Function Group Type"); - dump_reg(AUD_SUBN_CNT2, "Audio Subordinate Node Count"); - dump_reg(AUD_GRP_CAP, "Audio Function Group Capabilities"); - dump_reg(AUD_PWRST, "Audio Power State"); - dump_reg(AUD_SUPPWR, "Audio Supported Power States"); - dump_reg(AUD_SID, "Audio Root Node Subsystem ID"); - dump_reg(AUD_OUT_CWCAP, "Audio Output Converter Widget Capabilities"); - dump_reg(AUD_OUT_PCMSIZE, "Audio PCM Size and Rates"); - dump_reg(AUD_OUT_STR, "Audio Stream Formats"); - dump_reg(AUD_OUT_DIG_CNVT, "Audio Digital Converter"); - dump_reg(AUD_OUT_CH_STR, "Audio Channel ID and Stream ID"); - dump_reg(AUD_OUT_STR_DESC, "Audio Stream Descriptor Format"); - dump_reg(AUD_PINW_CAP, "Audio Pin Complex Widget Capabilities"); - dump_reg(AUD_PIN_CAP, "Audio Pin Capabilities"); - dump_reg(AUD_PINW_CONNLNG, "Audio Connection List Length"); - dump_reg(AUD_PINW_CONNLST, "Audio Connection List Entry"); - dump_reg(AUD_PINW_CNTR, "Audio Pin Widget Control"); - dump_reg(AUD_PINW_UNSOLRESP, "Audio Unsolicited Response Enable"); - dump_reg(AUD_CNTL_ST, "Audio Control State Register"); - dump_reg(AUD_PINW_CONFIG, "Audio Configuration Default"); - dump_reg(AUD_HDMIW_STATUS, "Audio HDMI Status"); - dump_reg(AUD_HDMIW_HDMIEDID, "Audio HDMI Data EDID Block"); - dump_reg(AUD_HDMIW_INFOFR, "Audio HDMI Widget Data Island Packet"); - dump_reg(AUD_CONV_CHCNT, "Audio Converter Channel Count"); - dump_reg(AUD_CTS_ENABLE, "Audio CTS Programming Enable"); - - printf("\nDetails:\n\n"); - - dword = INREG(AUD_VID_DID); - printf("AUD_VID_DID vendor id\t\t\t0x%x\n", dword >> 16); - printf("AUD_VID_DID device id\t\t\t0x%x\n", dword & 0xffff); - - dword = INREG(AUD_RID); - printf("AUD_RID major revision\t\t\t0x%lx\n", BITS(dword, 23, 20)); - printf("AUD_RID minor revision\t\t\t0x%lx\n", BITS(dword, 19, 16)); - printf("AUD_RID revision id\t\t\t0x%lx\n", BITS(dword, 15, 8)); - printf("AUD_RID stepping id\t\t\t0x%lx\n", BITS(dword, 7, 0)); - - dword = INREG(SDVOB); - printf("SDVOB enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); - printf("SDVOB HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI)); - printf("SDVOB SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO)); - printf("SDVOB null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC)); - printf("SDVOB audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); - - dword = INREG(SDVOC); - printf("SDVOC enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); - printf("SDVOC HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI)); - printf("SDVOC SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO)); - printf("SDVOC null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC)); - printf("SDVOC audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); - - dword = INREG(PORT_HOTPLUG_EN); - printf("PORT_HOTPLUG_EN DisplayPort/HDMI port B\t%ld\n", BIT(dword, 29)), - printf("PORT_HOTPLUG_EN DisplayPort/HDMI port C\t%ld\n", BIT(dword, 28)), - printf("PORT_HOTPLUG_EN DisplayPort port D\t%ld\n", BIT(dword, 27)), - printf("PORT_HOTPLUG_EN SDVOB\t\t\t%ld\n", BIT(dword, 26)), - printf("PORT_HOTPLUG_EN SDVOC\t\t\t%ld\n", BIT(dword, 25)), - printf("PORT_HOTPLUG_EN audio\t\t\t%ld\n", BIT(dword, 24)), - printf("PORT_HOTPLUG_EN TV\t\t\t%ld\n", BIT(dword, 23)), - printf("PORT_HOTPLUG_EN CRT\t\t\t%ld\n", BIT(dword, 9)), - - dword = INREG(VIDEO_DIP_CTL); - printf("VIDEO_DIP_CTL enable graphics DIP\t%ld\n", BIT(dword, 31)), - printf("VIDEO_DIP_CTL port select\t\t[0x%lx] %s\n", - BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); - printf("VIDEO_DIP_CTL DIP buffer trans active\t%lu\n", BIT(dword, 28)); - printf("VIDEO_DIP_CTL AVI DIP enabled\t\t%lu\n", BIT(dword, 21)); - printf("VIDEO_DIP_CTL vendor DIP enabled\t%lu\n", BIT(dword, 22)); - printf("VIDEO_DIP_CTL SPD DIP enabled\t\t%lu\n", BIT(dword, 24)); - printf("VIDEO_DIP_CTL DIP buffer index\t\t[0x%lx] %s\n", - BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]); - printf("VIDEO_DIP_CTL DIP trans freq\t\t[0x%lx] %s\n", - BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]); - printf("VIDEO_DIP_CTL DIP buffer size\t\t%lu\n", BITS(dword, 11, 8)); - printf("VIDEO_DIP_CTL DIP address\t\t%lu\n", BITS(dword, 3, 0)); - - dword = INREG(AUD_CONFIG); - printf("AUD_CONFIG pixel clock\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16), - OPNAME(pixel_clock, BITS(dword, 19, 16))); - printf("AUD_CONFIG fabrication enabled\t\t%lu\n", BITS(dword, 2, 2)); - printf("AUD_CONFIG professional use allowed\t%lu\n", BIT(dword, 1)); - printf("AUD_CONFIG fuse enabled\t\t\t%lu\n", BIT(dword, 0)); - - dword = INREG(AUD_DEBUG); - printf("AUD_DEBUG function reset\t\t%lu\n", BIT(dword, 0)); - - dword = INREG(AUD_SUBN_CNT); - printf("AUD_SUBN_CNT starting node number\t0x%lx\n", BITS(dword, 23, 16)); - printf("AUD_SUBN_CNT total number of nodes\t0x%lx\n", BITS(dword, 7, 0)); - - dword = INREG(AUD_SUBN_CNT2); - printf("AUD_SUBN_CNT2 starting node number\t0x%lx\n", BITS(dword, 24, 16)); - printf("AUD_SUBN_CNT2 total number of nodes\t0x%lx\n", BITS(dword, 7, 0)); - - dword = INREG(AUD_FUNC_GRP); - printf("AUD_FUNC_GRP unsol capable\t\t%lu\n", BIT(dword, 8)); - printf("AUD_FUNC_GRP node type\t\t\t0x%lx\n", BITS(dword, 7, 0)); - - dword = INREG(AUD_GRP_CAP); - printf("AUD_GRP_CAP beep 0\t\t\t%lu\n", BIT(dword, 16)); - printf("AUD_GRP_CAP input delay\t\t\t%lu\n", BITS(dword, 11, 8)); - printf("AUD_GRP_CAP output delay\t\t%lu\n", BITS(dword, 3, 0)); - - dword = INREG(AUD_PWRST); - printf("AUD_PWRST device power state\t\t%s\n", - power_state[BITS(dword, 5, 4)]); - printf("AUD_PWRST device power state setting\t%s\n", - power_state[BITS(dword, 1, 0)]); - - dword = INREG(AUD_SUPPWR); - printf("AUD_SUPPWR support D0\t\t\t%lu\n", BIT(dword, 0)); - printf("AUD_SUPPWR support D1\t\t\t%lu\n", BIT(dword, 1)); - printf("AUD_SUPPWR support D2\t\t\t%lu\n", BIT(dword, 2)); - printf("AUD_SUPPWR support D3\t\t\t%lu\n", BIT(dword, 3)); - - dword = INREG(AUD_OUT_CWCAP); - printf("AUD_OUT_CWCAP widget type\t\t0x%lx\n", BITS(dword, 23, 20)); - printf("AUD_OUT_CWCAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16)); - printf("AUD_OUT_CWCAP channel count\t\t%lu\n", - BITS(dword, 15, 13) * 2 + BIT(dword, 0) + 1); - printf("AUD_OUT_CWCAP L-R swap\t\t\t%lu\n", BIT(dword, 11)); - printf("AUD_OUT_CWCAP power control\t\t%lu\n", BIT(dword, 10)); - printf("AUD_OUT_CWCAP digital\t\t\t%lu\n", BIT(dword, 9)); - printf("AUD_OUT_CWCAP conn list\t\t\t%lu\n", BIT(dword, 8)); - printf("AUD_OUT_CWCAP unsol\t\t\t%lu\n", BIT(dword, 7)); - printf("AUD_OUT_CWCAP mute\t\t\t%lu\n", BIT(dword, 5)); - printf("AUD_OUT_CWCAP format override\t\t%lu\n", BIT(dword, 4)); - printf("AUD_OUT_CWCAP amp param override\t%lu\n", BIT(dword, 3)); - printf("AUD_OUT_CWCAP out amp present\t\t%lu\n", BIT(dword, 2)); - printf("AUD_OUT_CWCAP in amp present\t\t%lu\n", BIT(dword, 1)); - - dword = INREG(AUD_OUT_DIG_CNVT); - printf("AUD_OUT_DIG_CNVT SPDIF category\t\t0x%lx\n", BITS(dword, 14, 8)); - printf("AUD_OUT_DIG_CNVT SPDIF level\t\t%lu\n", BIT(dword, 7)); - printf("AUD_OUT_DIG_CNVT professional\t\t%lu\n", BIT(dword, 6)); - printf("AUD_OUT_DIG_CNVT non PCM\t\t%lu\n", BIT(dword, 5)); - printf("AUD_OUT_DIG_CNVT copyright asserted\t%lu\n", BIT(dword, 4)); - printf("AUD_OUT_DIG_CNVT filter preemphasis\t%lu\n", BIT(dword, 3)); - printf("AUD_OUT_DIG_CNVT validity config\t%lu\n", BIT(dword, 2)); - printf("AUD_OUT_DIG_CNVT validity flag\t\t%lu\n", BIT(dword, 1)); - printf("AUD_OUT_DIG_CNVT digital enable\t\t%lu\n", BIT(dword, 0)); - - dword = INREG(AUD_OUT_CH_STR); - printf("AUD_OUT_CH_STR stream id\t\t0x%lx\n", BITS(dword, 7, 4)); - printf("AUD_OUT_CH_STR lowest channel\t\t%lu\n", BITS(dword, 3, 0)); - - dword = INREG(AUD_OUT_STR_DESC); - printf("AUD_OUT_STR_DESC stream channels\t%lu\n", BITS(dword, 3, 0) + 1); - printf("AUD_OUT_STR_DESC Bits per Sample\t[%#lx] %s\n", - BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4))); - - dword = INREG(AUD_PINW_CAP); - printf("AUD_PINW_CAP widget type\t\t0x%lx\n", BITS(dword, 23, 20)); - printf("AUD_PINW_CAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16)); - printf("AUD_PINW_CAP channel count\t\t%lu\n", - BITS(dword, 15, 13) * 2 + BIT(dword, 0) + 1); - printf("AUD_PINW_CAP HDCP\t\t\t%lu\n", BIT(dword, 12)); - printf("AUD_PINW_CAP L-R swap\t\t\t%lu\n", BIT(dword, 11)); - printf("AUD_PINW_CAP power control\t\t%lu\n", BIT(dword, 10)); - printf("AUD_PINW_CAP digital\t\t\t%lu\n", BIT(dword, 9)); - printf("AUD_PINW_CAP conn list\t\t\t%lu\n", BIT(dword, 8)); - printf("AUD_PINW_CAP unsol\t\t\t%lu\n", BIT(dword, 7)); - printf("AUD_PINW_CAP mute\t\t\t%lu\n", BIT(dword, 5)); - printf("AUD_PINW_CAP format override\t\t%lu\n", BIT(dword, 4)); - printf("AUD_PINW_CAP amp param override\t\t%lu\n", BIT(dword, 3)); - printf("AUD_PINW_CAP out amp present\t\t%lu\n", BIT(dword, 2)); - printf("AUD_PINW_CAP in amp present\t\t%lu\n", BIT(dword, 1)); - - - dword = INREG(AUD_PIN_CAP); - printf("AUD_PIN_CAP EAPD\t\t\t%lu\n", BIT(dword, 16)); - printf("AUD_PIN_CAP HDMI\t\t\t%lu\n", BIT(dword, 7)); - printf("AUD_PIN_CAP output\t\t\t%lu\n", BIT(dword, 4)); - printf("AUD_PIN_CAP presence detect\t\t%lu\n", BIT(dword, 2)); - - dword = INREG(AUD_PINW_CNTR); - printf("AUD_PINW_CNTR mute status\t\t%lu\n", BIT(dword, 8)); - printf("AUD_PINW_CNTR out enable\t\t%lu\n", BIT(dword, 6)); - printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8)); - printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8)); - printf("AUD_PINW_CNTR stream type\t\t[0x%lx] %s\n", - BITS(dword, 2, 0), - OPNAME(stream_type, BITS(dword, 2, 0))); - - dword = INREG(AUD_PINW_UNSOLRESP); - printf("AUD_PINW_UNSOLRESP enable unsol resp\t%lu\n", BIT(dword, 31)); - - dword = INREG(AUD_CNTL_ST); - printf("AUD_CNTL_ST DIP audio enabled\t\t%lu\n", BIT(dword, 21)); - printf("AUD_CNTL_ST DIP ACP enabled\t\t%lu\n", BIT(dword, 22)); - printf("AUD_CNTL_ST DIP ISRCx enabled\t\t%lu\n", BIT(dword, 23)); - printf("AUD_CNTL_ST DIP port select\t\t[0x%lx] %s\n", - BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); - printf("AUD_CNTL_ST DIP buffer index\t\t[0x%lx] %s\n", - BITS(dword, 20, 18), OPNAME(dip_index, BITS(dword, 20, 18))); - printf("AUD_CNTL_ST DIP trans freq\t\t[0x%lx] %s\n", - BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]); - printf("AUD_CNTL_ST DIP address\t\t\t%lu\n", BITS(dword, 3, 0)); - printf("AUD_CNTL_ST CP ready\t\t\t%lu\n", BIT(dword, 15)); - printf("AUD_CNTL_ST ELD valid\t\t\t%lu\n", BIT(dword, 14)); - printf("AUD_CNTL_ST ELD ack\t\t\t%lu\n", BIT(dword, 4)); - printf("AUD_CNTL_ST ELD bufsize\t\t\t%lu\n", BITS(dword, 13, 9)); - printf("AUD_CNTL_ST ELD address\t\t\t%lu\n", BITS(dword, 8, 5)); - - dword = INREG(AUD_HDMIW_STATUS); - printf("AUD_HDMIW_STATUS CDCLK/DOTCLK underrun\t%lu\n", BIT(dword, 31)); - printf("AUD_HDMIW_STATUS CDCLK/DOTCLK overrun\t%lu\n", BIT(dword, 30)); - printf("AUD_HDMIW_STATUS BCLK/CDCLK underrun\t%lu\n", BIT(dword, 29)); - printf("AUD_HDMIW_STATUS BCLK/CDCLK overrun\t%lu\n", BIT(dword, 28)); - - dword = INREG(AUD_CONV_CHCNT); - printf("AUD_CONV_CHCNT HDMI HBR enabled\t\t%lu\n", BITS(dword, 15, 14)); - printf("AUD_CONV_CHCNT HDMI channel count\t%lu\n", BITS(dword, 11, 8) + 1); - - printf("AUD_CONV_CHCNT HDMI channel mapping:\n"); - for (i = 0; i < 8; i++) { - OUTREG(AUD_CONV_CHCNT, i); - dword = INREG(AUD_CONV_CHCNT); - printf("\t\t\t\t\t[0x%x] %u => %lu\n", dword, i, BITS(dword, 7, 4)); - } - - printf("AUD_HDMIW_HDMIEDID HDMI ELD:\n\t"); - dword = INREG(AUD_CNTL_ST); - dword &= ~BITMASK(8, 5); - OUTREG(AUD_CNTL_ST, dword); - for (i = 0; i < BITS(dword, 14, 10) / 4; i++) - printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID))); - printf("\n"); - - printf("AUD_HDMIW_INFOFR HDMI audio Infoframe:\n\t"); - dword = INREG(AUD_CNTL_ST); - dword &= ~BITMASK(20, 18); - dword &= ~BITMASK(3, 0); - OUTREG(AUD_CNTL_ST, dword); - for (i = 0; i < 8; i++) - printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR))); - printf("\n"); -} - -#undef AUD_RID -#undef AUD_VID_DID -#undef AUD_PWRST -#undef AUD_OUT_CH_STR -#undef AUD_HDMIW_STATUS - -/* - * CougarPoint registers - */ -#define DP_CTL_B 0xE4100 -#define DP_CTL_C 0xE4200 -#define DP_AUX_CTL_C 0xE4210 -#define DP_AUX_TST_C 0xE4228 -#define SPORT_DDI_CRC_C 0xE4250 -#define SPORT_DDI_CRC_R 0xE4264 -#define DP_CTL_D 0xE4300 -#define DP_AUX_CTL_D 0xE4310 -#define DP_AUX_TST_D 0xE4328 -#define SPORT_DDI_CRC_CTL_D 0xE4350 -#define AUD_CONFIG_A 0xE5000 -#define AUD_MISC_CTRL_A 0xE5010 -#define AUD_VID_DID 0xE5020 -#define AUD_RID 0xE5024 -#define AUD_CTS_ENABLE_A 0xE5028 -#define AUD_PWRST 0xE504C -#define AUD_HDMIW_HDMIEDID_A 0xE5050 -#define AUD_HDMIW_INFOFR_A 0xE5054 -#define AUD_PORT_EN_HD_CFG 0xE507C -#define AUD_OUT_DIG_CNVT_A 0xE5080 -#define AUD_OUT_STR_DESC_A 0xE5084 -#define AUD_OUT_CH_STR 0xE5088 -#define AUD_PINW_CONNLNG_LIST 0xE50A8 -#define AUD_PINW_CONNLNG_SEL 0xE50AC -#define AUD_CNTL_ST_A 0xE50B4 -#define AUD_CNTRL_ST2 0xE50C0 -#define AUD_CNTRL_ST3 0xE50C4 -#define AUD_HDMIW_STATUS 0xE50D4 -#define AUD_CONFIG_B 0xE5100 -#define AUD_MISC_CTRL_B 0xE5110 -#define AUD_CTS_ENABLE_B 0xE5128 -#define AUD_HDMIW_HDMIEDID_B 0xE5150 -#define AUD_HDMIW_INFOFR_B 0xE5154 -#define AUD_OUT_DIG_CNVT_B 0xE5180 -#define AUD_OUT_STR_DESC_B 0xE5184 -#define AUD_CNTL_ST_B 0xE51B4 -#define AUD_CONFIG_C 0xE5200 -#define AUD_MISC_CTRL_C 0xE5210 -#define AUD_CTS_ENABLE_C 0xE5228 -#define AUD_HDMIW_HDMIEDID_C 0xE5250 -#define AUD_HDMIW_INFOFR_C 0xE5254 -#define AUD_OUT_DIG_CNVT_C 0xE5280 -#define AUD_OUT_STR_DESC_C 0xE5284 -#define AUD_CNTL_ST_C 0xE52B4 -#define AUD_CONFIG_D 0xE5300 -#define AUD_MISC_CTRL_D 0xE5310 -#define AUD_CTS_ENABLE_D 0xE5328 -#define AUD_HDMIW_HDMIEDID_D 0xE5350 -#define AUD_HDMIW_INFOFR_D 0xE5354 -#define AUD_OUT_DIG_CNVT_D 0xE5380 -#define AUD_OUT_STR_DESC_D 0xE5384 -#define AUD_CNTL_ST_D 0xE53B4 - -#define VIDEO_DIP_CTL_A 0xE0200 -#define VIDEO_DIP_CTL_B 0xE1200 -#define VIDEO_DIP_CTL_C 0xE2200 -#define VIDEO_DIP_CTL_D 0xE3200 - - -static void dump_cpt(void) -{ - uint32_t dword; - int i; - - dump_reg(HDMIB, "sDVO/HDMI Port B Control"); - dump_reg(HDMIC, "HDMI Port C Control"); - dump_reg(HDMID, "HDMI Port D Control"); - dump_reg(DP_CTL_B, "DisplayPort B Control"); - dump_reg(DP_CTL_C, "DisplayPort C Control"); - dump_reg(DP_CTL_D, "DisplayPort D Control"); - dump_reg(TRANS_DP_CTL_A, "Transcoder A DisplayPort Control"); - dump_reg(TRANS_DP_CTL_B, "Transcoder B DisplayPort Control"); - dump_reg(TRANS_DP_CTL_C, "Transcoder C DisplayPort Control"); - dump_reg(AUD_CONFIG_A, "Audio Configuration - Transcoder A"); - dump_reg(AUD_CONFIG_B, "Audio Configuration - Transcoder B"); - dump_reg(AUD_CONFIG_C, "Audio Configuration - Transcoder C"); - dump_reg(AUD_CTS_ENABLE_A, "Audio CTS Programming Enable - Transcoder A"); - dump_reg(AUD_CTS_ENABLE_B, "Audio CTS Programming Enable - Transcoder B"); - dump_reg(AUD_CTS_ENABLE_C, "Audio CTS Programming Enable - Transcoder C"); - dump_reg(AUD_MISC_CTRL_A, "Audio MISC Control for Transcoder A"); - dump_reg(AUD_MISC_CTRL_B, "Audio MISC Control for Transcoder B"); - dump_reg(AUD_MISC_CTRL_C, "Audio MISC Control for Transcoder C"); - dump_reg(AUD_VID_DID, "Audio Vendor ID / Device ID"); - dump_reg(AUD_RID, "Audio Revision ID"); - dump_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)"); - dump_reg(AUD_PORT_EN_HD_CFG, "Audio Port Enable HDAudio Config"); - dump_reg(AUD_OUT_DIG_CNVT_A, "Audio Digital Converter - Conv A"); - dump_reg(AUD_OUT_DIG_CNVT_B, "Audio Digital Converter - Conv B"); - dump_reg(AUD_OUT_DIG_CNVT_C, "Audio Digital Converter - Conv C"); - dump_reg(AUD_OUT_CH_STR, "Audio Channel ID and Stream ID"); - dump_reg(AUD_OUT_STR_DESC_A, "Audio Stream Descriptor Format - Conv A"); - dump_reg(AUD_OUT_STR_DESC_B, "Audio Stream Descriptor Format - Conv B"); - dump_reg(AUD_OUT_STR_DESC_C, "Audio Stream Descriptor Format - Conv C"); - dump_reg(AUD_PINW_CONNLNG_LIST, "Audio Connection List"); - dump_reg(AUD_PINW_CONNLNG_SEL, "Audio Connection Select"); - dump_reg(AUD_CNTL_ST_A, "Audio Control State Register - Transcoder A"); - dump_reg(AUD_CNTL_ST_B, "Audio Control State Register - Transcoder B"); - dump_reg(AUD_CNTL_ST_C, "Audio Control State Register - Transcoder C"); - dump_reg(AUD_CNTRL_ST2, "Audio Control State 2"); - dump_reg(AUD_CNTRL_ST3, "Audio Control State 3"); - dump_reg(AUD_HDMIW_STATUS, "Audio HDMI Status"); - dump_reg(AUD_HDMIW_HDMIEDID_A, "HDMI Data EDID Block - Transcoder A"); - dump_reg(AUD_HDMIW_HDMIEDID_B, "HDMI Data EDID Block - Transcoder B"); - dump_reg(AUD_HDMIW_HDMIEDID_C, "HDMI Data EDID Block - Transcoder C"); - dump_reg(AUD_HDMIW_INFOFR_A, "Audio Widget Data Island Packet - Transcoder A"); - dump_reg(AUD_HDMIW_INFOFR_B, "Audio Widget Data Island Packet - Transcoder B"); - dump_reg(AUD_HDMIW_INFOFR_C, "Audio Widget Data Island Packet - Transcoder C"); - - printf("\nDetails:\n\n"); - - dword = INREG(VIDEO_DIP_CTL_A); - printf("VIDEO_DIP_CTL_A Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)), - printf("VIDEO_DIP_CTL_A GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)), - printf("VIDEO_DIP_CTL_A Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21)); - printf("VIDEO_DIP_CTL_A Video_DIP_type_enable Vendor\t\t%lu\n", BIT(dword, 22)); - printf("VIDEO_DIP_CTL_A Video_DIP_type_enable Gamut\t\t%lu\n", BIT(dword, 23)); - printf("VIDEO_DIP_CTL_A Video_DIP_type_enable Source \t\t%lu\n", BIT(dword, 24)); - printf("VIDEO_DIP_CTL_A Video_DIP_buffer_index\t\t\t[0x%lx] %s\n", - BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]); - printf("VIDEO_DIP_CTL_A Video_DIP_frequency\t\t\t[0x%lx] %s\n", - BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]); - printf("VIDEO_DIP_CTL_A Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8)); - printf("VIDEO_DIP_CTL_A Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0)); - - dword = INREG(VIDEO_DIP_CTL_B); - printf("VIDEO_DIP_CTL_B Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)), - printf("VIDEO_DIP_CTL_B GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)), - printf("VIDEO_DIP_CTL_B Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21)); - printf("VIDEO_DIP_CTL_B Video_DIP_type_enable Vendor\t\t%lu\n", BIT(dword, 22)); - printf("VIDEO_DIP_CTL_B Video_DIP_type_enable Gamut\t\t%lu\n", BIT(dword, 23)); - printf("VIDEO_DIP_CTL_B Video_DIP_type_enable Source \t\t%lu\n", BIT(dword, 24)); - printf("VIDEO_DIP_CTL_B Video_DIP_buffer_index\t\t\t[0x%lx] %s\n", - BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]); - printf("VIDEO_DIP_CTL_B Video_DIP_frequency\t\t\t[0x%lx] %s\n", - BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]); - printf("VIDEO_DIP_CTL_B Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8)); - printf("VIDEO_DIP_CTL_B Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0)); - - dword = INREG(VIDEO_DIP_CTL_C); - printf("VIDEO_DIP_CTL_C Enable_Graphics_DIP\t\t\t%ld\n", BIT(dword, 31)), - printf("VIDEO_DIP_CTL_C GCP_DIP_enable\t\t\t\t%ld\n", BIT(dword, 25)), - printf("VIDEO_DIP_CTL_C Video_DIP_type_enable AVI\t\t%lu\n", BIT(dword, 21)); - printf("VIDEO_DIP_CTL_C Video_DIP_type_enable Vendor\t\t%lu\n", BIT(dword, 22)); - printf("VIDEO_DIP_CTL_C Video_DIP_type_enable Gamut\t\t%lu\n", BIT(dword, 23)); - printf("VIDEO_DIP_CTL_C Video_DIP_type_enable Source \t\t%lu\n", BIT(dword, 24)); - printf("VIDEO_DIP_CTL_C Video_DIP_buffer_index\t\t\t[0x%lx] %s\n", - BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]); - printf("VIDEO_DIP_CTL_C Video_DIP_frequency\t\t\t[0x%lx] %s\n", - BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]); - printf("VIDEO_DIP_CTL_C Video_DIP_buffer_size\t\t\t%lu\n", BITS(dword, 11, 8)); - printf("VIDEO_DIP_CTL_C Video_DIP_access_address\t\t%lu\n", BITS(dword, 3, 0)); - - dword = INREG(AUD_VID_DID); - printf("AUD_VID_DID vendor id\t\t\t\t\t0x%x\n", dword >> 16); - printf("AUD_VID_DID device id\t\t\t\t\t0x%x\n", dword & 0xffff); - - dword = INREG(AUD_RID); - printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 23, 20)); - printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16)); - printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 8)); - printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", BITS(dword, 7, 0)); - - dword = INREG(HDMIB); - printf("HDMIB Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); - printf("HDMIB Transcoder_Select\t\t\t\t\t[0x%lx] %s\n", - BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]); - printf("HDMIB sDVO_Border_Enable\t\t\t\t%lu\n", BIT(dword, 7)); - printf("HDMIB HDCP_Port_Select\t\t\t\t\t%lu\n", BIT(dword, 5)); - printf("HDMIB SDVO_HPD_Interrupt_Enable\t\t\t\t%lu\n", BIT(dword, 23)); - printf("HDMIB Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); - printf("HDMIB Encoding\t\t\t\t\t\t[0x%lx] %s\n", - BITS(dword, 11, 10), sdvo_hdmi_encoding[BITS(dword, 11, 10)]); - printf("HDMIB HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI"); - printf("HDMIB Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); - - dword = INREG(HDMIC); - printf("HDMIC Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); - printf("HDMIC Transcoder_Select\t\t\t\t\t[0x%lx] %s\n", - BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]); - printf("HDMIC sDVO_Border_Enable\t\t\t\t%lu\n", BIT(dword, 7)); - printf("HDMIC HDCP_Port_Select\t\t\t\t\t%lu\n", BIT(dword, 5)); - printf("HDMIC SDVO_HPD_Interrupt_Enable\t\t\t\t%lu\n", BIT(dword, 23)); - printf("HDMIC Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); - printf("HDMIC Encoding\t\t\t\t\t\t[0x%lx] %s\n", - BITS(dword, 11, 10), sdvo_hdmi_encoding[BITS(dword, 11, 10)]); - printf("HDMIC HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI"); - printf("HDMIC Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); - - dword = INREG(HDMID); - printf("HDMID Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); - printf("HDMID Transcoder_Select\t\t\t\t\t[0x%lx] %s\n", - BITS(dword, 30, 29), transcoder_select[BITS(dword, 30, 29)]); - printf("HDMID sDVO_Border_Enable\t\t\t\t%lu\n", BIT(dword, 7)); - printf("HDMID HDCP_Port_Select\t\t\t\t\t%lu\n", BIT(dword, 5)); - printf("HDMID SDVO_HPD_Interrupt_Enable\t\t\t\t%lu\n", BIT(dword, 23)); - printf("HDMID Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); - printf("HDMID Encoding\t\t\t\t\t\t[0x%lx] %s\n", - BITS(dword, 11, 10), sdvo_hdmi_encoding[BITS(dword, 11, 10)]); - printf("HDMID HDMI_or_DVI_Select\t\t\t\t%s\n", BIT(dword, 9) ? "HDMI" : "DVI"); - printf("HDMID Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); - - dword = INREG(DP_CTL_B); - printf("DP_CTL_B DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31)); - printf("DP_CTL_B Port_Width_Selection\t\t\t\t[0x%lx] %s\n", - BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]); - printf("DP_CTL_B Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); - printf("DP_CTL_B HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5)); - printf("DP_CTL_B Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6)); - - dword = INREG(DP_CTL_C); - printf("DP_CTL_C DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31)); - printf("DP_CTL_C Port_Width_Selection\t\t\t\t[0x%lx] %s\n", - BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]); - printf("DP_CTL_C Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); - printf("DP_CTL_C HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5)); - printf("DP_CTL_C Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6)); - - dword = INREG(DP_CTL_D); - printf("DP_CTL_D DisplayPort_Enable\t\t\t\t%lu\n", BIT(dword, 31)); - printf("DP_CTL_D Port_Width_Selection\t\t\t\t[0x%lx] %s\n", - BITS(dword, 21, 19), dp_port_width[BITS(dword, 21, 19)]); - printf("DP_CTL_D Port_Detected\t\t\t\t\t%lu\n", BIT(dword, 2)); - printf("DP_CTL_D HDCP_Port_Select\t\t\t\t%lu\n", BIT(dword, 5)); - printf("DP_CTL_D Audio_Output_Enable\t\t\t\t%lu\n", BIT(dword, 6)); - - dword = INREG(AUD_CONFIG_A); - printf("AUD_CONFIG_A N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29), - n_index_value[BIT(dword, 29)]); - printf("AUD_CONFIG_A N_programming_enable\t\t\t%lu\n", BIT(dword, 28)); - printf("AUD_CONFIG_A Upper_N_value\t\t\t\t0x%02lx\n", BITS(dword, 27, 20)); - printf("AUD_CONFIG_A Lower_N_value\t\t\t\t0x%03lx\n", BITS(dword, 15, 4)); - printf("AUD_CONFIG_A Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16), - OPNAME(pixel_clock, BITS(dword, 19, 16))); - printf("AUD_CONFIG_A Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3)); - dword = INREG(AUD_CONFIG_B); - printf("AUD_CONFIG_B N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29), - n_index_value[BIT(dword, 29)]); - printf("AUD_CONFIG_B N_programming_enable\t\t\t%lu\n", BIT(dword, 28)); - printf("AUD_CONFIG_B Upper_N_value\t\t\t\t0x%02lx\n", BITS(dword, 27, 20)); - printf("AUD_CONFIG_B Lower_N_value\t\t\t\t0x%03lx\n", BITS(dword, 15, 4)); - printf("AUD_CONFIG_B Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16), - OPNAME(pixel_clock, BITS(dword, 19, 16))); - printf("AUD_CONFIG_B Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3)); - dword = INREG(AUD_CONFIG_C); - printf("AUD_CONFIG_C N_index_value\t\t\t\t[0x%lx] %s\n", BIT(dword, 29), - n_index_value[BIT(dword, 29)]); - printf("AUD_CONFIG_C N_programming_enable\t\t\t%lu\n", BIT(dword, 28)); - printf("AUD_CONFIG_C Upper_N_value\t\t\t\t0x%02lx\n", BITS(dword, 27, 20)); - printf("AUD_CONFIG_C Lower_N_value\t\t\t\t0x%03lx\n", BITS(dword, 15, 4)); - printf("AUD_CONFIG_C Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16), - OPNAME(pixel_clock, BITS(dword, 19, 16))); - printf("AUD_CONFIG_C Disable_NCTS\t\t\t\t%lu\n", BIT(dword, 3)); - - dword = INREG(AUD_CTS_ENABLE_A); - printf("AUD_CTS_ENABLE_A Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20)); - printf("AUD_CTS_ENABLE_A CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M"); - printf("AUD_CTS_ENABLE_A CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0)); - dword = INREG(AUD_CTS_ENABLE_B); - printf("AUD_CTS_ENABLE_B Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20)); - printf("AUD_CTS_ENABLE_B CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M"); - printf("AUD_CTS_ENABLE_B CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0)); - dword = INREG(AUD_CTS_ENABLE_C); - printf("AUD_CTS_ENABLE_C Enable_CTS_or_M_programming\t\t%lu\n", BIT(dword, 20)); - printf("AUD_CTS_ENABLE_C CTS_M value Index\t\t\t%s\n", BIT(dword, 21) ? "CTS" : "M"); - printf("AUD_CTS_ENABLE_C CTS_programming\t\t\t%#lx\n", BITS(dword, 19, 0)); - - dword = INREG(AUD_MISC_CTRL_A); - printf("AUD_MISC_CTRL_A Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2)); - printf("AUD_MISC_CTRL_A Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8)); - printf("AUD_MISC_CTRL_A Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4)); - printf("AUD_MISC_CTRL_A Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1)); - dword = INREG(AUD_MISC_CTRL_B); - printf("AUD_MISC_CTRL_B Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2)); - printf("AUD_MISC_CTRL_B Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8)); - printf("AUD_MISC_CTRL_B Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4)); - printf("AUD_MISC_CTRL_B Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1)); - dword = INREG(AUD_MISC_CTRL_C); - printf("AUD_MISC_CTRL_C Sample_Fabrication_EN_bit\t\t%lu\n", BIT(dword, 2)); - printf("AUD_MISC_CTRL_C Sample_present_Disable\t\t\t%lu\n", BIT(dword, 8)); - printf("AUD_MISC_CTRL_C Output_Delay\t\t\t\t%lu\n", BITS(dword, 7, 4)); - printf("AUD_MISC_CTRL_C Pro_Allowed\t\t\t\t%lu\n", BIT(dword, 1)); - - dword = INREG(AUD_PWRST); - printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 27, 26)]); - printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 25, 24)]); - printf("AUD_PWRST ConvertorA_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]); - printf("AUD_PWRST ConvertorA_Widget_Power_State_Requsted \t%s\n", power_state[BITS(dword, 13, 12)]); - printf("AUD_PWRST ConvertorB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 19, 18)]); - printf("AUD_PWRST ConvertorB_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 17, 16)]); - printf("AUD_PWRST ConvC_Widget_PwrSt_Curr \t%s\n", power_state[BITS(dword, 23, 22)]); - printf("AUD_PWRST ConvC_Widget_PwrSt_Req \t%s\n", power_state[BITS(dword, 21, 20)]); - printf("AUD_PWRST PinB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 3, 2)]); - printf("AUD_PWRST PinB_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 1, 0)]); - printf("AUD_PWRST PinC_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 7, 6)]); - printf("AUD_PWRST PinC_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 5, 4)]); - printf("AUD_PWRST PinD_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 11, 10)]); - printf("AUD_PWRST PinD_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 9, 8)]); - - dword = INREG(AUD_PORT_EN_HD_CFG); - printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0)); - printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1)); - printf("AUD_PORT_EN_HD_CFG Convertor_C_Digen\t\t\t%lu\n", BIT(dword, 2)); - printf("AUD_PORT_EN_HD_CFG ConvertorA_Stream_ID\t\t%lu\n", BITS(dword, 7, 4)); - printf("AUD_PORT_EN_HD_CFG ConvertorB_Stream_ID\t\t%lu\n", BITS(dword, 11, 8)); - printf("AUD_PORT_EN_HD_CFG ConvertorC_Stream_ID\t\t%lu\n", BITS(dword, 15, 12)); - printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 16)); - printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 17)); - printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 18)); - printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 20)); - printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 21)); - printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22)); - - dword = INREG(AUD_OUT_DIG_CNVT_A); - printf("AUD_OUT_DIG_CNVT_A V\t\t\t\t\t%lu\n", BIT(dword, 1)); - printf("AUD_OUT_DIG_CNVT_A VCFG\t\t\t\t%lu\n", BIT(dword, 2)); - printf("AUD_OUT_DIG_CNVT_A PRE\t\t\t\t\t%lu\n", BIT(dword, 3)); - printf("AUD_OUT_DIG_CNVT_A Copy\t\t\t\t%lu\n", BIT(dword, 4)); - printf("AUD_OUT_DIG_CNVT_A NonAudio\t\t\t\t%lu\n", BIT(dword, 5)); - printf("AUD_OUT_DIG_CNVT_A PRO\t\t\t\t\t%lu\n", BIT(dword, 6)); - printf("AUD_OUT_DIG_CNVT_A Level\t\t\t\t%lu\n", BIT(dword, 7)); - printf("AUD_OUT_DIG_CNVT_A Category_Code\t\t\t%lu\n", BITS(dword, 14, 8)); - printf("AUD_OUT_DIG_CNVT_A Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16)); - printf("AUD_OUT_DIG_CNVT_A Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20)); - - dword = INREG(AUD_OUT_DIG_CNVT_B); - printf("AUD_OUT_DIG_CNVT_B V\t\t\t\t\t%lu\n", BIT(dword, 1)); - printf("AUD_OUT_DIG_CNVT_B VCFG\t\t\t\t%lu\n", BIT(dword, 2)); - printf("AUD_OUT_DIG_CNVT_B PRE\t\t\t\t\t%lu\n", BIT(dword, 3)); - printf("AUD_OUT_DIG_CNVT_B Copy\t\t\t\t%lu\n", BIT(dword, 4)); - printf("AUD_OUT_DIG_CNVT_B NonAudio\t\t\t\t%lu\n", BIT(dword, 5)); - printf("AUD_OUT_DIG_CNVT_B PRO\t\t\t\t\t%lu\n", BIT(dword, 6)); - printf("AUD_OUT_DIG_CNVT_B Level\t\t\t\t%lu\n", BIT(dword, 7)); - printf("AUD_OUT_DIG_CNVT_B Category_Code\t\t\t%lu\n", BITS(dword, 14, 8)); - printf("AUD_OUT_DIG_CNVT_B Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16)); - printf("AUD_OUT_DIG_CNVT_B Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20)); - - dword = INREG(AUD_OUT_DIG_CNVT_C); - printf("AUD_OUT_DIG_CNVT_C V\t\t\t\t\t%lu\n", BIT(dword, 1)); - printf("AUD_OUT_DIG_CNVT_C VCFG\t\t\t\t%lu\n", BIT(dword, 2)); - printf("AUD_OUT_DIG_CNVT_C PRE\t\t\t\t\t%lu\n", BIT(dword, 3)); - printf("AUD_OUT_DIG_CNVT_C Copy\t\t\t\t%lu\n", BIT(dword, 4)); - printf("AUD_OUT_DIG_CNVT_C NonAudio\t\t\t\t%lu\n", BIT(dword, 5)); - printf("AUD_OUT_DIG_CNVT_C PRO\t\t\t\t\t%lu\n", BIT(dword, 6)); - printf("AUD_OUT_DIG_CNVT_C Level\t\t\t\t%lu\n", BIT(dword, 7)); - printf("AUD_OUT_DIG_CNVT_C Category_Code\t\t\t%lu\n", BITS(dword, 14, 8)); - printf("AUD_OUT_DIG_CNVT_C Lowest_Channel_Number\t\t%lu\n", BITS(dword, 19, 16)); - printf("AUD_OUT_DIG_CNVT_C Stream_ID\t\t\t\t%lu\n", BITS(dword, 23, 20)); - - printf("AUD_OUT_CH_STR Converter_Channel_MAP PORTB PORTC PORTD\n"); - for (i = 0; i < 8; i++) { - OUTREG(AUD_OUT_CH_STR, i | (i << 8) | (i << 16)); - dword = INREG(AUD_OUT_CH_STR); - printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n", - 1 + BITS(dword, 3, 0), - 1 + BITS(dword, 7, 4), - 1 + BITS(dword, 15, 12), - 1 + BITS(dword, 23, 20)); - } - - dword = INREG(AUD_OUT_STR_DESC_A); - printf("AUD_OUT_STR_DESC_A HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27)); - printf("AUD_OUT_STR_DESC_A Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1); - printf("AUD_OUT_STR_DESC_A Bits_per_Sample\t\t\t[%#lx] %s\n", - BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4))); - printf("AUD_OUT_STR_DESC_A Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0)); - - dword = INREG(AUD_OUT_STR_DESC_B); - printf("AUD_OUT_STR_DESC_B HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27)); - printf("AUD_OUT_STR_DESC_B Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1); - printf("AUD_OUT_STR_DESC_B Bits_per_Sample\t\t\t[%#lx] %s\n", - BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4))); - printf("AUD_OUT_STR_DESC_B Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0)); - - dword = INREG(AUD_OUT_STR_DESC_C); - printf("AUD_OUT_STR_DESC_C HBR_enable\t\t\t\t%lu\n", BITS(dword, 28, 27)); - printf("AUD_OUT_STR_DESC_C Convertor_Channel_Count\t\t%lu\n", BITS(dword, 20, 16) + 1); - printf("AUD_OUT_STR_DESC_C Bits_per_Sample\t\t\t[%#lx] %s\n", - BITS(dword, 6, 4), OPNAME(bits_per_sample, BITS(dword, 6, 4))); - printf("AUD_OUT_STR_DESC_C Number_of_Channels_in_a_Stream\t%lu\n", 1 + BITS(dword, 3, 0)); - - dword = INREG(AUD_PINW_CONNLNG_SEL); - printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_B\t%#lx\n", BITS(dword, 7, 0)); - printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_C\t%#lx\n", BITS(dword, 15, 8)); - printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_D\t%#lx\n", BITS(dword, 23, 16)); - - dword = INREG(AUD_CNTL_ST_A); - printf("AUD_CNTL_ST_A DIP_Port_Select\t\t\t\t[%#lx] %s\n", - BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); - printf("AUD_CNTL_ST_A DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21)); - printf("AUD_CNTL_ST_A DIP_type_enable_status ACP DIP\t\t%lu\n", BIT(dword, 22)); - printf("AUD_CNTL_ST_A DIP_type_enable_status Generic 2 DIP\t%lu\n", BIT(dword, 23)); - printf("AUD_CNTL_ST_A DIP_transmission_frequency\t\t[0x%lx] %s\n", - BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]); - printf("AUD_CNTL_ST_A ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4)); - printf("AUD_CNTL_ST_A ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10)); - - dword = INREG(AUD_CNTL_ST_B); - printf("AUD_CNTL_ST_B DIP_Port_Select\t\t\t\t[%#lx] %s\n", - BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); - printf("AUD_CNTL_ST_B DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21)); - printf("AUD_CNTL_ST_B DIP_type_enable_status ACP DIP\t\t%lu\n", BIT(dword, 22)); - printf("AUD_CNTL_ST_B DIP_type_enable_status Generic 2 DIP\t%lu\n", BIT(dword, 23)); - printf("AUD_CNTL_ST_B DIP_transmission_frequency\t\t[0x%lx] %s\n", - BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]); - printf("AUD_CNTL_ST_B ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4)); - printf("AUD_CNTL_ST_B ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10)); - - dword = INREG(AUD_CNTL_ST_C); - printf("AUD_CNTL_ST_C DIP_Port_Select\t\t\t\t[%#lx] %s\n", - BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]); - printf("AUD_CNTL_ST_C DIP_type_enable_status Audio DIP\t\t%lu\n", BIT(dword, 21)); - printf("AUD_CNTL_ST_C DIP_type_enable_status ACP DIP\t\t%lu\n", BIT(dword, 22)); - printf("AUD_CNTL_ST_C DIP_type_enable_status Generic 2 DIP\t%lu\n", BIT(dword, 23)); - printf("AUD_CNTL_ST_C DIP_transmission_frequency\t\t[0x%lx] %s\n", - BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]); - printf("AUD_CNTL_ST_C ELD_ACK\t\t\t\t\t%lu\n", BIT(dword, 4)); - printf("AUD_CNTL_ST_C ELD_buffer_size\t\t\t\t%lu\n", BITS(dword, 14, 10)); - - dword = INREG(AUD_CNTRL_ST2); - printf("AUD_CNTRL_ST2 CP_ReadyB\t\t\t\t%lu\n", BIT(dword, 1)); - printf("AUD_CNTRL_ST2 ELD_validB\t\t\t\t%lu\n", BIT(dword, 0)); - printf("AUD_CNTRL_ST2 CP_ReadyC\t\t\t\t%lu\n", BIT(dword, 5)); - printf("AUD_CNTRL_ST2 ELD_validC\t\t\t\t%lu\n", BIT(dword, 4)); - printf("AUD_CNTRL_ST2 CP_ReadyD\t\t\t\t%lu\n", BIT(dword, 9)); - printf("AUD_CNTRL_ST2 ELD_validD\t\t\t\t%lu\n", BIT(dword, 8)); - - dword = INREG(AUD_CNTRL_ST3); - printf("AUD_CNTRL_ST3 TransA_DPT_Audio_Output_En\t\t%lu\n", BIT(dword, 3)); - printf("AUD_CNTRL_ST3 TransA_to_Port_Sel\t\t\t[%#lx] %s\n", - BITS(dword, 2, 0), trans_to_port_sel[BITS(dword, 2, 0)]); - printf("AUD_CNTRL_ST3 TransB_DPT_Audio_Output_En\t\t%lu\n", BIT(dword, 7)); - printf("AUD_CNTRL_ST3 TransB_to_Port_Sel\t\t\t[%#lx] %s\n", - BITS(dword, 6, 4), trans_to_port_sel[BITS(dword, 6, 4)]); - printf("AUD_CNTRL_ST3 TransC_DPT_Audio_Output_En\t\t%lu\n", BIT(dword, 11)); - printf("AUD_CNTRL_ST3 TransC_to_Port_Sel\t\t\t[%#lx] %s\n", - BITS(dword, 10, 8), trans_to_port_sel[BITS(dword, 10, 8)]); - - dword = INREG(AUD_HDMIW_STATUS); - printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27)); - printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 26)); - printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29)); - printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 28)); - printf("AUD_HDMIW_STATUS Conv_C_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 31)); - printf("AUD_HDMIW_STATUS Conv_C_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 30)); - printf("AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun\t\t%lu\n", BIT(dword, 25)); - printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24)); - - printf("AUD_HDMIW_HDMIEDID_A HDMI ELD:\n\t"); - dword = INREG(AUD_CNTL_ST_A); - dword &= ~BITMASK(9, 5); - OUTREG(AUD_CNTL_ST_A, dword); - for (i = 0; i < BITS(dword, 14, 10) / 4; i++) - printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_A))); - printf("\n"); - - printf("AUD_HDMIW_HDMIEDID_B HDMI ELD:\n\t"); - dword = INREG(AUD_CNTL_ST_B); - dword &= ~BITMASK(9, 5); - OUTREG(AUD_CNTL_ST_B, dword); - for (i = 0; i < BITS(dword, 14, 10) / 4; i++) - printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_B))); - printf("\n"); - - printf("AUD_HDMIW_HDMIEDID_C HDMI ELD:\n\t"); - dword = INREG(AUD_CNTL_ST_C); - dword &= ~BITMASK(9, 5); - OUTREG(AUD_CNTL_ST_C, dword); - for (i = 0; i < BITS(dword, 14, 10) / 4; i++) - printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_C))); - printf("\n"); - - printf("AUD_HDMIW_INFOFR_A HDMI audio Infoframe:\n\t"); - dword = INREG(AUD_CNTL_ST_A); - dword &= ~BITMASK(20, 18); - dword &= ~BITMASK(3, 0); - OUTREG(AUD_CNTL_ST_A, dword); - for (i = 0; i < 8; i++) - printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_A))); - printf("\n"); - - printf("AUD_HDMIW_INFOFR_B HDMI audio Infoframe:\n\t"); - dword = INREG(AUD_CNTL_ST_B); - dword &= ~BITMASK(20, 18); - dword &= ~BITMASK(3, 0); - OUTREG(AUD_CNTL_ST_B, dword); - for (i = 0; i < 8; i++) - printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_B))); - printf("\n"); - - printf("AUD_HDMIW_INFOFR_C HDMI audio Infoframe:\n\t"); - dword = INREG(AUD_CNTL_ST_C); - dword &= ~BITMASK(20, 18); - dword &= ~BITMASK(3, 0); - OUTREG(AUD_CNTL_ST_C, dword); - for (i = 0; i < 8; i++) - printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_C))); - printf("\n"); - -} - -/* Audio config registers of Ironlake */ -#undef AUD_CONFIG_A -#undef AUD_CONFIG_B -#undef AUD_MISC_CTRL_A -#undef AUD_MISC_CTRL_B -#undef AUD_VID_DID -#undef AUD_RID -#undef AUD_CTS_ENABLE_A -#undef AUD_CTS_ENABLE_B -#undef AUD_PWRST -#undef AUD_HDMIW_HDMIEDID_A -#undef AUD_HDMIW_HDMIEDID_B -#undef AUD_HDMIW_INFOFR_A -#undef AUD_HDMIW_INFOFR_B -#undef AUD_PORT_EN_HD_CFG -#undef AUD_OUT_DIG_CNVT_A -#undef AUD_OUT_DIG_CNVT_B -#undef AUD_OUT_STR_DESC_A -#undef AUD_OUT_STR_DESC_B -#undef AUD_OUT_CH_STR -#undef AUD_PINW_CONNLNG_LIST -#undef AUD_PINW_CONNLNG_SEL -#undef AUD_CNTL_ST_A -#undef AUD_CNTL_ST_B -#undef AUD_CNTL_ST2 -#undef AUD_HDMIW_STATUS - -#define PIPE_OFS 0x100 - -#define AUD_CONFIG_A 0x0 -#define AUD_CONFIG_B (AUD_CONFIG_A + PIPE_OFS) -#define AUD_MISC_CTRL_A 0x010 -#define AUD_MISC_CTRL_B (AUD_MISC_CTRL_A + PIPE_OFS) -#define AUD_VID_DID 0x020 -#define AUD_RID 0x024 -#define AUD_CTS_ENABLE_A 0x028 -#define AUD_CTS_ENABLE_B (AUD_CTS_ENABLE_A + PIPE_OFS) -#define AUD_PWRST 0x04C -#define AUD_HDMIW_HDMIEDID_A 0x050 -#define AUD_HDMIW_HDMIEDID_B (AUD_HDMIW_HDMIEDID_A + PIPE_OFS) -#define AUD_HDMIW_INFOFR_A 0x054 -#define AUD_HDMIW_INFOFR_B (AUD_HDMIW_INFOFR_A + PIPE_OFS) -#define AUD_PORT_EN_HD_CFG 0x07c -#define AUD_OUT_DIG_CNVT_A 0x080 -#define AUD_OUT_DIG_CNVT_B (AUD_OUT_DIG_CNVT_A + PIPE_OFS) -#define AUD_OUT_STR_DESC_A 0x084 -#define AUD_OUT_STR_DESC_B (AUD_OUT_STR_DESC_A + PIPE_OFS) -#define AUD_OUT_CH_STR 0x088 -#define AUD_PINW_CONNLNG_LIST 0x0a8 -#define AUD_PINW_CONNLNG_SEL 0x0aC -#define AUD_CNTL_ST_A 0x0b4 -#define AUD_CNTL_ST_B (AUD_CNTL_ST_A + PIPE_OFS) -#define AUD_CNTL_ST2 0x0c0 -#define AUD_HDMIW_STATUS 0x0d4 -#define AUD_FREQ_CNTRL 0x900 - -/* Audio config registers of Haswell+ */ -#define AUD_TCA_CONFIG AUD_CONFIG_A -#define AUD_TCB_CONFIG (AUD_TCA_CONFIG + PIPE_OFS) -#define AUD_TCC_CONFIG (AUD_TCA_CONFIG + PIPE_OFS * 2) -#define AUD_C1_MISC_CTRL AUD_MISC_CTRL_A -#define AUD_C2_MISC_CTRL (AUD_MISC_CTRL_A + PIPE_OFS) -#define AUD_C3_MISC_CTRL (AUD_MISC_CTRL_A + PIPE_OFS * 2) -#define AUD_TCA_M_CTS_ENABLE AUD_CTS_ENABLE_A -#define AUD_TCB_M_CTS_ENABLE (AUD_TCA_M_CTS_ENABLE + PIPE_OFS) -#define AUD_TCC_M_CTS_ENABLE (AUD_TCA_M_CTS_ENABLE + PIPE_OFS * 2) -#define AUD_TCA_EDID_DATA AUD_HDMIW_HDMIEDID_A -#define AUD_TCB_EDID_DATA (AUD_TCA_EDID_DATA + PIPE_OFS) -#define AUD_TCC_EDID_DATA (AUD_TCA_EDID_DATA + PIPE_OFS * 2) -#define AUD_TCA_INFOFR AUD_HDMIW_INFOFR_A -#define AUD_TCB_INFOFR (AUD_TCA_INFOFR + PIPE_OFS) -#define AUD_TCC_INFOFR (AUD_TCA_INFOFR + PIPE_OFS * 2) -#define AUD_PIPE_CONV_CFG AUD_PORT_EN_HD_CFG -#define AUD_C1_DIG_CNVT AUD_OUT_DIG_CNVT_A -#define AUD_C2_DIG_CNVT (AUD_C1_DIG_CNVT + PIPE_OFS) -#define AUD_C3_DIG_CNVT (AUD_C1_DIG_CNVT + PIPE_OFS * 2) -#define AUD_C1_STR_DESC AUD_OUT_STR_DESC_A -#define AUD_C2_STR_DESC (AUD_C1_STR_DESC + PIPE_OFS) -#define AUD_C3_STR_DESC (AUD_C1_STR_DESC + PIPE_OFS * 2) -#define AUD_OUT_CHAN_MAP AUD_OUT_CH_STR -#define AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH AUD_PINW_CONNLNG_LIST -#define AUD_TCB_PIN_PIPE_CONN_ENTRY_LNGTH (AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + PIPE_OFS) -#define AUD_TCC_PIN_PIPE_CONN_ENTRY_LNGTH (AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + PIPE_OFS * 2) -#define AUD_PIPE_CONN_SEL_CTRL AUD_PINW_CONNLNG_SEL -#define AUD_TCA_DIP_ELD_CTRL_ST AUD_CNTL_ST_A -#define AUD_TCB_DIP_ELD_CTRL_ST (AUD_TCA_DIP_ELD_CTRL_ST + PIPE_OFS) -#define AUD_TCC_DIP_ELD_CTRL_ST (AUD_TCA_DIP_ELD_CTRL_ST + PIPE_OFS * 2) -#define AUD_PIN_ELD_CP_VLD AUD_CNTL_ST2 -#define AUD_HDMI_FIFO_STATUS AUD_HDMIW_STATUS -#define AUD_ICOI 0xf00 -#define AUD_IRII 0xf04 -#define AUD_ICS 0xf08 -#define AUD_CHICKENBIT_REG 0xf10 -#define AUD_DP_DIP_STATUS 0xf20 -#define AUD_TCA_M_CTS 0xf44 -#define AUD_TCB_M_CTS 0xf54 -#define AUD_TCC_M_CTS 0xf64 -#define AUD_HDA_DMA_REG 0xe00 -#define AUD_HDA_LPIB0_REG 0xe04 -#define AUD_HDA_LPIB1_REG 0xe08 -#define AUD_HDA_LPIB2_REG 0xe0c -#define AUD_HDA_EXTRA_REG 0xe10 -#define AUD_FPGA_CRC_CTL_A 0xf14 -#define AUD_FPGA_CRC_CTL_B 0xf24 -#define AUD_FPGA_CRC_CTL_C 0xf34 -#define AUD_FPGA_CRC_RESULT_A 0xf18 -#define AUD_FPGA_CRC_RESULT_B 0xf28 -#define AUD_FPGA_CRC_RESULT_C 0xf38 -#define AUD_DFT_MVAL_REG 0xe20 -#define AUD_DFT_NVAL_REG 0xe24 -#define AUD_DFT_LOAD_REG 0xe28 - -/* Common functions to dump audio registers */ -#define MAX_PREFIX_SIZE 128 - -static void dump_aud_config(int index) -{ - uint32_t dword; - char prefix[MAX_PREFIX_SIZE]; - - if (!IS_HASWELL_PLUS(devid)) { - dword = INREG(aud_reg_base + AUD_CONFIG_A + (index - PIPE_A) * 0x100); - sprintf(prefix, "AUD_CONFIG_%c ", 'A' + index - PIPE_A); - } else { - dword = INREG(aud_reg_base + AUD_TCA_CONFIG + (index - TRANSCODER_A) * 0x100); - sprintf(prefix, "AUD_TC%c_CONFIG", 'A' + index - TRANSCODER_A); - } - - printf("%s Disable_NCTS\t\t\t\t%lu\n", prefix, BIT(dword, 3)); - printf("%s Lower_N_value\t\t\t\t0x%03lx\n", prefix, BITS(dword, 15, 4)); - printf("%s Pixel_Clock_HDMI\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 19, 16), - OPNAME(pixel_clock, BITS(dword, 19, 16))); - printf("%s Upper_N_value\t\t\t\t0x%02lx\n", prefix, BITS(dword, 27, 20)); - printf("%s N_programming_enable\t\t\t%lu\n", prefix, BIT(dword, 28)); - printf("%s N_index_value\t\t\t\t[0x%lx] %s\n", prefix, BIT(dword, 29), - OPNAME(n_index_value, BIT(dword, 29))); -} - -static void dump_aud_misc_control(int index) -{ - uint32_t dword; - char prefix[MAX_PREFIX_SIZE]; - - if (!IS_HASWELL_PLUS(devid)) { - dword = INREG(aud_reg_base + AUD_MISC_CTRL_A + (index - PIPE_A) * 0x100); - sprintf(prefix, "AUD_MISC_CTRL_%c ", 'A' + index - PIPE_A); - } else { - dword = INREG(aud_reg_base + AUD_C1_MISC_CTRL + (index - CONVERTER_1) * 0x100); - sprintf(prefix, "AUD_C%c_MISC_CTRL", '1' + index - CONVERTER_1); - } - - printf("%s Pro_Allowed\t\t\t\t%lu\n", prefix, BIT(dword, 1)); - printf("%s Sample_Fabrication_EN_bit\t\t%lu\n", prefix, BIT(dword, 2)); - printf("%s Output_Delay\t\t\t\t%lu\n", prefix, BITS(dword, 7, 4)); - printf("%s Sample_present_Disable\t\t%lu\n", prefix, BIT(dword, 8)); -} - -static void dump_aud_vendor_device_id(void) -{ - uint32_t dword; - - dword = INREG(aud_reg_base + AUD_VID_DID); - printf("AUD_VID_DID device id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 0)); - printf("AUD_VID_DID vendor id\t\t\t\t\t0x%lx\n", BITS(dword, 31, 16)); -} - -static void dump_aud_revision_id(void) -{ - uint32_t dword; - - dword = INREG(aud_reg_base + AUD_RID); - printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", BITS(dword, 7, 0)); - printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", BITS(dword, 15, 8)); - printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 19, 16)); - printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", BITS(dword, 23, 20)); -} - -static void dump_aud_m_cts_enable(int index) -{ - uint32_t dword; - char prefix[MAX_PREFIX_SIZE]; - - if (!IS_HASWELL_PLUS(devid)) { - dword = INREG(aud_reg_base + AUD_CTS_ENABLE_A + (index - PIPE_A) * 0x100); - sprintf(prefix, "AUD_CTS_ENABLE_%c ", 'A' + index - PIPE_A); - } else { - dword = INREG(aud_reg_base + AUD_TCA_M_CTS_ENABLE + (index - TRANSCODER_A) * 0x100); - sprintf(prefix, "AUD_TC%c_M_CTS_ENABLE", 'A' + index - TRANSCODER_A); - } - - printf("%s CTS_programming\t\t\t%#lx\n", prefix, BITS(dword, 19, 0)); - printf("%s Enable_CTS_or_M_programming\t%lu\n", prefix, BIT(dword, 20)); - printf("%s CTS_M value Index\t\t\t[0x%lx] %s\n",prefix, BIT(dword, 21), - OPNAME(cts_m_value_index, BIT(dword, 21))); -} - -static void dump_aud_power_state(void) -{ - uint32_t dword; - int num_pipes; - - dword = INREG(aud_reg_base + AUD_PWRST); - printf("AUD_PWRST PinB_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 1, 0)]); - printf("AUD_PWRST PinB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 3, 2)]); - printf("AUD_PWRST PinC_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 5, 4)]); - printf("AUD_PWRST PinC_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 7, 6)]); - printf("AUD_PWRST PinD_Widget_Power_State_Set \t%s\n", power_state[BITS(dword, 9, 8)]); - printf("AUD_PWRST PinD_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 11, 10)]); - - if (!IS_HASWELL_PLUS(devid)) { - printf("AUD_PWRST ConvertorA_Widget_Power_State_Requsted \t%s\n", power_state[BITS(dword, 13, 12)]); - printf("AUD_PWRST ConvertorA_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]); - printf("AUD_PWRST ConvertorB_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 17, 16)]); - printf("AUD_PWRST ConvertorB_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 19, 18)]); - } else { - printf("AUD_PWRST Convertor1_Widget_Power_State_Requsted \t%s\n", power_state[BITS(dword, 13, 12)]); - printf("AUD_PWRST Convertor1_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 15, 14)]); - printf("AUD_PWRST Convertor2_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 17, 16)]); - printf("AUD_PWRST Convertor2_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 19, 18)]); - } - - num_pipes = get_num_pipes(); - if (num_pipes == 2) { - printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 21, 20)]); - printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 23, 22)]); - } else { /* 3 pipes */ - if (!IS_HASWELL_PLUS(devid)) { - printf("AUD_PWRST ConvertorC_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 21, 20)]); - printf("AUD_PWRST ConvertorC_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 23, 22)]); - } else { - printf("AUD_PWRST Convertor3_Widget_Power_State_Requested \t%s\n", power_state[BITS(dword, 21, 20)]); - printf("AUD_PWRST Convertor3_Widget_Power_State_Current \t%s\n", power_state[BITS(dword, 23, 22)]); - } - printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[BITS(dword, 25, 24)]); - printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[BITS(dword, 27, 26)]); - } -} - -static void dump_aud_edid_data(int index) -{ - uint32_t dword; - int i; - int offset; - int aud_ctrl_st, edid_data; - - if (IS_HASWELL_PLUS(devid)) { - offset = (index - TRANSCODER_A) * 0x100; - aud_ctrl_st = aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset; - edid_data = aud_reg_base + AUD_TCA_EDID_DATA + offset; - printf("AUD_TC%c_EDID_DATA ELD:\n\t", 'A' + index - TRANSCODER_A); - } else { - offset = (index - PIPE_A) * 0x100; - aud_ctrl_st = aud_reg_base + AUD_CNTL_ST_A + offset; - edid_data = aud_reg_base + AUD_HDMIW_HDMIEDID_A + offset; - printf("AUD_HDMIW_HDMIEDID_%c HDMI ELD:\n\t", 'A' + index - PIPE_A); - } - - dword = INREG(aud_ctrl_st); - dword &= ~BITMASK(9, 5); - OUTREG(aud_ctrl_st, dword); - for (i = 0; i < BITS(dword, 14, 10) / 4; i++) - printf("%08x ", htonl(INREG(edid_data))); - printf("\n"); -} - -static void dump_aud_infoframe(int index) -{ - uint32_t dword; - int i; - int offset; - int aud_ctrl_st, info_frm; - - if (IS_HASWELL_PLUS(devid)) { - offset = (index - TRANSCODER_A) * 0x100; - aud_ctrl_st = aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset; - info_frm = aud_reg_base + AUD_TCA_INFOFR + offset; - printf("AUD_TC%c_INFOFR audio Infoframe:\n\t", 'A' + index - TRANSCODER_A); - } else { - offset = (index - PIPE_A) * 0x100; - aud_ctrl_st = aud_reg_base + AUD_CNTL_ST_A + offset; - info_frm = aud_reg_base + AUD_HDMIW_INFOFR_A + offset; - printf("AUD_HDMIW_INFOFR_%c HDMI audio Infoframe:\n\t", 'A' + index - PIPE_A); - } - - dword = INREG(aud_ctrl_st); - dword &= ~BITMASK(20, 18); - dword &= ~BITMASK(3, 0); - OUTREG(aud_ctrl_st, dword); - for (i = 0; i < 8; i++) - printf("%08x ", htonl(INREG(info_frm))); - printf("\n"); -} - -static void dump_aud_port_en_hd_cfg(void) -{ - uint32_t dword; - int num_pipes = get_num_pipes(); - - dword = INREG(aud_reg_base + AUD_PORT_EN_HD_CFG); - if (num_pipes == 2) { - printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0)); - printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1)); - printf("AUD_PORT_EN_HD_CFG Convertor_A_Stream_ID\t\t%lu\n", BITS(dword, 7, 4)); - printf("AUD_PORT_EN_HD_CFG Convertor_B_Stream_ID\t\t%lu\n", BITS(dword, 11, 8)); - - printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 12)); - printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 13)); - printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 14)); - printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 16)); - printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 17)); - printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 18)); - } else { /* three pipes */ - printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", BIT(dword, 0)); - printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", BIT(dword, 1)); - printf("AUD_PORT_EN_HD_CFG Convertor_C_Digen\t\t\t%lu\n", BIT(dword, 2)); - printf("AUD_PORT_EN_HD_CFG Convertor_A_Stream_ID\t\t%lu\n", BITS(dword, 7, 4)); - printf("AUD_PORT_EN_HD_CFG Convertor_B_Stream_ID\t\t%lu\n", BITS(dword, 11, 8)); - printf("AUD_PORT_EN_HD_CFG Convertor_C_Stream_ID\t\t%lu\n", BITS(dword, 15, 12)); - - printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 16)); - printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 17)); - printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 18)); - printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 20)); - printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 21)); - printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22)); - } -} - -static void dump_aud_pipe_conv_cfg(void) -{ - uint32_t dword; - - dword = INREG(aud_reg_base + AUD_PIPE_CONV_CFG); - printf("AUD_PIPE_CONV_CFG Convertor_1_Digen\t\t\t%lu\n", BIT(dword, 0)); - printf("AUD_PIPE_CONV_CFG Convertor_2_Digen\t\t\t%lu\n", BIT(dword, 1)); - printf("AUD_PIPE_CONV_CFG Convertor_3_Digen\t\t\t%lu\n", BIT(dword, 2)); - printf("AUD_PIPE_CONV_CFG Convertor_1_Stream_ID\t\t%lu\n", BITS(dword, 7, 4)); - printf("AUD_PIPE_CONV_CFG Convertor_2_Stream_ID\t\t%lu\n", BITS(dword, 11, 8)); - printf("AUD_PIPE_CONV_CFG Convertor_3_Stream_ID\t\t%lu\n", BITS(dword, 15, 12)); - - printf("AUD_PIPE_CONV_CFG Port_B_Out_Enable\t\t\t%lu\n", BIT(dword, 16)); - printf("AUD_PIPE_CONV_CFG Port_C_Out_Enable\t\t\t%lu\n", BIT(dword, 17)); - printf("AUD_PIPE_CONV_CFG Port_D_Out_Enable\t\t\t%lu\n", BIT(dword, 18)); - printf("AUD_PIPE_CONV_CFG Port_B_Amp_Mute_Status\t\t%lu\n", BIT(dword, 20)); - printf("AUD_PIPE_CONV_CFG Port_C_Amp_Mute_Status\t\t%lu\n", BIT(dword, 21)); - printf("AUD_PIPE_CONV_CFG Port_D_Amp_Mute_Status\t\t%lu\n", BIT(dword, 22)); -} - -static void dump_aud_dig_cnvt(int index) -{ - uint32_t dword; - char prefix[MAX_PREFIX_SIZE]; - - if (!IS_HASWELL_PLUS(devid)) { - dword = INREG(aud_reg_base + AUD_OUT_DIG_CNVT_A + (index - PIPE_A) * 0x100); - sprintf(prefix, "AUD_OUT_DIG_CNVT_%c", 'A' + index - PIPE_A); - } else { - dword = INREG(aud_reg_base + AUD_C1_DIG_CNVT + (index - CONVERTER_1) * 0x100); - sprintf(prefix, "AUD_C%c_DIG_CNVT ", '1' + index - CONVERTER_1); - } - - printf("%s V\t\t\t\t\t%lu\n", prefix, BIT(dword, 1)); - printf("%s VCFG\t\t\t\t%lu\n", prefix, BIT(dword, 2)); - printf("%s PRE\t\t\t\t\t%lu\n", prefix, BIT(dword, 3)); - printf("%s Copy\t\t\t\t%lu\n", prefix, BIT(dword, 4)); - printf("%s NonAudio\t\t\t\t%lu\n", prefix, BIT(dword, 5)); - printf("%s PRO\t\t\t\t\t%lu\n", prefix, BIT(dword, 6)); - printf("%s Level\t\t\t\t%lu\n", prefix, BIT(dword, 7)); - printf("%s Category_Code\t\t\t%lu\n", prefix, BITS(dword, 14, 8)); - printf("%s Lowest_Channel_Number\t\t%lu\n", prefix, BITS(dword, 19, 16)); - printf("%s Stream_ID\t\t\t\t%lu\n", prefix, BITS(dword, 23, 20)); -} - -static void dump_aud_str_desc(int index) -{ - uint32_t dword; - char prefix[MAX_PREFIX_SIZE]; - uint32_t rate; - - if (!IS_HASWELL_PLUS(devid)) { - dword = INREG(aud_reg_base + AUD_OUT_STR_DESC_A + (index - PIPE_A) * 0x100); - sprintf(prefix, "AUD_OUT_STR_DESC_%c", 'A' + index - PIPE_A); - } else { - dword = INREG(aud_reg_base + AUD_C1_STR_DESC + (index - CONVERTER_1) * 0x100); - sprintf(prefix, "AUD_C%c_STR_DESC ", '1' + index - CONVERTER_1); - } - - printf("%s Number_of_Channels_in_a_Stream\t%lu\n", prefix, BITS(dword, 3, 0) + 1); - printf("%s Bits_per_Sample\t\t\t[%#lx] %s\n", prefix, BITS(dword, 6, 4), - OPNAME(bits_per_sample, BITS(dword, 6, 4))); - - printf("%s Sample_Base_Rate_Divisor\t\t[%#lx] %s\n", prefix, BITS(dword, 10, 8), - OPNAME(sample_base_rate_divisor, BITS(dword, 10, 8))); - printf("%s Sample_Base_Rate_Mult\t\t[%#lx] %s\n", prefix, BITS(dword, 13, 11), - OPNAME(sample_base_rate_mult, BITS(dword, 13, 11))); - printf("%s Sample_Base_Rate\t\t\t[%#lx] %s\t", prefix, BIT(dword, 14), - OPNAME(sample_base_rate, BIT(dword, 14))); - rate = (BIT(dword, 14) ? 44100 : 48000) * (BITS(dword, 13, 11) + 1) - /(BITS(dword, 10, 8) + 1); - printf("=> Sample Rate %d Hz\n", rate); - - printf("%s Convertor_Channel_Count\t\t%lu\n", prefix, BITS(dword, 20, 16) + 1); - - if (!IS_HASWELL_PLUS(devid)) - printf("%s HBR_enable\t\t\t\t%lu\n", prefix, BITS(dword, 28, 27)); -} - -#define dump_aud_out_ch_str dump_aud_out_chan_map -static void dump_aud_out_chan_map(void) -{ - uint32_t dword; - int i; - - printf("AUD_OUT_CHAN_MAP Converter_Channel_MAP PORTB PORTC PORTD\n"); - for (i = 0; i < 8; i++) { - OUTREG(aud_reg_base + AUD_OUT_CHAN_MAP, i | (i << 8) | (i << 16)); - dword = INREG(aud_reg_base + AUD_OUT_CHAN_MAP); - printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n", - 1 + BITS(dword, 3, 0), - 1 + BITS(dword, 7, 4), - 1 + BITS(dword, 15, 12), - 1 + BITS(dword, 23, 20)); - } -} - -static void dump_aud_connect_list(void) -{ - uint32_t dword; - char prefix[MAX_PREFIX_SIZE]; - - dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_LIST); - sprintf(prefix, "AUD_PINW_CONNLNG_LIST"); - - printf("%s Connect_List_Length\t\t%lu\n", prefix, BITS(dword, 6, 0)); - printf("%s Form \t\t\t\t[%#lx] %s\n", prefix, BIT(dword, 7), - OPNAME(connect_list_form, BIT(dword, 7))); - printf("%s Connect_List_Entry\t\t%lu, %lu\n", prefix, BITS(dword, 15, 8), BITS(dword, 23, 16)); -} - -static void dump_aud_connect_select(void) -{ - uint32_t dword; - char prefix[MAX_PREFIX_SIZE]; - - if (IS_HASWELL_PLUS(devid)) { - dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL); - sprintf(prefix, "AUD_PIPE_CONN_SEL_CTRL"); - - } else { - dword = INREG(aud_reg_base + AUD_PINW_CONNLNG_SEL); - sprintf(prefix, "AUD_PINW_CONNLNG_SEL "); - } - - printf("%s Connection_select_Port_B\t%#lx\n", prefix, BITS(dword, 7, 0)); - printf("%s Connection_select_Port_C\t%#lx\n", prefix, BITS(dword, 15, 8)); - printf("%s Connection_select_Port_D\t%#lx\n", prefix, BITS(dword, 23, 16)); -} - -static void dump_aud_ctrl_state(int index) -{ - uint32_t dword; - int offset; - - if (IS_HASWELL_PLUS(devid)) { - offset = (index - TRANSCODER_A) * 0x100; - dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset); - printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + index - TRANSCODER_A); - } else { - offset = (index - PIPE_A) * 0x100; - dword = INREG(aud_reg_base + AUD_CNTL_ST_A + offset); - printf("Audio control state - Pipe %c\n", 'A' + index - PIPE_A); - } - - printf("\tELD_ACK\t\t\t\t\t\t%lu\n", BIT(dword, 4)); - printf("\tELD_buffer_size\t\t\t\t\t%lu\n", BITS(dword, 14, 10)); - printf("\tDIP_transmission_frequency\t\t\t[0x%lx] %s\n", BITS(dword, 17, 16), - dip_trans[BITS(dword, 17, 16)]); - printf("\tDIP Buffer Index \t\t\t\t[0x%lx] %s\n", BITS(dword, 20, 18), - dip_index[BITS(dword, 20, 18)]); - printf("\tAudio DIP type enable status\t\t\t[0x%04lx] %s, %s, %s\n", BITS(dword, 24, 21), - dip_type[BIT(dword, 21)], dip_gen1_state[BIT(dword, 22)], dip_gen2_state[BIT(dword, 23)]); - printf("\tAudio DIP port select\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 29), - dip_port[BITS(dword, 30, 29)]); - printf("\n"); -} - -static void dump_aud_ctrl_state2(void) -{ - uint32_t dword; - - dword = INREG(aud_reg_base + AUD_CNTL_ST2); - printf("AUD_CNTL_ST2 ELD_validB\t\t\t\t%lu\n", BIT(dword, 0)); - printf("AUD_CNTL_ST2 CP_ReadyB\t\t\t\t\t%lu\n", BIT(dword, 1)); - printf("AUD_CNTL_ST2 ELD_validC\t\t\t\t%lu\n", BIT(dword, 4)); - printf("AUD_CNTL_ST2 CP_ReadyC\t\t\t\t\t%lu\n", BIT(dword, 5)); - printf("AUD_CNTL_ST2 ELD_validD\t\t\t\t%lu\n", BIT(dword, 8)); - printf("AUD_CNTL_ST2 CP_ReadyD\t\t\t\t\t%lu\n", BIT(dword, 9)); -} - -/* for hsw+ */ -static void dump_aud_eld_cp_vld(void) -{ - uint32_t dword; - - dword = INREG(aud_reg_base + AUD_PIN_ELD_CP_VLD); - printf("AUD_PIN_ELD_CP_VLD Transcoder_A ELD_valid\t\t%lu\n", BIT(dword, 0)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_A CP_Ready \t\t%lu\n", BIT(dword, 1)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_A Out_enable\t\t%lu\n", BIT(dword, 2)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_A Inactive\t\t%lu\n", BIT(dword, 3)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_B ELD_valid\t\t%lu\n", BIT(dword, 4)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_B CP_Ready\t\t%lu\n", BIT(dword, 5)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_B OUT_enable\t\t%lu\n", BIT(dword, 6)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_B Inactive\t\t%lu\n", BIT(dword, 7)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_C ELD_valid\t\t%lu\n", BIT(dword, 8)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_C CP_Ready\t\t%lu\n", BIT(dword, 9)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_C OUT_enable\t\t%lu\n", BIT(dword, 10)); - printf("AUD_PIN_ELD_CP_VLD Transcoder_C Inactive\t\t%lu\n", BIT(dword, 11)); -} - -static void dump_aud_hdmi_status(void) -{ - uint32_t dword; - - dword = INREG(aud_reg_base + AUD_HDMIW_STATUS); - printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24)); - printf("AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun\t\t%lu\n", BIT(dword, 25)); - printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 28)); - printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29)); - printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 30)); - printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 31)); -} - -/* - * Display registers of Ironlake and Valleyview - */ -#undef DP_CTL_B -#undef DP_CTL_C -#undef DP_CTL_D - -#define DP_CTL_B 0x4100 -#define DP_CTL_C 0x4200 -#define DP_CTL_D 0x4300 - -/* ILK HDMI port ctrl */ -#define HDMI_CTL_B 0x1140 -#define HDMI_CTL_C 0x1150 -#define HDMI_CTL_D 0x1160 -#define BSW_HDMI_CTL_B 0x1140 -#define BSW_HDMI_CTL_C 0x1160 -#define BSW_HDMI_CTL_D 0x116c - -/* VLV HDMI port ctrl */ -#define SDVO_HDMI_CTL_B 0x1140 -#define SDVO_HDMI_CTL_C 0x1160 - -static void dump_dp_port_ctrl(int port) -{ - uint32_t dword; - int port_ctrl; - char prefix[MAX_PREFIX_SIZE]; - - sprintf(prefix, "DP_%c", 'B' + port - PORT_B); - - port_ctrl = disp_reg_base + DP_CTL_B + (port - PORT_B) * 0x100; - dword = INREG(port_ctrl); - printf("%s DisplayPort_Enable\t\t\t\t\t%lu\n", prefix, BIT(dword, 31)); - printf("%s Transcoder_Select\t\t\t\t\t%s\n", prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A"); - printf("%s Port_Width_Selection\t\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 21, 19), - dp_port_width[BITS(dword, 21, 19)]); - printf("%s Port_Detected\t\t\t\t\t%lu\n", prefix, BIT(dword, 2)); - printf("%s HDCP_Port_Select\t\t\t\t\t%lu\n", prefix, BIT(dword, 5)); - printf("%s Audio_Output_Enable\t\t\t\t%lu\n", prefix, BIT(dword, 6)); -} - -static void dump_hdmi_port_ctrl(int port) -{ - uint32_t dword; - int port_ctrl; - char prefix[MAX_PREFIX_SIZE]; - - if (IS_VALLEYVIEW(devid)) { - sprintf(prefix, "SDVO/HDMI%c", 'B' + port - PORT_B); - port_ctrl = disp_reg_base + SDVO_HDMI_CTL_B + (port - PORT_B) * 0x20; - } else { - sprintf(prefix, "HDMI%c ", 'B' + port - PORT_B); - port_ctrl = disp_reg_base + HDMI_CTL_B + (port - PORT_B) * 0x10; - } - - dword = INREG(port_ctrl); - printf("%s HDMI_Enable\t\t\t\t\t%u\n", prefix, !!(dword & SDVO_ENABLE)); - printf("%s Transcoder_Select\t\t\t\t%s\n", prefix, BIT(dword, 30) ? "Transcoder B" : "Transcoder A"); - printf("%s HDCP_Port_Select\t\t\t\t%lu\n", prefix, BIT(dword, 5)); - if (port == PORT_B) /* TODO: check spec, not found in Ibx b-spec, and only for port B? */ - printf("%s SDVO Hot Plug Interrupt Detect Enable\t%lu\n", prefix, BIT(dword, 23)); - printf("%s Digital_Port_Detected\t\t\t%lu\n", prefix, BIT(dword, 2)); - printf("%s Encoding\t\t\t\t\t[0x%lx] %s\n", prefix, BITS(dword, 11, 10), - sdvo_hdmi_encoding[BITS(dword, 11, 10)]); - printf("%s Null_packets_enabled_during_Vsync\t\t%u\n", prefix, !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC)); - printf("%s Audio_Output_Enable\t\t\t\t%u\n", prefix, !!(dword & SDVO_AUDIO_ENABLE)); -} - -static void dump_ironlake(void) -{ - uint32_t dword; - - if (!IS_VALLEYVIEW(devid)) - set_reg_base(0xe0000, 0x2000); /* ironlake */ - else - set_reg_base(0x60000 + VLV_DISPLAY_BASE, 0x2000); - - if (!IS_VALLEYVIEW(devid)) { - dump_disp_reg(HDMI_CTL_B, "sDVO/HDMI Port B Control"); - dump_disp_reg(HDMI_CTL_C, "HDMI Port C Control"); - dump_disp_reg(HDMI_CTL_D, "HDMI Port D Control"); - } else { - dump_disp_reg(SDVO_HDMI_CTL_B, "sDVO/HDMI Port B Control"); - dump_disp_reg(SDVO_HDMI_CTL_C, "sDVO/HDMI Port C Control"); - } - - dump_disp_reg(DP_CTL_B, "DisplayPort B Control Register"); - dump_disp_reg(DP_CTL_C, "DisplayPort C Control Register"); - if (!IS_VALLEYVIEW(devid)) - dump_disp_reg(DP_CTL_D, "DisplayPort D Control Register"); - - dump_aud_reg(AUD_CONFIG_A, "Audio Configuration - Transcoder A"); - dump_aud_reg(AUD_CONFIG_B, "Audio Configuration - Transcoder B"); - dump_aud_reg(AUD_CTS_ENABLE_A, "Audio CTS Programming Enable - Transcoder A"); - dump_aud_reg(AUD_CTS_ENABLE_B, "Audio CTS Programming Enable - Transcoder B"); - dump_aud_reg(AUD_MISC_CTRL_A, "Audio MISC Control for Transcoder A"); - dump_aud_reg(AUD_MISC_CTRL_B, "Audio MISC Control for Transcoder B"); - dump_aud_reg(AUD_VID_DID, "Audio Vendor ID / Device ID"); - dump_aud_reg(AUD_RID, "Audio Revision ID"); - dump_aud_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)"); - dump_aud_reg(AUD_PORT_EN_HD_CFG, "Audio Port Enable HDAudio Config"); - dump_aud_reg(AUD_OUT_DIG_CNVT_A, "Audio Digital Converter - Conv A"); - dump_aud_reg(AUD_OUT_DIG_CNVT_B, "Audio Digital Converter - Conv B"); - dump_aud_reg(AUD_OUT_CH_STR, "Audio Channel ID and Stream ID"); - dump_aud_reg(AUD_OUT_STR_DESC_A, "Audio Stream Descriptor Format - Conv A"); - dump_aud_reg(AUD_OUT_STR_DESC_B, "Audio Stream Descriptor Format - Conv B"); - dump_aud_reg(AUD_PINW_CONNLNG_LIST, "Audio Connection List"); - dump_aud_reg(AUD_PINW_CONNLNG_SEL, "Audio Connection Select"); - dump_aud_reg(AUD_CNTL_ST_A, "Audio Control State Register - Transcoder A"); - dump_aud_reg(AUD_CNTL_ST_B, "Audio Control State Register - Transcoder B"); - dump_aud_reg(AUD_CNTL_ST2, "Audio Control State 2"); - dump_aud_reg(AUD_HDMIW_STATUS, "Audio HDMI Status"); - dump_aud_reg(AUD_HDMIW_HDMIEDID_A, "HDMI Data EDID Block - Transcoder A"); - dump_aud_reg(AUD_HDMIW_HDMIEDID_B, "HDMI Data EDID Block - Transcoder B"); - dump_aud_reg(AUD_HDMIW_INFOFR_A, "Audio Widget Data Island Packet - Transcoder A"); - dump_aud_reg(AUD_HDMIW_INFOFR_B, "Audio Widget Data Island Packet - Transcoder B"); - - printf("\nDetails:\n\n"); - - dump_aud_vendor_device_id(); - dump_aud_revision_id(); - - dump_hdmi_port_ctrl(PORT_B); - dump_hdmi_port_ctrl(PORT_C); - if (!IS_VALLEYVIEW(devid)) - dump_hdmi_port_ctrl(PORT_D); - - dump_dp_port_ctrl(PORT_B); - dump_dp_port_ctrl(PORT_C); - if (!IS_VALLEYVIEW(devid)) - dump_dp_port_ctrl(PORT_D); - - dump_aud_config(PIPE_A); - dump_aud_config(PIPE_B); - - dump_aud_m_cts_enable(PIPE_A); - dump_aud_m_cts_enable(PIPE_B); - - dump_aud_misc_control(PIPE_A); - dump_aud_misc_control(PIPE_B); - - dump_aud_power_state(); - dump_aud_port_en_hd_cfg(); - - dump_aud_dig_cnvt(PIPE_A); - dump_aud_dig_cnvt(PIPE_B); - - dump_aud_out_ch_str(); - - dump_aud_str_desc(PIPE_A); - dump_aud_str_desc(PIPE_B); - - dump_aud_connect_list(); - dump_aud_connect_select(); - - dump_aud_ctrl_state(PIPE_A); - dump_aud_ctrl_state(PIPE_B); - dump_aud_ctrl_state2(); - - dump_aud_hdmi_status(); - - dump_aud_edid_data(PIPE_A); - dump_aud_edid_data(PIPE_B); - - dump_aud_infoframe(PIPE_A); - dump_aud_infoframe(PIPE_B); -} - -#undef VIDEO_DIP_CTL_A -#undef VIDEO_DIP_CTL_B -#undef VIDEO_DIP_CTL_C -#undef VIDEO_DIP_CTL_D -#undef VIDEO_DIP_DATA - -/* - * Haswell+ display registers - */ - -/* DisplayPort Transport Control */ -#define DP_TP_CTL_A 0x64040 -#define DP_TP_CTL_B 0x64140 -#define DP_TP_CTL_C 0x64240 -#define DP_TP_CTL_D 0x64340 -#define DP_TP_CTL_E 0x64440 - -/* DisplayPort Transport Status */ -#define DP_TP_ST_A 0x64044 -#define DP_TP_ST_B 0x64144 -#define DP_TP_ST_C 0x64244 -#define DP_TP_ST_D 0x64344 -#define DP_TP_ST_E 0x64444 - -/* DDI Buffer Control */ -#define DDI_BUF_CTL_A 0x64000 -#define DDI_BUF_CTL_B 0x64100 -#define DDI_BUF_CTL_C 0x64200 -#define DDI_BUF_CTL_D 0x64300 -#define DDI_BUF_CTL_E 0x64400 - -/* DDI Buffer Translation */ -#define DDI_BUF_TRANS_A 0x64e00 -#define DDI_BUF_TRANS_B 0x64e60 -#define DDI_BUF_TRANS_C 0x64ec0 -#define DDI_BUF_TRANS_D 0x64f20 -#define DDI_BUF_TRANS_E 0x64f80 - -/* DDI Aux Channel */ -#define DDI_AUX_CHANNEL_CTRL 0x64010 -#define DDI_AUX_DATA 0x64014 -#define DDI_AUX_TST 0x64028 - -/* DDI CRC Control */ -#define DDI_CRC_CTL_A 0x64050 -#define DDI_CRC_CTL_B 0x64150 -#define DDI_CRC_CTL_C 0x64250 -#define DDI_CRC_CTL_D 0x64350 -#define DDI_CRC_CTL_E 0x64450 - -/* Pipe DDI Function Control */ -#define PIPE_DDI_FUNC_CTL_A 0x60400 -#define PIPE_DDI_FUNC_CTL_B 0x61400 -#define PIPE_DDI_FUNC_CTL_C 0x62400 -#define PIPE_DDI_FUNC_CTL_EDP 0x6F400 - -/* Pipe Configuration */ -#define PIPE_CONF_A 0x70008 -#define PIPE_CONF_B 0x71008 -#define PIPE_CONF_C 0x72008 -#define PIPE_CONF_EDP 0x7F008 - -/* Video DIP Control */ -#define VIDEO_DIP_CTL_A 0x60200 -#define VIDEO_DIP_CTL_B 0x61200 -#define VIDEO_DIP_CTL_C 0x62200 -#define VIDEO_DIP_CTL_D 0x63200 - -#define VIDEO_DIP_DATA 0x60220 -#define VIDEO_DIP_ECC 0x60240 - -static void dump_ddi_buf_ctl(int port) -{ - uint32_t dword; - - dword = INREG(DDI_BUF_CTL_A + (port - PORT_A) * 0x100); - printf("DDI %c Buffer control\n", 'A' + port - PORT_A); - - printf("\tDP port width\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 3, 1), - OPNAME(dp_port_width, BITS(dword, 3, 1))); - printf("\tDDI Buffer Enable\t\t\t\t%ld\n", BIT(dword, 31)); -} - -static void dump_ddi_func_ctl(int pipe) -{ - uint32_t dword; - - dword = INREG(PIPE_DDI_FUNC_CTL_A + (pipe - PIPE_A) * 0x1000); - printf("Pipe %c DDI Function Control\n", 'A' + pipe - PIPE_A); - - printf("\tBITS per color\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 22, 20), - OPNAME(bits_per_color, BITS(dword, 22, 20))); - printf("\tPIPE DDI Mode\t\t\t\t\t[0x%lx] %s\n", BITS(dword, 26, 24), - OPNAME(ddi_mode, BITS(dword, 26, 24))); - printf("\tPIPE DDI selection\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 28), - OPNAME(trans_to_port_sel, BITS(dword, 30, 28))); - printf("\tPIPE DDI Function Enable\t\t\t[0x%lx]\n", BIT(dword, 31)); -} - -static void dump_aud_connect_list_entry_length(int transcoder) -{ - uint32_t dword; - char prefix[MAX_PREFIX_SIZE]; - - dword = INREG(aud_reg_base + AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH + (transcoder - TRANSCODER_A) * 0x100); - sprintf(prefix, "AUD_TC%c_PIN_PIPE_CONN_ENTRY_LNGTH", 'A' + transcoder - TRANSCODER_A); - - printf("%s Connect_List_Length\t%lu\n", prefix, BITS(dword, 6, 0)); - printf("%s Form \t\t[%#lx] %s\n", prefix, BIT(dword, 7), - OPNAME(connect_list_form, BIT(dword, 7))); - printf("%s Connect_List_Entry\t%lu\n", prefix, BITS(dword, 15, 8)); -} - -static void dump_aud_connect_select_ctrl(void) -{ - uint32_t dword; - - dword = INREG(aud_reg_base + AUD_PIPE_CONN_SEL_CTRL); - printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_B\t%#lx\n", BITS(dword, 7, 0)); - printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_C\t%#lx\n", BITS(dword, 15, 8)); - printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_D\t%#lx\n", BITS(dword, 23, 16)); -} - -static void dump_aud_dip_eld_ctrl_st(int transcoder) -{ - uint32_t dword; - int offset = (transcoder - TRANSCODER_A) * 0x100; - - dword = INREG(aud_reg_base + AUD_TCA_DIP_ELD_CTRL_ST + offset); - printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + transcoder - TRANSCODER_A); - - printf("\tELD_ACK\t\t\t\t\t\t%lu\n", BIT(dword, 4)); - printf("\tELD_buffer_size\t\t\t\t\t%lu\n", BITS(dword, 14, 10)); - printf("\tDIP_transmission_frequency\t\t\t[0x%lx] %s\n", BITS(dword, 17, 16), - dip_trans[BITS(dword, 17, 16)]); - printf("\tDIP Buffer Index \t\t\t\t[0x%lx] %s\n", BITS(dword, 20, 18), - dip_index[BITS(dword, 20, 18)]); - printf("\tAudio DIP type enable status\t\t\t[0x%04lx] %s, %s, %s\n", BITS(dword, 24, 21), - dip_type[BIT(dword, 21)], dip_gen1_state[BIT(dword, 22)], dip_gen2_state[BIT(dword, 23)]); - printf("\tAudio DIP port select\t\t\t\t[0x%lx] %s\n", BITS(dword, 30, 29), - dip_port[BITS(dword, 30, 29)]); - printf("\n"); -} - -static void dump_aud_hdmi_fifo_status(void) -{ - uint32_t dword; - - dword = INREG(aud_reg_base + AUD_HDMI_FIFO_STATUS); - printf("AUD_HDMI_FIFO_STATUS Function_Reset\t\t\t%lu\n", BIT(dword, 24)); - printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 26)); - printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 27)); - printf("AUD_HDMI_FIFO_STATUS Conv_2_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 28)); - printf("AUD_HDMI_FIFO_STATUS Conv_2_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 29)); - printf("AUD_HDMI_FIFO_STATUS Conv_3_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", BIT(dword, 30)); - printf("AUD_HDMI_FIFO_STATUS Conv_3_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", BIT(dword, 31)); -} - -static void parse_bdw_audio_chicken_bit_reg(uint32_t dword) -{ - printf("\t"); - printf("%s\n\t", OPNAME(vanilla_dp12_en, BIT(dword, 31))); - printf("%s\n\t", OPNAME(vanilla_3_widgets_en, BIT(dword, 30))); - printf("%s\n\t", OPNAME(block_audio, BIT(dword, 10))); - printf("%s\n\t", OPNAME(dis_eld_valid_pulse_trans, BIT(dword, 9))); - printf("%s\n\t", OPNAME(dis_pd_pulse_trans, BIT(dword, 8))); - printf("%s\n\t", OPNAME(dis_ts_delta_err, BIT(dword, 7))); - printf("%s\n\t", OPNAME(dis_ts_fix_dp_hbr, BIT(dword, 6))); - printf("%s\n\t", OPNAME(pattern_gen_8_ch_en, BIT(dword, 5))); - printf("%s\n\t", OPNAME(pattern_gen_2_ch_en, BIT(dword, 4))); - printf("%s\n\t", OPNAME(fabric_32_44_dis, BIT(dword, 3))); - printf("%s\n\t", OPNAME(epss_dis, BIT(dword, 2))); - printf("%s\n\t", OPNAME(ts_test_mode, BIT(dword, 1))); - printf("%s\n", OPNAME(en_mmio_program, BIT(dword, 0))); -} - -static void parse_skl_audio_freq_cntrl_reg(uint32_t dword) -{ - printf("\t"); - printf("%s\n\t", OPNAME(sdi_operate_mode, BIT(dword, 15))); - printf("%s\n\t", OPNAME(bclk_96mhz, BIT(dword, 4))); - printf("%s\n", OPNAME(bclk_48mhz, BIT(dword, 3))); -} - -/* Dump audio registers for Haswell and its successors (eg. Broadwell). - * Their register layout are same in the north display engine. - */ -static void dump_hsw_plus(void) -{ - uint32_t dword; - int i; - - set_aud_reg_base(0x65000); - - dump_reg(PORT_HOTPLUG_EN, "port hotplug enable"); - dump_reg(PORT_HOTPLUG_STAT, "port hotplug status"); - dump_reg(DISPLAY_HOTPLUG_CTL, "display hotplug control"); - - /* HSW DDI Buffer */ - dump_reg(DDI_BUF_CTL_A, "DDI Buffer Controler A"); - dump_reg(DDI_BUF_CTL_B, "DDI Buffer Controler B"); - dump_reg(DDI_BUF_CTL_C, "DDI Buffer Controler C"); - dump_reg(DDI_BUF_CTL_D, "DDI Buffer Controler D"); - dump_reg(DDI_BUF_CTL_E, "DDI Buffer Controler E"); - - /* HSW Pipe Function */ - dump_reg(PIPE_CONF_A, "PIPE Configuration A"); - dump_reg(PIPE_CONF_B, "PIPE Configuration B"); - dump_reg(PIPE_CONF_C, "PIPE Configuration C"); - dump_reg(PIPE_CONF_EDP, "PIPE Configuration EDP"); - - dump_reg(PIPE_DDI_FUNC_CTL_A, "PIPE DDI Function Control A"); - dump_reg(PIPE_DDI_FUNC_CTL_B, "PIPE DDI Function Control B"); - dump_reg(PIPE_DDI_FUNC_CTL_C, "PIPE DDI Function Control C"); - dump_reg(PIPE_DDI_FUNC_CTL_EDP, "PIPE DDI Function Control EDP"); - - /* HSW Display port */ - dump_reg(DP_TP_CTL_A, "DisplayPort Transport A Control"); - dump_reg(DP_TP_CTL_B, "DisplayPort Transport B Control"); - dump_reg(DP_TP_CTL_C, "DisplayPort Transport C Control"); - dump_reg(DP_TP_CTL_D, "DisplayPort Transport D Control"); - dump_reg(DP_TP_CTL_E, "DisplayPort Transport E Control"); - - dump_reg(DP_TP_ST_A, "DisplayPort Transport A Status"); - dump_reg(DP_TP_ST_B, "DisplayPort Transport B Status"); - dump_reg(DP_TP_ST_C, "DisplayPort Transport C Status"); - dump_reg(DP_TP_ST_D, "DisplayPort Transport D Status"); - dump_reg(DP_TP_ST_E, "DisplayPort Transport E Status"); - - /* HSW North Display Audio */ - dump_aud_reg(AUD_TCA_CONFIG, "Audio Configuration - Transcoder A"); - dump_aud_reg(AUD_TCB_CONFIG, "Audio Configuration - Transcoder B"); - dump_aud_reg(AUD_TCC_CONFIG, "Audio Configuration - Transcoder C"); - dump_aud_reg(AUD_C1_MISC_CTRL, "Audio Converter 1 MISC Control"); - dump_aud_reg(AUD_C2_MISC_CTRL, "Audio Converter 2 MISC Control"); - dump_aud_reg(AUD_C3_MISC_CTRL, "Audio Converter 3 MISC Control"); - dump_aud_reg(AUD_VID_DID, "Audio Vendor ID / Device ID"); - dump_aud_reg(AUD_RID, "Audio Revision ID"); - dump_aud_reg(AUD_TCA_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder A"); - dump_aud_reg(AUD_TCB_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder B"); - dump_aud_reg(AUD_TCC_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder C"); - dump_aud_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)"); - dump_aud_reg(AUD_TCA_EDID_DATA, "Audio EDID Data Block - Transcoder A"); - dump_aud_reg(AUD_TCB_EDID_DATA, "Audio EDID Data Block - Transcoder B"); - dump_aud_reg(AUD_TCC_EDID_DATA, "Audio EDID Data Block - Transcoder C"); - if (IS_SKYLAKE(devid)) - dump_aud_reg(AUD_FREQ_CNTRL, "Audio BCLK Frequency Control"); - dump_aud_reg(AUD_TCA_INFOFR, "Audio Widget Data Island Packet - Transcoder A"); - dump_aud_reg(AUD_TCB_INFOFR, "Audio Widget Data Island Packet - Transcoder B"); - dump_aud_reg(AUD_TCC_INFOFR, "Audio Widget Data Island Packet - Transcoder C"); - dump_aud_reg(AUD_PIPE_CONV_CFG, "Audio Pipe and Converter Configs"); - dump_aud_reg(AUD_C1_DIG_CNVT, "Audio Digital Converter - Converter 1"); - dump_aud_reg(AUD_C2_DIG_CNVT, "Audio Digital Converter - Converter 2"); - dump_aud_reg(AUD_C3_DIG_CNVT, "Audio Digital Converter - Converter 3"); - dump_aud_reg(AUD_C1_STR_DESC, "Audio Stream Descriptor Format - Converter 1"); - dump_aud_reg(AUD_C2_STR_DESC, "Audio Stream Descriptor Format - Converter 2"); - dump_aud_reg(AUD_C3_STR_DESC, "Audio Stream Descriptor Format - Converter 3"); - dump_aud_reg(AUD_OUT_CHAN_MAP, "Audio Output Channel Mapping"); - dump_aud_reg(AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder A"); - dump_aud_reg(AUD_TCB_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder B"); - dump_aud_reg(AUD_TCC_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder C"); - dump_aud_reg(AUD_PIPE_CONN_SEL_CTRL, "Audio Pipe Connection Select Control"); - dump_aud_reg(AUD_TCA_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder A"); - dump_aud_reg(AUD_TCB_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder B"); - dump_aud_reg(AUD_TCC_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder C"); - dump_aud_reg(AUD_PIN_ELD_CP_VLD, "Audio pin ELD valid and CP ready status"); - dump_aud_reg(AUD_HDMI_FIFO_STATUS, "Audio HDMI FIFO Status"); - - /* Audio debug registers */ - dump_aud_reg(AUD_ICOI, "Audio Immediate Command Output Interface"); - dump_aud_reg(AUD_IRII, "Audio Immediate Response Input Interface"); - dump_aud_reg(AUD_ICS, "Audio Immediate Command Status"); - dump_aud_reg(AUD_CHICKENBIT_REG, "Audio Chicken Bit Register"); - dump_aud_reg(AUD_DP_DIP_STATUS, "Audio DP and DIP FIFO Debug Status"); - dump_aud_reg(AUD_TCA_M_CTS, "Audio M CTS Read Back Transcoder A"); - dump_aud_reg(AUD_TCB_M_CTS, "Audio M CTS Read Back Transcoder B"); - dump_aud_reg(AUD_TCC_M_CTS, "Audio M CTS Read Back Transcoder C"); - if (IS_SKYLAKE(devid)) { - dump_aud_reg(AUD_HDA_DMA_REG, "Audio HD Audio DMA Control Register"); - dump_aud_reg(AUD_HDA_LPIB0_REG, "Audio HD Audio Stream0 Link Position in Buffer"); - dump_aud_reg(AUD_HDA_LPIB1_REG, "Audio HD Audio Stream1 Link Position in Buffer"); - dump_aud_reg(AUD_HDA_LPIB2_REG, "Audio HD Audio Stream2 Link Position in Buffer"); - dump_aud_reg(AUD_HDA_EXTRA_REG, "Audio HD Audio Extra Register"); - dump_aud_reg(AUD_FPGA_CRC_CTL_A, "Audio FPGA Pipe A CRC Control"); - dump_aud_reg(AUD_FPGA_CRC_CTL_B, "Audio FPGA Pipe B CRC Control"); - dump_aud_reg(AUD_FPGA_CRC_CTL_C, "Audio FPGA Pipe C CRC Control"); - dump_aud_reg(AUD_FPGA_CRC_RESULT_A, "Audio FPGA Pipe A CRC Result"); - dump_aud_reg(AUD_FPGA_CRC_RESULT_B, "Audio FPGA Pipe B CRC Result"); - dump_aud_reg(AUD_FPGA_CRC_RESULT_C, "Audio FPGA Pipe C CRC Result"); - dump_aud_reg(AUD_DFT_MVAL_REG, "Audio DFT M Value Register"); - dump_aud_reg(AUD_DFT_NVAL_REG, "Audio DFT N Value Register"); - dump_aud_reg(AUD_DFT_LOAD_REG, "Audio DFT LOAD Register"); - } - - printf("\nDetails:\n\n"); - - dump_ddi_buf_ctl(PORT_A); - dump_ddi_buf_ctl(PORT_B); - dump_ddi_buf_ctl(PORT_C); - dump_ddi_buf_ctl(PORT_D); - dump_ddi_buf_ctl(PORT_E); - - dump_ddi_func_ctl(PIPE_A); - dump_ddi_func_ctl(PIPE_B); - dump_ddi_func_ctl(PIPE_C); - - /* audio configuration - details */ - dump_aud_config(TRANSCODER_A); - dump_aud_config(TRANSCODER_B); - dump_aud_config(TRANSCODER_C); - - dump_aud_misc_control(CONVERTER_1); - dump_aud_misc_control(CONVERTER_2); - dump_aud_misc_control(CONVERTER_3); - - dump_aud_vendor_device_id(); - dump_aud_revision_id(); - - dump_aud_m_cts_enable(TRANSCODER_A); - dump_aud_m_cts_enable(TRANSCODER_B); - dump_aud_m_cts_enable(TRANSCODER_C); - - dump_aud_power_state(); - - dump_aud_edid_data(TRANSCODER_A); - dump_aud_edid_data(TRANSCODER_B); - dump_aud_edid_data(TRANSCODER_C); - - dump_aud_infoframe(TRANSCODER_A); - dump_aud_infoframe(TRANSCODER_B); - dump_aud_infoframe(TRANSCODER_C); - - dump_aud_pipe_conv_cfg(); - - dump_aud_dig_cnvt(CONVERTER_1); - dump_aud_dig_cnvt(CONVERTER_2); - dump_aud_dig_cnvt(CONVERTER_3); - - dump_aud_str_desc(CONVERTER_1); - dump_aud_str_desc(CONVERTER_2); - dump_aud_str_desc(CONVERTER_3); - - dump_aud_out_chan_map(); - - dump_aud_connect_list_entry_length(TRANSCODER_A); - dump_aud_connect_list_entry_length(TRANSCODER_B); - dump_aud_connect_list_entry_length(TRANSCODER_C); - dump_aud_connect_select_ctrl(); - - dump_aud_dip_eld_ctrl_st(TRANSCODER_A); - dump_aud_dip_eld_ctrl_st(TRANSCODER_B); - dump_aud_dip_eld_ctrl_st(TRANSCODER_C); - - dump_aud_eld_cp_vld(); - dump_aud_hdmi_fifo_status(); - - dword = read_aud_reg(AUD_ICS); - printf("IRV [%1lx] %s\t", BIT(dword, 1), - OPNAME(immed_result_valid, BIT(dword, 1))); - printf("ICB [%1lx] %s\n", BIT(dword, 1), - OPNAME(immed_cmd_busy, BIT(dword, 0))); - - dword = read_aud_reg(AUD_CHICKENBIT_REG); - printf("AUD_CHICKENBIT_REG Audio Chicken Bits: %08x\n", dword); - if (IS_BROADWELL(devid)) - parse_bdw_audio_chicken_bit_reg(dword); - - dword = read_aud_reg(AUD_DP_DIP_STATUS); - printf("AUD_DP_DIP_STATUS Audio DP & DIP FIFO Status: %08x\n\t", dword); - for (i = 31; i >= 0; i--) - if (BIT(dword, i)) - printf("%s\n\t", audio_dp_dip_status[i]); - printf("\n"); - - dword = read_aud_reg(AUD_FREQ_CNTRL); - printf("AUD_FREQ_CNTRL Audio BCLK Frequency Control: %08x\n", dword); - if (IS_SKYLAKE(devid)) - parse_skl_audio_freq_cntrl_reg(dword); -} - -/* offset of hotplug enable */ -#define PORT_HOTPLUG_EN_OFFSET 0x1110 -/* offset of hotplug status */ -#define PORT_HOTPLUG_STAT_OFFSET 0x1114 -/* offset of hotplug control*/ -#define DISPLAY_HOTPLUG_CTL_OFFSET 0x1164 -/* dump the braswell registers for audio */ -static void dump_braswell(void) -{ - uint32_t dword; - - /* set_aud_reg_base(0x62000 + VLV_DISPLAY_BASE); */ - set_reg_base(0x60000 + VLV_DISPLAY_BASE, 0x2000); - - - dump_disp_reg(PORT_HOTPLUG_EN_OFFSET, "port hotplug enable"); - dump_disp_reg(PORT_HOTPLUG_STAT_OFFSET, "port hotplug status"); - dump_disp_reg(DISPLAY_HOTPLUG_CTL_OFFSET, "display hotplug control"); - - dump_disp_reg(BSW_HDMI_CTL_B, "sDVO/HDMI Port B Control"); - dump_disp_reg(BSW_HDMI_CTL_C, "HDMI Port C Control"); // The address is wrong? - dump_disp_reg(BSW_HDMI_CTL_D, "HDMI Port D Control"); - - dump_disp_reg(DP_CTL_B, "DisplayPort B Control Register"); - dump_disp_reg(DP_CTL_C, "DisplayPort C Control Register"); - dump_disp_reg(DP_CTL_D, "DisplayPort D Control Register"); - - /* HSW North Display Audio */ - dump_aud_reg(AUD_TCA_CONFIG, "Audio Configuration - Transcoder A"); - dump_aud_reg(AUD_TCB_CONFIG, "Audio Configuration - Transcoder B"); - dump_aud_reg(AUD_TCC_CONFIG, "Audio Configuration - Transcoder C"); - dump_aud_reg(AUD_C1_MISC_CTRL, "Audio Converter 1 MISC Control"); - dump_aud_reg(AUD_C2_MISC_CTRL, "Audio Converter 2 MISC Control"); - dump_aud_reg(AUD_C3_MISC_CTRL, "Audio Converter 3 MISC Control"); - dump_aud_reg(AUD_VID_DID, "Audio Vendor ID / Device ID"); - dump_aud_reg(AUD_RID, "Audio Revision ID"); - dump_aud_reg(AUD_TCA_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder A"); - dump_aud_reg(AUD_TCB_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder B"); - dump_aud_reg(AUD_TCC_M_CTS_ENABLE, "Audio M & CTS Programming Enable - Transcoder C"); - dump_aud_reg(AUD_PWRST, "Audio Power State (Function Group, Convertor, Pin Widget)"); - dump_aud_reg(AUD_TCA_EDID_DATA, "Audio EDID Data Block - Transcoder A"); - dump_aud_reg(AUD_TCB_EDID_DATA, "Audio EDID Data Block - Transcoder B"); - dump_aud_reg(AUD_TCC_EDID_DATA, "Audio EDID Data Block - Transcoder C"); - dump_aud_reg(AUD_TCA_INFOFR, "Audio Widget Data Island Packet - Transcoder A"); - dump_aud_reg(AUD_TCB_INFOFR, "Audio Widget Data Island Packet - Transcoder B"); - dump_aud_reg(AUD_TCC_INFOFR, "Audio Widget Data Island Packet - Transcoder C"); - dump_aud_reg(AUD_PIPE_CONV_CFG, "Audio Pipe and Converter Configs"); - dump_aud_reg(AUD_C1_DIG_CNVT, "Audio Digital Converter - Converter 1"); - dump_aud_reg(AUD_C2_DIG_CNVT, "Audio Digital Converter - Converter 2"); - dump_aud_reg(AUD_C3_DIG_CNVT, "Audio Digital Converter - Converter 3"); - dump_aud_reg(AUD_C1_STR_DESC, "Audio Stream Descriptor Format - Converter 1"); - dump_aud_reg(AUD_C2_STR_DESC, "Audio Stream Descriptor Format - Converter 2"); - dump_aud_reg(AUD_C3_STR_DESC, "Audio Stream Descriptor Format - Converter 3"); - dump_aud_reg(AUD_OUT_CHAN_MAP, "Audio Output Channel Mapping"); - dump_aud_reg(AUD_TCA_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder A"); - dump_aud_reg(AUD_TCB_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder B"); - dump_aud_reg(AUD_TCC_PIN_PIPE_CONN_ENTRY_LNGTH, "Audio Connection List entry and Length - Transcoder C"); - dump_aud_reg(AUD_PIPE_CONN_SEL_CTRL, "Audio Pipe Connection Select Control"); - dump_aud_reg(AUD_TCA_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder A"); - dump_aud_reg(AUD_TCB_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder B"); - dump_aud_reg(AUD_TCC_DIP_ELD_CTRL_ST, "Audio DIP and ELD control state - Transcoder C"); - dump_aud_reg(AUD_PIN_ELD_CP_VLD, "Audio pin ELD valid and CP ready status"); - dump_aud_reg(AUD_HDMI_FIFO_STATUS, "Audio HDMI FIFO Status"); - - /* Audio debug registers */ - dump_aud_reg(AUD_ICOI, "Audio Immediate Command Output Interface"); - dump_aud_reg(AUD_IRII, "Audio Immediate Response Input Interface"); - dump_aud_reg(AUD_ICS, "Audio Immediate Command Status"); - dump_aud_reg(AUD_CHICKENBIT_REG, "Audio Chicken Bit Register"); - dump_aud_reg(AUD_DP_DIP_STATUS, "Audio DP and DIP FIFO Debug Status"); - dump_aud_reg(AUD_TCA_M_CTS, "Audio M CTS Read Back Transcoder A"); - dump_aud_reg(AUD_TCB_M_CTS, "Audio M CTS Read Back Transcoder B"); - dump_aud_reg(AUD_TCC_M_CTS, "Audio M CTS Read Back Transcoder C"); - - printf("\n"); - - printf("\nDetails:\n\n"); - - dump_aud_vendor_device_id(); - dump_aud_revision_id(); - - dump_hdmi_port_ctrl(PORT_B); - dump_hdmi_port_ctrl(PORT_C); - if (!IS_VALLEYVIEW(devid)) - dump_hdmi_port_ctrl(PORT_D); - - dump_dp_port_ctrl(PORT_B); - dump_dp_port_ctrl(PORT_C); - if (!IS_VALLEYVIEW(devid)) - dump_dp_port_ctrl(PORT_D); - - dump_aud_config(PIPE_A); - dump_aud_config(PIPE_B); - - dump_aud_m_cts_enable(PIPE_A); - dump_aud_m_cts_enable(PIPE_B); - - dump_aud_misc_control(PIPE_A); - dump_aud_misc_control(PIPE_B); - - dump_aud_power_state(); - dump_aud_port_en_hd_cfg(); - - dump_aud_dig_cnvt(PIPE_A); - dump_aud_dig_cnvt(PIPE_B); - - dump_aud_out_ch_str(); - - dump_aud_str_desc(PIPE_A); - dump_aud_str_desc(PIPE_B); - - dump_aud_connect_list(); - dump_aud_connect_select(); - - dump_aud_ctrl_state(PIPE_A); - dump_aud_ctrl_state(PIPE_B); - dump_aud_ctrl_state2(); - - dump_aud_hdmi_status(); - - dump_aud_edid_data(PIPE_A); - dump_aud_edid_data(PIPE_B); - - dump_aud_infoframe(PIPE_A); - dump_aud_infoframe(PIPE_B); -} - -int main(int argc, char **argv) -{ - struct pci_device *pci_dev; - - pci_dev = intel_get_pci_device(); - devid = pci_dev->device_id; /* XXX not true when mapping! */ - - do_self_tests(); - - if (argc == 2) - intel_mmio_use_dump_file(argv[1]); - else - intel_mmio_use_pci_bar(pci_dev); - - if (IS_VALLEYVIEW(devid)) { - printf("Valleyview audio registers:\n\n"); - dump_ironlake(); - } else if (IS_SKYLAKE(devid) - || IS_BROADWELL(devid) || IS_HASWELL(devid)) { - printf("%s audio registers:\n\n", - IS_SKYLAKE(devid) ? "Skylake" : - (IS_BROADWELL(devid) ? "Broadwell" : "Haswell")); - dump_hsw_plus(); - } else if (IS_GEN6(devid) || IS_GEN7(devid) - || getenv("HAS_PCH_SPLIT")) { - printf("%s audio registers:\n\n", - IS_GEN6(devid) ? "SandyBridge" : "IvyBridge"); - intel_check_pch(); - dump_cpt(); - } else if (IS_GEN5(devid)) { - printf("Ironlake audio registers:\n\n"); - dump_ironlake(); - } else if (IS_G4X(devid)) { - printf("G45 audio registers:\n\n"); - dump_eaglelake(); - } else if (IS_CHERRYVIEW(devid)) { - printf("Braswell audio registers:\n\n"); - dump_braswell(); - } - - return 0; -} diff --git a/tools/intel_backlight.c b/tools/intel_backlight.c deleted file mode 100644 index 17deb88d..00000000 --- a/tools/intel_backlight.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Chris Wilson <chris@chris-wilson.co.uk> - * - */ - -#include <stdint.h> -#include <stdlib.h> -#include <stdio.h> -#include <string.h> - -#include "intel_io.h" -#include "intel_chipset.h" -#include "intel_reg.h" - -/* XXX PCH only today */ - -static uint32_t reg_read(uint32_t reg) -{ - return *(volatile uint32_t *)((volatile char*)mmio + reg); -} - -static void reg_write(uint32_t reg, uint32_t val) -{ - *(volatile uint32_t *)((volatile char*)mmio + reg) = val; -} - -int main(int argc, char** argv) -{ - uint32_t current, max; - - intel_mmio_use_pci_bar(intel_get_pci_device()); - - current = reg_read(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; - max = reg_read(BLC_PWM_PCH_CTL2) >> 16; - - printf ("current backlight value: %d%%\n", current * 100 / max); - - if (argc > 1) { - uint32_t v = atoi (argv[1]) * max / 100; - if (v > max) - v = max; - reg_write(BLC_PWM_CPU_CTL, - (reg_read(BLC_PWM_CPU_CTL) &~ BACKLIGHT_DUTY_CYCLE_MASK) | v); - (void) reg_read(BLC_PWM_CPU_CTL); - printf ("set backlight to %d%%\n", v * 100 / max); - } - - return 0; -} diff --git a/tools/intel_bios.h b/tools/intel_bios.h deleted file mode 100644 index aedc5fcb..00000000 --- a/tools/intel_bios.h +++ /dev/null @@ -1,892 +0,0 @@ -/* - * Copyright 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -#ifndef _INTEL_BIOS_H_ -#define _INTEL_BIOS_H_ - -#include <stdint.h> - - -struct vbt_header { - char signature[20]; /**< Always starts with 'VBT$' */ - uint16_t version; /**< decimal */ - uint16_t header_size; /**< in bytes */ - uint16_t vbt_size; /**< in bytes */ - uint8_t vbt_checksum; - uint8_t reserved0; - uint32_t bdb_offset; /**< from beginning of VBT */ - uint32_t aim_offset[4]; /**< from beginning of VBT */ -} __attribute__ ((packed)); - -struct bdb_header { - char signature[16]; /**< Always 'BIOS_DATA_BLOCK' */ - uint16_t version; /**< decimal */ - uint16_t header_size; /**< in bytes */ - uint16_t bdb_size; /**< in bytes */ -} __attribute__ ((packed)); - -/* - * There are several types of BIOS data blocks (BDBs), each block has - * an ID and size in the first 3 bytes (ID in first, size in next 2). - * Known types are listed below. - */ -#define BDB_GENERAL_FEATURES 1 -#define BDB_GENERAL_DEFINITIONS 2 -#define BDB_OLD_TOGGLE_LIST 3 -#define BDB_MODE_SUPPORT_LIST 4 -#define BDB_GENERIC_MODE_TABLE 5 -#define BDB_EXT_MMIO_REGS 6 -#define BDB_SWF_IO 7 -#define BDB_SWF_MMIO 8 -#define BDB_DOT_CLOCK_TABLE 9 -#define BDB_MODE_REMOVAL_TABLE 10 -#define BDB_CHILD_DEVICE_TABLE 11 -#define BDB_DRIVER_FEATURES 12 -#define BDB_DRIVER_PERSISTENCE 13 -#define BDB_EXT_TABLE_PTRS 14 -#define BDB_DOT_CLOCK_OVERRIDE 15 -#define BDB_DISPLAY_SELECT 16 -/* 17 rsvd */ -#define BDB_DRIVER_ROTATION 18 -#define BDB_DISPLAY_REMOVE 19 -#define BDB_OEM_CUSTOM 20 -#define BDB_EFP_LIST 21 /* workarounds for VGA hsync/vsync */ -#define BDB_SDVO_LVDS_OPTIONS 22 -#define BDB_SDVO_PANEL_DTDS 23 -#define BDB_SDVO_LVDS_PNP_IDS 24 -#define BDB_SDVO_LVDS_POWER_SEQ 25 -#define BDB_TV_OPTIONS 26 -#define BDB_EDP 27 -#define BDB_LVDS_OPTIONS 40 -#define BDB_LVDS_LFP_DATA_PTRS 41 -#define BDB_LVDS_LFP_DATA 42 -#define BDB_LVDS_BACKLIGHT 43 -#define BDB_LVDS_POWER 44 -#define BDB_MIPI_CONFIG 52 -#define BDB_MIPI_SEQUENCE 53 -#define BDB_SKIP 254 /* VBIOS private block, ignore */ - -struct bdb_general_features { - /* bits 1 */ - unsigned char panel_fitting:2; - unsigned char flexaim:1; - unsigned char msg_enable:1; - unsigned char clear_screen:3; - unsigned char color_flip:1; - - /* bits 2 */ - unsigned char download_ext_vbt:1; - unsigned char enable_ssc:1; - unsigned char ssc_freq:1; - unsigned char enable_lfp_on_override:1; - unsigned char disable_ssc_ddt:1; - unsigned char rsvd8:3; /* finish byte */ - - /* bits 3 */ - unsigned char disable_smooth_vision:1; - unsigned char single_dvi:1; - unsigned char rsvd9:6; /* finish byte */ - - /* bits 4 */ - unsigned char legacy_monitor_detect; - - /* bits 5 */ - unsigned char int_crt_support:1; - unsigned char int_tv_support:1; - unsigned char rsvd11:6; /* finish byte */ -} __attribute__ ((packed)); - -#define GPIO_PIN_NONE 0x00 /* "N/A" */ -#define GPIO_PIN_I2C 0x01 /* "I2C GPIO pins" */ -#define GPIO_PIN_CRT_DDC 0x02 /* "Analog CRT DDC GPIO pins" */ -/* 915+ */ -#define GPIO_PIN_LVDS 0x03 /* "Integrated LVDS DDC GPIO pins" */ -#define GPIO_PIN_SDVO_I2C 0x05 /* "sDVO I2C GPIO pins" */ -#define GPIO_PIN_SDVO_DDC1 0x1D /* "SDVO DDC1 GPIO pins" */ -#define GPIO_PIN_SDVO_DDC2 0x2D /* "SDVO DDC2 GPIO pins" */ -/* pre-915 */ -#define GPIO_PIN_DVI_LVDS 0x03 /* "DVI/LVDS DDC GPIO pins" */ -#define GPIO_PIN_ADD_I2C 0x05 /* "ADDCARD I2C GPIO pins" */ -#define GPIO_PIN_ADD_DDC 0x04 /* "ADDCARD DDC GPIO pins" */ -#define GPIO_PIN_ADD_DDC_I2C 0x06 /* "ADDCARD DDC/I2C GPIO pins" */ - -/* Pre 915 */ -#define DEVICE_TYPE_NONE 0x00 -#define DEVICE_TYPE_CRT 0x01 -#define DEVICE_TYPE_TV 0x09 -#define DEVICE_TYPE_EFP 0x12 -#define DEVICE_TYPE_LFP 0x22 -/* On 915+ */ -#define DEVICE_TYPE_CRT_DPMS 0x6001 -#define DEVICE_TYPE_CRT_DPMS_HOTPLUG 0x4001 -#define DEVICE_TYPE_TV_COMPOSITE 0x0209 -#define DEVICE_TYPE_TV_MACROVISION 0x0289 -#define DEVICE_TYPE_TV_RF_COMPOSITE 0x020c -#define DEVICE_TYPE_TV_SVIDEO_COMPOSITE 0x0609 -#define DEVICE_TYPE_TV_SCART 0x0209 -#define DEVICE_TYPE_TV_CODEC_HOTPLUG_PWR 0x6009 -#define DEVICE_TYPE_EFP_HOTPLUG_PWR 0x6012 -#define DEVICE_TYPE_EFP_DVI_HOTPLUG_PWR 0x6052 -#define DEVICE_TYPE_EFP_DVI_I 0x6053 -#define DEVICE_TYPE_EFP_DVI_D_DUAL 0x6152 -#define DEVICE_TYPE_EFP_DVI_D_HDCP 0x60d2 -#define DEVICE_TYPE_OPENLDI_HOTPLUG_PWR 0x6062 -#define DEVICE_TYPE_OPENLDI_DUALPIX 0x6162 -#define DEVICE_TYPE_LFP_PANELLINK 0x5012 -#define DEVICE_TYPE_LFP_CMOS_PWR 0x5042 -#define DEVICE_TYPE_LFP_LVDS_PWR 0x5062 -#define DEVICE_TYPE_LFP_LVDS_DUAL 0x5162 -#define DEVICE_TYPE_LFP_LVDS_DUAL_HDCP 0x51e2 -#define DEVICE_TYPE_INT_HDMI 0xf0D2 - -#define DEVICE_TYPE_INT_LFP 0x1022 -#define DEVICE_TYPE_INT_TV 0x1009 -#define DEVICE_TYPE_DP 0x68C6 -#define DEVICE_TYPE_DP_HDMI_DVI 0x60d6 -#define DEVICE_TYPE_DP_DVI 0x68d6 -#define DEVICE_TYPE_HDMI_DVI 0x60d2 -#define DEVICE_TYPE_DVI 0x68d2 -#define DEVICE_TYPE_eDP 0x78C6 - -#define DEVICE_CFG_NONE 0x00 -#define DEVICE_CFG_12BIT_DVOB 0x01 -#define DEVICE_CFG_12BIT_DVOC 0x02 -#define DEVICE_CFG_24BIT_DVOBC 0x09 -#define DEVICE_CFG_24BIT_DVOCB 0x0a -#define DEVICE_CFG_DUAL_DVOB 0x11 -#define DEVICE_CFG_DUAL_DVOC 0x12 -#define DEVICE_CFG_DUAL_DVOBC 0x13 -#define DEVICE_CFG_DUAL_LINK_DVOBC 0x19 -#define DEVICE_CFG_DUAL_LINK_DVOCB 0x1a - -#define DEVICE_WIRE_NONE 0x00 -#define DEVICE_WIRE_DVOB 0x01 -#define DEVICE_WIRE_DVOC 0x02 -#define DEVICE_WIRE_DVOBC 0x03 -#define DEVICE_WIRE_DVOBB 0x05 -#define DEVICE_WIRE_DVOCC 0x06 -#define DEVICE_WIRE_DVOB_MASTER 0x0d -#define DEVICE_WIRE_DVOC_MASTER 0x0e - -#define DEVICE_PORT_DVOA 0x00 /* none on 845+ */ -#define DEVICE_PORT_DVOB 0x01 -#define DEVICE_PORT_DVOC 0x02 - -#define DEVICE_PORT_NONE 0 -#define DEVICE_PORT_HDMIB 1 -#define DEVICE_PORT_HDMIC 2 -#define DEVICE_PORT_HDMID 3 -#define DEVICE_PORT_DPB 7 -#define DEVICE_PORT_DPC 8 -#define DEVICE_PORT_DPD 9 - -#define DEVICE_INFO_NONE 0 -#define DEVICE_INFO_HDMI_CERT 1 -#define DEVICE_INFO_DP 2 -#define DEVICE_INFO_DVI 3 - -struct child_device_config { - uint16_t handle; - uint16_t device_type; /* See DEVICE_TYPE_* above */ - uint8_t device_id[10]; - uint16_t addin_offset; - uint8_t dvo_port; /* See DEVICE_PORT_* above */ - uint8_t i2c_pin; - uint8_t slave_addr; - uint8_t ddc_pin; - uint16_t edid_ptr; - uint8_t dvo_cfg; /* See DEVICE_CFG_* above */ - uint8_t dvo2_port; - uint8_t i2c2_pin; - uint8_t slave2_addr; - uint8_t ddc2_pin; - uint8_t capabilities; - uint8_t dvo_wiring; /* See DEVICE_WIRE_* above */ - uint8_t dvo2_wiring; - uint16_t extended_type; - uint8_t dvo_function; -} __attribute__ ((packed)); - -struct efp_child_device_config { - uint16_t handle; - uint16_t device_type; - uint8_t skip1[12]; - uint8_t port; - uint8_t skip2[2]; - uint8_t ddc_pin; - uint8_t skip3[3]; - uint8_t docked_port; - uint8_t hdmi_compat:1; - uint8_t conn_info:3; - uint8_t skip4:4; - uint8_t aux_chan; - uint8_t dongle_detect; - uint8_t skip5[6]; -} __attribute__ ((packed)); - -struct bdb_general_definitions { - unsigned char crt_ddc_gmbus_pin; /* see GPIO_PIN_* above */ - - /* DPMS bits */ - unsigned char dpms_acpi:1; - unsigned char skip_boot_crt_detect:1; - unsigned char dpms_aim:1; - unsigned char rsvd1:5; /* finish byte */ - - /* boot device bits */ - unsigned char boot_display[2]; - unsigned char child_dev_size; - - /* - * Device info: - * If TV is present, it'll be at devices[0] - * LVDS will be next, either devices[0] or [1], if present - * Max total will be 6, but could be as few as 4 if both - * TV and LVDS are missing, so be careful when interpreting - * [4] and [5]. - */ - struct child_device_config devices[0]; - /* may be another device block here on some platforms */ -} __attribute__ ((packed)); - -#define DEVICE_CHILD_SIZE 7 - -struct bdb_child_devices { - uint8_t child_structure_size; - struct child_device_config children[DEVICE_CHILD_SIZE]; -} __attribute__ ((packed)); - -struct bdb_lvds_options { - uint8_t panel_type; - uint8_t rsvd1; - /* LVDS capabilities, stored in a dword */ - uint8_t pfit_mode:2; - uint8_t pfit_text_mode_enhanced:1; - uint8_t pfit_gfx_mode_enhanced:1; - uint8_t pfit_ratio_auto:1; - uint8_t pixel_dither:1; - uint8_t lvds_edid:1; - uint8_t rsvd2:1; - uint8_t rsvd4; -} __attribute__ ((packed)); - -/* 915+ only */ -struct bdb_tv_features { - /* need to verify bit ordering */ - uint16_t under_over_scan_via_yprpb:2; - uint16_t rsvd1:10; - uint16_t under_over_scan_via_dvi:2; - uint16_t add_overscan_mode:1; - uint16_t rsvd2:1; -} __attribute__ ((packed)); - -struct lvds_fp_timing { - uint16_t x_res; - uint16_t y_res; - uint32_t lvds_reg; - uint32_t lvds_reg_val; - uint32_t pp_on_reg; - uint32_t pp_on_reg_val; - uint32_t pp_off_reg; - uint32_t pp_off_reg_val; - uint32_t pp_cycle_reg; - uint32_t pp_cycle_reg_val; - uint32_t pfit_reg; - uint32_t pfit_reg_val; - uint16_t terminator; -} __attribute__ ((packed)); - -struct lvds_dvo_timing { - uint16_t dclk; /**< In 10khz */ - uint8_t hactive; - uint8_t hblank; - uint8_t high_h; /**< 7:4 = hactive 11:8, 3:0 = hblank 11:8 */ - uint8_t vactive; - uint8_t vblank; - uint8_t high_v; /**< 7:4 = vactive 11:8, 3:0 = vblank 11:8 */ - uint8_t hsync_off; - uint8_t hsync_pulse_width; - uint8_t vsync_off; - uint8_t high_hsync_off; /**< 7:6 = hsync off 9:8 */ - uint8_t h_image; - uint8_t v_image; - uint8_t max_hv; - uint8_t h_border; - uint8_t v_border; - uint8_t flags; -} __attribute__ ((packed)); -struct lvds_dvo_timing2 { - uint16_t clock; /**< In 10khz */ - uint8_t hactive_lo; - uint8_t hblank_lo; - uint8_t hblank_hi:4; - uint8_t hactive_hi:4; - uint8_t vactive_lo; - uint8_t vblank_lo; - uint8_t vblank_hi:4; - uint8_t vactive_hi:4; - uint8_t hsync_off_lo; - uint8_t hsync_pulse_width; - uint8_t vsync_pulse_width:4; - uint8_t vsync_off:4; - uint8_t rsvd0:6; - uint8_t hsync_off_hi:2; - uint8_t h_image; - uint8_t v_image; - uint8_t max_hv; - uint8_t h_border; - uint8_t v_border; - uint8_t rsvd1:3; - uint8_t digital:2; - uint8_t vsync_positive:1; - uint8_t hsync_positive:1; - uint8_t rsvd2:1; -} __attribute__((packed)); - -struct lvds_pnp_id { - uint16_t mfg_name; - uint16_t product_code; - uint32_t serial; - uint8_t mfg_week; - uint8_t mfg_year; -} __attribute__ ((packed));; - -/* LFP pointer table contains entries to the struct below */ -struct bdb_lvds_lfp_data_ptr { - uint16_t fp_timing_offset; /* offsets are from start of bdb */ - uint8_t fp_table_size; - uint16_t dvo_timing_offset; - uint8_t dvo_table_size; - uint16_t panel_pnp_id_offset; - uint8_t pnp_table_size; -} __attribute__ ((packed)); - -struct bdb_lvds_lfp_data_ptrs { - uint8_t lvds_entries; - struct bdb_lvds_lfp_data_ptr ptr[16]; -} __attribute__ ((packed)); - -struct bdb_lvds_lfp_data_entry { - struct lvds_fp_timing fp_timing; - struct lvds_dvo_timing dvo_timing; - struct lvds_pnp_id pnp_id; -} __attribute__ ((packed)); - -struct bdb_lvds_lfp_data { - struct bdb_lvds_lfp_data_entry data[16]; -} __attribute__ ((packed)); - -#define BACKLIGHT_TYPE_NONE 0 -#define BACKLIGHT_TYPE_I2C 1 -#define BACKLIGHT_TYPE_PWM 2 - -#define BACKLIGHT_GMBUS_100KHZ 0 -#define BACKLIGHT_GMBUS_50KHZ 1 -#define BACKLIGHT_GMBUS_400KHZ 2 -#define BACKLIGHT_GMBUS_1MHZ 3 - -struct backlight_info { - uint8_t inverter_type:2; /* see BACKLIGHT_TYPE_* above */ - uint8_t inverter_polarity:1; /* 1 means 0 is max, 255 is min */ - uint8_t gpio_pins:3; /* see GPIO_PIN_* above */ - uint8_t gmbus_speed:2; - uint16_t pwm_frequency; /* in Hz */ - uint8_t min_brightness; - /* Next two are only for 915+ systems */ - uint8_t i2c_addr; - uint8_t i2c_cmd; -} __attribute((packed)); - -struct bdb_backlight_control { - uint8_t row_size; - struct backlight_info lfps[16]; -} __attribute__ ((packed)); - -struct bdb_bia { - uint8_t bia_enable:1; - uint8_t bia_level:3; - uint8_t rsvd1:3; - uint8_t als_enable:1; - uint8_t als_response_data[20]; -} __attribute((packed)); - -struct aimdb_header { - char signature[16]; - char oem_device[20]; - uint16_t aimdb_version; - uint16_t aimdb_header_size; - uint16_t aimdb_size; -} __attribute__ ((packed)); - -struct aimdb_block { - uint8_t aimdb_id; - uint16_t aimdb_size; -} __attribute__ ((packed)); - -struct vch_panel_data { - uint16_t fp_timing_offset; - uint8_t fp_timing_size; - uint16_t dvo_timing_offset; - uint8_t dvo_timing_size; - uint16_t text_fitting_offset; - uint8_t text_fitting_size; - uint16_t graphics_fitting_offset; - uint8_t graphics_fitting_size; -} __attribute__ ((packed)); - -struct vch_bdb_22 { - struct aimdb_block aimdb_block; - struct vch_panel_data panels[16]; -} __attribute__ ((packed)); - -#define BLC_INVERTER_TYPE_NONE 0 -#define BLC_INVERTER_TYPE_I2C 1 -#define BLC_INVERTER_TYPE_PWM 2 - -#define BLC_GPIO_NONE 0 -#define BLC_GPIO_I2C 1 -#define BLC_GPIO_CRT_DDC 2 -#define BLC_GPIO_DVI_DDC 3 -#define BLC_GPIO_SDVO_I2C 5 - -struct blc_struct { - uint8_t inverter_type:2; - uint8_t inverter_polarity:1; /* 1 means inverted (0 = max brightness) */ - uint8_t gpio_pins:3; - uint8_t gmbus_speed:2; - uint16_t pwm_freq; /* in Hz */ - uint8_t min_brightness; /* (0-255) */ - uint8_t i2c_slave_addr; - uint8_t i2c_cmd; -} __attribute__ ((packed)); - -struct bdb_lvds_backlight { - uint8_t blcstruct_size; - struct blc_struct panels[16]; -} __attribute__ ((packed)); - -struct bdb_lvds_power { - uint8_t dpst_enabled:1; - uint8_t pwr_prefs:3; - uint8_t rsvd1:3; - uint8_t als_enabled:1; - uint16_t als_backlight1; - uint16_t als_backlight2; - uint16_t als_backlight3; - uint16_t als_backlight4; - uint16_t als_backlight5; -} __attribute__ ((packed)); - -#define BDB_DRIVER_NO_LVDS 0 -#define BDB_DRIVER_INT_LVDS 1 -#define BDB_DRIVER_SDVO_LVDS 2 -#define BDB_DRIVER_EDP 3 - -struct bdb_driver_feature { - uint8_t boot_dev_algorithm:1; - uint8_t block_display_switch:1; - uint8_t allow_display_switch:1; - uint8_t hotplug_dvo:1; - uint8_t dual_view_zoom:1; - uint8_t int15h_hook:1; - uint8_t sprite_in_clone:1; - uint8_t primary_lfp_id:1; - - uint16_t boot_mode_x; - uint16_t boot_mode_y; - uint8_t boot_mode_bpp; - uint8_t boot_mode_refresh; - - uint16_t enable_lfp_primary:1; - uint16_t selective_mode_pruning:1; - uint16_t dual_frequency:1; - uint16_t render_clock_freq:1; /* 0: high freq; 1: low freq */ - uint16_t nt_clone_support:1; - uint16_t power_scheme_ui:1; /* 0: CUI; 1: 3rd party */ - uint16_t sprite_display_assign:1; /* 0: secondary; 1: primary */ - uint16_t cui_aspect_scaling:1; - uint16_t preserve_aspect_ratio:1; - uint16_t sdvo_device_power_down:1; - uint16_t crt_hotplug:1; - uint16_t lvds_config:2; - uint16_t reserved:3; - - uint8_t static_display:1; - uint8_t reserved2:7; - uint16_t legacy_crt_max_x; - uint16_t legacy_crt_max_y; - uint8_t legacy_crt_max_refresh; -} __attribute__ ((packed)); - -struct bdb_sdvo_lvds_options { - uint8_t panel_backlight; - uint8_t h40_set_panel_type; - uint8_t panel_type; - uint8_t ssc_clk_freq; - uint16_t als_low_trip; - uint16_t als_high_trip; - uint8_t sclalarcoeff_tab_row_num; - uint8_t sclalarcoeff_tab_row_size; - uint8_t coefficient[8]; - uint8_t panel_misc_bits_1; - uint8_t panel_misc_bits_2; - uint8_t panel_misc_bits_3; - uint8_t panel_misc_bits_4; -} __attribute__ ((packed)); - -#define EDP_18BPP 0 -#define EDP_24BPP 1 -#define EDP_30BPP 2 -#define EDP_RATE_1_62 0 -#define EDP_RATE_2_7 1 -#define EDP_LANE_1 0 -#define EDP_LANE_2 1 -#define EDP_LANE_4 3 -#define EDP_PREEMPHASIS_NONE 0 -#define EDP_PREEMPHASIS_3_5dB 1 -#define EDP_PREEMPHASIS_6dB 2 -#define EDP_PREEMPHASIS_9_5dB 3 -#define EDP_VSWING_0_4V 0 -#define EDP_VSWING_0_6V 1 -#define EDP_VSWING_0_8V 2 -#define EDP_VSWING_1_2V 3 - -struct edp_power_seq { - uint16_t t3; - uint16_t t7; - uint16_t t9; - uint16_t t10; - uint16_t t12; -} __attribute__ ((packed)); - -struct edp_link_params { - uint8_t rate:4; - uint8_t lanes:4; - uint8_t preemphasis:4; - uint8_t vswing:4; -} __attribute__ ((packed)); - -struct bdb_edp { - struct edp_power_seq power_seqs[16]; - uint32_t color_depth; - struct edp_link_params link_params[16]; - uint32_t sdrrs_msa_timing_delay; - - uint16_t edp_s3d_feature; - uint16_t edp_t3_optimization; -} __attribute__ ((packed)); - - -/* Block 52 contains MiPi Panel info - * 6 such enteries will there. Index into correct - * entery is based on the panel_index in #40 LFP - */ -#define MAX_MIPI_CONFIGURATIONS 6 -struct mipi_config { - uint16_t panel_id; - - /* General Params */ - uint32_t dithering:1; - uint32_t rsvd1:1; - uint32_t panel_type:1; - uint32_t panel_arch_type:2; - uint32_t cmd_mode:1; - uint32_t vtm:2; - uint32_t cabc:1; - uint32_t pwm_blc:1; - - /* Bit 13:10 - * 000 - Reserved, 001 - RGB565, 002 - RGB666, - * 011 - RGB666Loosely packed, 100 - RGB888, - * others - rsvd - */ - uint32_t videomode_color_format:4; - - /* Bit 15:14 - * 0 - No rotation, 1 - 90 degree - * 2 - 180 degree, 3 - 270 degree - */ - uint32_t rotation:2; - uint32_t bta:1; - uint32_t rsvd2:15; - - /* 2 byte Port Description */ - uint16_t dual_link:2; - uint16_t lane_cnt:2; - uint16_t rsvd3:12; - - /* 2 byte DSI COntroller params */ - /* 0 - Using DSI PHY, 1 - TE usage */ - uint16_t dsi_usage:1; - uint16_t rsvd4:15; - - uint8_t rsvd5[5]; - uint32_t dsi_ddr_clk; - uint32_t bridge_ref_clk; - - uint8_t byte_clk_sel:2; - uint8_t rsvd6:6; - - /* DPHY Flags */ - uint16_t dphy_param_valid:1; - uint16_t eot_disabled:1; - uint16_t clk_stop:1; - uint16_t rsvd7:13; - - uint32_t hs_tx_timeout; - uint32_t lp_rx_timeout; - uint32_t turn_around_timeout; - uint32_t device_reset_timer; - uint32_t master_init_timer; - uint32_t dbi_bw_timer; - uint32_t lp_byte_clk_val; - - /* 4 byte Dphy Params */ - uint32_t prepare_cnt:6; - uint32_t rsvd8:2; - uint32_t clk_zero_cnt:8; - uint32_t trail_cnt:5; - uint32_t rsvd9:3; - uint32_t exit_zero_cnt:6; - uint32_t rsvd10:2; - - uint32_t clk_lane_switch_cnt; - uint32_t hl_switch_cnt; - - uint32_t rsvd11[6]; - - /* timings based on dphy spec */ - uint8_t tclk_miss; - uint8_t tclk_post; - uint8_t rsvd12; - uint8_t tclk_pre; - uint8_t tclk_prepare; - uint8_t tclk_settle; - uint8_t tclk_term_enable; - uint8_t tclk_trail; - uint16_t tclk_prepare_clkzero; - uint8_t rsvd13; - uint8_t td_term_enable; - uint8_t teot; - uint8_t ths_exit; - uint8_t ths_prepare; - uint16_t ths_prepare_hszero; - uint8_t rsvd14; - uint8_t ths_settle; - uint8_t ths_skip; - uint8_t ths_trail; - uint8_t tinit; - uint8_t tlpx; - uint8_t rsvd15[3]; - - /* GPIOs */ - uint8_t panel_enable; - uint8_t bl_enable; - uint8_t pwm_enable; - uint8_t reset_r_n; - uint8_t pwr_down_r; - uint8_t stdby_r_n; - -} __attribute__ ((packed)); - -/* Block 52 contains MiPi configuration block - * 6 * bdb_mipi_config, followed by 6 pps data - * block below - */ -struct mipi_pps_data { - uint16_t panel_on_delay; - uint16_t bl_enable_delay; - uint16_t bl_disable_delay; - uint16_t panel_off_delay; - uint16_t panel_power_cycle_delay; -} __attribute__ ((packed)); - -struct bdb_mipi_config { - struct mipi_config config[MAX_MIPI_CONFIGURATIONS]; - struct mipi_pps_data pps[MAX_MIPI_CONFIGURATIONS]; -} __attribute__ ((packed)); - -/* variable number of these - max 6 */ -struct bdb_mipi_sequence { - uint8_t version; - uint8_t data[0]; -} __attribute__ ((packed)); - -/* MIPI Sequnece Block definitions */ -enum MIPI_SEQ { - MIPI_SEQ_UNDEFINED = 0, - MIPI_SEQ_ASSERT_RESET, - MIPI_SEQ_INIT_OTP, - MIPI_SEQ_DISPLAY_ON, - MIPI_SEQ_DISPLAY_OFF, - MIPI_SEQ_DEASSERT_RESET, - MIPI_SEQ_MAX -}; - -enum MIPI_SEQ_ELEMENT { - MIPI_SEQ_ELEM_UNDEFINED = 0, - MIPI_SEQ_ELEM_SEND_PKT, - MIPI_SEQ_ELEM_DELAY, - MIPI_SEQ_ELEM_GPIO, - MIPI_SEQ_ELEM_MAX -}; - -/* - * Driver<->VBIOS interaction occurs through scratch bits in - * GR18 & SWF*. - * - * The VBIOS/firmware will signal to the gfx driver through the ASLE interrupt - * (visible in the interupt regs at bit 0) when it wants something done. - * - * Pre-965: - * The gfx driver can make calls to the VBIOS/firmware through an SMI request, - * generated by writing to offset 0xe0 of the device's config space (see the - * publically available 915 PRM for details). - * - * 965 and above: - * IGD OpRegion requests to the VBIOS/firmware are made using SWSCI, which can - * be triggered by writing to offset 0xe4 (see the publically available - * 965 graphics PRM for details). - */ - -/* GR18 bits are set on display switch and hotkey events */ -#define GR18_DRIVER_SWITCH_EN (1<<7) /* 0: VBIOS control, 1: driver control */ -#define GR18_HOTKEY_MASK 0x78 /* See also SWF4 15:0 */ -#define GR18_HK_NONE (0x0<<3) -#define GR18_HK_LFP_STRETCH (0x1<<3) -#define GR18_HK_TOGGLE_DISP (0x2<<3) -#define GR18_HK_DISP_SWITCH (0x4<<3) /* see SWF14 15:0 for what to enable */ -#define GR18_HK_POPUP_DISABLED (0x6<<3) -#define GR18_HK_POPUP_ENABLED (0x7<<3) -#define GR18_HK_PFIT (0x8<<3) -#define GR18_HK_APM_CHANGE (0xa<<3) -#define GR18_HK_MULTIPLE (0xc<<3) -#define GR18_USER_INT_EN (1<<2) -#define GR18_A0000_FLUSH_EN (1<<1) -#define GR18_SMM_EN (1<<0) - -/* Set by driver, cleared by VBIOS */ -#define SWF00_YRES_SHIFT 16 -#define SWF00_XRES_SHIFT 0 -#define SWF00_RES_MASK 0xffff - -/* Set by VBIOS at boot time and driver at runtime */ -#define SWF01_TV2_FORMAT_SHIFT 8 -#define SWF01_TV1_FORMAT_SHIFT 0 -#define SWF01_TV_FORMAT_MASK 0xffff - -#define SWF10_VBIOS_BLC_I2C_EN (1<<29) -#define SWF10_GTT_OVERRIDE_EN (1<<28) -#define SWF10_LFP_DPMS_OVR (1<<27) /* override DPMS on display switch */ -#define SWF10_ACTIVE_TOGGLE_LIST_MASK (7<<24) -#define SWF10_OLD_TOGGLE 0x0 -#define SWF10_TOGGLE_LIST_1 0x1 -#define SWF10_TOGGLE_LIST_2 0x2 -#define SWF10_TOGGLE_LIST_3 0x3 -#define SWF10_TOGGLE_LIST_4 0x4 -#define SWF10_PANNING_EN (1<<23) -#define SWF10_DRIVER_LOADED (1<<22) -#define SWF10_EXTENDED_DESKTOP (1<<21) -#define SWF10_EXCLUSIVE_MODE (1<<20) -#define SWF10_OVERLAY_EN (1<<19) -#define SWF10_PLANEB_HOLDOFF (1<<18) -#define SWF10_PLANEA_HOLDOFF (1<<17) -#define SWF10_VGA_HOLDOFF (1<<16) -#define SWF10_ACTIVE_DISP_MASK 0xffff -#define SWF10_PIPEB_LFP2 (1<<15) -#define SWF10_PIPEB_EFP2 (1<<14) -#define SWF10_PIPEB_TV2 (1<<13) -#define SWF10_PIPEB_CRT2 (1<<12) -#define SWF10_PIPEB_LFP (1<<11) -#define SWF10_PIPEB_EFP (1<<10) -#define SWF10_PIPEB_TV (1<<9) -#define SWF10_PIPEB_CRT (1<<8) -#define SWF10_PIPEA_LFP2 (1<<7) -#define SWF10_PIPEA_EFP2 (1<<6) -#define SWF10_PIPEA_TV2 (1<<5) -#define SWF10_PIPEA_CRT2 (1<<4) -#define SWF10_PIPEA_LFP (1<<3) -#define SWF10_PIPEA_EFP (1<<2) -#define SWF10_PIPEA_TV (1<<1) -#define SWF10_PIPEA_CRT (1<<0) - -#define SWF11_MEMORY_SIZE_SHIFT 16 -#define SWF11_SV_TEST_EN (1<<15) -#define SWF11_IS_AGP (1<<14) -#define SWF11_DISPLAY_HOLDOFF (1<<13) -#define SWF11_DPMS_REDUCED (1<<12) -#define SWF11_IS_VBE_MODE (1<<11) -#define SWF11_PIPEB_ACCESS (1<<10) /* 0 here means pipe a */ -#define SWF11_DPMS_MASK 0x07 -#define SWF11_DPMS_OFF (1<<2) -#define SWF11_DPMS_SUSPEND (1<<1) -#define SWF11_DPMS_STANDBY (1<<0) -#define SWF11_DPMS_ON 0 - -#define SWF14_GFX_PFIT_EN (1<<31) -#define SWF14_TEXT_PFIT_EN (1<<30) -#define SWF14_LID_SWITCH_EN (1<<29) -#define SWF14_POPUP_EN (1<<28) -#define SWF14_DISPLAY_HOLDOFF (1<<27) -#define SWF14_DISP_DETECT_EN (1<<26) -#define SWF14_DOCKING_STATUS_DOCKED (1<<25) /* 0 here means undocked */ -#define SWF14_DRIVER_STATUS (1<<24) -#define SWF14_OS_TYPE_WIN9X (1<<23) -#define SWF14_OS_TYPE_WINNT (1<<22) -/* 21:19 rsvd */ -#define SWF14_PM_TYPE_MASK 0x00070000 -#define SWF14_PM_ACPI_VIDEO (0x4 << 16) -#define SWF14_PM_ACPI (0x3 << 16) -#define SWF14_PM_APM_12 (0x2 << 16) -#define SWF14_PM_APM_11 (0x1 << 16) -#define SWF14_HK_REQUEST_MASK 0x0000ffff /* see GR18 6:3 for event type */ - /* if GR18 indicates a display switch */ -#define SWF14_DS_PIPEB_LFP2_EN (1<<15) -#define SWF14_DS_PIPEB_EFP2_EN (1<<14) -#define SWF14_DS_PIPEB_TV2_EN (1<<13) -#define SWF14_DS_PIPEB_CRT2_EN (1<<12) -#define SWF14_DS_PIPEB_LFP_EN (1<<11) -#define SWF14_DS_PIPEB_EFP_EN (1<<10) -#define SWF14_DS_PIPEB_TV_EN (1<<9) -#define SWF14_DS_PIPEB_CRT_EN (1<<8) -#define SWF14_DS_PIPEA_LFP2_EN (1<<7) -#define SWF14_DS_PIPEA_EFP2_EN (1<<6) -#define SWF14_DS_PIPEA_TV2_EN (1<<5) -#define SWF14_DS_PIPEA_CRT2_EN (1<<4) -#define SWF14_DS_PIPEA_LFP_EN (1<<3) -#define SWF14_DS_PIPEA_EFP_EN (1<<2) -#define SWF14_DS_PIPEA_TV_EN (1<<1) -#define SWF14_DS_PIPEA_CRT_EN (1<<0) - /* if GR18 indicates a panel fitting request */ -#define SWF14_PFIT_EN (1<<0) /* 0 means disable */ - /* if GR18 indicates an APM change request */ -#define SWF14_APM_HIBERNATE 0x4 -#define SWF14_APM_SUSPEND 0x3 -#define SWF14_APM_STANDBY 0x1 -#define SWF14_APM_RESTORE 0x0 - -#endif /* _INTEL_BIOS_H_ */ diff --git a/tools/intel_bios_dumper.c b/tools/intel_bios_dumper.c deleted file mode 100644 index 85bea97b..00000000 --- a/tools/intel_bios_dumper.c +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright © 2007 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <stdarg.h> -#include <sys/stat.h> -#include <fcntl.h> -#include <unistd.h> -#include <errno.h> -#include <pciaccess.h> -#include <err.h> - -#ifndef DEFFILEMODE -#define DEFFILEMODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) /* 0666 */ -#endif - -static void __attribute__((noreturn)) usage(void) -{ - fprintf(stderr, "usage: bios_dumper <filename>\n"); - exit(1); -} - -int main(int argc, char **argv) -{ - struct pci_device *dev; - void *bios; - int error, fd; - - if (argc != 2) - usage(); - - error = pci_system_init(); - if (error != 0) { - fprintf(stderr, "Couldn't initialize PCI system: %s\n", - strerror(error)); - exit(1); - } - - /* Grab the graphics card */ - dev = pci_device_find_by_slot(0, 0, 2, 0); - if (dev == NULL) - errx(1, "Couldn't find graphics card"); - - error = pci_device_probe(dev); - if (error != 0) { - fprintf(stderr, "Couldn't probe graphics card: %s\n", - strerror(error)); - exit(1); - } - - if (dev->vendor_id != 0x8086) - errx(1, "Graphics card is non-intel"); - - /* Some versions of libpciaccess correct this automatically, but some - * don't. */ - if (dev->rom_size == 0) - dev->rom_size = 64 * 1024; - - bios = malloc(dev->rom_size); - if (bios == NULL) - errx(1, "Couldn't allocate memory for BIOS data\n"); - - error = pci_device_read_rom(dev, bios); - if (error != 0) { - fprintf(stderr, "Couldn't read graphics card ROM: %s\n", - strerror(error)); - exit(1); - } - - fd = open(argv[1], O_RDWR | O_CREAT | O_TRUNC, DEFFILEMODE); - if (fd < 0) { - fprintf(stderr, "Couldn't open output: %s\n", strerror(errno)); - exit(1); - } - - if (write(fd, bios, dev->rom_size) < dev->rom_size) { - fprintf(stderr, "Couldn't write BIOS data: %s\n", - strerror(errno)); - exit(1); - } - - close(fd); - pci_system_cleanup(); - - return 0; -} diff --git a/tools/intel_bios_reader.c b/tools/intel_bios_reader.c deleted file mode 100644 index 4fa47a90..00000000 --- a/tools/intel_bios_reader.c +++ /dev/null @@ -1,1322 +0,0 @@ -/* - * Copyright 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -#include <errno.h> -#include <fcntl.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <unistd.h> -#include <sys/mman.h> -#include <sys/stat.h> -#include <sys/types.h> - -#include "intel_bios.h" -#include "intel_io.h" -#include "intel_chipset.h" -#include "drmtest.h" - -static uint32_t devid = -1; - -/* no bother to include "edid.h" */ -#define _H_ACTIVE(x) (x[2] + ((x[4] & 0xF0) << 4)) -#define _H_SYNC_OFF(x) (x[8] + ((x[11] & 0xC0) << 2)) -#define _H_SYNC_WIDTH(x) (x[9] + ((x[11] & 0x30) << 4)) -#define _H_BLANK(x) (x[3] + ((x[4] & 0x0F) << 8)) -#define _V_ACTIVE(x) (x[5] + ((x[7] & 0xF0) << 4)) -#define _V_SYNC_OFF(x) ((x[10] >> 4) + ((x[11] & 0x0C) << 2)) -#define _V_SYNC_WIDTH(x) ((x[10] & 0x0F) + ((x[11] & 0x03) << 4)) -#define _V_BLANK(x) (x[6] + ((x[7] & 0x0F) << 8)) -#define _PIXEL_CLOCK(x) (x[0] + (x[1] << 8)) * 10000 - -uint8_t *VBIOS; - -#define INTEL_BIOS_8(_addr) (VBIOS[_addr]) -#define INTEL_BIOS_16(_addr) (VBIOS[_addr] | \ - (VBIOS[_addr + 1] << 8)) -#define INTEL_BIOS_32(_addr) (VBIOS[_addr] | \ - (VBIOS[_addr + 1] << 8) | \ - (VBIOS[_addr + 2] << 16) | \ - (VBIOS[_addr + 3] << 24)) - -#define YESNO(val) ((val) ? "yes" : "no") - -struct bdb_block { - uint8_t id; - uint16_t size; - void *data; -}; - -static const char * const seq_name[] = { - "UNDEFINED", - "MIPI_SEQ_ASSERT_RESET", - "MIPI_SEQ_INIT_OTP", - "MIPI_SEQ_DISPLAY_ON", - "MIPI_SEQ_DISPLAY_OFF", - "MIPI_SEQ_DEASSERT_RESET", -}; - -struct bdb_header *bdb; -struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; -static int tv_present; -static int lvds_present; -static int panel_type; - -static struct bdb_block *find_section(int section_id, int length) -{ - struct bdb_block *block; - unsigned char *base = (unsigned char *)bdb; - int idx = 0; - uint16_t total, current_size; - unsigned char current_id; - - /* skip to first section */ - idx += bdb->header_size; - total = bdb->bdb_size; - if (total > length) - total = length; - - block = malloc(sizeof(*block)); - if (!block) { - fprintf(stderr, "out of memory\n"); - exit(-1); - } - - /* walk the sections looking for section_id */ - while (idx + 3 < total) { - current_id = *(base + idx); - current_size = *(uint16_t *)(base + idx + 1); - if (idx + current_size > total) - return NULL; - - if (current_id == section_id) { - block->id = current_id; - block->size = current_size; - block->data = base + idx + 3; - return block; - } - - idx += current_size + 3; - } - - free(block); - return NULL; -} - -static void dump_general_features(const struct bdb_block *block) -{ - struct bdb_general_features *features = block->data; - - printf("\tPanel fitting: "); - switch (features->panel_fitting) { - case 0: - printf("disabled\n"); - break; - case 1: - printf("text only\n"); - break; - case 2: - printf("graphics only\n"); - break; - case 3: - printf("text & graphics\n"); - break; - } - printf("\tFlexaim: %s\n", YESNO(features->flexaim)); - printf("\tMessage: %s\n", YESNO(features->msg_enable)); - printf("\tClear screen: %d\n", features->clear_screen); - printf("\tDVO color flip required: %s\n", YESNO(features->color_flip)); - printf("\tExternal VBT: %s\n", YESNO(features->download_ext_vbt)); - printf("\tEnable SSC: %s\n", YESNO(features->enable_ssc)); - if (features->enable_ssc) { - if (HAS_PCH_SPLIT(devid)) - printf("\tSSC frequency: %s\n", features->ssc_freq ? - "100 MHz" : "120 MHz"); - else - printf("\tSSC frequency: %s\n", features->ssc_freq ? - "100 MHz (66 MHz on 855)" : "96 MHz (48 MHz on 855)"); - } - printf("\tLFP on override: %s\n", - YESNO(features->enable_lfp_on_override)); - printf("\tDisable SSC on clone: %s\n", - YESNO(features->disable_ssc_ddt)); - printf("\tDisable smooth vision: %s\n", - YESNO(features->disable_smooth_vision)); - printf("\tSingle DVI for CRT/DVI: %s\n", YESNO(features->single_dvi)); - printf("\tLegacy monitor detect: %s\n", - YESNO(features->legacy_monitor_detect)); - printf("\tIntegrated CRT: %s\n", YESNO(features->int_crt_support)); - printf("\tIntegrated TV: %s\n", YESNO(features->int_tv_support)); - - tv_present = 1; /* should be based on whether TV DAC exists */ - lvds_present = 1; /* should be based on IS_MOBILE() */ -} - -static void dump_backlight_info(const struct bdb_block *block) -{ - struct bdb_lvds_backlight *backlight = block->data; - struct blc_struct *blc; - - if (sizeof(struct blc_struct) != backlight->blcstruct_size) { - printf("\tBacklight struct sizes don't match (expected %zu, got %u), skipping\n", - sizeof(struct blc_struct), backlight->blcstruct_size); - return; - } - - blc = &backlight->panels[panel_type]; - - printf("\tInverter type: %d\n", blc->inverter_type); - printf("\t polarity: %d\n", blc->inverter_polarity); - printf("\t GPIO pins: %d\n", blc->gpio_pins); - printf("\t GMBUS speed: %d\n", blc->gmbus_speed); - printf("\t PWM freq: %d\n", blc->pwm_freq); - printf("\tMinimum brightness: %d\n", blc->min_brightness); - printf("\tI2C slave addr: 0x%02x\n", blc->i2c_slave_addr); - printf("\tI2C command: 0x%02x\n", blc->i2c_cmd); -} - -static const struct { - unsigned short type; - const char *name; -} child_device_types[] = { - { DEVICE_TYPE_NONE, "none" }, - { DEVICE_TYPE_CRT, "CRT" }, - { DEVICE_TYPE_TV, "TV" }, - { DEVICE_TYPE_EFP, "EFP" }, - { DEVICE_TYPE_LFP, "LFP" }, - { DEVICE_TYPE_CRT_DPMS, "CRT" }, - { DEVICE_TYPE_CRT_DPMS_HOTPLUG, "CRT" }, - { DEVICE_TYPE_TV_COMPOSITE, "TV composite" }, - { DEVICE_TYPE_TV_MACROVISION, "TV" }, - { DEVICE_TYPE_TV_RF_COMPOSITE, "TV" }, - { DEVICE_TYPE_TV_SVIDEO_COMPOSITE, "TV S-Video" }, - { DEVICE_TYPE_TV_SCART, "TV SCART" }, - { DEVICE_TYPE_TV_CODEC_HOTPLUG_PWR, "TV" }, - { DEVICE_TYPE_EFP_HOTPLUG_PWR, "EFP" }, - { DEVICE_TYPE_EFP_DVI_HOTPLUG_PWR, "DVI" }, - { DEVICE_TYPE_EFP_DVI_I, "DVI-I" }, - { DEVICE_TYPE_EFP_DVI_D_DUAL, "DL-DVI-D" }, - { DEVICE_TYPE_EFP_DVI_D_HDCP, "DVI-D" }, - { DEVICE_TYPE_OPENLDI_HOTPLUG_PWR, "OpenLDI" }, - { DEVICE_TYPE_OPENLDI_DUALPIX, "OpenLDI" }, - { DEVICE_TYPE_LFP_PANELLINK, "PanelLink" }, - { DEVICE_TYPE_LFP_CMOS_PWR, "CMOS LFP" }, - { DEVICE_TYPE_LFP_LVDS_PWR, "LVDS" }, - { DEVICE_TYPE_LFP_LVDS_DUAL, "LVDS" }, - { DEVICE_TYPE_LFP_LVDS_DUAL_HDCP, "LVDS" }, - { DEVICE_TYPE_INT_LFP, "LFP" }, - { DEVICE_TYPE_INT_TV, "TV" }, - { DEVICE_TYPE_DP, "DisplayPort" }, - { DEVICE_TYPE_DP_HDMI_DVI, "DisplayPort/HDMI/DVI" }, - { DEVICE_TYPE_DP_DVI, "DisplayPort/DVI" }, - { DEVICE_TYPE_HDMI_DVI, "HDMI/DVI" }, - { DEVICE_TYPE_DVI, "DVI" }, - { DEVICE_TYPE_eDP, "eDP" }, -}; -static const int num_child_device_types = - sizeof(child_device_types) / sizeof(child_device_types[0]); - -static const char *child_device_type(unsigned short type) -{ - int i; - - for (i = 0; i < num_child_device_types; i++) - if (child_device_types[i].type == type) - return child_device_types[i].name; - - return "unknown"; -} - -static const struct { - unsigned short type; - const char *name; -} efp_ports[] = { - { DEVICE_PORT_NONE, "N/A" }, - { DEVICE_PORT_HDMIB, "HDMI-B" }, - { DEVICE_PORT_HDMIC, "HDMI-C" }, - { DEVICE_PORT_HDMID, "HDMI-D" }, - { DEVICE_PORT_DPB, "DP-B" }, - { DEVICE_PORT_DPC, "DP-C" }, - { DEVICE_PORT_DPD, "DP-D" }, -}; -static const int num_efp_ports = sizeof(efp_ports) / sizeof(efp_ports[0]); - -static const char *efp_port(uint8_t type) -{ - int i; - - for (i = 0; i < num_efp_ports; i++) - if (efp_ports[i].type == type) - return efp_ports[i].name; - - return "unknown"; -} - -static const struct { - unsigned short type; - const char *name; -} efp_conn_info[] = { - { DEVICE_INFO_NONE, "N/A" }, - { DEVICE_INFO_HDMI_CERT, "HDMI certified" }, - { DEVICE_INFO_DP, "DisplayPort" }, - { DEVICE_INFO_DVI, "DVI" }, -}; -static const int num_efp_conn_info = sizeof(efp_conn_info) / sizeof(efp_conn_info[0]); - -static const char *efp_conn(uint8_t type) -{ - int i; - - for (i = 0; i < num_efp_conn_info; i++) - if (efp_conn_info[i].type == type) - return efp_conn_info[i].name; - - return "unknown"; -} - - - -static void dump_child_device(struct child_device_config *child) -{ - char child_id[11]; - - if (!child->device_type) - return; - - if (bdb->version < 152) { - strncpy(child_id, (char *)child->device_id, 10); - child_id[10] = 0; - - printf("\tChild device info:\n"); - printf("\t\tDevice type: %04x (%s)\n", child->device_type, - child_device_type(child->device_type)); - printf("\t\tSignature: %s\n", child_id); - printf("\t\tAIM offset: %d\n", child->addin_offset); - printf("\t\tDVO port: 0x%02x\n", child->dvo_port); - } else { /* 152+ have EFP blocks here */ - struct efp_child_device_config *efp = - (struct efp_child_device_config *)child; - printf("\tEFP device info:\n"); - printf("\t\tDevice type: 0x%04x (%s)\n", efp->device_type, - child_device_type(efp->device_type)); - printf("\t\tPort: 0x%02x (%s)\n", efp->port, - efp_port(efp->port)); - printf("\t\tDDC pin: 0x%02x\n", efp->ddc_pin); - printf("\t\tDock port: 0x%02x (%s)\n", efp->docked_port, - efp_port(efp->docked_port)); - printf("\t\tHDMI compatible? %s\n", efp->hdmi_compat ? "Yes" : "No"); - printf("\t\tInfo: %s\n", efp_conn(efp->conn_info)); - printf("\t\tAux channel: 0x%02x\n", efp->aux_chan); - printf("\t\tDongle detect: 0x%02x\n", efp->dongle_detect); - } -} - -static void dump_general_definitions(const struct bdb_block *block) -{ - struct bdb_general_definitions *defs = block->data; - struct child_device_config *child; - int i; - int child_device_num; - - printf("\tCRT DDC GMBUS addr: 0x%02x\n", defs->crt_ddc_gmbus_pin); - printf("\tUse ACPI DPMS CRT power states: %s\n", - YESNO(defs->dpms_acpi)); - printf("\tSkip CRT detect at boot: %s\n", - YESNO(defs->skip_boot_crt_detect)); - printf("\tUse DPMS on AIM devices: %s\n", YESNO(defs->dpms_aim)); - printf("\tBoot display type: 0x%02x%02x\n", defs->boot_display[1], - defs->boot_display[0]); - printf("\tTV data block present: %s\n", YESNO(tv_present)); - child_device_num = (block->size - sizeof(*defs)) / sizeof(*child); - for (i = 0; i < child_device_num; i++) - dump_child_device(&defs->devices[i]); -} - -static void dump_child_devices(const struct bdb_block *block) -{ - struct bdb_child_devices *child_devs = block->data; - struct child_device_config *child; - int i; - - for (i = 0; i < DEVICE_CHILD_SIZE; i++) { - child = &child_devs->children[i]; - /* Skip nonexistent children */ - if (!child->device_type) - continue; - printf("\tChild device %d\n", i); - printf("\t\tType: 0x%04x (%s)\n", child->device_type, - child_device_type(child->device_type)); - printf("\t\tDVO port: 0x%02x\n", child->dvo_port); - printf("\t\tI2C pin: 0x%02x\n", child->i2c_pin); - printf("\t\tSlave addr: 0x%02x\n", child->slave_addr); - printf("\t\tDDC pin: 0x%02x\n", child->ddc_pin); - printf("\t\tDVO config: 0x%02x\n", child->dvo_cfg); - printf("\t\tDVO wiring: 0x%02x\n", child->dvo_wiring); - } -} - -static void dump_lvds_options(const struct bdb_block *block) -{ - struct bdb_lvds_options *options = block->data; - - panel_type = options->panel_type; - printf("\tPanel type: %d\n", panel_type); - printf("\tLVDS EDID available: %s\n", YESNO(options->lvds_edid)); - printf("\tPixel dither: %s\n", YESNO(options->pixel_dither)); - printf("\tPFIT auto ratio: %s\n", YESNO(options->pfit_ratio_auto)); - printf("\tPFIT enhanced graphics mode: %s\n", - YESNO(options->pfit_gfx_mode_enhanced)); - printf("\tPFIT enhanced text mode: %s\n", - YESNO(options->pfit_text_mode_enhanced)); - printf("\tPFIT mode: %d\n", options->pfit_mode); -} - -static void dump_lvds_ptr_data(const struct bdb_block *block) -{ - struct bdb_lvds_lfp_data_ptrs *ptrs = block->data; - - printf("\tNumber of entries: %d\n", ptrs->lvds_entries); - - /* save for use by dump_lvds_data() */ - lvds_lfp_data_ptrs = ptrs; -} - -static void dump_lvds_data(const struct bdb_block *block) -{ - struct bdb_lvds_lfp_data *lvds_data = block->data; - struct bdb_lvds_lfp_data_ptrs *ptrs = lvds_lfp_data_ptrs; - int num_entries; - int i; - int hdisplay, hsyncstart, hsyncend, htotal; - int vdisplay, vsyncstart, vsyncend, vtotal; - float clock; - int lfp_data_size, dvo_offset; - - if (!ptrs) { - printf("No LVDS ptr block\n"); - return; - } - - lfp_data_size = - ptrs->ptr[1].fp_timing_offset - ptrs->ptr[0].fp_timing_offset; - dvo_offset = - ptrs->ptr[0].dvo_timing_offset - ptrs->ptr[0].fp_timing_offset; - - num_entries = block->size / lfp_data_size; - - printf(" Number of entries: %d (preferred block marked with '*')\n", - num_entries); - - for (i = 0; i < num_entries; i++) { - uint8_t *lfp_data_ptr = - (uint8_t *) lvds_data->data + lfp_data_size * i; - uint8_t *timing_data = lfp_data_ptr + dvo_offset; - struct bdb_lvds_lfp_data_entry *lfp_data = - (struct bdb_lvds_lfp_data_entry *)lfp_data_ptr; - char marker; - - if (i == panel_type) - marker = '*'; - else - marker = ' '; - - hdisplay = _H_ACTIVE(timing_data); - hsyncstart = hdisplay + _H_SYNC_OFF(timing_data); - hsyncend = hsyncstart + _H_SYNC_WIDTH(timing_data); - htotal = hdisplay + _H_BLANK(timing_data); - - vdisplay = _V_ACTIVE(timing_data); - vsyncstart = vdisplay + _V_SYNC_OFF(timing_data); - vsyncend = vsyncstart + _V_SYNC_WIDTH(timing_data); - vtotal = vdisplay + _V_BLANK(timing_data); - clock = _PIXEL_CLOCK(timing_data) / 1000; - - printf("%c\tpanel type %02i: %dx%d clock %d\n", marker, - i, lfp_data->fp_timing.x_res, lfp_data->fp_timing.y_res, - _PIXEL_CLOCK(timing_data)); - printf("\t\tinfo:\n"); - printf("\t\t LVDS: 0x%08lx\n", - (unsigned long)lfp_data->fp_timing.lvds_reg_val); - printf("\t\t PP_ON_DELAYS: 0x%08lx\n", - (unsigned long)lfp_data->fp_timing.pp_on_reg_val); - printf("\t\t PP_OFF_DELAYS: 0x%08lx\n", - (unsigned long)lfp_data->fp_timing.pp_off_reg_val); - printf("\t\t PP_DIVISOR: 0x%08lx\n", - (unsigned long)lfp_data->fp_timing.pp_cycle_reg_val); - printf("\t\t PFIT: 0x%08lx\n", - (unsigned long)lfp_data->fp_timing.pfit_reg_val); - printf("\t\ttimings: %d %d %d %d %d %d %d %d %.2f (%s)\n", - hdisplay, hsyncstart, hsyncend, htotal, - vdisplay, vsyncstart, vsyncend, vtotal, clock, - (hsyncend > htotal || vsyncend > vtotal) ? - "BAD!" : "good"); - } -} - -static void dump_driver_feature(const struct bdb_block *block) -{ - struct bdb_driver_feature *feature = block->data; - - printf("\tBoot Device Algorithm: %s\n", feature->boot_dev_algorithm ? - "driver default" : "os default"); - printf("\tBlock display switching when DVD active: %s\n", - YESNO(feature->block_display_switch)); - printf("\tAllow display switching when in Full Screen DOS: %s\n", - YESNO(feature->allow_display_switch)); - printf("\tHot Plug DVO: %s\n", YESNO(feature->hotplug_dvo)); - printf("\tDual View Zoom: %s\n", YESNO(feature->dual_view_zoom)); - printf("\tDriver INT 15h hook: %s\n", YESNO(feature->int15h_hook)); - printf("\tEnable Sprite in Clone Mode: %s\n", - YESNO(feature->sprite_in_clone)); - printf("\tUse 00000110h ID for Primary LFP: %s\n", - YESNO(feature->primary_lfp_id)); - printf("\tBoot Mode X: %u\n", feature->boot_mode_x); - printf("\tBoot Mode Y: %u\n", feature->boot_mode_y); - printf("\tBoot Mode Bpp: %u\n", feature->boot_mode_bpp); - printf("\tBoot Mode Refresh: %u\n", feature->boot_mode_refresh); - printf("\tEnable LFP as primary: %s\n", - YESNO(feature->enable_lfp_primary)); - printf("\tSelective Mode Pruning: %s\n", - YESNO(feature->selective_mode_pruning)); - printf("\tDual-Frequency Graphics Technology: %s\n", - YESNO(feature->dual_frequency)); - printf("\tDefault Render Clock Frequency: %s\n", - feature->render_clock_freq ? "low" : "high"); - printf("\tNT 4.0 Dual Display Clone Support: %s\n", - YESNO(feature->nt_clone_support)); - printf("\tDefault Power Scheme user interface: %s\n", - feature->power_scheme_ui ? "3rd party" : "CUI"); - printf - ("\tSprite Display Assignment when Overlay is Active in Clone Mode: %s\n", - feature->sprite_display_assign ? "primary" : "secondary"); - printf("\tDisplay Maintain Aspect Scaling via CUI: %s\n", - YESNO(feature->cui_aspect_scaling)); - printf("\tPreserve Aspect Ratio: %s\n", - YESNO(feature->preserve_aspect_ratio)); - printf("\tEnable SDVO device power down: %s\n", - YESNO(feature->sdvo_device_power_down)); - printf("\tCRT hotplug: %s\n", YESNO(feature->crt_hotplug)); - printf("\tLVDS config: "); - switch (feature->lvds_config) { - case BDB_DRIVER_NO_LVDS: - printf("No LVDS\n"); - break; - case BDB_DRIVER_INT_LVDS: - printf("Integrated LVDS\n"); - break; - case BDB_DRIVER_SDVO_LVDS: - printf("SDVO LVDS\n"); - break; - case BDB_DRIVER_EDP: - printf("Embedded DisplayPort\n"); - break; - } - printf("\tDefine Display statically: %s\n", - YESNO(feature->static_display)); - printf("\tLegacy CRT max X: %d\n", feature->legacy_crt_max_x); - printf("\tLegacy CRT max Y: %d\n", feature->legacy_crt_max_y); - printf("\tLegacy CRT max refresh: %d\n", - feature->legacy_crt_max_refresh); -} - -static void dump_edp(const struct bdb_block *block) -{ - struct bdb_edp *edp = block->data; - int bpp, msa; - int i; - - for (i = 0; i < 16; i++) { - printf("\tPanel %d%s\n", i, panel_type == i ? " *" : ""); - - printf("\t\tPower Sequence: T3 %d T7 %d T9 %d T10 %d T12 %d\n", - edp->power_seqs[i].t3, - edp->power_seqs[i].t7, - edp->power_seqs[i].t9, - edp->power_seqs[i].t10, - edp->power_seqs[i].t12); - - bpp = (edp->color_depth >> (i * 2)) & 3; - - printf("\t\tPanel color depth: "); - switch (bpp) { - case EDP_18BPP: - printf("18 bpp\n"); - break; - case EDP_24BPP: - printf("24 bpp\n"); - break; - case EDP_30BPP: - printf("30 bpp\n"); - break; - default: - printf("(unknown value %d)\n", bpp); - break; - } - - msa = (edp->sdrrs_msa_timing_delay >> (i * 2)) & 3; - printf("\t\teDP sDRRS MSA Delay: Lane %d\n", msa + 1); - - printf("\t\tLink params:\n"); - printf("\t\t\trate: "); - if (edp->link_params[i].rate == EDP_RATE_1_62) - printf("1.62G\n"); - else if (edp->link_params[i].rate == EDP_RATE_2_7) - printf("2.7G\n"); - printf("\t\t\tlanes: "); - switch (edp->link_params[i].lanes) { - case EDP_LANE_1: - printf("x1 mode\n"); - break; - case EDP_LANE_2: - printf("x2 mode\n"); - break; - case EDP_LANE_4: - printf("x4 mode\n"); - break; - default: - printf("(unknown value %d)\n", - edp->link_params[i].lanes); - break; - } - printf("\t\t\tpre-emphasis: "); - switch (edp->link_params[i].preemphasis) { - case EDP_PREEMPHASIS_NONE: - printf("none\n"); - break; - case EDP_PREEMPHASIS_3_5dB: - printf("3.5dB\n"); - break; - case EDP_PREEMPHASIS_6dB: - printf("6dB\n"); - break; - case EDP_PREEMPHASIS_9_5dB: - printf("9.5dB\n"); - break; - default: - printf("(unknown value %d)\n", - edp->link_params[i].preemphasis); - break; - } - printf("\t\t\tvswing: "); - switch (edp->link_params[i].vswing) { - case EDP_VSWING_0_4V: - printf("0.4V\n"); - break; - case EDP_VSWING_0_6V: - printf("0.6V\n"); - break; - case EDP_VSWING_0_8V: - printf("0.8V\n"); - break; - case EDP_VSWING_1_2V: - printf("1.2V\n"); - break; - default: - printf("(unknown value %d)\n", - edp->link_params[i].vswing); - break; - } - } -} - -static void -print_detail_timing_data(struct lvds_dvo_timing2 *dvo_timing) -{ - int display, sync_start, sync_end, total; - - display = (dvo_timing->hactive_hi << 8) | dvo_timing->hactive_lo; - sync_start = display + - ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); - sync_end = sync_start + dvo_timing->hsync_pulse_width; - total = display + - ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); - printf("\thdisplay: %d\n", display); - printf("\thsync [%d, %d] %s\n", sync_start, sync_end, - dvo_timing->hsync_positive ? "+sync" : "-sync"); - printf("\thtotal: %d\n", total); - - display = (dvo_timing->vactive_hi << 8) | dvo_timing->vactive_lo; - sync_start = display + dvo_timing->vsync_off; - sync_end = sync_start + dvo_timing->vsync_pulse_width; - total = display + - ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); - printf("\tvdisplay: %d\n", display); - printf("\tvsync [%d, %d] %s\n", sync_start, sync_end, - dvo_timing->vsync_positive ? "+sync" : "-sync"); - printf("\tvtotal: %d\n", total); - - printf("\tclock: %d\n", dvo_timing->clock * 10); -} - -static void dump_sdvo_panel_dtds(const struct bdb_block *block) -{ - struct lvds_dvo_timing2 *dvo_timing = block->data; - int n, count; - - count = block->size / sizeof(struct lvds_dvo_timing2); - for (n = 0; n < count; n++) { - printf("%d:\n", n); - print_detail_timing_data(dvo_timing++); - } -} - -static void dump_sdvo_lvds_options(const struct bdb_block *block) -{ - struct bdb_sdvo_lvds_options *options = block->data; - - printf("\tbacklight: %d\n", options->panel_backlight); - printf("\th40 type: %d\n", options->h40_set_panel_type); - printf("\ttype: %d\n", options->panel_type); - printf("\tssc_clk_freq: %d\n", options->ssc_clk_freq); - printf("\tals_low_trip: %d\n", options->als_low_trip); - printf("\tals_high_trip: %d\n", options->als_high_trip); - /* - u8 sclalarcoeff_tab_row_num; - u8 sclalarcoeff_tab_row_size; - u8 coefficient[8]; - */ - printf("\tmisc[0]: %x\n", options->panel_misc_bits_1); - printf("\tmisc[1]: %x\n", options->panel_misc_bits_2); - printf("\tmisc[2]: %x\n", options->panel_misc_bits_3); - printf("\tmisc[3]: %x\n", options->panel_misc_bits_4); -} - -static void dump_mipi_config(const struct bdb_block *block) -{ - struct bdb_mipi_config *start = block->data; - struct mipi_config *config; - struct mipi_pps_data *pps; - - config = &start->config[panel_type]; - pps = &start->pps[panel_type]; - - printf("\tGeneral Param\n"); - printf("\t\t BTA disable: %s\n", config->bta ? "Disabled" : "Enabled"); - - printf("\t\t Video Mode Color Format: "); - if (config->videomode_color_format == 0) - printf("Not supported\n"); - else if (config->videomode_color_format == 1) - printf("RGB565\n"); - else if (config->videomode_color_format == 2) - printf("RGB666\n"); - else if (config->videomode_color_format == 3) - printf("RGB666 Loosely Packed\n"); - else if (config->videomode_color_format == 4) - printf("RGB888\n"); - printf("\t\t PPS GPIO Pins: %s \n", config->pwm_blc ? "Using SOC" : "Using PMIC"); - printf("\t\t CABC Support: %s\n", config->cabc ? "supported" : "not supported"); - //insert video mode type - printf("\t\t Mode: %s\n", config->cmd_mode ? "COMMAND" : "VIDEO"); - printf("\t\t Dithering: %s\n", config->dithering ? "done in Display Controller" : "done in Panel Controller"); - - printf("\tPort Desc\n"); - //insert pixel overlap count - printf("\t\t Lane Count: %d\n", config->lane_cnt + 1); - printf("\t\t Dual Link Support: "); - if (config->dual_link == 0) - printf("not supported\n"); - else if (config->dual_link == 1) - printf("Front Back mode\n"); - else - printf("Pixel Alternative Mode\n"); - - printf("\tDphy Flags\n"); - printf("\t\t Clock Stop: %s\n", config->clk_stop ? "ENABLED" : "DISABLED"); - printf("\t\t EOT disabled: %s\n\n", config->eot_disabled ? "EOT not to be sent" : "EOT to be sent"); - - printf("\tHSTxTimeOut: 0x%x\n", config->hs_tx_timeout); - printf("\tLPRXTimeOut: 0x%x\n", config->lp_rx_timeout); - printf("\tTurnAroundTimeOut: 0x%x\n", config->turn_around_timeout); - printf("\tDeviceResetTimer: 0x%x\n", config->device_reset_timer); - printf("\tMasterinitTimer: 0x%x\n", config->master_init_timer); - printf("\tDBIBandwidthTimer: 0x%x\n", config->dbi_bw_timer); - printf("\tLpByteClkValue: 0x%x\n\n", config->lp_byte_clk_val); - - printf("\tDphy Params\n"); - printf("\t\tExit to zero Count: 0x%x\n", config->exit_zero_cnt); - printf("\t\tTrail Count: 0x%X\n", config->trail_cnt); - printf("\t\tClk zero count: 0x%x\n", config->clk_zero_cnt); - printf("\t\tPrepare count:0x%x\n\n", config->prepare_cnt); - - printf("\tClockLaneSwitchingCount: 0x%x\n", config->clk_lane_switch_cnt); - printf("\tHighToLowSwitchingCount: 0x%x\n\n", config->hl_switch_cnt); - - printf("\tTimings based on Dphy spec\n"); - printf("\t\tTClkMiss: 0x%x\n", config->tclk_miss); - printf("\t\tTClkPost: 0x%x\n", config->tclk_post); - printf("\t\tTClkPre: 0x%x\n", config->tclk_pre); - printf("\t\tTClkPrepare: 0x%x\n", config->tclk_prepare); - printf("\t\tTClkSettle: 0x%x\n", config->tclk_settle); - printf("\t\tTClkTermEnable: 0x%x\n\n", config->tclk_term_enable); - - printf("\tTClkTrail: 0x%x\n", config->tclk_trail); - printf("\tTClkPrepareTClkZero: 0x%x\n", config->tclk_prepare_clkzero); - printf("\tTHSExit: 0x%x\n", config->ths_exit); - printf("\tTHsPrepare: 0x%x\n", config->ths_prepare); - printf("\tTHsPrepareTHsZero: 0x%x\n", config->ths_prepare_hszero); - printf("\tTHSSettle: 0x%x\n", config->ths_settle); - printf("\tTHSSkip: 0x%x\n", config->ths_skip); - printf("\tTHsTrail: 0x%x\n", config->ths_trail); - printf("\tTInit: 0x%x\n", config->tinit); - printf("\tTLPX: 0x%x\n", config->tlpx); - - printf("\tMIPI PPS\n"); - printf("\t\tPanel power ON delay: %d\n", pps->panel_on_delay); - printf("\t\tPanel power on to Baklight enable delay: %d\n", pps->bl_enable_delay); - printf("\t\tBacklight disable to Panel power OFF delay: %d\n", pps->bl_disable_delay); - printf("\t\tPanel power OFF delay: %d\n", pps->panel_off_delay); - printf("\t\tPanel power cycle delay: %d\n", pps->panel_power_cycle_delay); -} - -static uint8_t *mipi_dump_send_packet(uint8_t *data) -{ - uint8_t type, byte, count; - uint16_t len; - - byte = *data++; - /* get packet type and increment the pointer */ - type = *data++; - - len = *((uint16_t *) data); - data += 2; - printf("\t\t SEND COMMAND: "); - printf("0x%x 0x%x 0x%x", byte, type, len); - for (count = 0; count < len; count++) - printf(" 0x%x",*(data+count)); - printf("\n"); - data += len; - return data; -} - -static uint8_t *mipi_dump_delay(uint8_t *data) -{ - printf("\t\t Delay : 0x%x 0x%x 0x%x 0x%x\n", data[0], data[1], data[2], data[3]); - data += 4; - return data; -} - -static uint8_t *mipi_dump_gpio(uint8_t *data) -{ - uint8_t gpio, action; - - printf("\t\t GPIO value:"); - gpio = *data++; - - /* pull up/down */ - action = *data++; - printf(" 0x%x 0x%x\n", gpio, action); - return data; -} - -typedef uint8_t * (*fn_mipi_elem_dump)(uint8_t *data); - -static const fn_mipi_elem_dump dump_elem[] = { - NULL, /* reserved */ - mipi_dump_send_packet, - mipi_dump_delay, - mipi_dump_gpio, - NULL, /* status read; later */ -}; - -static void dump_sequence(uint8_t *sequence) -{ - uint8_t *data = sequence; - fn_mipi_elem_dump mipi_elem_dump; - int index_no; - - if (!sequence) - return; - - printf("\tSequence Name: %s\n", seq_name[*data]); - - /* go to the first element of the sequence */ - data++; - - /* parse each byte till we reach end of sequence byte - 0x00 */ - while (1) { - index_no = *data; - mipi_elem_dump = dump_elem[index_no]; - if (!mipi_elem_dump) { - printf("Error: Unsupported MIPI element, skipping sequence execution\n"); - return; - } - /* goto element payload */ - data++; - - /* execute the element specifc rotines */ - data = mipi_elem_dump(data); - - /* - * After processing the element, data should point to - * next element or end of sequence - * check if have we reached end of sequence - */ - - if (*data == 0x00) - break; - } -} - -static uint8_t *goto_next_sequence(uint8_t *data, int *size) -{ - uint16_t len; - int tmp = *size; - - if (--tmp < 0) - return NULL; - - /* goto first element */ - data++; - while (1) { - switch (*data) { - case MIPI_SEQ_ELEM_SEND_PKT: - /* - * skip by this element payload size - * skip elem id, command flag and data type - */ - tmp -= 5; - if (tmp < 0) - return NULL; - - data += 3; - len = *((uint16_t *)data); - - tmp -= len; - if (tmp < 0) - return NULL; - - /* skip by len */ - data = data + 2 + len; - break; - case MIPI_SEQ_ELEM_DELAY: - /* skip by elem id, and delay is 4 bytes */ - tmp -= 5; - if (tmp < 0) - return NULL; - - data += 5; - break; - case MIPI_SEQ_ELEM_GPIO: - tmp -= 3; - if (tmp < 0) - return NULL; - - data += 3; - break; - default: - printf("Unknown element\n"); - return NULL; - } - - /* end of sequence ? */ - if (*data == 0) - break; - } - - /* goto next sequence or end of block byte */ - if (--tmp < 0) - return NULL; - - data++; - - /* update amount of data left for the sequence block to be parsed */ - *size = tmp; - return data; -} - -static uint16_t get_blocksize(void *p) -{ - uint16_t *block_ptr, block_size; - - block_ptr = (uint16_t *)((char *)p - 2); - block_size = *block_ptr; - return block_size; -} - -static void dump_mipi_sequence(const struct bdb_block *block) -{ - struct bdb_mipi_sequence *sequence = block->data; - uint8_t *data, *seq_data; - int i, panel_id, seq_size; - uint16_t block_size; - - /* Check if we have sequence block as well */ - if (!sequence) { - printf("No MIPI Sequence found\n"); - return; - } - - block_size = get_blocksize(sequence); - - /* - * parse the sequence block for individual sequences - */ - seq_data = &sequence->data[0]; - - /* - * sequence block is variable length and hence we need to parse and - * get the sequence data for specific panel id - */ - for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) { - panel_id = *seq_data; - seq_size = *((uint16_t *) (seq_data + 1)); - if (panel_id == panel_type) - break; - - /* skip the sequence including seq header of 3 bytes */ - seq_data = seq_data + 3 + seq_size; - if ((seq_data - &sequence->data[0]) > block_size) { - printf("Sequence start is beyond sequence block size, corrupted sequence block\n"); - return; - } - } - - if (i == MAX_MIPI_CONFIGURATIONS) { - printf("Sequence block detected but no valid configuration\n"); - return; - } - - /* check if found sequence is completely within the sequence block - * just being paranoid */ - if (seq_size > block_size) { - printf("Corrupted sequence/size, bailing out\n"); - return; - } - - /* skip the panel id(1 byte) and seq size(2 bytes) */ - data = (uint8_t *) calloc(1, seq_size); - if (data) - memmove(data, seq_data + 3, seq_size); - else { - printf("Memory not allocated for sequence data\n"); - return; - } - /* - * loop into the sequence data and split into multiple sequneces - * There are only 5 types of sequences as of now - */ - - /* two consecutive 0x00 indicate end of all sequences */ - while (1) { - int seq_id = *data; - if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) - dump_sequence(data); - else { - printf("Error:undefined sequence\n"); - goto err; - } - - /* partial parsing to skip elements */ - data = goto_next_sequence(data, &seq_size); - - if (data == NULL) { - printf("Sequence elements going beyond block itself. Sequence block parsing failed\n"); - goto err; - } - - if (*data == 0) - break; /* end of sequence reached */ - } - return; - -err: - free(data); - data = NULL; -} - - -static int -get_device_id(unsigned char *bios) -{ - int device; - int offset = (bios[0x19] << 8) + bios[0x18]; - - if (bios[offset] != 'P' || - bios[offset+1] != 'C' || - bios[offset+2] != 'I' || - bios[offset+3] != 'R') - return -1; - - device = (bios[offset+7] << 8) + bios[offset+6]; - - return device; -} - -struct dumper { - uint8_t id; - const char *name; - void (*dump)(const struct bdb_block *block); -}; - -struct dumper dumpers[] = { - { - .id = BDB_GENERAL_FEATURES, - .name = "General features block", - .dump = dump_general_features, - }, - { - .id = BDB_GENERAL_DEFINITIONS, - .name = "General definitions block", - .dump = dump_general_definitions, - }, - { - .id = BDB_CHILD_DEVICE_TABLE, - .name = "Child devices block", - .dump = dump_child_devices, - }, - { - .id = BDB_LVDS_OPTIONS, - .name = "LVDS options block", - .dump = dump_lvds_options, - }, - { - .id = BDB_LVDS_LFP_DATA_PTRS, - .name = "LVDS timing pointer data", - .dump = dump_lvds_ptr_data, - }, - { - .id = BDB_LVDS_LFP_DATA, - .name = "LVDS panel data block", - .dump = dump_lvds_data, - }, - { - .id = BDB_LVDS_BACKLIGHT, - .name = "Backlight info block", - .dump = dump_backlight_info, - }, - { - .id = BDB_SDVO_LVDS_OPTIONS, - .name = "SDVO LVDS options block", - .dump = dump_sdvo_lvds_options, - }, - { - .id = BDB_SDVO_PANEL_DTDS, - .name = "SDVO panel dtds", - .dump = dump_sdvo_panel_dtds, - }, - { - .id = BDB_DRIVER_FEATURES, - .name = "Driver feature data block", - .dump = dump_driver_feature, - }, - { - .id = BDB_EDP, - .name = "eDP block", - .dump = dump_edp, - }, - { - .id = BDB_MIPI_CONFIG, - .name = "MIPI configuration block", - .dump = dump_mipi_config, - }, - { - .id = BDB_MIPI_SEQUENCE, - .name = "MIPI sequence block", - .dump = dump_mipi_sequence, - }, -}; - -static void hex_dump(const struct bdb_block *block) -{ - int i; - uint8_t *p = block->data; - - for (i = 0; i < block->size; i++) { - if (i % 16 == 0) - printf("\t%04x: ", i); - printf("%02x", p[i]); - if (i % 16 == 15) { - if (i + 1 < block->size) - printf("\n"); - } else if (i % 8 == 7) { - printf(" "); - } else { - printf(" "); - } - } - printf("\n\n"); -} - -static void dump_section(int section_id, int size) -{ - struct dumper *dumper = NULL; - const struct bdb_block *block; - static int done[256]; - int i; - - if (done[section_id]) - return; - done[section_id] = 1; - - block = find_section(section_id, size); - if (!block) - return; - - for (i = 0; i < ARRAY_SIZE(dumpers); i++) { - if (block->id == dumpers[i].id) { - dumper = &dumpers[i]; - break; - } - } - - if (dumper && dumper->name) - printf("BDB block %d - %s:\n", block->id, dumper->name); - else - printf("BDB block %d:\n", block->id); - - hex_dump(block); - if (dumper && dumper->dump) - dumper->dump(block); - printf("\n"); -} - -int main(int argc, char **argv) -{ - int fd; - struct vbt_header *vbt = NULL; - int vbt_off, bdb_off, i; - const char *filename = "bios"; - struct stat finfo; - int size; - struct bdb_block *block; - char signature[17]; - char *devid_string; - - if (argc != 2) { - printf("usage: %s <rom file>\n", argv[0]); - return 1; - } - - if ((devid_string = getenv("DEVICE"))) - devid = strtoul(devid_string, NULL, 0); - - filename = argv[1]; - - fd = open(filename, O_RDONLY); - if (fd == -1) { - printf("Couldn't open \"%s\": %s\n", filename, strerror(errno)); - return 1; - } - - if (stat(filename, &finfo)) { - printf("failed to stat \"%s\": %s\n", filename, - strerror(errno)); - return 1; - } - size = finfo.st_size; - - if (size == 0) { - int len = 0, ret; - size = 8192; - VBIOS = malloc (size); - while ((ret = read(fd, VBIOS + len, size - len))) { - if (ret < 0) { - printf("failed to read \"%s\": %s\n", filename, - strerror(errno)); - return 1; - } - - len += ret; - if (len == size) { - size *= 2; - VBIOS = realloc(VBIOS, size); - } - } - } else { - VBIOS = mmap(NULL, size, PROT_READ, MAP_SHARED, fd, 0); - if (VBIOS == MAP_FAILED) { - printf("failed to map \"%s\": %s\n", filename, strerror(errno)); - return 1; - } - } - - /* Scour memory looking for the VBT signature */ - for (i = 0; i + 4 < size; i++) { - if (!memcmp(VBIOS + i, "$VBT", 4)) { - vbt_off = i; - vbt = (struct vbt_header *)(VBIOS + i); - break; - } - } - - if (!vbt) { - printf("VBT signature missing\n"); - return 1; - } - - printf("VBT vers: %d.%d\n", vbt->version / 100, vbt->version % 100); - - bdb_off = vbt_off + vbt->bdb_offset; - if (bdb_off >= size - sizeof(struct bdb_header)) { - printf("Invalid VBT found, BDB points beyond end of data block\n"); - return 1; - } - - bdb = (struct bdb_header *)(VBIOS + bdb_off); - strncpy(signature, (char *)bdb->signature, 16); - signature[16] = 0; - printf("BDB sig: %s\n", signature); - printf("BDB vers: %d\n", bdb->version); - - printf("Available sections: "); - - for (i = 0; i < 256; i++) { - block = find_section(i, size); - if (!block) - continue; - printf("%d ", i); - free(block); - } - printf("\n"); - - if (devid == -1) - devid = get_device_id(VBIOS); - if (devid == -1) - printf("Warning: could not find PCI device ID!\n"); - - dump_section(BDB_GENERAL_FEATURES, size); - dump_section(BDB_GENERAL_DEFINITIONS, size); - dump_section(BDB_CHILD_DEVICE_TABLE, size); - dump_section(BDB_LVDS_OPTIONS, size); - dump_section(BDB_LVDS_LFP_DATA_PTRS, size); - dump_section(BDB_LVDS_LFP_DATA, size); - dump_section(BDB_LVDS_BACKLIGHT, size); - - dump_section(BDB_SDVO_LVDS_OPTIONS, size); - dump_section(BDB_SDVO_PANEL_DTDS, size); - - dump_section(BDB_DRIVER_FEATURES, size); - dump_section(BDB_EDP, size); - dump_section(BDB_MIPI_CONFIG, size); - dump_section(BDB_MIPI_SEQUENCE, size); - - for (i = 0; i < 256; i++) - dump_section(i, size); - - return 0; -} diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c deleted file mode 100644 index 2eab6c49..00000000 --- a/tools/intel_display_poller.c +++ /dev/null @@ -1,1469 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - */ - -#include <assert.h> -#include <fcntl.h> -#include <getopt.h> -#include <unistd.h> -#include <signal.h> -#include <stdbool.h> -#include <stdlib.h> -#include <stdio.h> -#include <err.h> -#include <string.h> -#include "intel_chipset.h" -#include "intel_io.h" -#include "igt_debugfs.h" -#include "drmtest.h" -#include "igt_aux.h" - -enum test { - TEST_INVALID, - TEST_PIPESTAT, - TEST_IIR, - TEST_IIR_GEN2, - TEST_IIR_GEN3, - TEST_DEIIR, - TEST_FRAMECOUNT, - TEST_FRAMECOUNT_GEN3, - TEST_FRAMECOUNT_G4X, - TEST_FLIPCOUNT, - TEST_PAN, - TEST_FLIP, - TEST_SURFLIVE, - TEST_WRAP, - TEST_FIELD, -}; - -static uint32_t vlv_offset; - -static volatile bool quit; - -static void sighandler(int x) -{ - quit = true; -} - -static uint16_t read_reg_16(uint32_t reg) -{ - return *(volatile uint16_t *)((volatile char*)mmio + vlv_offset + reg); -} - -static uint32_t read_reg(uint32_t reg) -{ - return *(volatile uint32_t *)((volatile char*)mmio + vlv_offset + reg); -} - -static void write_reg_16(uint32_t reg, uint16_t val) -{ - *(volatile uint16_t *)((volatile char*)mmio + vlv_offset + reg) = val; -} - -static void write_reg(uint32_t reg, uint32_t val) -{ - *(volatile uint32_t *)((volatile char*)mmio + vlv_offset + reg) = val; -} - -static int pipe_to_plane(uint32_t devid, int pipe) -{ - if (!IS_GEN2(devid) && !IS_GEN3(devid)) - return pipe; - - switch (pipe) { - case 0: - if ((read_reg(DSPACNTR) & DISPPLANE_SEL_PIPE_MASK) == DISPPLANE_SEL_PIPE_B) - return 1; - return 0; - case 1: - if ((read_reg(DSPACNTR) & DISPPLANE_SEL_PIPE_MASK) == DISPPLANE_SEL_PIPE_A) - return 0; - return 1; - } - - assert(0); - - return 0; -} - -static uint32_t dspoffset_reg(uint32_t devid, int pipe) -{ - bool use_tileoff; - - pipe = pipe_to_plane(devid, pipe); - - if (IS_GEN2(devid) || IS_GEN3(devid)) - use_tileoff = false; - if (IS_HASWELL(devid) || IS_BROADWELL(devid)) - use_tileoff = true; - else { - switch (pipe) { - case 0: - use_tileoff = read_reg(DSPACNTR) & DISPLAY_PLANE_TILED; - break; - case 1: - use_tileoff = read_reg(DSPBCNTR) & DISPLAY_PLANE_TILED; - break; - case 2: - use_tileoff = read_reg(DSPCCNTR) & DISPLAY_PLANE_TILED; - break; - } - } - - if (use_tileoff) { - switch (pipe) { - case 0: - return DSPATILEOFF; - case 1: - return DSPBTILEOFF; - case 2: - return DSPCTILEOFF; - } - } else { - switch (pipe) { - case 0: - return DSPABASE; - case 1: - return DSPBBASE; - case 2: - return DSPCBASE; - } - } - - assert(0); - - return 0; -} - -static uint32_t dspsurf_reg(uint32_t devid, int pipe) -{ - pipe = pipe_to_plane(devid, pipe); - - if (IS_GEN2(devid) || IS_GEN3(devid)) { - switch (pipe) { - case 0: - return DSPABASE; - case 1: - return DSPBBASE; - case 2: - return DSPCBASE; - } - } else { - switch (pipe) { - case 0: - return DSPASURF; - case 1: - return DSPBSURF; - case 2: - return DSPCSURF; - } - } - - assert(0); - - return 0; -} - -static uint32_t dsl_reg(int pipe) -{ - switch (pipe) { - case 0: - return PIPEA_DSL; - case 1: - return PIPEB_DSL; - case 2: - return PIPEC_DSL; - } - - assert(0); - - return 0; -} - -static void poll_pixel_pipestat(int pipe, int bit, uint32_t *min, uint32_t *max, const int count) -{ - uint32_t pix, pix1, pix2, iir, iir1, iir2, iir_bit, iir_mask; - int i = 0; - - switch (pipe) { - case 0: - pix = PIPEAFRAMEPIXEL; - iir_bit = 1 << bit; - iir = PIPEASTAT; - break; - case 1: - pix = PIPEBFRAMEPIXEL; - iir_bit = 1 << bit; - iir = PIPEBSTAT; - break; - default: - return; - } - - iir_mask = read_reg(iir) & 0x7fff0000; - - write_reg(iir, iir_mask | iir_bit); - - while (!quit) { - pix1 = read_reg(pix); - iir1 = read_reg(iir); - iir2 = read_reg(iir); - pix2 = read_reg(pix); - - if (!(iir2 & iir_bit)) - continue; - - if (iir1 & iir_bit) { - write_reg(iir, iir_mask | iir_bit); - continue; - } - - pix1 &= PIPE_PIXEL_MASK; - pix2 &= PIPE_PIXEL_MASK; - - min[i] = pix1; - max[i] = pix2; - if (++i >= count) - break; - } -} - -static void poll_pixel_iir_gen3(int pipe, int bit, uint32_t *min, uint32_t *max, const int count) -{ - uint32_t pix, pix1, pix2, iir1, iir2, imr_save, ier_save; - int i = 0; - - bit = 1 << bit; - - switch (pipe) { - case 0: - pix = PIPEAFRAMEPIXEL; - break; - case 1: - pix = PIPEBFRAMEPIXEL; - break; - default: - return; - } - - imr_save = read_reg(IMR); - ier_save = read_reg(IER); - - write_reg(IER, ier_save & ~bit); - write_reg(IMR, imr_save & ~bit); - - write_reg(IIR, bit); - - while (!quit) { - pix1 = read_reg(pix); - iir1 = read_reg(IIR); - iir2 = read_reg(IIR); - pix2 = read_reg(pix); - - if (!(iir2 & bit)) - continue; - - write_reg(IIR, bit); - - if (iir1 & bit) - continue; - - pix1 &= PIPE_PIXEL_MASK; - pix2 &= PIPE_PIXEL_MASK; - - min[i] = pix1; - max[i] = pix2; - if (++i >= count) - break; - } - - write_reg(IMR, imr_save); - write_reg(IER, ier_save); -} - -static void poll_pixel_framecount_gen3(int pipe, uint32_t *min, uint32_t *max, const int count) -{ - uint32_t pix, pix1, pix2, frm1, frm2; - int i = 0; - - switch (pipe) { - case 0: - pix = PIPEAFRAMEPIXEL; - break; - case 1: - pix = PIPEBFRAMEPIXEL; - break; - default: - return; - } - - while (!quit) { - pix1 = read_reg(pix); - pix2 = read_reg(pix); - - frm1 = pix1 >> 24; - frm2 = pix2 >> 24; - - if (frm1 + 1 != frm2) - continue; - - pix1 &= PIPE_PIXEL_MASK; - pix2 &= PIPE_PIXEL_MASK; - - min[i] = pix1; - max[i] = pix2; - if (++i >= count) - break; - } -} - -static void poll_pixel_pan(uint32_t devid, int pipe, int target_pixel, int target_fuzz, - uint32_t *min, uint32_t *max, const int count) -{ - uint32_t pix, pix1 = 0, pix2 = 0; - uint32_t saved, surf = 0; - int i = 0; - - switch (pipe) { - case 0: - pix = PIPEAFRAMEPIXEL; - break; - case 1: - pix = PIPEBFRAMEPIXEL; - break; - default: - return; - } - - surf = dspoffset_reg(devid, pipe); - - saved = read_reg(surf); - - while (!quit) { - while (!quit){ - pix1 = read_reg(pix) & PIPE_PIXEL_MASK; - if (pix1 == target_pixel) - break; - } - - write_reg(surf, saved+256); - - while (!quit){ - pix2 = read_reg(pix) & PIPE_PIXEL_MASK; - if (pix2 >= target_pixel + target_fuzz) - break; - } - - write_reg(surf, saved); - - min[i] = pix1; - max[i] = pix2; - if (++i >= count) - break; - } - - write_reg(surf, saved); -} - -static void poll_pixel_flip(uint32_t devid, int pipe, int target_pixel, int target_fuzz, - uint32_t *min, uint32_t *max, const int count) -{ - uint32_t pix, pix1, pix2; - uint32_t saved, surf = 0; - int i = 0; - - switch (pipe) { - case 0: - pix = PIPEAFRAMEPIXEL; - case 1: - pix = PIPEBFRAMEPIXEL; - default: - return; - } - - surf = dspsurf_reg(devid, pipe); - - saved = read_reg(surf); - - while (!quit) { - while (!quit){ - pix1 = read_reg(pix) & PIPE_PIXEL_MASK; - if (pix1 == target_pixel) - break; - } - - write_reg(surf, saved+4096); - - while (!quit){ - pix2 = read_reg(pix) & PIPE_PIXEL_MASK; - if (pix2 >= target_pixel + target_fuzz) - break; - } - - write_reg(surf, saved); - - min[i] = pix1; - max[i] = pix2; - if (++i >= count) - break; - } - - write_reg(surf, saved); -} - -static void poll_pixel_wrap(int pipe, uint32_t *min, uint32_t *max, const int count) -{ - uint32_t pix, pix1, pix2; - int i = 0; - - switch (pipe) { - case 0: - pix = PIPEAFRAMEPIXEL; - break; - case 1: - pix = PIPEBFRAMEPIXEL; - break; - default: - return; - } - - while (!quit) { - pix1 = read_reg(pix); - pix2 = read_reg(pix); - - pix1 &= PIPE_PIXEL_MASK; - pix2 &= PIPE_PIXEL_MASK; - - if (pix2 >= pix1) - continue; - - min[i] = pix1; - max[i] = pix2; - if (++i >= count) - break; - } -} - -static void poll_dsl_pipestat(int pipe, int bit, - uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1, dsl2, iir, iir1, iir2, iir_bit, iir_mask; - bool field1, field2; - int i[2] = {}; - - switch (pipe) { - case 0: - iir_bit = 1 << bit; - iir = PIPEASTAT; - break; - case 1: - iir_bit = 1 << bit; - iir = PIPEBSTAT; - break; - default: - return; - } - - dsl = dsl_reg(pipe); - - iir_mask = read_reg(iir) & 0x7fff0000; - - write_reg(iir, iir_mask | iir_bit); - - while (!quit) { - dsl1 = read_reg(dsl); - iir1 = read_reg(iir); - iir2 = read_reg(iir); - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (!(iir2 & iir_bit)) - continue; - - if (iir1 & iir_bit) { - write_reg(iir, iir_mask | iir_bit); - continue; - } - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } -} - -static void poll_dsl_iir_gen2(int pipe, int bit, - uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1, dsl2, iir1, iir2, imr_save, ier_save; - bool field1, field2; - int i[2] = {}; - - bit = 1 << bit; - - dsl = dsl_reg(pipe); - - imr_save = read_reg_16(IMR); - ier_save = read_reg_16(IER); - - write_reg_16(IER, ier_save & ~bit); - write_reg_16(IMR, imr_save & ~bit); - - write_reg_16(IIR, bit); - - while (!quit) { - dsl1 = read_reg(dsl); - iir1 = read_reg_16(IIR); - iir2 = read_reg_16(IIR); - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (!(iir2 & bit)) - continue; - - write_reg_16(IIR, bit); - - if (iir1 & bit) - continue; - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } - - write_reg_16(IMR, imr_save); - write_reg_16(IER, ier_save); -} - -static void poll_dsl_iir_gen3(int pipe, int bit, - uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1, dsl2, iir1, iir2, imr_save, ier_save; - bool field1, field2; - int i[2] = {}; - - bit = 1 << bit; - - dsl = dsl_reg(pipe); - - imr_save = read_reg(IMR); - ier_save = read_reg(IER); - - write_reg(IER, ier_save & ~bit); - write_reg(IMR, imr_save & ~bit); - - write_reg(IIR, bit); - - while (!quit) { - dsl1 = read_reg(dsl); - iir1 = read_reg(IIR); - iir2 = read_reg(IIR); - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (!(iir2 & bit)) - continue; - - write_reg(IIR, bit); - - if (iir1 & bit) - continue; - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } - - write_reg(IMR, imr_save); - write_reg(IER, ier_save); -} - -static void poll_dsl_deiir(uint32_t devid, int pipe, int bit, - uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1, dsl2, iir1, iir2, imr_save, ier_save; - bool field1, field2; - uint32_t iir, ier, imr; - int i[2] = {}; - - bit = 1 << bit; - - dsl = dsl_reg(pipe); - - if (IS_GEN8(devid)) { - iir = GEN8_DE_PIPE_IIR(pipe); - ier = GEN8_DE_PIPE_IER(pipe); - imr = GEN8_DE_PIPE_IMR(pipe); - } else { - iir = DEIIR; - ier = DEIER; - imr = DEIMR; - } - - imr_save = read_reg(imr); - ier_save = read_reg(ier); - - write_reg(ier, ier_save & ~bit); - write_reg(imr, imr_save & ~bit); - - write_reg(iir, bit); - - while (!quit) { - dsl1 = read_reg(dsl); - iir1 = read_reg(iir); - iir2 = read_reg(iir); - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (!(iir2 & bit)) - continue; - - write_reg(iir, bit); - - if (iir1 & bit) - continue; - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } - - write_reg(imr, imr_save); - write_reg(ier, ier_save); -} - -static void poll_dsl_framecount_g4x(int pipe, uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1, dsl2, frm, frm1, frm2; - bool field1, field2; - int i[2] = {}; - - switch (pipe) { - case 0: - frm = PIPEAFRMCOUNT_G4X; - break; - case 1: - frm = PIPEBFRMCOUNT_G4X; - break; - case 2: - frm = PIPECFRMCOUNT_G4X; - break; - default: - return; - } - - dsl = dsl_reg(pipe); - - while (!quit) { - dsl1 = read_reg(dsl); - frm1 = read_reg(frm); - frm2 = read_reg(frm); - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (frm1 + 1 != frm2) - continue; - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } -} - -static void poll_dsl_flipcount_g4x(uint32_t devid, int pipe, - uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1, dsl2, flp, flp1, flp2, surf; - bool field1, field2; - int i[2] = {}; - - switch (pipe) { - case 0: - flp = PIPEAFLIPCOUNT_G4X; - break; - case 1: - flp = PIPEBFLIPCOUNT_G4X; - break; - case 2: - flp = PIPECFLIPCOUNT_G4X; - break; - default: - return; - } - - dsl = dsl_reg(pipe); - surf = dspsurf_reg(devid, pipe); - - while (!quit) { - usleep(10); - dsl1 = read_reg(dsl); - flp1 = read_reg(flp); - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - return; - - write_reg(surf, read_reg(surf)); - - while (!quit) { - dsl1 = read_reg(dsl); - flp2 = read_reg(flp); - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (flp1 == flp2) - continue; - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } - if (i[field1] >= count) - break; - } -} - -static void poll_dsl_framecount_gen3(int pipe, uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1, dsl2, frm, frm1, frm2; - bool field1, field2; - int i[2] = {}; - - switch (pipe) { - case 0: - frm = PIPEAFRAMEPIXEL; - break; - case 1: - frm = PIPEBFRAMEPIXEL; - break; - default: - return; - } - - dsl = dsl_reg(pipe); - - while (!quit) { - dsl1 = read_reg(dsl); - frm1 = read_reg(frm) >> 24; - frm2 = read_reg(frm) >> 24; - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (frm1 + 1 != frm2) - continue; - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } -} - -static void poll_dsl_pan(uint32_t devid, int pipe, int target_scanline, int target_fuzz, - uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1 = 0, dsl2 = 0; - bool field1 = false, field2 = false; - uint32_t saved, surf = 0; - int i[2] = {}; - - dsl = dsl_reg(pipe); - surf = dspoffset_reg(devid, pipe); - - saved = read_reg(surf); - - while (!quit) { - while (!quit) { - dsl1 = read_reg(dsl); - field1 = dsl1 & 0x80000000; - dsl1 &= ~0x80000000; - if (dsl1 == target_scanline) - break; - } - - write_reg(surf, saved+256); - - while (!quit) { - dsl2 = read_reg(dsl); - field2 = dsl1 & 0x80000000; - dsl2 &= ~0x80000000; - if (dsl2 == target_scanline + target_fuzz) - break; - } - - write_reg(surf, saved); - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } - - write_reg(surf, saved); -} - -static void poll_dsl_flip(uint32_t devid, int pipe, int target_scanline, int target_fuzz, - uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1 = 0, dsl2 = 0; - bool field1 = false, field2 = false; - uint32_t saved, surf = 0; - int i[2] = {}; - - dsl = dsl_reg(pipe); - surf = dspsurf_reg(devid, pipe); - - saved = read_reg(surf); - - while (!quit) { - while (!quit) { - dsl1 = read_reg(dsl); - field1 = dsl1 & 0x80000000; - dsl1 &= ~0x80000000; - if (dsl1 == target_scanline) - break; - } - - write_reg(surf, saved+4096); - - while (!quit) { - dsl2 = read_reg(dsl); - field2 = dsl1 & 0x80000000; - dsl2 &= ~0x80000000; - if (dsl2 == target_scanline + target_fuzz) - break; - } - - write_reg(surf, saved); - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } - - write_reg(surf, saved); -} - -static void poll_dsl_surflive(uint32_t devid, int pipe, - uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1 = 0, dsl2 = 0, surf, surf1, surf2, surflive, surfl1 = 0, surfl2, saved, tmp; - bool field1 = false, field2 = false; - int i[2] = {}; - - switch (pipe) { - case 0: - surflive = DSPASURFLIVE; - break; - case 1: - surflive = DSPBSURFLIVE; - break; - case 2: - surflive = DSPCSURFLIVE; - break; - default: - return; - } - - dsl = dsl_reg(pipe); - surf = dspsurf_reg(devid, pipe); - - saved = read_reg(surf); - - surf1 = saved & ~0xfff; - surf2 = surf1 + 4096; - - while (!quit) { - write_reg(surf, surf2); - - while (!quit) { - dsl1 = read_reg(dsl); - surfl1 = read_reg(surflive) & ~0xfff; - surfl2 = read_reg(surflive) & ~0xfff; - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (surfl2 == surf2) - break; - } - - if (surfl1 != surf2) { - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } - - tmp = surf1; - surf1 = surf2; - surf2 = tmp; - } - - write_reg(surf, saved); -} - -static void poll_dsl_wrap(int pipe, uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1, dsl2; - bool field1, field2; - int i[2] = {}; - - dsl = dsl_reg(pipe); - - while (!quit) { - dsl1 = read_reg(dsl); - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (dsl2 >= dsl1) - continue; - - if (field1 != field2) - printf("fields are different (%u:%u -> %u:%u)\n", - field1, dsl1, field2, dsl2); - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } -} - -static void poll_dsl_field(int pipe, uint32_t *min, uint32_t *max, const int count) -{ - uint32_t dsl, dsl1, dsl2; - bool field1, field2; - int i[2] = {}; - - dsl = dsl_reg(pipe); - - while (!quit) { - dsl1 = read_reg(dsl); - dsl2 = read_reg(dsl); - - field1 = dsl1 & 0x80000000; - field2 = dsl2 & 0x80000000; - dsl1 &= ~0x80000000; - dsl2 &= ~0x80000000; - - if (field1 == field2) - continue; - - min[field1*count+i[field1]] = dsl1; - max[field1*count+i[field1]] = dsl2; - if (++i[field1] >= count) - break; - } -} - -static char pipe_name(int pipe) -{ - return pipe + 'A'; -} - -static const char *test_name(enum test test, int pipe, int bit, bool test_pixel_count) -{ - static char str[32]; - const char *type = test_pixel_count ? "pixel" : "dsl"; - - switch (test) { - case TEST_PIPESTAT: - snprintf(str, sizeof str, "%s / pipe %c / PIPESTAT[%d] (gmch)", type, pipe_name(pipe), bit); - return str; - case TEST_IIR_GEN2: - snprintf(str, sizeof str, "%s / pipe %c / IIR[%d] (gen2)", type, pipe_name(pipe), bit); - return str; - case TEST_IIR_GEN3: - snprintf(str, sizeof str, "%s / pipe %c / IIR[%d] (gen3+)", type, pipe_name(pipe), bit); - return str; - case TEST_DEIIR: - snprintf(str, sizeof str, "%s / pipe %c / DEIIR[%d] (pch)", type, pipe_name(pipe), bit); - return str; - case TEST_FRAMECOUNT_GEN3: - snprintf(str, sizeof str, "%s / pipe %c / Frame count (gen3/4)", type, pipe_name(pipe)); - return str; - case TEST_FRAMECOUNT_G4X: - snprintf(str, sizeof str, "%s / pipe %c / Frame count (g4x+)", type, pipe_name(pipe)); - return str; - case TEST_FLIPCOUNT: - snprintf(str, sizeof str, "%s / pipe %c / Flip count (g4x+)", type, pipe_name(pipe)); - return str; - case TEST_PAN: - snprintf(str, sizeof str, "%s / pipe %c / Pan", type, pipe_name(pipe)); - return str; - case TEST_FLIP: - snprintf(str, sizeof str, "%s / pipe %c / Flip", type, pipe_name(pipe)); - return str; - case TEST_SURFLIVE: - snprintf(str, sizeof str, "%s / pipe %c / Surflive", type, pipe_name(pipe)); - return str; - case TEST_WRAP: - snprintf(str, sizeof str, "%s / pipe %c / Wrap", type, pipe_name(pipe)); - return str; - case TEST_FIELD: - snprintf(str, sizeof str, "%s / pipe %c / Field", type, pipe_name(pipe)); - return str; - default: - return ""; - } -} - -static void usage(const char *name) -{ - fprintf(stderr, "Usage: %s [options]\n" - " -t,--test <pipestat|iir|framecount|flipcount|pan|flip|surflive|wrap|field>\n" - " -p,--pipe <pipe>\n" - " -b,--bit <bit>\n" - " -l,--line <target scanline/pixel>\n" - " -f,--fuzz <target fuzz>\n" - " -x,--pixel\n", - name); - exit(1); -} - -int main(int argc, char *argv[]) -{ - int fd, i; - int pipe = 0, bit = 0, target_scanline = 0, target_fuzz = 1; - bool test_pixelcount = false; - uint32_t devid; - uint32_t min[2*128] = {}; - uint32_t max[2*128] = {}; - uint32_t a, b; - enum test test = TEST_INVALID; - const int count = ARRAY_SIZE(min)/2; - - for (;;) { - static const struct option long_options[] = { - { .name = "test", .has_arg = required_argument, }, - { .name = "pipe", .has_arg = required_argument, }, - { .name = "bit", .has_arg = required_argument, }, - { .name = "line", .has_arg = required_argument, }, - { .name = "fuzz", .has_arg = required_argument, }, - { .name = "pixel", .has_arg = no_argument, }, - { }, - }; - - int opt = getopt_long(argc, argv, "t:p:b:l:f:x", long_options, NULL); - if (opt == -1) - break; - - switch (opt) { - case 't': - if (!strcmp(optarg, "pipestat")) - test = TEST_PIPESTAT; - else if (!strcmp(optarg, "iir")) - test = TEST_IIR; - else if (!strcmp(optarg, "framecount")) - test = TEST_FRAMECOUNT; - else if (!strcmp(optarg, "flipcount")) - test = TEST_FLIPCOUNT; - else if (!strcmp(optarg, "pan")) - test = TEST_PAN; - else if (!strcmp(optarg, "flip")) - test = TEST_FLIP; - else if (!strcmp(optarg, "surflive")) - test = TEST_SURFLIVE; - else if (!strcmp(optarg, "wrap")) - test = TEST_WRAP; - else if (!strcmp(optarg, "field")) - test = TEST_FIELD; - else - usage(argv[0]); - break; - case 'p': - pipe = atoi(optarg); - if (pipe < 0 || pipe > 2) - usage(argv[0]); - break; - case 'b': - bit = atoi(optarg); - if (bit < 0 || bit > 31) - usage(argv[0]); - break; - case 'l': - target_scanline = atoi(optarg); - if (target_scanline < 0) - usage(argv[0]); - break; - case 'f': - target_fuzz = atoi(optarg); - if (target_fuzz <= 0) - usage(argv[0]); - break; - case 'x': - test_pixelcount = true; - break; - } - } - - fd = drm_open_any(); - devid = intel_get_drm_devid(fd); - close(fd); - - /* - * check if the requires registers are - * avilable on the current platform. - */ - if (IS_GEN2(devid)) { - if (pipe > 1) - usage(argv[0]); - - if (test_pixelcount) - usage(argv[0]); - - switch (test) { - case TEST_IIR: - test = TEST_IIR_GEN2; - break; - case TEST_PIPESTAT: - case TEST_PAN: - break; - case TEST_FLIP: - test = TEST_PAN; - break; - default: - usage(argv[0]); - } - } else if (IS_GEN3(devid) || - (IS_GEN4(devid) && !IS_G4X(devid))) { - if (pipe > 1) - usage(argv[0]); - - switch (test) { - case TEST_IIR: - test = TEST_IIR_GEN3; - break; - case TEST_FRAMECOUNT: - test = TEST_FRAMECOUNT_GEN3; - break; - case TEST_PIPESTAT: - case TEST_PAN: - case TEST_WRAP: - case TEST_FIELD: - break; - case TEST_FLIP: - if (IS_GEN3(devid)) - test = TEST_PAN; - break; - default: - usage(argv[0]); - } - } else if (IS_G4X(devid) || IS_VALLEYVIEW(devid)) { - if (IS_VALLEYVIEW(devid)) - vlv_offset = 0x180000; - - if (pipe > 1) - usage(argv[0]); - - if (test_pixelcount) - usage(argv[0]); - - switch (test) { - case TEST_IIR: - test = TEST_IIR_GEN3; - break; - case TEST_FRAMECOUNT: - test = TEST_FRAMECOUNT_G4X; - break; - case TEST_FLIPCOUNT: - case TEST_PIPESTAT: - case TEST_PAN: - case TEST_FLIP: - case TEST_SURFLIVE: - case TEST_WRAP: - case TEST_FIELD: - break; - default: - usage(argv[0]); - } - } else if (HAS_PCH_SPLIT(devid) && - (IS_GEN5(devid) || IS_GEN6(devid) || IS_GEN7(devid))) { - if (pipe > 1 && - (IS_GEN5(devid) || IS_GEN6(devid))) - usage(argv[0]); - - if (test_pixelcount) - usage(argv[0]); - - switch (test) { - case TEST_IIR: - test = TEST_DEIIR; - break; - case TEST_FRAMECOUNT: - test = TEST_FRAMECOUNT_G4X; - break; - case TEST_FLIPCOUNT: - case TEST_PAN: - case TEST_FLIP: - case TEST_SURFLIVE: - case TEST_WRAP: - case TEST_FIELD: - break; - default: - usage(argv[0]); - } - } else if (IS_GEN8(devid)) { - if (test_pixelcount) - usage(argv[0]); - - switch (test) { - case TEST_IIR: - test = TEST_DEIIR; - break; - case TEST_FRAMECOUNT: - test = TEST_FRAMECOUNT_G4X; - break; - case TEST_FLIPCOUNT: - case TEST_PAN: - case TEST_FLIP: - case TEST_SURFLIVE: - case TEST_WRAP: - case TEST_FIELD: - break; - default: - usage(argv[0]); - } - } else { - usage(argv[0]); - } - - switch (test) { - case TEST_IIR: - case TEST_FRAMECOUNT: - /* should no longer have the generic tests here */ - assert(0); - default: - break; - } - - intel_register_access_init(intel_get_pci_device(), 0); - - printf("%s?\n", test_name(test, pipe, bit, test_pixelcount)); - - signal(SIGHUP, sighandler); - signal(SIGINT, sighandler); - signal(SIGTERM, sighandler); - - switch (test) { - case TEST_PIPESTAT: - if (test_pixelcount) - poll_pixel_pipestat(pipe, bit, min, max, count); - else - poll_dsl_pipestat(pipe, bit, min, max, count); - break; - case TEST_IIR_GEN2: - assert(!test_pixelcount); - poll_dsl_iir_gen2(pipe, bit, min, max, count); - break; - case TEST_IIR_GEN3: - if (test_pixelcount) - poll_pixel_iir_gen3(pipe, bit, min, max, count); - else - poll_dsl_iir_gen3(pipe, bit, min, max, count); - break; - case TEST_DEIIR: - assert(!test_pixelcount); - poll_dsl_deiir(devid, pipe, bit, min, max, count); - break; - case TEST_FRAMECOUNT_GEN3: - if (test_pixelcount) - poll_pixel_framecount_gen3(pipe, min, max, count); - else - poll_dsl_framecount_gen3(pipe, min, max, count); - break; - case TEST_FRAMECOUNT_G4X: - assert(!test_pixelcount); - poll_dsl_framecount_g4x(pipe, min, max, count); - break; - case TEST_FLIPCOUNT: - assert(!test_pixelcount); - poll_dsl_flipcount_g4x(devid, pipe, min, max, count); - break; - case TEST_PAN: - if (test_pixelcount) - poll_pixel_pan(devid, pipe, target_scanline, target_fuzz, - min, max, count); - else - poll_dsl_pan(devid, pipe, target_scanline, target_fuzz, - min, max, count); - break; - case TEST_FLIP: - if (test_pixelcount) - poll_pixel_flip(devid, pipe, target_scanline, target_fuzz, - min, max, count); - else - poll_dsl_flip(devid, pipe, target_scanline, target_fuzz, - min, max, count); - break; - case TEST_SURFLIVE: - poll_dsl_surflive(devid, pipe, min, max, count); - break; - case TEST_WRAP: - if (test_pixelcount) - poll_pixel_wrap(pipe, min, max, count); - else - poll_dsl_wrap(pipe, min, max, count); - break; - case TEST_FIELD: - poll_dsl_field(pipe, min, max, count); - break; - default: - assert(0); - } - - intel_register_access_fini(); - - if (quit) - return 0; - - for (i = 0; i < count; i++) { - if (min[0*count+i] == 0 && max[0*count+i] == 0) - break; - printf("[%u] %4u - %4u (%4u)\n", 0, min[0*count+i], max[0*count+i], - (min[0*count+i] + max[0*count+i] + 1) >> 1); - } - for (i = 0; i < count; i++) { - if (min[1*count+i] == 0 && max[1*count+i] == 0) - break; - printf("[%u] %4u - %4u (%4u)\n", 1, min[1*count+i], max[1*count+i], - (min[1*count+i] + max[1*count+i] + 1) >> 1); - } - - a = 0; - b = 0xffffffff; - for (i = 0; i < count; i++) { - if (min[0*count+i] == 0 && max[0*count+i] == 0) - break; - a = max(a, min[0*count+i]); - b = min(b, max[0*count+i]); - } - - printf("%s: [%u] %6u - %6u\n", test_name(test, pipe, bit, test_pixelcount), 0, a, b); - - a = 0; - b = 0xffffffff; - for (i = 0; i < count; i++) { - if (min[1*count+i] == 0 && max[1*count+i] == 0) - break; - a = max(a, min[1*count+i]); - b = min(b, max[1*count+i]); - } - - printf("%s: [%u] %6u - %6u\n", test_name(test, pipe, bit, test_pixelcount), 1, a, b); - - return 0; -} diff --git a/tools/intel_dpio_read.c b/tools/intel_dpio_read.c deleted file mode 100644 index 20561d2d..00000000 --- a/tools/intel_dpio_read.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Vijay Purushothaman <vijay.a.purushothaman@intel.com> - * - */ - -#include <unistd.h> -#include <stdlib.h> -#include <stdio.h> -#include <err.h> -#include <string.h> -#include "intel_io.h" -#include "intel_chipset.h" - -static void usage(char *cmdname) -{ - printf("Warning : This program will work only on Valleyview\n"); - printf("Usage: %s [addr]\n", cmdname); - printf("\t addr : in 0xXXXX format\n"); -} - -int main(int argc, char** argv) -{ - int ret = 0; - uint32_t reg, val; - char *cmdname = strdup(argv[0]); - struct pci_device *dev = intel_get_pci_device(); - - if (argc != 2 || !(IS_VALLEYVIEW(dev->device_id) || IS_CHERRYVIEW(dev->device_id))) { - usage(cmdname); - ret = 1; - goto out; - } - - sscanf(argv[1], "0x%x", ®); - - intel_register_access_init(dev, 0); - - val = intel_dpio_reg_read(reg, 0); - - printf("0x%04x : 0x%08x\n", reg, val); - - intel_register_access_fini(); - -out: - free(cmdname); - return ret; -} diff --git a/tools/intel_dpio_write.c b/tools/intel_dpio_write.c deleted file mode 100644 index 45cc95ff..00000000 --- a/tools/intel_dpio_write.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Vijay Purushothaman <vijay.a.purushothaman@intel.com> - * - */ - -#include <unistd.h> -#include <stdlib.h> -#include <stdio.h> -#include <err.h> -#include <string.h> -#include "intel_io.h" -#include "intel_chipset.h" - -static void usage(char *cmdname) -{ - printf("Warning : This program will work only on Valleyview\n"); - printf("Usage: %s [addr] [val]\n", cmdname); - printf("\t addr : in 0xXXXX format\n"); -} - -int main(int argc, char** argv) -{ - int ret = 0; - uint32_t reg, val; - char *cmdname = strdup(argv[0]); - struct pci_device *dev = intel_get_pci_device(); - - if (argc != 3 || !(IS_VALLEYVIEW(dev->device_id) || IS_CHERRYVIEW(dev->device_id))) { - usage(cmdname); - ret = 1; - goto out; - } - - sscanf(argv[1], "0x%x", ®); - sscanf(argv[2], "0x%x", &val); - - intel_register_access_init(dev, 0); - - printf("Value before: 0x%08x\n", intel_dpio_reg_read(reg, 0)); - intel_dpio_reg_write(reg, val, 0); - printf("Value after: 0x%08x\n", intel_dpio_reg_read(reg, 0)); - - intel_register_access_fini(); - -out: - free(cmdname); - return ret; -} diff --git a/tools/intel_dump_decode.c b/tools/intel_dump_decode.c deleted file mode 100644 index 0341aada..00000000 --- a/tools/intel_dump_decode.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * Copyright © 2010 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Chris Wilson <chris@chris-wilson.co.uk> - * - */ - -#define _GNU_SOURCE -#include <stdint.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <errno.h> -#include <unistd.h> -#include <fcntl.h> -#include <getopt.h> - -#include <intel_bufmgr.h> - -struct drm_intel_decode *ctx; - -static void -read_bin_file(const char * filename) -{ - uint32_t buf[16384]; - int fd, offset, ret; - - if (!strcmp(filename, "-")) - fd = fileno(stdin); - else - fd = open (filename, O_RDONLY); - if (fd < 0) { - fprintf (stderr, "Failed to open %s: %s\n", - filename, strerror (errno)); - exit (1); - } - - drm_intel_decode_set_dump_past_end(ctx, 1); - - offset = 0; - while ((ret = read (fd, buf, sizeof(buf))) > 0) { - drm_intel_decode_set_batch_pointer(ctx, buf, offset, ret/4); - drm_intel_decode(ctx); - offset += ret; - } - close (fd); -} - -static void -read_data_file(const char * filename) -{ - FILE *file; - uint32_t *data = NULL; - int data_size = 0, count = 0, line_number = 0, matched; - char *line = NULL; - size_t line_size; - uint32_t offset, value; - uint32_t gtt_offset = 0; - - if (!strcmp(filename, "-")) - file = stdin; - else - file = fopen (filename, "r"); - - if (file == NULL) { - fprintf (stderr, "Failed to open %s: %s\n", - filename, strerror (errno)); - exit (1); - } - - while (getline (&line, &line_size, file) > 0) { - line_number++; - - matched = sscanf (line, "%08x : %08x", &offset, &value); - if (matched != 2) { - printf("ignoring line %s", line); - - continue; - } - - count++; - - if (count > data_size) { - data_size = data_size ? data_size * 2 : 1024; - data = realloc (data, data_size * sizeof (uint32_t)); - if (data == NULL) { - fprintf (stderr, "Out of memory.\n"); - exit (1); - } - } - - data[count-1] = value; - } - - if (count) { - drm_intel_decode_set_batch_pointer(ctx, data, gtt_offset, count); - drm_intel_decode(ctx); - } - - free (data); - free (line); - - fclose (file); -} - -static void -read_autodetect_file(const char * filename) -{ - int binary = 0, c; - FILE *file; - - file = fopen (filename, "r"); - if (file == NULL) { - fprintf (stderr, "Failed to open %s: %s\n", - filename, strerror (errno)); - exit (1); - } - - while ((c = fgetc(file)) != EOF) { - /* totally lazy binary detector */ - if (c < 10) { - binary = 1; - break; - } - } - - fclose(file); - - if (binary == 1) - read_bin_file(filename); - else - read_data_file(filename); - -} - - -int -main (int argc, char *argv[]) -{ - uint32_t devid = 0xa011; - char *devid_str = NULL; - int i, c; - int option_index = 0; - int binary = -1; - - static struct option long_options[] = { - {"devid", 1, 0, 'd'}, - {"ascii", 0, 0, 'a'}, - {"binary", 0, 0, 'b'}, - { 0 } - }; - - devid_str = getenv("INTEL_DEVID_OVERRIDE"); - - while((c = getopt_long(argc, argv, "ad:b", - long_options, &option_index)) != -1) { - switch(c) { - case 'd': - devid_str = optarg; - break; - case 'b': - binary = 1; - break; - case 'a': - binary = 0; - break; - default: - printf("unkown command options\n"); - break; - } - } - - if (devid_str) - devid = strtoul(devid_str, NULL, 0); - - ctx = drm_intel_decode_context_alloc(devid); - - if (optind == argc) { - fprintf(stderr, "no input file given\n"); - exit(-1); - } - - for (i = optind; i < argc; i++) { - /* For stdin input, let's read as data file */ - if (!strcmp(argv[i], "-")) { - read_data_file(argv[i]); - continue; - } - if (binary == 1) - read_bin_file(argv[i]); - else if (binary == 0) - read_data_file(argv[i]); - else - read_autodetect_file(argv[i]); - } - - return 0; -} diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c deleted file mode 100644 index 035b17f1..00000000 --- a/tools/intel_error_decode.c +++ /dev/null @@ -1,626 +0,0 @@ -/* - * Copyright © 2007 Intel Corporation - * Copyright © 2009 Intel Corporation - * Copyright © 2010 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * Carl Worth <cworth@cworth.org> - * Chris Wilson <chris@chris-wilson.co.uk> - * - */ - -/** @file intel_decode.c - * This file contains code to print out batchbuffer contents in a - * human-readable format. - * - * The current version only supports i915 packets, and only pretty-prints a - * subset of them. The intention is for it to make just a best attempt to - * decode, but never crash in the process. - */ - -#define _GNU_SOURCE -#include <stdbool.h> -#include <stdio.h> -#include <stdlib.h> -#include <stdarg.h> -#include <string.h> -#include <unistd.h> -#include <inttypes.h> -#include <errno.h> -#include <sys/stat.h> -#include <err.h> -#include <assert.h> -#include <intel_bufmgr.h> - -#include "intel_chipset.h" -#include "intel_io.h" -#include "instdone.h" -#include "intel_reg.h" -#include "drmtest.h" - -static uint32_t -print_head(unsigned int reg) -{ - printf(" head = 0x%08x, wraps = %d\n", reg & (0x7ffff<<2), reg >> 21); - return reg & (0x7ffff<<2); -} - -static uint32_t -print_ctl(unsigned int reg) -{ - uint32_t ring_length = (((reg & (0x1ff << 12)) >> 12) + 1) * 4096; - -#define BIT_STR(reg, x, on, off) ((1 << (x)) & reg) ? on : off - - printf(" len=%d%s%s%s\n", ring_length, - BIT_STR(reg, 0, ", enabled", ", disabled"), - BIT_STR(reg, 10, ", semaphore wait ", ""), - BIT_STR(reg, 11, ", rb wait ", "") - ); -#undef BIT_STR - return ring_length; -} - -static void -print_acthd(unsigned int reg, unsigned int ring_length) -{ - if ((reg & (0x7ffff << 2)) < ring_length) - printf(" at ring: 0x%08x\n", reg & (0x7ffff << 2)); - else - printf(" at batch: 0x%08x\n", reg); -} - -static void -print_instdone(uint32_t devid, unsigned int instdone, unsigned int instdone1) -{ - int i; - static int once; - - if (!once) { - init_instdone_definitions(devid); - once = 1; - } - - for (i = 0; i < num_instdone_bits; i++) { - int busy = 0; - - if (instdone_bits[i].reg == INSTDONE_1) { - if (!(instdone1 & instdone_bits[i].bit)) - busy = 1; - } else { - if (!(instdone & instdone_bits[i].bit)) - busy = 1; - } - - if (busy) - printf(" busy: %s\n", instdone_bits[i].name); - } -} - -static void -print_i830_pgtbl_err(unsigned int reg) -{ - const char *str; - - switch((reg >> 3) & 0xf) { - case 0x1: str = "Overlay TLB"; break; - case 0x2: str = "Display A TLB"; break; - case 0x3: str = "Host TLB"; break; - case 0x4: str = "Render TLB"; break; - case 0x5: str = "Display C TLB"; break; - case 0x6: str = "Mapping TLB"; break; - case 0x7: str = "Command Stream TLB"; break; - case 0x8: str = "Vertex Buffer TLB"; break; - case 0x9: str = "Display B TLB"; break; - case 0xa: str = "Reserved System Memory"; break; - case 0xb: str = "Compressor TLB"; break; - case 0xc: str = "Binner TLB"; break; - default: str = "unknown"; break; - } - - if (str) - printf(" source = %s\n", str); - - switch(reg & 0x7) { - case 0x0: str = "Invalid GTT"; break; - case 0x1: str = "Invalid GTT PTE"; break; - case 0x2: str = "Invalid Memory"; break; - case 0x3: str = "Invalid TLB miss"; break; - case 0x4: str = "Invalid PTE data"; break; - case 0x5: str = "Invalid LocalMemory not present"; break; - case 0x6: str = "Invalid Tiling"; break; - case 0x7: str = "Host to CAM"; break; - } - printf(" error = %s\n", str); -} - -static void -print_i915_pgtbl_err(unsigned int reg) -{ - if (reg & (1 << 29)) - printf(" Cursor A: Invalid GTT PTE\n"); - if (reg & (1 << 28)) - printf(" Cursor B: Invalid GTT PTE\n"); - if (reg & (1 << 27)) - printf(" MT: Invalid tiling\n"); - if (reg & (1 << 26)) - printf(" MT: Invalid GTT PTE\n"); - if (reg & (1 << 25)) - printf(" LC: Invalid tiling\n"); - if (reg & (1 << 24)) - printf(" LC: Invalid GTT PTE\n"); - if (reg & (1 << 23)) - printf(" BIN VertexData: Invalid GTT PTE\n"); - if (reg & (1 << 22)) - printf(" BIN Instruction: Invalid GTT PTE\n"); - if (reg & (1 << 21)) - printf(" CS VertexData: Invalid GTT PTE\n"); - if (reg & (1 << 20)) - printf(" CS Instruction: Invalid GTT PTE\n"); - if (reg & (1 << 19)) - printf(" CS: Invalid GTT\n"); - if (reg & (1 << 18)) - printf(" Overlay: Invalid tiling\n"); - if (reg & (1 << 16)) - printf(" Overlay: Invalid GTT PTE\n"); - if (reg & (1 << 14)) - printf(" Display C: Invalid tiling\n"); - if (reg & (1 << 12)) - printf(" Display C: Invalid GTT PTE\n"); - if (reg & (1 << 10)) - printf(" Display B: Invalid tiling\n"); - if (reg & (1 << 8)) - printf(" Display B: Invalid GTT PTE\n"); - if (reg & (1 << 6)) - printf(" Display A: Invalid tiling\n"); - if (reg & (1 << 4)) - printf(" Display A: Invalid GTT PTE\n"); - if (reg & (1 << 1)) - printf(" Host Invalid PTE data\n"); - if (reg & (1 << 0)) - printf(" Host Invalid GTT PTE\n"); -} - -static void -print_i965_pgtbl_err(unsigned int reg) -{ - if (reg & (1 << 26)) - printf(" Invalid Sampler Cache GTT entry\n"); - if (reg & (1 << 24)) - printf(" Invalid Render Cache GTT entry\n"); - if (reg & (1 << 23)) - printf(" Invalid Instruction/State Cache GTT entry\n"); - if (reg & (1 << 22)) - printf(" There is no ROC, this cannot occur!\n"); - if (reg & (1 << 21)) - printf(" Invalid GTT entry during Vertex Fetch\n"); - if (reg & (1 << 20)) - printf(" Invalid GTT entry during Command Fetch\n"); - if (reg & (1 << 19)) - printf(" Invalid GTT entry during CS\n"); - if (reg & (1 << 18)) - printf(" Invalid GTT entry during Cursor Fetch\n"); - if (reg & (1 << 17)) - printf(" Invalid GTT entry during Overlay Fetch\n"); - if (reg & (1 << 8)) - printf(" Invalid GTT entry during Display B Fetch\n"); - if (reg & (1 << 4)) - printf(" Invalid GTT entry during Display A Fetch\n"); - if (reg & (1 << 1)) - printf(" Valid PTE references illegal memory\n"); - if (reg & (1 << 0)) - printf(" Invalid GTT entry during fetch for host\n"); -} - -static void -print_pgtbl_err(unsigned int reg, unsigned int devid) -{ - if (IS_965(devid)) { - return print_i965_pgtbl_err(reg); - } else if (IS_GEN3(devid)) { - return print_i915_pgtbl_err(reg); - } else { - return print_i830_pgtbl_err(reg); - } -} - -static void print_ivb_error(unsigned int reg, unsigned int devid) -{ - if (reg & (1 << 0)) - printf(" TLB page fault error (GTT entry not valid)\n"); - if (reg & (1 << 1)) - printf(" Invalid physical address in RSTRM interface (PAVP)\n"); - if (reg & (1 << 2)) - printf(" Invalid page directory entry error\n"); - if (reg & (1 << 3)) - printf(" Invalid physical address in ROSTRM interface (PAVP)\n"); - if (reg & (1 << 4)) - printf(" TLB page VTD translation generated an error\n"); - if (reg & (1 << 5)) - printf(" Invalid physical address in WRITE interface (PAVP)\n"); - if (reg & (1 << 6)) - printf(" Page directory VTD translation generated error\n"); - if (reg & (1 << 8)) - printf(" Cacheline containing a PD was marked as invalid\n"); - if (IS_HASWELL(devid) && (reg >> 10) & 0x1f) - printf(" %d pending page faults\n", (reg >> 10) & 0x1f); -} - -static void print_snb_error(unsigned int reg) -{ - if (reg & (1 << 0)) - printf(" TLB page fault error (GTT entry not valid)\n"); - if (reg & (1 << 1)) - printf(" Context page GTT translation generated a fault (GTT entry not valid)\n"); - if (reg & (1 << 2)) - printf(" Invalid page directory entry error\n"); - if (reg & (1 << 3)) - printf(" HWS page GTT translation generated a page fault (GTT entry not valid)\n"); - if (reg & (1 << 4)) - printf(" TLB page VTD translation generated an error\n"); - if (reg & (1 << 5)) - printf(" Context page VTD translation generated an error\n"); - if (reg & (1 << 6)) - printf(" Page directory VTD translation generated error\n"); - if (reg & (1 << 7)) - printf(" HWS page VTD translation generated an error\n"); - if (reg & (1 << 8)) - printf(" Cacheline containing a PD was marked as invalid\n"); -} - -static void -print_error(unsigned int reg, unsigned int devid) -{ - switch (intel_gen(devid)) { - case 7: return print_ivb_error(reg, devid); - case 6: return print_snb_error(reg); - } -} - -static void -print_snb_fence(unsigned int devid, uint64_t fence) -{ - printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n", - fence & 1 ? "" : "in", - fence & (1<<1) ? 'y' : 'x', - (int)(((fence>>32)&0xfff)+1)*128, - (uint32_t)fence & 0xfffff000, - (uint32_t)(((fence>>32)&0xfffff000) - (fence&0xfffff000) + 4096)); -} - -static void -print_i965_fence(unsigned int devid, uint64_t fence) -{ - printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n", - fence & 1 ? "" : "in", - fence & (1<<1) ? 'y' : 'x', - (int)(((fence>>2)&0x1ff)+1)*128, - (uint32_t)fence & 0xfffff000, - (uint32_t)(((fence>>32)&0xfffff000) - (fence&0xfffff000) + 4096)); -} - -static void -print_i915_fence(unsigned int devid, uint64_t fence) -{ - unsigned tile_width; - if ((fence & 12) && !IS_915(devid)) - tile_width = 128; - else - tile_width = 512; - - printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %i\n", - fence & 1 ? "" : "in", - fence & (1<<12) ? 'y' : 'x', - (1<<((fence>>4)&0xf))*tile_width, - (uint32_t)fence & 0xff00000, - 1<<(20 + ((fence>>8)&0xf))); -} - -static void -print_i830_fence(unsigned int devid, uint64_t fence) -{ - printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %i\n", - fence & 1 ? "" : "in", - fence & (1<<12) ? 'y' : 'x', - (1<<((fence>>4)&0xf))*128, - (uint32_t)fence & 0x7f80000, - 1<<(19 + ((fence>>8)&0xf))); -} - -static void -print_fence(unsigned int devid, uint64_t fence) -{ - if (IS_GEN6(devid) || IS_GEN7(devid)) { - return print_snb_fence(devid, fence); - } else if (IS_GEN4(devid) || IS_GEN5(devid)) { - return print_i965_fence(devid, fence); - } else if (IS_GEN3(devid)) { - return print_i915_fence(devid, fence); - } else { - return print_i830_fence(devid, fence); - } -} - -#define MAX_RINGS 10 /* I really hope this never... */ -uint32_t head[MAX_RINGS]; -int head_ndx = 0; -int num_rings = 0; -static void print_batch(int is_batch, const char *ring_name, uint32_t gtt_offset) -{ - const char *buffer_type[2] = { "ringbuffer", "batchbuffer" }; - if (is_batch || !num_rings) - printf("%s (%s) at 0x%08x\n", buffer_type[is_batch], ring_name, gtt_offset); - else - printf("%s (%s) at 0x%08x; HEAD points to: 0x%08x\n", buffer_type[is_batch], ring_name, gtt_offset, head[head_ndx++ % num_rings] + gtt_offset); -} - -static void decode(struct drm_intel_decode *ctx, bool is_batch, - const char *ring_name, uint32_t gtt_offset, uint32_t *data, - int *count) -{ - if (!*count) - return; - - print_batch(is_batch, ring_name, gtt_offset); - drm_intel_decode_set_batch_pointer(ctx, data, gtt_offset, *count); - drm_intel_decode(ctx); - *count = 0; -} - -static void -read_data_file(FILE *file) -{ - struct drm_intel_decode *decode_ctx = NULL; - uint32_t devid = PCI_CHIP_I855_GM; - uint32_t *data = NULL; - long long unsigned fence; - int data_size = 0, count = 0, line_number = 0, matched; - char *line = NULL; - size_t line_size; - uint32_t offset, value, ring_length = 0; - uint32_t gtt_offset = 0, new_gtt_offset; - char *ring_name = NULL; - int is_batch = 1; - - while (getline(&line, &line_size, file) > 0) { - char *dashes; - line_number++; - - dashes = strstr(line, "---"); - if (dashes) { - char *new_ring_name = malloc(dashes - line); - strncpy(new_ring_name, line, dashes - line); - new_ring_name[dashes - line - 1] = '\0'; - - if (num_rings == -1) - num_rings = head_ndx; - - matched = sscanf(dashes, "--- gtt_offset = 0x%08x\n", - &new_gtt_offset); - if (matched == 1) { - decode(decode_ctx, is_batch, ring_name, - gtt_offset, data, &count); - gtt_offset = new_gtt_offset; - is_batch = 1; - free(ring_name); - ring_name = new_ring_name; - continue; - } - - matched = sscanf(dashes, "--- ringbuffer = 0x%08x\n", - &new_gtt_offset); - if (matched == 1) { - decode(decode_ctx, is_batch, ring_name, - gtt_offset, data, &count); - gtt_offset = new_gtt_offset; - is_batch = 0; - free(ring_name); - ring_name = new_ring_name; - continue; - } - } - - matched = sscanf(line, "%08x : %08x", &offset, &value); - if (matched != 2) { - unsigned int reg; - - /* display reg section is after the ringbuffers, don't mix them */ - decode(decode_ctx, is_batch, ring_name, gtt_offset, - data, &count); - - printf("%s", line); - - matched = sscanf(line, "PCI ID: 0x%04x\n", ®); - if (matched == 0) - matched = sscanf(line, " PCI ID: 0x%04x\n", ®); - if (matched == 0) { - const char *pci_id_start = strstr(line, "PCI ID"); - if (pci_id_start) - matched = sscanf(pci_id_start, "PCI ID: 0x%04x\n", ®); - } - if (matched == 1) { - devid = reg; - printf("Detected GEN%i chipset\n", - intel_gen(devid)); - - decode_ctx = drm_intel_decode_context_alloc(devid); - } - - matched = sscanf(line, " CTL: 0x%08x\n", ®); - if (matched == 1) - ring_length = print_ctl(reg); - - matched = sscanf(line, " HEAD: 0x%08x\n", ®); - if (matched == 1) { - head[num_rings++] = print_head(reg); - } - - matched = sscanf(line, " ACTHD: 0x%08x\n", ®); - if (matched == 1) { - print_acthd(reg, ring_length); - drm_intel_decode_set_head_tail(decode_ctx, reg, 0xffffffff); - } - - matched = sscanf(line, " PGTBL_ER: 0x%08x\n", ®); - if (matched == 1 && reg) - print_pgtbl_err(reg, devid); - - matched = sscanf(line, " ERROR: 0x%08x\n", ®); - if (matched == 1 && reg) - print_error(reg, devid); - - matched = sscanf(line, " INSTDONE: 0x%08x\n", ®); - if (matched == 1) - print_instdone(devid, reg, -1); - - matched = sscanf(line, " INSTDONE1: 0x%08x\n", ®); - if (matched == 1) - print_instdone(devid, -1, reg); - - matched = sscanf(line, " fence[%i] = %Lx\n", ®, &fence); - if (matched == 2) - print_fence(devid, fence); - - continue; - } - - count++; - - if (count > data_size) { - data_size = data_size ? data_size * 2 : 1024; - data = realloc(data, data_size * sizeof (uint32_t)); - if (data == NULL) { - fprintf(stderr, "Out of memory.\n"); - exit(1); - } - } - - data[count-1] = value; - } - - decode(decode_ctx, is_batch, ring_name, gtt_offset, data, &count); - - free(data); - free(line); - free(ring_name); -} - -int -main(int argc, char *argv[]) -{ - FILE *file; - const char *path; - char *filename = NULL; - struct stat st; - int error; - - if (argc > 2) { - fprintf(stderr, - "intel_gpu_decode: Parse an Intel GPU i915_error_state\n" - "Usage:\n" - "\t%s [<file>]\n" - "\n" - "With no arguments, debugfs-dri-directory is probed for in " - "/debug and \n" - "/sys/kernel/debug. Otherwise, it may be " - "specified. If a file is given,\n" - "it is parsed as an GPU dump in the format of " - "/debug/dri/0/i915_error_state.\n", - argv[0]); - return 1; - } - - if (argc == 1) { - if (isatty(0)) { - path = "/sys/class/drm/card0/error"; - error = stat(path, &st); - if (error != 0) { - path = "/debug/dri"; - error = stat(path, &st); - } - if (error != 0) { - path = "/sys/kernel/debug/dri"; - error = stat(path, &st); - } - if (error != 0) { - errx(1, - "Couldn't find i915 debugfs directory.\n\n" - "Is debugfs mounted? You might try mounting it with a command such as:\n\n" - "\tsudo mount -t debugfs debugfs /sys/kernel/debug\n"); - } - } else { - read_data_file(stdin); - exit(0); - } - } else { - path = argv[1]; - error = stat(path, &st); - if (error != 0) { - fprintf(stderr, "Error opening %s: %s\n", - path, strerror(errno)); - exit(1); - } - } - - if (S_ISDIR(st.st_mode)) { - int ret; - - ret = asprintf(&filename, "%s/i915_error_state", path); - assert(ret > 0); - file = fopen(filename, "r"); - if (!file) { - int minor; - for (minor = 0; minor < 64; minor++) { - free(filename); - ret = asprintf(&filename, "%s/%d/i915_error_state", path, minor); - assert(ret > 0); - - file = fopen(filename, "r"); - if (file) - break; - } - } - if (!file) { - fprintf(stderr, "Failed to find i915_error_state beneath %s\n", - path); - exit (1); - } - } else { - file = fopen(path, "r"); - if (!file) { - fprintf(stderr, "Failed to open %s: %s\n", - path, strerror(errno)); - exit (1); - } - } - - read_data_file(file); - fclose(file); - - if (filename != path) - free(filename); - - return 0; -} - -/* vim: set ts=8 sw=8 tw=0 noet :*/ diff --git a/tools/intel_forcewaked.c b/tools/intel_forcewaked.c deleted file mode 100644 index 01ca0253..00000000 --- a/tools/intel_forcewaked.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Ben Widawsky <ben@bwidawsk.net> - * - */ - -#include <assert.h> -#include <err.h> -#include <string.h> -#include <stdarg.h> -#include <stdbool.h> -#include <stdio.h> -#include <stdlib.h> -#include <syslog.h> -#include <unistd.h> -#include "intel_io.h" -#include "intel_chipset.h" - -bool daemonized; - -#define INFO_PRINT(...) \ - do { \ - if (daemonized) \ - syslog(LOG_INFO, ##__VA_ARGS__); \ - else \ - fprintf(stdout, ##__VA_ARGS__); \ - } while(0) - -static void -help(char *prog) { - printf("%s Prevents the GT from sleeping.\n\n", prog); - printf("usage: %s [options] \n\n", prog); - printf("Options: \n"); - printf(" -b Run in background/daemon mode\n"); -} - -static int -is_alive(void) { - /* Read the timestamp, which should *almost* always be !0 */ - return (intel_register_read(0x2358) != 0); -} - -int main(int argc, char *argv[]) -{ - int ret; - - if (argc > 2 || (argc == 2 && !strncmp(argv[1], "-h", 2))) { - help(argv[1]); - exit(0); - } - - if (argc == 2 && (!strncmp(argv[1], "-b", 2))) - daemonized = true; - - if (daemonized) { - assert(daemon(0, 0) == 0); - openlog(argv[0], LOG_CONS | LOG_PID, LOG_USER); - INFO_PRINT("started daemon"); - } - - ret = intel_register_access_init(intel_get_pci_device(), 1); - if (ret) { - INFO_PRINT("Couldn't init register access\n"); - exit(1); - } else { - INFO_PRINT("Forcewake locked\n"); - } - while(1) { - if (!is_alive()) { - INFO_PRINT("gpu reset? restarting daemon\n"); - intel_register_access_fini(); - ret = intel_register_access_init(intel_get_pci_device(), 1); - if (ret) - INFO_PRINT("Reg access init fail\n"); - } - sleep(1); - } - intel_register_access_fini(); - INFO_PRINT("Forcewake unlock\n"); - - if (daemonized) { - INFO_PRINT("finished\n"); - closelog(); - } - - return 0; -} diff --git a/tools/intel_framebuffer_dump.c b/tools/intel_framebuffer_dump.c deleted file mode 100644 index 624a9613..00000000 --- a/tools/intel_framebuffer_dump.c +++ /dev/null @@ -1,111 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - */ - -/* - * Read back all the KMS framebuffers attached to the CRTC and record as PNG. - */ - -#define _GNU_SOURCE -#include <stdint.h> -#include <sys/types.h> -#include <sys/mman.h> -#include <errno.h> -#include <xf86drmMode.h> -#include <i915_drm.h> -#include <cairo.h> - -#include "intel_io.h" -#include "drmtest.h" - -int main(int argc, char **argv) -{ - drmModeResPtr res; - int fd, n; - - fd = drmOpen("i915", NULL); - if (fd < 0) - return ENOENT; - - res = drmModeGetResources(fd); - if (res == NULL) - return ENOMEM; - - for (n = 0; n < res->count_crtcs; n++) { - struct drm_gem_open open_arg; - struct drm_gem_flink flink; - drmModeCrtcPtr crtc; - drmModeFBPtr fb; - - crtc = drmModeGetCrtc(fd, res->crtcs[n]); - if (crtc == NULL) - continue; - - fb = drmModeGetFB(fd, crtc->buffer_id); - drmModeFreeCrtc(crtc); - if (fb == NULL) - continue; - - flink.handle = fb->handle; - if (drmIoctl(fd, DRM_IOCTL_GEM_FLINK, &flink)) { - drmModeFreeFB(fb); - continue; - } - - open_arg.name = flink.name; - if (drmIoctl(fd, DRM_IOCTL_GEM_OPEN, &open_arg) == 0) { - struct drm_i915_gem_mmap_gtt mmap_arg; - void *ptr; - - mmap_arg.handle = open_arg.handle; - if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg) == 0 && - (ptr = mmap(0, open_arg.size, PROT_READ, MAP_SHARED, fd, mmap_arg.offset)) != (void *)-1) { - cairo_surface_t *surface; - cairo_format_t format; - char name[80]; - - snprintf(name, sizeof(name), "fb-%d.png", fb->fb_id); - - switch (fb->depth) { - case 16: format = CAIRO_FORMAT_RGB16_565; break; - case 24: format = CAIRO_FORMAT_RGB24; break; - case 30: format = CAIRO_FORMAT_RGB30; break; - case 32: format = CAIRO_FORMAT_ARGB32; break; - default: format = CAIRO_FORMAT_INVALID; break; - } - - surface = cairo_image_surface_create_for_data(ptr, format, - fb->width, fb->height, fb->pitch); - cairo_surface_write_to_png(surface, name); - cairo_surface_destroy(surface); - - munmap(ptr, open_arg.size); - } - drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &open_arg.handle); - } - - drmModeFreeFB(fb); - } - - return 0; -} diff --git a/tools/intel_gpu_abrt b/tools/intel_gpu_abrt deleted file mode 100755 index a38137d7..00000000 --- a/tools/intel_gpu_abrt +++ /dev/null @@ -1,102 +0,0 @@ -#!/bin/sh - -if [ $(id -ru) -ne 0 ]; then - echo "$0 must be run as root" - exit 1 -fi - -get(){ - if [ ! -e $tardir/${@:$#} ] ; then - mkdir -p $tardir/${@:$#} - fi - if [ -e $1 ] ; then - cp -a ${@:1:$#-1} $tardir/${@:$#} 2>/dev/null - fi -} - -igtdir=`dirname $0` - -if [ -d /debug/dri ] ; then - debugfs_path=/debug_dri -fi - -if [ -d /sys/kernel/debug/dri ] ; then - debugfs_path=/sys/kernel/debug/dri -fi - -i915_debugfs=x -for dir in `ls $debugfs_path` ; do - if [ -f $debugfs_path/$dir/i915_error_state ] ; then - i915_debugfs=$debugfs_path/$dir - break - fi -done - -if [ $i915_debugfs = "x" ] ; then - echo i915 debugfs path not found. - exit 1 -fi - -tmpdir=`mktemp -d` -tardir=$tmpdir/intel_gpu_abrt -mkdir $tardir - -get $i915_debugfs/* debugfs - -get /sys/module/i915/parameters/* mod_opts - -mkdir $tardir/X -xrandr --verbose > $tardir/X/xrandr -get /var/log/Xorg.0.log X -get /var/log/Xorg.0.log.old X -get /etc/X11/xorg.conf X -get /etc/X11/xorg.conf.d/ X - -dmesg > $tardir/dmesg -lspci -nn > $tardir/lspci - -$igtdir/intel_reg_dumper > $tardir/intel_reg_dumper.txt -$igtdir/intel_bios_dumper $tardir/intel_bios_dump -$igtdir/intel_stepping > $tardir/intel_stepping - -echo 1 > /sys/devices/pci0000:00/0000:00:02.0/rom -cat /sys/devices/pci0000:00/0000:00:02.0/rom > $tardir/vbios.dump -echo 0 > /sys/devices/pci0000:00/0000:00:02.0/rom - -(cd $tmpdir; tar -c intel_gpu_abrt ) > intel_gpu_abrt.tar - -rm $tmpdir -Rf - -if [ -f intel_gpu_abrt.tar ] ; then - cat <<EOF -intel_gpu_abrt.tar has been created. - -Please attach it to https://bugs.freedesktop.org -with a good bug description as suggested in this template: - -System environment: --- chipset: --- system architecture: `uname -m` --- xf86-video-intel: --- xserver: `grep "X.Org X Server" /var/log/Xorg.0.log | awk '{print $NF}'` --- mesa: --- libdrm: `pkg-config --modversion libdrm` --- kernel: `uname -r` --- Linux distribution: --- Machine or mobo model: --- Display connector: - -Reproducing steps: - -Additional info: - -EOF -exit 0 -else -cat <<EOF -Error on tarball generation. -For bug report, please follow manual instructions available at: -https://01.org/linuxgraphics/documentation/how-report-bugs-0 -EOF -exit 1 -fi diff --git a/tools/intel_gpu_frequency.c b/tools/intel_gpu_frequency.c deleted file mode 100644 index c5359c08..00000000 --- a/tools/intel_gpu_frequency.c +++ /dev/null @@ -1,359 +0,0 @@ -/* - * Copyright © 2015 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Example: - * Get all frequencies: - * intel_gpu_frequency --get - * - * Same as above: - * intel_gpu_frequency -g - * - * Lock the GPU frequency to 300MHz: - * intel_gpu_frequency --set 300 - * - * Set the maximum frequency to 900MHz: - * intel_gpu_frequency --custom max=900 - * - * Lock the GPU frequency to its maximum frequency: - * intel_gpu_frequency --max - * - * Lock the GPU frequency to its most efficient frequency: - * intel_gpu_frequency -e - * - * Lock The GPU frequency to its minimum frequency: - * intel_gpu_frequency --min - * - * Reset the GPU to hardware defaults - * intel_gpu_frequency -d - */ - -#define _GNU_SOURCE -#include <assert.h> -#include <getopt.h> -#include <stdio.h> -#include <time.h> -#include <unistd.h> - -#include "drmtest.h" -#include "intel_chipset.h" - -#define VERSION "1.0" - -static int device, devid; - -enum { - CUR=0, - MIN, - EFF, - MAX, - RP0, - RPn -}; - -struct freq_info { - const char *name; - const char *mode; - FILE *filp; - char *path; -}; - -static struct freq_info info[] = { - { "cur", "r" }, - { "min", "rb+" }, - { "RP1", "r" }, - { "max", "rb+" }, - { "RP0", "r" }, - { "RPn", "r" } -}; - -static char * -get_sysfs_path(const char *which) -{ - static const char fmt[] = "/sys/class/drm/card%1d/gt_%3s_freq_mhz"; - char *path; - int ret; - -#define STATIC_STRLEN(string) (sizeof(string) / sizeof(string [0])) - ret = asprintf(&path, fmt, device, which); - assert(ret == (STATIC_STRLEN(fmt) - 3)); -#undef STATIC_STRLEN - - return path; -} - -static void -initialize_freq_info(struct freq_info *freq_info) -{ - if (freq_info->filp) - return; - - freq_info->path = get_sysfs_path(freq_info->name); - assert(freq_info->path); - freq_info->filp = fopen(freq_info->path, freq_info->mode); - assert(freq_info->filp); -} - -static void wait_freq_settle(void) -{ - struct timespec ts; - - /* FIXME: Lazy sleep without check. */ - ts.tv_sec = 0; - ts.tv_nsec = 20000; - clock_nanosleep(CLOCK_MONOTONIC, 0, &ts, NULL); -} - -static void set_frequency(struct freq_info *freq_info, int val) -{ - initialize_freq_info(freq_info); - rewind(freq_info->filp); - assert(fprintf(freq_info->filp, "%d", val) > 0); - - wait_freq_settle(); -} - -static int get_frequency(struct freq_info *freq_info) -{ - int val; - - initialize_freq_info(freq_info); - rewind(freq_info->filp); - assert(fscanf(freq_info->filp, "%d", &val)==1); - - return val; -} - -static void -usage(const char *prog) -{ - printf("%s A program to manipulate Intel GPU frequencies.\n\n", prog); - printf("Usage: %s [-e] [--min | --max] [-g (min|max|efficient)] [-s frequency_mhz]\n\n", prog); - printf("Options: \n"); - printf(" -e Lock frequency to the most efficient frequency\n"); - printf(" -g, --get Get all the frequency settings\n"); - printf(" -s, --set Lock frequency to an absolute value (MHz)\n"); - printf(" -c, --custom Set a min, or max frequency \"min=X | max=Y\"\n"); - printf(" -m --max Lock frequency to max frequency\n"); - printf(" -i --min Lock frequency to min (never a good idea, DEBUG ONLY)\n"); - printf(" -d --defaults Return the system to hardware defaults\n"); - printf(" -h --help Returns this\n"); - printf(" -v --version Version\n"); - printf("\n"); - printf("Examples:\n"); - printf(" intel_gpu_frequency -gmin,cur\tGet the current and minimum frequency\n"); - printf(" intel_gpu_frequency -s 400\tLock frequency to 400Mhz\n"); - printf(" intel_gpu_frequency -c max=750\tSet the max frequency to 750MHz\n"); - printf("\n"); - printf("Report bugs to <bugs.freedesktop.org>\n"); - exit(EXIT_FAILURE); -} - -static void -version(const char *prog) -{ - printf("%s: %s\n", prog, VERSION); - printf("Copyright © 2015 Intel Corporation\n"); -} - -/* Returns read or write operation */ -static bool -parse(int argc, char *argv[], bool *act_upon, size_t act_upon_n, int *new_freq) -{ - int c, tmp; - bool write = false; - - /* No args means -g" */ - if (argc == 1) { - for (c = 0; c < act_upon_n; c++) - act_upon[c] = true; - goto done; - } - while (1) { - int option_index = 0; - static struct option long_options[] = { - { "get", no_argument, NULL, 'g' }, - { "set", required_argument, NULL, 's' }, - { "custom", required_argument, NULL, 'c'}, - { "min", no_argument, NULL, 'i' }, - { "max", no_argument, NULL, 'm' }, - { "defaults", no_argument, NULL, 'd' }, - { "help", no_argument, NULL, 'h' }, - { "version", no_argument, NULL, 'v' }, - { NULL, 0, NULL, 0} - }; - - c = getopt_long(argc, argv, "egs:c:midh", long_options, &option_index); - if (c == -1) - break; - - switch (c) { - case 'g': - if (write == true) - fprintf(stderr, "Read and write operations not support simultaneously.\n"); - { - int i; - for (i = 0; i < act_upon_n; i++) - act_upon[i] = true; - } - break; - case 's': - if (!optarg) - usage(argv[0]); - - if (write == true) { - fprintf(stderr, "Only one write may be specified at a time\n"); - exit(EXIT_FAILURE); - } - - write = true; - act_upon[MIN] = true; - act_upon[MAX] = true; - sscanf(optarg, "%d", &new_freq[MAX]); - new_freq[MIN] = new_freq[MAX]; - break; - case 'c': - if (!optarg) - usage(argv[0]); - - if (write == true) { - fprintf(stderr, "Only one write may be specified at a time\n"); - exit(EXIT_FAILURE); - } - - write = true; - - if (!strncmp("min=", optarg, 4)) { - act_upon[MIN] = true; - sscanf(optarg+4, "%d", &new_freq[MIN]); - } else if (!strncmp("max=", optarg, 4)) { - act_upon[MAX] = true; - sscanf(optarg+4, "%d", &new_freq[MAX]); - } else { - fprintf(stderr, "Selected unmodifiable frequency\n"); - exit(EXIT_FAILURE); - } - break; - case 'e': /* efficient */ - if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) { - /* the LP parts have special efficient frequencies */ - fprintf(stderr, - "FIXME: Warning efficient frequency information is incorrect.\n"); - exit(EXIT_FAILURE); - } - tmp = get_frequency(&info[EFF]); - new_freq[MIN] = tmp; - new_freq[MAX] = tmp; - act_upon[MIN] = true; - act_upon[MAX] = true; - write = true; - break; - case 'i': /* mIn */ - tmp = get_frequency(&info[RPn]); - new_freq[MIN] = tmp; - new_freq[MAX] = tmp; - act_upon[MIN] = true; - act_upon[MAX] = true; - write = true; - break; - case 'm': /* max */ - tmp = get_frequency(&info[RP0]); - new_freq[MIN] = tmp; - new_freq[MAX] = tmp; - act_upon[MIN] = true; - act_upon[MAX] = true; - write = true; - break; - case 'd': /* defaults */ - new_freq[MIN] = get_frequency(&info[RPn]); - new_freq[MAX] = get_frequency(&info[RP0]); - act_upon[MIN] = true; - act_upon[MAX] = true; - write = true; - break; - case 'v': - version(argv[0]); - exit(0); - case 'h': - default: - usage(argv[0]); - } - } - -done: - return write; -} - -int main(int argc, char *argv[]) -{ - - bool write, fail, targets[MAX+1] = {false}; - int i, try = 1, set_freq[MAX+1] = {0}; - - devid = intel_get_drm_devid(drm_open_any()); - device = drm_get_card(); - - write = parse(argc, argv, targets, ARRAY_SIZE(targets), set_freq); - fail = write; - - /* If we've previously locked the frequency, we need to make sure to set things - * in the correct order, or else the operation will fail (ie. min = max = 200, - * and we set min to 300, we fail because it would try to set min > - * max). This can be accomplished be going either forward or reverse - * through the loop. MIN is always before MAX. - * - * XXX: Since only min and max are at play, the super lazy way is to do this - * 3 times and if we still fail after 3, it's for real. - */ -again: - if (try > 2) { - fprintf(stderr, "Did not achieve desired freq.\n"); - exit(EXIT_FAILURE); - } - for (i = 0; i < ARRAY_SIZE(targets); i++) { - if (targets[i] == false) - continue; - - if (write) { - set_frequency(&info[i], set_freq[i]); - if (get_frequency(&info[i]) != set_freq[i]) - fail = true; - else - fail = false; - } else { - printf("%s: %d MHz\n", info[i].name, get_frequency(&info[i])); - } - } - - if (fail) { - try++; - goto again; - } - - for (i = 0; i < ARRAY_SIZE(targets); i++) { - if (info[i].filp) { - fclose(info[i].filp); - free(info[i].path); - } - } - - return EXIT_SUCCESS; -} diff --git a/tools/intel_gpu_time.c b/tools/intel_gpu_time.c deleted file mode 100644 index 56d65fe0..00000000 --- a/tools/intel_gpu_time.c +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright © 2007,2009 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * Chris Wilson <chris@chris-wilson.co.uk> - * - */ - -#include <unistd.h> -#include <signal.h> -#include <stdio.h> -#include <stdlib.h> -#include <sys/time.h> -#include <sys/resource.h> -#include <sys/wait.h> - -#include "intel_io.h" -#include "intel_chipset.h" -#include "intel_reg.h" - -#define SAMPLES_PER_SEC 10000 - -static volatile int goddo; - -static pid_t spawn(char **argv) -{ - pid_t pid; - - pid = fork(); - if (pid != 0) - return pid; - - execvp(argv[0], argv); - exit(1); -} - -static void sighandler(int sig) -{ - goddo = sig; -} - -int main(int argc, char **argv) -{ - pid_t child; - uint64_t ring_idle = 0, ring_time = 0; - struct timeval start, end; - static struct rusage rusage; - int status; - - intel_mmio_use_pci_bar(intel_get_pci_device()); - - if (argc == 1) { - fprintf(stderr, "usage: %s cmd [args...]\n", argv[0]); - return 1; - } - - signal(SIGCHLD, sighandler); - signal(SIGINT, SIG_IGN); - signal(SIGQUIT, SIG_IGN); - - gettimeofday(&start, NULL); - child = spawn(argv+1); - if (child < 0) - return 127; - - while (!goddo) { - uint32_t ring_head, ring_tail; - - ring_head = INREG(LP_RING + RING_HEAD) & HEAD_ADDR; - ring_tail = INREG(LP_RING + RING_TAIL) & TAIL_ADDR; - - if (ring_tail == ring_head) - ring_idle++; - ring_time++; - - usleep(1000000 / SAMPLES_PER_SEC); - } - gettimeofday(&end, NULL); - timersub(&end, &start, &end); - - waitpid(child, &status, 0); - - getrusage(RUSAGE_CHILDREN, &rusage); - printf("user: %ld.%06lds, sys: %ld.%06lds, elapsed: %ld.%06lds, CPU: %.1f%%, GPU: %.1f%%\n", - rusage.ru_utime.tv_sec, rusage.ru_utime.tv_usec, - rusage.ru_stime.tv_sec, rusage.ru_stime.tv_usec, - end.tv_sec, end.tv_usec, - 100*(rusage.ru_utime.tv_sec + 1e-6*rusage.ru_utime.tv_usec + rusage.ru_stime.tv_sec + 1e-6*rusage.ru_stime.tv_usec) / (end.tv_sec + 1e-6*end.tv_usec), - 100 - ring_idle * 100. / ring_time); - - return WEXITSTATUS(status); -} diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c deleted file mode 100644 index b5cfda04..00000000 --- a/tools/intel_gpu_top.c +++ /dev/null @@ -1,718 +0,0 @@ -/* - * Copyright © 2007 Intel Corporation - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * Eugeni Dodonov <eugeni.dodonov@intel.com> - * - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include <unistd.h> -#include <stdlib.h> -#include <stdio.h> -#include <err.h> -#include <sys/ioctl.h> -#include <sys/time.h> -#include <sys/wait.h> -#include <string.h> -#ifdef HAVE_TERMIOS_H -#include <termios.h> -#endif -#include "intel_io.h" -#include "instdone.h" -#include "intel_reg.h" -#include "intel_chipset.h" - -#define FORCEWAKE 0xA18C -#define FORCEWAKE_ACK 0x130090 - -#define SAMPLES_PER_SEC 10000 -#define SAMPLES_TO_PERCENT_RATIO (SAMPLES_PER_SEC / 100) - -#define MAX_NUM_TOP_BITS 100 - -#define HAS_STATS_REGS(devid) IS_965(devid) - -struct top_bit { - struct instdone_bit *bit; - int count; -} top_bits[MAX_NUM_TOP_BITS]; -struct top_bit *top_bits_sorted[MAX_NUM_TOP_BITS]; - -static uint32_t instdone, instdone1; - -static const char *bars[] = { - " ", - "▏", - "▎", - "▍", - "▌", - "▋", - "▊", - "▉", - "█" -}; - -enum stats_counts { - IA_VERTICES, - IA_PRIMITIVES, - VS_INVOCATION, - GS_INVOCATION, - GS_PRIMITIVES, - CL_INVOCATION, - CL_PRIMITIVES, - PS_INVOCATION, - PS_DEPTH, - STATS_COUNT -}; - -const uint32_t stats_regs[STATS_COUNT] = { - IA_VERTICES_COUNT_QW, - IA_PRIMITIVES_COUNT_QW, - VS_INVOCATION_COUNT_QW, - GS_INVOCATION_COUNT_QW, - GS_PRIMITIVES_COUNT_QW, - CL_INVOCATION_COUNT_QW, - CL_PRIMITIVES_COUNT_QW, - PS_INVOCATION_COUNT_QW, - PS_DEPTH_COUNT_QW, -}; - -const char *stats_reg_names[STATS_COUNT] = { - "vert fetch", - "prim fetch", - "VS invocations", - "GS invocations", - "GS prims", - "CL invocations", - "CL prims", - "PS invocations", - "PS depth pass", -}; - -uint64_t stats[STATS_COUNT]; -uint64_t last_stats[STATS_COUNT]; - -static unsigned long -gettime(void) -{ - struct timeval t; - gettimeofday(&t, NULL); - return (t.tv_usec + (t.tv_sec * 1000000)); -} - -static int -top_bits_sort(const void *a, const void *b) -{ - struct top_bit * const *bit_a = a; - struct top_bit * const *bit_b = b; - int a_count = (*bit_a)->count; - int b_count = (*bit_b)->count; - - if (a_count < b_count) - return 1; - else if (a_count == b_count) - return 0; - else - return -1; -} - -static void -update_idle_bit(struct top_bit *top_bit) -{ - uint32_t reg_val; - - if (top_bit->bit->reg == INSTDONE_1) - reg_val = instdone1; - else - reg_val = instdone; - - if ((reg_val & top_bit->bit->bit) == 0) - top_bit->count++; -} - -static void -print_clock(const char *name, int clock) { - if (clock == -1) - printf("%s clock: unknown", name); - else - printf("%s clock: %d Mhz", name, clock); -} - -static int -print_clock_info(struct pci_device *pci_dev) -{ - uint32_t devid = pci_dev->device_id; - uint16_t gcfgc; - - if (IS_GM45(devid)) { - int core_clock = -1; - - pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); - - switch (gcfgc & 0xf) { - case 8: - core_clock = 266; - break; - case 9: - core_clock = 320; - break; - case 11: - core_clock = 400; - break; - case 13: - core_clock = 533; - break; - } - print_clock("core", core_clock); - } else if (IS_965(devid) && IS_MOBILE(devid)) { - int render_clock = -1, sampler_clock = -1; - - pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); - - switch (gcfgc & 0xf) { - case 2: - render_clock = 250; sampler_clock = 267; - break; - case 3: - render_clock = 320; sampler_clock = 333; - break; - case 4: - render_clock = 400; sampler_clock = 444; - break; - case 5: - render_clock = 500; sampler_clock = 533; - break; - } - - print_clock("render", render_clock); - printf(" "); - print_clock("sampler", sampler_clock); - } else if (IS_945(devid) && IS_MOBILE(devid)) { - int render_clock = -1, display_clock = -1; - - pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); - - switch (gcfgc & 0x7) { - case 0: - render_clock = 166; - break; - case 1: - render_clock = 200; - break; - case 3: - render_clock = 250; - break; - case 5: - render_clock = 400; - break; - } - - switch (gcfgc & 0x70) { - case 0: - display_clock = 200; - break; - case 4: - display_clock = 320; - break; - } - if (gcfgc & (1 << 7)) - display_clock = 133; - - print_clock("render", render_clock); - printf(" "); - print_clock("display", display_clock); - } else if (IS_915(devid) && IS_MOBILE(devid)) { - int render_clock = -1, display_clock = -1; - - pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); - - switch (gcfgc & 0x7) { - case 0: - render_clock = 160; - break; - case 1: - render_clock = 190; - break; - case 4: - render_clock = 333; - break; - } - if (gcfgc & (1 << 13)) - render_clock = 133; - - switch (gcfgc & 0x70) { - case 0: - display_clock = 190; - break; - case 4: - display_clock = 333; - break; - } - if (gcfgc & (1 << 7)) - display_clock = 133; - - print_clock("render", render_clock); - printf(" "); - print_clock("display", display_clock); - } - - - printf("\n"); - return -1; -} - -#define STATS_LEN (20) -#define PERCENTAGE_BAR_END (79 - STATS_LEN) - -static void -print_percentage_bar(float percent, int cur_line_len) -{ - int bar_avail_len = (PERCENTAGE_BAR_END - cur_line_len - 1) * 8; - int bar_len = bar_avail_len * (percent + .5) / 100.0; - int i; - - for (i = bar_len; i >= 8; i -= 8) { - printf("%s", bars[8]); - cur_line_len++; - } - if (i) { - printf("%s", bars[i]); - cur_line_len++; - } - - /* NB: We can't use a field width with utf8 so we manually - * guarantee a field with of 45 chars for any bar. */ - printf("%*s", PERCENTAGE_BAR_END - cur_line_len, ""); -} - -struct ring { - const char *name; - uint32_t mmio; - int head, tail, size; - uint64_t full; - int idle; -}; - -static uint32_t ring_read(struct ring *ring, uint32_t reg) -{ - return INREG(ring->mmio + reg); -} - -static void ring_init(struct ring *ring) -{ - ring->size = (((ring_read(ring, RING_LEN) & RING_NR_PAGES) >> 12) + 1) * 4096; -} - -static void ring_reset(struct ring *ring) -{ - ring->idle = ring->full = 0; -} - -static void ring_sample(struct ring *ring) -{ - int full; - - if (!ring->size) - return; - - ring->head = ring_read(ring, RING_HEAD) & HEAD_ADDR; - ring->tail = ring_read(ring, RING_TAIL) & TAIL_ADDR; - - if (ring->tail == ring->head) - ring->idle++; - - full = ring->tail - ring->head; - if (full < 0) - full += ring->size; - ring->full += full; -} - -static void ring_print_header(FILE *out, struct ring *ring) -{ - fprintf(out, "%.6s%%\tops\t", - ring->name - ); -} - -static void ring_print(struct ring *ring, unsigned long samples_per_sec) -{ - int percent_busy, len; - - if (!ring->size) - return; - - percent_busy = 100 - 100 * ring->idle / samples_per_sec; - - len = printf("%25s busy: %3d%%: ", ring->name, percent_busy); - print_percentage_bar (percent_busy, len); - printf("%24s space: %d/%d\n", - ring->name, - (int)(ring->full / samples_per_sec), - ring->size); -} - -static void ring_log(struct ring *ring, unsigned long samples_per_sec, - FILE *output) -{ - if (ring->size) - fprintf(output, "%3d\t%d\t", - (int)(100 - 100 * ring->idle / samples_per_sec), - (int)(ring->full / samples_per_sec)); - else - fprintf(output, "-1\t-1\t"); -} - -static void -usage(const char *appname) -{ - printf("intel_gpu_top - Display a top-like summary of Intel GPU usage\n" - "\n" - "usage: %s [parameters]\n" - "\n" - "The following parameters apply:\n" - "[-s <samples>] samples per seconds (default %d)\n" - "[-e <command>] command to profile\n" - "[-o <file>] output statistics to file. If file is '-'," - " run in batch mode and output statistics to stdio only \n" - "[-h] show this help screen\n" - "\n", - appname, - SAMPLES_PER_SEC - ); - return; -} - -int main(int argc, char **argv) -{ - uint32_t devid; - struct pci_device *pci_dev; - struct ring render_ring = { - .name = "render", - .mmio = 0x2030, - }, bsd_ring = { - .name = "bitstream", - .mmio = 0x4030, - }, bsd6_ring = { - .name = "bitstream", - .mmio = 0x12030, - }, blt_ring = { - .name = "blitter", - .mmio = 0x22030, - }; - int i, ch; - int samples_per_sec = SAMPLES_PER_SEC; - FILE *output = NULL; - double elapsed_time=0; - int print_headers=1; - pid_t child_pid=-1; - int child_stat; - char *cmd=NULL; - int interactive=1; - - /* Parse options? */ - while ((ch = getopt(argc, argv, "s:o:e:h")) != -1) { - switch (ch) { - case 'e': cmd = strdup(optarg); - break; - case 's': samples_per_sec = atoi(optarg); - if (samples_per_sec < 100) { - fprintf(stderr, "Error: samples per second must be >= 100\n"); - exit(1); - } - break; - case 'o': - if (!strcmp(optarg, "-")) { - /* Running in non-interactive mode */ - interactive = 0; - output = stdout; - } - else - output = fopen(optarg, "w"); - if (!output) - { - perror("fopen"); - exit(1); - } - break; - case 'h': - usage(argv[0]); - exit(0); - break; - default: - fprintf(stderr, "Invalid flag %c!\n", (char)optopt); - usage(argv[0]); - exit(1); - break; - } - } - - pci_dev = intel_get_pci_device(); - devid = pci_dev->device_id; - intel_mmio_use_pci_bar(pci_dev); - init_instdone_definitions(devid); - - /* Do we have a command to run? */ - if (cmd != NULL) { - if (output) { - fprintf(output, "# Profiling: %s\n", cmd); - fflush(output); - } - child_pid = fork(); - if (child_pid < 0) { - perror("fork"); - exit(1); - } - else if (child_pid == 0) { - int res; - res = system(cmd); - if (res < 0) - perror("running command"); - if (output) { - fflush(output); - fprintf(output, "# %s exited with status %d\n", cmd, res); - fflush(output); - } - free(cmd); - exit(0); - } else { - free(cmd); - } - } - - for (i = 0; i < num_instdone_bits; i++) { - top_bits[i].bit = &instdone_bits[i]; - top_bits[i].count = 0; - top_bits_sorted[i] = &top_bits[i]; - } - - /* Grab access to the registers */ - intel_register_access_init(pci_dev, 0); - - ring_init(&render_ring); - if (IS_GEN4(devid) || IS_GEN5(devid)) - ring_init(&bsd_ring); - if (IS_GEN6(devid) || IS_GEN7(devid)) { - ring_init(&bsd6_ring); - ring_init(&blt_ring); - } - - /* Initialize GPU stats */ - if (HAS_STATS_REGS(devid)) { - for (i = 0; i < STATS_COUNT; i++) { - uint32_t stats_high, stats_low, stats_high_2; - - do { - stats_high = INREG(stats_regs[i] + 4); - stats_low = INREG(stats_regs[i]); - stats_high_2 = INREG(stats_regs[i] + 4); - } while (stats_high != stats_high_2); - - last_stats[i] = (uint64_t)stats_high << 32 | - stats_low; - } - } - - for (;;) { - int j; - unsigned long long t1, ti, tf, t2; - unsigned long long def_sleep = 1000000 / samples_per_sec; - unsigned long long last_samples_per_sec = samples_per_sec; - unsigned short int max_lines; - struct winsize ws; - char clear_screen[] = {0x1b, '[', 'H', - 0x1b, '[', 'J', - 0x0}; - int percent; - int len; - - t1 = gettime(); - - ring_reset(&render_ring); - ring_reset(&bsd_ring); - ring_reset(&bsd6_ring); - ring_reset(&blt_ring); - - for (i = 0; i < samples_per_sec; i++) { - long long interval; - ti = gettime(); - if (IS_965(devid)) { - instdone = INREG(INSTDONE_I965); - instdone1 = INREG(INSTDONE_1); - } else - instdone = INREG(INSTDONE); - - for (j = 0; j < num_instdone_bits; j++) - update_idle_bit(&top_bits[j]); - - ring_sample(&render_ring); - ring_sample(&bsd_ring); - ring_sample(&bsd6_ring); - ring_sample(&blt_ring); - - tf = gettime(); - if (tf - t1 >= 1000000) { - /* We are out of sync, bail out */ - last_samples_per_sec = i+1; - break; - } - interval = def_sleep - (tf - ti); - if (interval > 0) - usleep(interval); - } - - if (HAS_STATS_REGS(devid)) { - for (i = 0; i < STATS_COUNT; i++) { - uint32_t stats_high, stats_low, stats_high_2; - - do { - stats_high = INREG(stats_regs[i] + 4); - stats_low = INREG(stats_regs[i]); - stats_high_2 = INREG(stats_regs[i] + 4); - } while (stats_high != stats_high_2); - - stats[i] = (uint64_t)stats_high << 32 | - stats_low; - } - } - - qsort(top_bits_sorted, num_instdone_bits, - sizeof(struct top_bit *), top_bits_sort); - - /* Limit the number of lines printed to the terminal height so the - * most important info (at the top) will stay on screen. */ - max_lines = -1; - if (ioctl(0, TIOCGWINSZ, &ws) != -1) - max_lines = ws.ws_row - 6; /* exclude header lines */ - if (max_lines >= num_instdone_bits) - max_lines = num_instdone_bits; - - t2 = gettime(); - elapsed_time += (t2 - t1) / 1000000.0; - - if (interactive) { - printf("%s", clear_screen); - print_clock_info(pci_dev); - - ring_print(&render_ring, last_samples_per_sec); - ring_print(&bsd_ring, last_samples_per_sec); - ring_print(&bsd6_ring, last_samples_per_sec); - ring_print(&blt_ring, last_samples_per_sec); - - printf("\n%30s %s\n", "task", "percent busy"); - for (i = 0; i < max_lines; i++) { - if (top_bits_sorted[i]->count > 0) { - percent = (top_bits_sorted[i]->count * 100) / - last_samples_per_sec; - len = printf("%30s: %3d%%: ", - top_bits_sorted[i]->bit->name, - percent); - print_percentage_bar (percent, len); - } else { - printf("%*s", PERCENTAGE_BAR_END, ""); - } - - if (i < STATS_COUNT && HAS_STATS_REGS(devid)) { - printf("%13s: %llu (%lld/sec)", - stats_reg_names[i], - (long long)stats[i], - (long long)(stats[i] - last_stats[i])); - last_stats[i] = stats[i]; - } else { - if (!top_bits_sorted[i]->count) - break; - } - printf("\n"); - } - } - if (output) { - /* Print headers for columns at first run */ - if (print_headers) { - fprintf(output, "# time\t"); - ring_print_header(output, &render_ring); - ring_print_header(output, &bsd_ring); - ring_print_header(output, &bsd6_ring); - ring_print_header(output, &blt_ring); - for (i = 0; i < MAX_NUM_TOP_BITS; i++) { - if (i < STATS_COUNT && HAS_STATS_REGS(devid)) { - fprintf(output, "%.6s\t", - stats_reg_names[i] - ); - } - if (!top_bits[i].count) - continue; - } - fprintf(output, "\n"); - print_headers = 0; - } - - /* Print statistics */ - fprintf(output, "%.2f\t", elapsed_time); - ring_log(&render_ring, last_samples_per_sec, output); - ring_log(&bsd_ring, last_samples_per_sec, output); - ring_log(&bsd6_ring, last_samples_per_sec, output); - ring_log(&blt_ring, last_samples_per_sec, output); - - for (i = 0; i < MAX_NUM_TOP_BITS; i++) { - if (i < STATS_COUNT && HAS_STATS_REGS(devid)) { - fprintf(output, "%lu\t", - stats[i] - last_stats[i]); - last_stats[i] = stats[i]; - } - if (!top_bits[i].count) - continue; - } - fprintf(output, "\n"); - fflush(output); - } - - for (i = 0; i < num_instdone_bits; i++) { - top_bits_sorted[i]->count = 0; - - if (i < STATS_COUNT) - last_stats[i] = stats[i]; - } - - /* Check if child has gone */ - if (child_pid > 0) { - int res; - if ((res = waitpid(child_pid, &child_stat, WNOHANG)) == -1) { - perror("waitpid"); - exit(1); - } - if (res == 0) - continue; - if (WIFEXITED(child_stat)) - break; - } - } - - fclose(output); - - intel_register_access_fini(); - return 0; -} diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c deleted file mode 100644 index 9604a547..00000000 --- a/tools/intel_gtt.c +++ /dev/null @@ -1,188 +0,0 @@ -/* - * Copyright © 2008 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -#define __STDC_FORMAT_MACROS -#include <inttypes.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <stdarg.h> -#include <pciaccess.h> -#include <unistd.h> - -#include "intel_io.h" -#include "intel_chipset.h" - -#define KB(x) ((x) * 1024) -#define MB(x) ((x) * 1024 * 1024) -unsigned char *gtt; -uint32_t devid; - -#define INGTT(offset) (*(volatile uint32_t *)(gtt + (offset) / (KB(4) / 4))) -static uint64_t get_phys(uint32_t pt_offset) -{ - uint64_t pae = 0; - uint64_t phys = INGTT(pt_offset); - - if (intel_gen(devid) < 4 && !IS_G33(devid)) - return phys & ~0xfff; - - switch (intel_gen(devid)) { - case 3: - case 4: - case 5: - pae = (phys & 0xf0) << 28; - break; - case 6: - case 7: - if (IS_HASWELL(devid)) - pae = (phys & 0x7f0) << 28; - else - pae = (phys & 0xff0) << 28; - break; - default: - fprintf(stderr, "Unsupported platform\n"); - exit(-1); - } - - return (phys | pae) & ~0xfff; -} - -static void pte_dump(int size, uint32_t offset) { - int start; - /* Want to print 4 ptes at a time (4b PTE assumed). */ - if (size % 16) - size = (size + 16) & ~0xffff; - - - printf("GTT offset | PTEs\n"); - printf("--------------------------------------------------------\n"); - for (start = 0; start < size; start += KB(16)) { - printf(" 0x%06x | 0x%08x 0x%08x 0x%08x 0x%08x\n", - start, - INGTT(start + 0x0), - INGTT(start + 0x1000), - INGTT(start + 0x2000), - INGTT(start + 0x3000)); - } -} - -int main(int argc, char **argv) -{ - struct pci_device *pci_dev; - int start, gtt_size; - int flag[] = { - PCI_DEV_MAP_FLAG_WRITE_COMBINE, - PCI_DEV_MAP_FLAG_WRITABLE, - 0 - }, f; - - pci_dev = intel_get_pci_device(); - devid = pci_dev->device_id; - - if (IS_GEN2(devid)) { - printf("Unsupported chipset for gtt dumper\n"); - exit(1); - } - - for (f = 0; flag[f] != 0; f++) { - if (IS_GEN3(devid)) { - /* 915/945 chips has GTT range in bar 3 */ - if (pci_device_map_range(pci_dev, - pci_dev->regions[3].base_addr, - pci_dev->regions[3].size, - flag[f], - (void **)>t) == 0) - break; - } else { - int offset; - if (IS_GEN4(devid)) - offset = KB(512); - else - offset = MB(2); - if (pci_device_map_range(pci_dev, - pci_dev->regions[0].base_addr + offset, - offset, - flag[f], - (void **)>t) == 0) - break; - } - } - if (flag[f] == 0) { - printf("Failed to map gtt\n"); - exit(1); - } - - gtt_size = pci_dev->regions[0].size / 2; - if (argc > 1 && !strncmp("-d", argv[1], 2)) { - pte_dump(gtt_size, 0); - return 0; - } - - for (start = 0; start < gtt_size; start += KB(4)) { - uint64_t start_phys = get_phys(start); - uint32_t end; - int constant_length = 0; - int linear_length = 0; - - /* Check if it's a linear sequence */ - for (end = start + KB(4); end < gtt_size; end += KB(4)) { - uint64_t end_phys = get_phys(end); - if (end_phys == start_phys + (end - start)) - linear_length++; - else - break; - } - if (linear_length > 0) { - printf("0x%08x - 0x%08x: linear from " - "0x%" PRIx64 " to 0x%" PRIx64 "\n", - start, end - KB(4), - start_phys, start_phys + (end - start) - KB(4)); - start = end - KB(4); - continue; - } - - /* Check if it's a constant sequence */ - for (end = start + KB(4); end < gtt_size; end += KB(4)) { - uint64_t end_phys = get_phys(end); - if (end_phys == start_phys) - constant_length++; - else - break; - } - if (constant_length > 0) { - printf("0x%08x - 0x%08x: constant 0x%" PRIx64 "\n", - start, end - KB(4), start_phys); - start = end - KB(4); - continue; - } - - printf("0x%08x: 0x%" PRIx64 "\n", start, start_phys); - } - - return 0; -} diff --git a/tools/intel_infoframes.c b/tools/intel_infoframes.c deleted file mode 100644 index e03cb2c0..00000000 --- a/tools/intel_infoframes.c +++ /dev/null @@ -1,1261 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Paulo Zanoni <paulo.r.zanoni@intel.com> - * - */ - -#include <assert.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <getopt.h> -#include "intel_io.h" -#include "intel_chipset.h" -#include "drmtest.h" - -typedef enum { - TRANSC_A = 0, - TRANSC_B = 1, - TRANSC_C = 2, - TRANSC_INVALID -} Transcoder; - -typedef enum { - REG_HDMIB_GEN4 = 0x61140, - REG_HDMIC_GEN4 = 0x61160, - REG_HDMIB_VLV = 0x1e1140, - REG_HDMIC_VLV = 0x1e1160, - REG_HDMIB_PCH = 0xe1140, - REG_HDMIC_PCH = 0xe1150, - REG_HDMID_PCH = 0xe1160, - REG_DIP_CTL_GEN4 = 0x61170, - REG_DIP_CTL_A_VLV = 0x1e0200, - REG_DIP_CTL_B_VLV = 0x1e1170, - REG_DIP_CTL_A = 0xe0200, - REG_DIP_CTL_B = 0xe1200, - REG_DIP_CTL_C = 0xe2200, - REG_DIP_DATA_GEN4 = 0x61178, - REG_DIP_DATA_A_VLV = 0x1e0208, - REG_DIP_DATA_B_VLV = 0x1e1174, - REG_DIP_DATA_A = 0xe0208, - REG_DIP_DATA_B = 0xe1208, - REG_DIP_DATA_C = 0xe2208, -} Register; - -typedef enum { - DIP_AVI = 0, - DIP_VENDOR = 1, - DIP_GAMUT = 2, - DIP_SPD = 3, - DIP_INVALID, -} DipType; - -typedef enum { - DIP_FREQ_ONCE = 0, - DIP_FREQ_EVERY_VSYNC = 1, - DIP_FREQ_EVERY_OTHER_VSYNC = 2, - DIP_FREQ_RESERVED = 3, -} DipFrequency; - -typedef enum { - SOURCE_DEVICE_UNKNOWN = 0x00, - SOURCE_DEVICE_DIGITAL_STB = 0x01, - SOURCE_DEVICE_DVD_PLAYER = 0x02, - SOURCE_DEVICE_D_VHS = 0x03, - SOURCE_DEVICE_HDD_VIDEORECORDER = 0x04, - SOURCE_DEVICE_DVC = 0x05, - SOURCE_DEVICE_DSC = 0x06, - SOURCE_DEVICE_VIDEO_CD = 0x07, - SOURCE_DEVICE_GAME = 0x08, - SOURCE_DEVICE_PC_GENERAL = 0x09, - SOURCE_DEVICE_BLU_RAY_DISK = 0x0a, - SOURCE_DEVICE_SUPER_AUDIO_CD = 0x0b, - SOURCE_DEVICE_RESERVED = 0x0c -} SourceDevice; - -#define HDMI_PORT_ENABLE (1 << 31) -#define HDMI_PORT_TRANSCODER_GEN4 (1 << 30) -#define HDMI_PORT_TRANSCODER_IBX (1 << 30) -#define HDMI_PORT_TRANSCODER_CPT (3 << 29) -#define HDMI_PORT_ENCODING (3 << 10) -#define HDMI_PORT_MODE (1 << 9) -#define HDMI_PORT_AUDIO (1 << 6) -#define HDMI_PORT_DETECTED (1 << 2) - -#define DIP_CTL_ENABLE (1 << 31) -#define DIP_CTL_GCP_ENABLE (1 << 25) -#define DIP_CTL_SPD_ENABLE (1 << 24) -#define DIP_CTL_GAMUT_ENABLE (1 << 23) -#define DIP_CTL_VENDOR_ENABLE (1 << 22) -#define DIP_CTL_AVI_ENABLE (1 << 21) -#define DIP_CTL_BUFFER_INDEX (3 << 19) -#define DIP_CTL_BUFFER_AVI (0 << 19) -#define DIP_CTL_BUFFER_VENDOR (1 << 19) -#define DIP_CTL_BUFFER_GAMUT (2 << 19) -#define DIP_CTL_BUFFER_SPD (3 << 19) -#define DIP_CTL_FREQUENCY (3 << 16) -#define DIP_CTL_FREQ_ONCE (0 << 16) -#define DIP_CTL_FREQ_EVERY (1 << 16) -#define DIP_CTL_FREQ_EVERY_OTHER (2 << 16) -#define DIP_CTL_BUFFER_SIZE (15 << 8) -#define DIP_CTL_ACCESS_ADDR (15 << 0) - -#define DIP_CTL_PORT_SEL_MASK_GEN4 (3 << 29) -#define DIP_CTL_PORT_SEL_B_GEN4 (1 << 29) -#define DIP_CTL_PORT_SEL_C_GEN4 (2 << 29) -#define DIP_CTL_BUFFER_TRANS_ACTIVE_GEN4 (1 << 28) - -#define AVI_INFOFRAME_TYPE 0x82 -#define AVI_INFOFRAME_VERSION 0x02 -#define AVI_INFOFRAME_LENGTH 0x0d -#define SPD_INFOFRAME_TYPE 0x83 -#define SPD_INFOFRAME_VERSION 0x01 -#define SPD_INFOFRAME_LENGTH 0x19 - -#define VENDOR_ID_HDMI 0x000c03 - -typedef struct { - uint8_t type; - uint8_t version; - uint8_t length; - uint8_t ecc; -} DipInfoFrameHeader; - -typedef union { - struct { - DipInfoFrameHeader header; - uint8_t checksum; - - uint8_t S :2; - uint8_t B :2; - uint8_t A :1; - uint8_t Y :2; - uint8_t Rsvd0 :1; - - uint8_t R :4; - uint8_t M :2; - uint8_t C :2; - - uint8_t SC :2; - uint8_t Q :2; - uint8_t EC :3; - uint8_t ITC :1; - - uint8_t VIC :7; - uint8_t Rsvd1 :1; - - uint8_t PR :4; - uint8_t Rsvd2 :4; - - uint16_t top; - uint16_t bottom; - uint16_t left; - uint16_t right; - - uint16_t Rsvd3; - uint32_t Rsvd4[3]; - } avi; - struct { - DipInfoFrameHeader header; - uint8_t checksum; - uint8_t vendor[8]; - uint8_t description[16]; - uint8_t source; - } __attribute__((packed)) spd; - struct { - DipInfoFrameHeader header; - uint8_t checksum; - - uint8_t id[3]; - - uint8_t Rsvd0 :5; - uint8_t video_format :3; - - union { - uint8_t vic; - struct { - uint8_t Rsvd1 :4; - uint8_t s3d_structure :4; - } s3d; - } pb5; - - uint8_t Rsvd2 :4; - uint8_t s3d_ext_data :4; - } __attribute__((packed)) vendor; - struct { - DipInfoFrameHeader header; - uint8_t body[27]; - } generic; - uint8_t data8[128]; - uint32_t data32[16]; -} DipInfoFrame; - -Register vlv_hdmi_ports[] = { - REG_HDMIB_VLV, - REG_HDMIC_VLV, -}; - -Register vlv_dip_ctl_regs[] = { - REG_DIP_CTL_A_VLV, - REG_DIP_CTL_B_VLV, -}; - -Register vlv_dip_data_regs[] = { - REG_DIP_DATA_A_VLV, - REG_DIP_DATA_B_VLV, -}; - -Register gen4_hdmi_ports[] = { - REG_HDMIB_GEN4, - REG_HDMIC_GEN4, -}; -Register pch_hdmi_ports[] = { - REG_HDMIB_PCH, - REG_HDMIC_PCH, - REG_HDMID_PCH -}; -Register pch_dip_ctl_regs[] = { - REG_DIP_CTL_A, - REG_DIP_CTL_B, - REG_DIP_CTL_C -}; -Register pch_dip_data_regs[] = { - REG_DIP_DATA_A, - REG_DIP_DATA_B, - REG_DIP_DATA_C -}; -const char *hdmi_port_names[] = { - "HDMIB", - "HDMIC", - "HDMID" -}; -const char *transcoder_names[] = { - "A", - "B", - "C" -}; -const char *dip_frequency_names[] = { - "once", - "every vsync", - "every other vsync", - "reserved (invalid)" -}; - -struct pci_device *pci_dev; -int gen = 0; - -static const char *spd_source_to_string(SourceDevice source) -{ - switch (source) { - case SOURCE_DEVICE_UNKNOWN: - return "unknown"; - case SOURCE_DEVICE_DIGITAL_STB: - return "digital stb"; - case SOURCE_DEVICE_DVD_PLAYER: - return "dvd player"; - case SOURCE_DEVICE_D_VHS: - return "d vhs"; - case SOURCE_DEVICE_HDD_VIDEORECORDER: - return "hdd videorecorder"; - case SOURCE_DEVICE_DVC: - return "dvc"; - case SOURCE_DEVICE_DSC: - return "dsc"; - case SOURCE_DEVICE_VIDEO_CD: - return "video cd"; - case SOURCE_DEVICE_GAME: - return "game"; - case SOURCE_DEVICE_PC_GENERAL: - return "pc general"; - case SOURCE_DEVICE_BLU_RAY_DISK: - return "blu-ray disk"; - case SOURCE_DEVICE_SUPER_AUDIO_CD: - return "super audio cd"; - default: - return "reserved"; - } -} - -static Register get_dip_ctl_reg(Transcoder transcoder) -{ - if (IS_VALLEYVIEW(pci_dev->device_id)) - return vlv_dip_ctl_regs[transcoder]; - else if (gen == 4) - return REG_DIP_CTL_GEN4; - else - return pch_dip_ctl_regs[transcoder]; -} - -static Register get_dip_data_reg(Transcoder transcoder) -{ - if (IS_VALLEYVIEW(pci_dev->device_id)) - return vlv_dip_data_regs[transcoder]; - else if (gen == 4) - return REG_DIP_DATA_GEN4; - else - return pch_dip_data_regs[transcoder]; -} - -static Register get_hdmi_port(int hdmi_port_index) -{ - if (IS_VALLEYVIEW(pci_dev->device_id)) - return vlv_hdmi_ports[hdmi_port_index]; - else if (gen == 4) { - assert(hdmi_port_index < 2); - return gen4_hdmi_ports[hdmi_port_index]; - } else { - return pch_hdmi_ports[hdmi_port_index]; - } -} - -static void load_infoframe(Transcoder transcoder, DipInfoFrame *frame, - DipType type) -{ - Register ctl_reg = get_dip_ctl_reg(transcoder); - Register data_reg = get_dip_data_reg(transcoder); - uint32_t ctl_val; - uint32_t i; - - ctl_val = INREG(ctl_reg); - - ctl_val &= ~DIP_CTL_BUFFER_INDEX; - ctl_val |= type << 19; - OUTREG(ctl_reg, ctl_val); - ctl_val = INREG(ctl_reg); - - ctl_val &= ~DIP_CTL_ACCESS_ADDR; - OUTREG(ctl_reg, ctl_val); - - for (i = 0; i < 16; i++) { - ctl_val = INREG(ctl_reg); - assert((ctl_val & DIP_CTL_ACCESS_ADDR) == i); - frame->data32[i] = INREG(data_reg); - } -} - -static int infoframe_valid_checksum(DipInfoFrame *frame) -{ - int i; - int length = frame->generic.header.length; - uint8_t csum; - - csum = frame->generic.header.type + frame->generic.header.version + - frame->generic.header.length; /* no ecc */ - for (i = 0; i < length + 1; i++) - csum += frame->generic.body[i]; - - return (csum == 0); -} - -static void infoframe_fix_checksum(DipInfoFrame *frame) -{ - int i; - int length = frame->generic.header.length; - uint8_t csum; - - csum = frame->generic.header.type + frame->generic.header.version + - frame->generic.header.length; /* no ecc */ - /* Length does not include the header field nor the checksum */ - for (i = 1; i < length + 1; i++) - csum += frame->generic.body[i]; - frame->generic.body[0] = 0x100 - csum; -} - -static void dump_port_info(int hdmi_port_index) -{ - Register port = get_hdmi_port(hdmi_port_index); - uint32_t val = INREG(port); - Transcoder transcoder; - - printf("\nPort %s:\n", hdmi_port_names[hdmi_port_index]); - printf("- %sdetected\n", val & HDMI_PORT_DETECTED ? "" : "not "); - printf("- %s\n", val & HDMI_PORT_ENABLE ? "enabled" : "disabled"); - - if (!(val & HDMI_PORT_ENABLE)) - return; - - if (gen == 4 || IS_VALLEYVIEW(pci_dev->device_id)) - transcoder = (val & HDMI_PORT_TRANSCODER_GEN4) >> 30; - else if (intel_pch >= PCH_CPT) - transcoder = (val & HDMI_PORT_TRANSCODER_CPT) >> 29; - else - transcoder = (val & HDMI_PORT_TRANSCODER_IBX) >> 30; - printf("- transcoder: %s\n", transcoder_names[transcoder]); - - switch ((val & HDMI_PORT_ENCODING) >> 10) { - case 0: - printf("- mode: SDVO\n"); - break; - case 2: - printf("- mode: TMDS\n"); - break; - default: - printf("- mode: INVALID!\n"); - } - - printf("- mode: %s\n", val & HDMI_PORT_MODE ? "HDMI" : "DVI"); - printf("- audio: %s\n", val & HDMI_PORT_AUDIO ? "enabled" : "disabled"); -} - -static void dump_raw_infoframe(DipInfoFrame *frame) -{ - unsigned int i; - printf("- raw:"); - for (i = 0; i < 16; i++) { - if (i % 4 == 0) - printf("\n "); - printf(" %08x", frame->data32[i]); - } - printf("\n"); -} - -static void dump_avi_info(Transcoder transcoder) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val; - DipFrequency freq; - DipInfoFrame frame; - - load_infoframe(transcoder, &frame, DIP_AVI); - val = INREG(reg); - - printf("AVI InfoFrame:\n"); - - if (gen == 4) { - printf("- %sbeing transmitted\n", - val & DIP_CTL_BUFFER_TRANS_ACTIVE_GEN4 ? "" : "not "); - } - - freq = (val & DIP_CTL_FREQUENCY) >> 16; - printf("- frequency: %s\n", dip_frequency_names[freq]); - - dump_raw_infoframe(&frame); - - printf("- type: %x, version: %x, length: %x, ecc: %x, checksum: %x\n", - frame.avi.header.type, frame.avi.header.version, - frame.avi.header.length, frame.avi.header.ecc, - frame.avi.checksum); - printf("- S: %x, B: %x, A: %x, Y: %x, Rsvd0: %x\n", - frame.avi.S, frame.avi.B, frame.avi.A, frame.avi.Y, - frame.avi.Rsvd0); - printf("- R: %x, M: %x, C: %x\n", - frame.avi.R, frame.avi.M, frame.avi.C); - printf("- SC: %x, Q: %x, EC: %x, ITC: %x\n", - frame.avi.SC, frame.avi.Q, frame.avi.EC, frame.avi.ITC); - printf("- VIC: %d, Rsvd1: %x\n", frame.avi.VIC, frame.avi.Rsvd1); - printf("- PR: %x, Rsvd2: %x\n", frame.avi.PR, frame.avi.Rsvd2); - printf("- top: %x, bottom: %x, left: %x, right: %x\n", - frame.avi.top, frame.avi.bottom, frame.avi.left, - frame.avi.right); - printf("- Rsvd3: %x, Rsvd4[0]: %x, Rsvd4[1]: %x, Rsvd4[2]: %x\n", - frame.avi.Rsvd3, frame.avi.Rsvd4[0], frame.avi.Rsvd4[1], - frame.avi.Rsvd4[2]); - - if (!infoframe_valid_checksum(&frame)) - printf("Invalid InfoFrame checksum!\n"); -} - -static const char *vendor_id_to_string(uint32_t id) -{ - switch (id) { - case VENDOR_ID_HDMI: - return "HDMI"; - default: - return "Unknown"; - } -} - -static const char *s3d_structure_to_string(int format) -{ - switch (format) { - case 0: - return "Frame Packing"; - case 6: - return "Top Bottom"; - case 8: - return "Side By Side (half)"; - default: - return "Reserved"; - } -} - -static void dump_vendor_hdmi(DipInfoFrame *frame) -{ - int vic_present = frame->vendor.video_format & 0x1; - int s3d_present = frame->vendor.video_format & 0x2; - - printf("- video format: 0x%03x %s\n", frame->vendor.video_format, - s3d_present ? "(3D)" : ""); - - if (vic_present && s3d_present) { - printf("Error: HDMI VIC and S3D bits set. Only one of those " - " at a time is valid\n"); - return; - } - - if (vic_present) - printf("- HDMI VIC: %d\n", frame->vendor.pb5.vic); - else if (s3d_present) { - int s3d_structure = frame->vendor.pb5.s3d.s3d_structure; - - printf("- 3D Format: %s\n", - s3d_structure_to_string(s3d_structure)); - - /* Side-by-side (half) */ - if (s3d_structure >= 8) - printf("- 3D Ext Data 0x%x\n", - frame->vendor.s3d_ext_data); - } -} - -static void dump_vendor_info(Transcoder transcoder) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val, vendor_id; - DipFrequency freq; - DipInfoFrame frame; - - load_infoframe(transcoder, &frame, DIP_VENDOR); - val = INREG(reg); - - printf("Vendor InfoFrame:\n"); - - if (gen == 4) { - printf("- %sbeing transmitted\n", - val & DIP_CTL_BUFFER_TRANS_ACTIVE_GEN4 ? "" : "not "); - } - - freq = (val & DIP_CTL_FREQUENCY) >> 16; - printf("- frequency: %s\n", dip_frequency_names[freq]); - - dump_raw_infoframe(&frame); - - vendor_id = frame.vendor.id[2] << 16 | frame.vendor.id[1] << 8 | - frame.vendor.id[0]; - - printf("- vendor Id: 0x%06x (%s)\n", vendor_id, - vendor_id_to_string(vendor_id)); - - if (vendor_id == VENDOR_ID_HDMI) - dump_vendor_hdmi(&frame); - - if (!infoframe_valid_checksum(&frame)) - printf("Invalid InfoFrame checksum!\n"); -} - -static void dump_gamut_info(Transcoder transcoder) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val; - DipFrequency freq; - DipInfoFrame frame; - - load_infoframe(transcoder, &frame, DIP_GAMUT); - val = INREG(reg); - - printf("Gamut InfoFrame:\n"); - - if (gen == 4) { - printf("- %sbeing transmitted\n", - val & DIP_CTL_BUFFER_TRANS_ACTIVE_GEN4 ? "" : "not "); - } - - freq = (val & DIP_CTL_FREQUENCY) >> 16; - printf("- frequency: %s\n", dip_frequency_names[freq]); - - dump_raw_infoframe(&frame); - - if (!infoframe_valid_checksum(&frame)) - printf("Invalid InfoFrame checksum!\n"); -} - -static void dump_spd_info(Transcoder transcoder) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val; - DipFrequency freq; - DipInfoFrame frame; - char vendor[9]; - char description[17]; - - load_infoframe(transcoder, &frame, DIP_SPD); - val = INREG(reg); - - printf("SPD InfoFrame:\n"); - - if (gen == 4) { - printf("- %sbeing transmitted\n", - val & DIP_CTL_BUFFER_TRANS_ACTIVE_GEN4 ? "" : "not "); - } - - freq = (val & DIP_CTL_FREQUENCY) >> 16; - printf("- frequency: %s\n", dip_frequency_names[freq]); - - dump_raw_infoframe(&frame); - - printf("- type: %x, version: %x, length: %x, ecc: %x, checksum: %x\n", - frame.spd.header.type, frame.spd.header.version, - frame.spd.header.length, frame.spd.header.ecc, - frame.spd.checksum); - - memcpy(vendor, frame.spd.vendor, 8); - vendor[8] = '\0'; - memcpy(description, frame.spd.description, 16); - description[16] = '\0'; - - printf("- vendor: %s\n", vendor); - printf("- description: %s\n", description); - printf("- source: %s\n", spd_source_to_string(frame.spd.source)); - - if (!infoframe_valid_checksum(&frame)) - printf("Invalid InfoFrame checksum!\n"); -} - -static void dump_transcoder_info(Transcoder transcoder) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val = INREG(reg); - - if (gen == 4) { - printf("\nDIP information:\n"); - switch (val & DIP_CTL_PORT_SEL_MASK_GEN4) { - case DIP_CTL_PORT_SEL_B_GEN4: - printf("- port B\n"); - break; - case DIP_CTL_PORT_SEL_C_GEN4: - printf("- port C\n"); - break; - default: - printf("- INVALID port!\n"); - } - } else { - printf("\nTranscoder %s:\n", transcoder_names[transcoder]); - } - printf("- %s\n", val & DIP_CTL_ENABLE ? "enabled" : "disabled"); - if (!(val & DIP_CTL_ENABLE)) - return; - - printf("- GCP: %s\n", val & DIP_CTL_GCP_ENABLE ? - "enabled" : "disabled"); - - if (val & DIP_CTL_AVI_ENABLE) - dump_avi_info(transcoder); - if (val & DIP_CTL_VENDOR_ENABLE) - dump_vendor_info(transcoder); - if (val & DIP_CTL_GAMUT_ENABLE) - dump_gamut_info(transcoder); - if (val & DIP_CTL_SPD_ENABLE) - dump_spd_info(transcoder); -} - -static void dump_all_info(void) -{ - unsigned int i; - - if (IS_VALLEYVIEW(pci_dev->device_id)) { - for (i = 0; i < ARRAY_SIZE(vlv_hdmi_ports); i++) - dump_port_info(i); - for (i = 0; i < ARRAY_SIZE(vlv_dip_ctl_regs); i++) - dump_transcoder_info(i); - } else if (gen == 4) { - for (i = 0; i < ARRAY_SIZE(gen4_hdmi_ports); i++) - dump_port_info(i); - dump_transcoder_info(0); - } else { - for (i = 0; i < ARRAY_SIZE(pch_hdmi_ports); i++) - dump_port_info(i); - for (i = 0; i < ARRAY_SIZE(pch_dip_ctl_regs); i++) - dump_transcoder_info(i); - } -} - -static void write_infoframe(Transcoder transcoder, DipType type, - DipInfoFrame *frame) -{ - Register ctl_reg = get_dip_ctl_reg(transcoder); - Register data_reg = get_dip_data_reg(transcoder); - uint32_t ctl_val; - unsigned int i; - - ctl_val = INREG(ctl_reg); - ctl_val &= ~DIP_CTL_BUFFER_INDEX; - ctl_val |= (type << 19); - ctl_val &= ~DIP_CTL_ACCESS_ADDR; - OUTREG(ctl_reg, ctl_val); - - for (i = 0; i < 8; i++) { - ctl_val = INREG(ctl_reg); - assert((ctl_val & DIP_CTL_ACCESS_ADDR) == i); - OUTREG(data_reg, frame->data32[i]); - } -} - -static void disable_infoframe(Transcoder transcoder, DipType type) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val = INREG(reg); - if (gen != 4 && type == DIP_AVI) - val &= ~DIP_CTL_ENABLE; - val &= ~(1 << (21 + type)); - OUTREG(reg, val); -} - -static void enable_infoframe(Transcoder transcoder, DipType type) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val = INREG(reg); - if (gen != 4 && type == DIP_AVI) - val |= DIP_CTL_ENABLE; - val |= (1 << (21 + type)); - OUTREG(reg, val); -} - -static int parse_infoframe_option_u(const char *name, const char *s, - uint32_t min, uint32_t max, - uint32_t *value, char **commands) -{ - int read, rc; - if (!strcmp(name, s)) { - rc = sscanf(*commands, "%x%n", value, &read); - *commands = &(*commands)[read]; - if (rc != 1) { - printf("Invalid value.\n"); - return 0; - } - - if (*value < min || *value > max) { - printf("Value outside allowed range.\n"); - return 0; - } - return 1; - } - return 0; -} - -static int parse_infoframe_option_s(const char *name, const char *s, - int min_size, int max_size, - char *value, char **commands) -{ - int size, read, rc; - if (!strcmp(name, s)) { - rc = sscanf(*commands, "%31s%n", value, &read); - *commands = &(*commands)[read]; - if (rc != 1) { - printf("Invalid value.\n"); - return 0; - } - - size = strlen(value); - if (size < min_size || size > max_size) { - printf("String either too big or too small.\n"); - return 0; - } - return 1; - } - return 0; -} - -static void change_avi_infoframe(Transcoder transcoder, char *commands) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val; - DipInfoFrame frame; - char option[32]; - uint32_t option_val; - int rc, read; - char *current = commands; - - load_infoframe(transcoder, &frame, DIP_AVI); - val = INREG(reg); - - while (1) { - rc = sscanf(current, "%31s%n", option, &read); - current = ¤t[read]; - if (rc == EOF) { - break; - } else if (rc != 1) { - printf("Invalid option: %s\n", option); - continue; - } - - if (parse_infoframe_option_u("S", option, 0, 2, &option_val, - ¤t)) - frame.avi.S = option_val; - else if (parse_infoframe_option_u("B", option, 0, 3, - &option_val, ¤t)) - frame.avi.B = option_val; - else if (parse_infoframe_option_u("A", option, 0, 1, - &option_val, ¤t)) - frame.avi.A = option_val; - else if (parse_infoframe_option_u("Y", option, 0, 2, - &option_val, ¤t)) - frame.avi.Y = option_val; - else if (parse_infoframe_option_u("R", option, 0, 15, - &option_val, ¤t)) - frame.avi.R = option_val; - else if (parse_infoframe_option_u("M", option, 0, 2, - &option_val, ¤t)) - frame.avi.M = option_val; - else if (parse_infoframe_option_u("C", option, 0, 3, - &option_val, ¤t)) - frame.avi.C = option_val; - else if (parse_infoframe_option_u("SC", option, 0, 3, - &option_val, ¤t)) - frame.avi.SC = option_val; - else if (parse_infoframe_option_u("Q", option, 0, 2, - &option_val, ¤t)) - frame.avi.Q = option_val; - else if (parse_infoframe_option_u("EC", option, 0, 1, - &option_val,¤t)) - frame.avi.EC = option_val; - else if (parse_infoframe_option_u("ITC", option, 0, 1, - &option_val, ¤t)) - frame.avi.ITC = option_val; - else if (parse_infoframe_option_u("VIC", option, 0, 127, - &option_val, ¤t)) - frame.avi.VIC = option_val; - else if (parse_infoframe_option_u("PR", option, 0, 15, - &option_val, ¤t)) - frame.avi.PR = option_val; - else if (parse_infoframe_option_u("top", option, 0, 65535, - &option_val, ¤t)) - frame.avi.top = option_val; - else if (parse_infoframe_option_u("bottom", option, 0, 65535, - &option_val, ¤t)) - frame.avi.bottom = option_val; - else if (parse_infoframe_option_u("left", option, 0, 65535, - &option_val, ¤t)) - frame.avi.left = option_val; - else if (parse_infoframe_option_u("right", option, 0, 65535, - &option_val, ¤t)) - frame.avi.right = option_val; - else - printf("Unrecognized option: %s\n", option); - } - - val &= ~DIP_CTL_FREQUENCY; - val |= DIP_CTL_FREQ_EVERY; - OUTREG(reg, val); - - frame.avi.header.type = AVI_INFOFRAME_TYPE; - frame.avi.header.version = AVI_INFOFRAME_VERSION; - frame.avi.header.length = AVI_INFOFRAME_LENGTH; - frame.avi.Rsvd0 = 0; - frame.avi.Rsvd1 = 0; - frame.avi.Rsvd2 = 0; - frame.avi.Rsvd3 = 0; - frame.avi.Rsvd4[0] = 0; - frame.avi.Rsvd4[1] = 0; - frame.avi.Rsvd4[2] = 0; - - infoframe_fix_checksum(&frame); - - disable_infoframe(transcoder, DIP_AVI); - write_infoframe(transcoder, DIP_AVI, &frame); - enable_infoframe(transcoder, DIP_AVI); -} - -static void change_spd_infoframe(Transcoder transcoder, char *commands) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val; - DipInfoFrame frame; - char option[16]; - char option_val_s[32]; - uint32_t option_val_i; - int rc, read; - char *current = commands; - - load_infoframe(transcoder, &frame, DIP_SPD); - val = INREG(reg); - - while (1) { - rc = sscanf(current, "%15s%n", option, &read); - current = ¤t[read]; - if (rc == EOF) { - break; - } else if (rc != 1) { - printf("Invalid option: %s\n", option); - continue; - } - - memset(option_val_s, 0, 32); - - if (parse_infoframe_option_s("vendor", option, 0, 8, - option_val_s, ¤t)) - memcpy(frame.spd.vendor, option_val_s, 8); - else if (parse_infoframe_option_s("description", option, 0, 16, - option_val_s, ¤t)) - memcpy(frame.spd.description, option_val_s, 16); - else if (parse_infoframe_option_u("source", option, 0, 0x0c, - &option_val_i, ¤t)) - frame.spd.source = option_val_i; - else - printf("Unrecognized option: %s\n", option); - } - - val &= ~DIP_CTL_FREQUENCY; - val |= DIP_CTL_FREQ_EVERY_OTHER; - OUTREG(reg, val); - - frame.spd.header.type = SPD_INFOFRAME_TYPE; - frame.spd.header.version = SPD_INFOFRAME_VERSION; - frame.spd.header.length = SPD_INFOFRAME_LENGTH; - - infoframe_fix_checksum(&frame); - - disable_infoframe(transcoder, DIP_SPD); - write_infoframe(transcoder, DIP_SPD, &frame); - enable_infoframe(transcoder, DIP_SPD); -} - -static void change_infoframe_checksum(Transcoder transcoder, DipType type, - uint32_t selected_csum) -{ - DipInfoFrame frame; - - load_infoframe(transcoder, &frame, type); - frame.generic.body[0] = selected_csum; - disable_infoframe(transcoder, type); - write_infoframe(transcoder, type, &frame); - enable_infoframe(transcoder, type); -} - -static void change_infoframe_frequency(Transcoder transcoder, DipType type, - DipFrequency frequency) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val = INREG(reg); - - if (type == DIP_AVI && frequency != DIP_FREQ_EVERY_VSYNC) { - printf("Error: AVI infoframe must be sent every VSync!\n"); - frequency = DIP_FREQ_EVERY_VSYNC; - } - - val &= ~DIP_CTL_FREQUENCY; - val |= (frequency << 16); - OUTREG(reg, val); -} - -static void disable_dip(Transcoder transcoder) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val = INREG(reg); - val &= ~DIP_CTL_ENABLE; - OUTREG(reg, val); -} - -static void enable_dip(Transcoder transcoder) -{ - Register reg = get_dip_ctl_reg(transcoder); - uint32_t val = INREG(reg); - val |= DIP_CTL_ENABLE; - OUTREG(reg, val); -} - -static void disable_hdmi_port(Register reg) -{ - uint32_t val = INREG(reg); - val &= ~HDMI_PORT_ENABLE; - OUTREG(reg, val); -} - -static void enable_hdmi_port(Register reg) -{ - uint32_t val = INREG(reg); - val |= HDMI_PORT_ENABLE; - OUTREG(reg, val); -} - -static void print_usage(void) -{ -printf("Options:\n" -" -d, --dump\n" -" dump information about all transcoders\n" -" -c, --change-fields [fields]\n" -" change infoframe fields from selected transcoder\n" -" -k, --change-checksum [checksum]\n" -" change infoframe checksum (value in hex)\n" -" -q, --change-frequency [frequency]\n" -" change infoframe frequency (once, everyvsync or everyothervsync)\n" -" -n, --disable\n" -" disable the selected infoframe from the selected transcoder\n" -" -N, --enable\n" -" enable the selected infoframe from the selected transcoder\n" -" -x, --disable-infoframes\n" -" disable all infoframes from selected transcoder\n" -" -X, --enable-infoframes\n" -" enable sending infoframes on the selected transcoder\n" -" -p, --disable-hdmi-port [port]\n" -" disable hdmi port on the selected transcoder (B, C or D)\n" -" -P, --enable-hdmi-port [port]\n" -" enable hdmi port on the selected transcoder (B, C or D)\n" -" -t, --transcoder\n" -" select transcoder (A, B or C)\n" -" -f, --infoframe\n" -" select infoframe (AVI, Vendor, Gamut or SPD)\n" -" -h, --help\n" -" prints this message\n" -"\n" -"Examples:\n" -"\n" -" Dump information:\n" -" intel_infoframes\n" -"\n" -" Disable overscan and set ITC on transcoder B:\n" -" intel_infoframes -t B -f AVI -c 'S 2 ITC 1'\n" -"\n" -" Many actions on the same command:\n" -" - enable overscan on transcoder A\n" -" - enable overscan and change description on transcoder B\n" -" - disable all infoframes on transcoder C\n" -" - dump the resulting state:\n" -" intel_infoframes -t A -f AVI -c 'S 1' \\\n" -" -t B -f AVI -c 'S 2' \\\n" -" -f SPD -c 'description Linux' \\\n" -" -t C --disable-infoframes \\\n" -" -d\n" -"\n" -" Even more:\n" -" - print the help message\n" -" - completely disable all infoframes on all transcoders\n" -" - dump the state" -" - enable sending infoframes on transcoder B, but disable all infoframes\n" -" - enable AVI infoframes transcoder B, use underscan and declare ITC\n" -" - also enable SPD infoframes on the same transcoder, change frequency to\n" -" every vsync and change vendor, description and source\n" -" - dump the state again\n" -" intel_infoframes -h \\\n" -" -t A -x -t B -x -t C -x \\\n" -" -d \\\n" -" -t A -X -f AVI -n -f Vendor -n \\\n" -" -f Gamut -n -f SPD -n \\\n" -" -f AVI -N -c 'S 2 ITC 1'\\\n" -" -f SPD -q everyvsync \\\n" -" -c 'vendor me description mine source 0x09' \\\n" -" -d\n" -"\n" -"Infoframe fields used by the --change-fields option:\n" -" - AVI infoframe fields:\n" -" S B A Y R M C SC Q EC ITC VIC PR top bottom left right\n" -" - SPD infoframe fields:\n" -" vendor description source\n" -" - Other infoframe fields are not implemented yet.\n"); -} - -#define CHECK_TRANSCODER(transcoder) \ - if (transcoder == TRANSC_INVALID) { \ - printf("Transcoder not selected.\n"); \ - ret = 1; \ - goto out; \ - } - -#define CHECK_DIP(dip) \ - if (dip == DIP_INVALID) { \ - printf("Infoframe not selected.\n"); \ - ret = 1; \ - goto out; \ - } - -int main(int argc, char *argv[]) -{ - int opt; - int ret = 0; - Transcoder transcoder = TRANSC_INVALID; - DipType dip = DIP_INVALID; - Register hdmi_port; - - char short_opts[] = "dc:k:q:nNxXp:P:t:f:h"; - struct option long_opts[] = { - { "dump", no_argument, NULL, 'd' }, - { "change-fields", required_argument, NULL, 'c' }, - { "change-checksum", required_argument, NULL, 'k' }, - { "change-frequency", required_argument, NULL, 'q' }, - { "disable", no_argument, NULL, 'n' }, - { "enable", no_argument, NULL, 'N' }, - { "disable-infoframes", no_argument, NULL, 'x' }, - { "enable-infoframes", no_argument, NULL, 'X' }, - { "disable-hdmi-port", required_argument, NULL, 'p' }, - { "enable-hdmi-port", required_argument, NULL, 'P' }, - { "transcoder" , required_argument, NULL, 't' }, - { "infoframe", required_argument, NULL, 'f' }, - { "help", no_argument, NULL, 'h' }, - { 0 } - }; - - printf("WARNING: This is just a debugging tool! Don't expect it to work" - " perfectly: the Kernel might undo our changes.\n"); - - pci_dev = intel_get_pci_device(); - intel_register_access_init(pci_dev, 0); - intel_check_pch(); - - if (IS_GEN4(pci_dev->device_id)) - gen = 4; - else if (IS_GEN5(pci_dev->device_id)) - gen = 5; - else if (IS_GEN6(pci_dev->device_id)) - gen = 6; - else if (IS_GEN7(pci_dev->device_id)) - gen = 7; - else { - printf("This program does not support your hardware yet.\n"); - ret = 1; - goto out; - } - - while (1) { - opt = getopt_long(argc, argv, short_opts, long_opts, NULL); - if (opt == -1) - break; - - switch (opt) { - case 'd': - dump_all_info(); - break; - case 'c': - if (transcoder == TRANSC_INVALID) { - printf("Transcoder not selected.\n"); - ret = 1; - goto out; - } - switch (dip) { - case DIP_AVI: - change_avi_infoframe(transcoder, optarg); - break; - case DIP_VENDOR: - case DIP_GAMUT: - printf("Option not implemented yet.\n"); - ret = 1; - goto out; - case DIP_SPD: - change_spd_infoframe(transcoder, optarg); - break; - case DIP_INVALID: - printf("Infoframe not selected.\n"); - ret = 1; - goto out; - } - break; - case 'k': - CHECK_TRANSCODER(transcoder); - CHECK_DIP(dip); - change_infoframe_checksum(transcoder, dip, atoi(optarg)); - break; - case 'q': - CHECK_TRANSCODER(transcoder); - CHECK_DIP(dip); - if (!strcmp(optarg, "once")) - change_infoframe_frequency(transcoder, dip, - DIP_FREQ_ONCE); - else if (!strcmp(optarg, "everyvsync")) - change_infoframe_frequency(transcoder, dip, - DIP_FREQ_EVERY_VSYNC); - else if (!strcmp(optarg, "everyothervsync")) - change_infoframe_frequency(transcoder, dip, - DIP_FREQ_EVERY_OTHER_VSYNC); - else { - printf("Invalid frequency.\n"); - ret = 1; - goto out; - } - break; - case 'n': - CHECK_TRANSCODER(transcoder); - CHECK_DIP(dip); - disable_infoframe(transcoder, dip); - break; - case 'N': - CHECK_TRANSCODER(transcoder); - CHECK_DIP(dip); - enable_infoframe(transcoder, dip); - break; - case 'x': - CHECK_TRANSCODER(transcoder); - disable_dip(transcoder); - break; - case 'X': - CHECK_TRANSCODER(transcoder); - enable_dip(transcoder); - break; - case 'p': - case 'P': - if (!strcmp(optarg, "B")) - hdmi_port = get_hdmi_port(0); - else if (!strcmp(optarg, "C")) - hdmi_port = get_hdmi_port(1); - else if (!strcmp(optarg, "D")) - hdmi_port = get_hdmi_port(2); - else { - printf("Invalid HDMI port.\n"); - ret = 1; - goto out; - } - if (opt == 'p') - disable_hdmi_port(hdmi_port); - else - enable_hdmi_port(hdmi_port); - break; - case 't': - if (!strcmp(optarg, "A")) - transcoder = TRANSC_A; - else if (!strcmp(optarg, "B")) - transcoder = TRANSC_B; - else if (intel_pch >= PCH_CPT && !strcmp(optarg, "C")) { - transcoder = TRANSC_C; - } else { - printf("Invalid transcoder.\n"); - ret = 1; - goto out; - } - break; - case 'f': - if (!strcmp(optarg, "AVI")) - dip = DIP_AVI; - else if (!strcmp(optarg, "Vendor")) - dip = DIP_VENDOR; - else if (!strcmp(optarg, "Gamut")) - dip = DIP_GAMUT; - else if (!strcmp(optarg, "SPD")) - dip = DIP_SPD; - else { - printf("Invalid infoframe.\n"); - ret = 1; - goto out; - } - break; - case 'h': - print_usage(); - break; - default: - print_usage(); - ret = 1; - goto out; - } - } - -out: - intel_register_access_fini(); - return ret; -} diff --git a/tools/intel_iosf_sb_read.c b/tools/intel_iosf_sb_read.c deleted file mode 100644 index 8f35e505..00000000 --- a/tools/intel_iosf_sb_read.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - */ - -#include <unistd.h> -#include <stdlib.h> -#include <stdio.h> -#include <err.h> -#include <string.h> -#include "intel_io.h" -#include "intel_chipset.h" - -static void usage(const char *name) -{ - printf("Warning : This program will work only on Valleyview\n" - "Usage: %s <port> <reg>\n" - "\t port/reg : in 0xXXXX format\n", - name); -} - -int main(int argc, char *argv[]) -{ - uint32_t port, reg, val; - struct pci_device *dev = intel_get_pci_device(); - - if (argc != 3 || !(IS_VALLEYVIEW(dev->device_id) || IS_CHERRYVIEW(dev->device_id))) { - usage(argv[0]); - return 1; - } - - if (!strcasecmp(argv[1], "bunit")) - port = 0x03; - else if (!strcasecmp(argv[1], "punit")) - port = 0x04; - else if (!strcasecmp(argv[1], "nc")) - port = 0x11; - else if (!strcasecmp(argv[1], "dpio")) - port = 0x13; - else if (!strcasecmp(argv[1], "gpio_nc")) - port = 0x13; - else if (!strcasecmp(argv[1], "cck")) - port = 0x14; - else if (!strcasecmp(argv[1], "ccu")) - port = 0xa9; - else if (!strcasecmp(argv[1], "dpio2")) - port = 0x1a; - else if (!strcasecmp(argv[1], "flisdsi")) - port = 0x1b; - else - port = strtoul(argv[1], NULL, 16); - - reg = strtoul(argv[2], NULL, 16); - - intel_register_access_init(dev, 0); - - val = intel_iosf_sb_read(port, reg); - printf("0x%02x(%s)/0x%04x : 0x%08x\n", port, argv[1], reg, val); - - intel_register_access_fini(); - - return 0; -} diff --git a/tools/intel_iosf_sb_write.c b/tools/intel_iosf_sb_write.c deleted file mode 100644 index 8d06380f..00000000 --- a/tools/intel_iosf_sb_write.c +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <unistd.h> -#include <stdlib.h> -#include <stdio.h> -#include <err.h> -#include <string.h> -#include "intel_io.h" -#include "intel_chipset.h" - -static void usage(const char *name) -{ - printf("Warning : This program will work only on Valleyview\n" - "Usage: %s <port> <reg> <val>\n" - "\t port/reg/val : in 0xXXXX format\n", - name); -} - -int main(int argc, char** argv) -{ - uint32_t port, reg, val, tmp; - struct pci_device *dev = intel_get_pci_device(); - - if (argc != 4 || !(IS_VALLEYVIEW(dev->device_id) || IS_CHERRYVIEW(dev->device_id))) { - usage(argv[0]); - return 1; - } - - if (!strcasecmp(argv[1], "bunit")) - port = 0x03; - else if (!strcasecmp(argv[1], "punit")) - port = 0x04; - else if (!strcasecmp(argv[1], "nc")) - port = 0x11; - else if (!strcasecmp(argv[1], "dpio")) - port = 0x13; - else if (!strcasecmp(argv[1], "gpio_nc")) - port = 0x13; - else if (!strcasecmp(argv[1], "cck")) - port = 0x14; - else if (!strcasecmp(argv[1], "ccu")) - port = 0xa9; - else if (!strcasecmp(argv[1], "dpio2")) - port = 0x1a; - else if (!strcasecmp(argv[1], "flisdsi")) - port = 0x1b; - else - port = strtoul(argv[1], NULL, 16); - - reg = strtoul(argv[2], NULL, 16); - val = strtoul(argv[3], NULL, 16); - - intel_register_access_init(dev, 0); - - tmp = intel_iosf_sb_read(port, reg); - printf("0x%02x(%s)/0x%04x before : 0x%08x\n", port, argv[1], reg, tmp); - - intel_iosf_sb_write(port, reg, val); - - tmp = intel_iosf_sb_read(port, reg); - printf("0x%02x(%s)/0x%04x after : 0x%08x\n", port, argv[1], reg, tmp); - - intel_register_access_fini(); - - return 0; -} diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c deleted file mode 100644 index a4b7d738..00000000 --- a/tools/intel_l3_parity.c +++ /dev/null @@ -1,402 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Ben Widawsky <ben@bwidawsk.net> - * - */ - -#define _GNU_SOURCE -#include <sys/types.h> -#include <sys/stat.h> -#include <assert.h> -#include <fcntl.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <unistd.h> -#include <getopt.h> -#include "intel_chipset.h" -#include "intel_io.h" -#include "drmtest.h" -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif -#if HAVE_UDEV -#include <libudev.h> -#include <syslog.h> -#endif -#include "intel_l3_parity.h" - -static unsigned int devid; -/* L3 size is always a function of banks. The number of banks cannot be - * determined by number of slices however */ -static inline int num_banks(void) { - if (IS_HSW_GT3(devid)) - return 8; /* 4 per each slice */ - else if (IS_HSW_GT1(devid) || - devid == PCI_CHIP_IVYBRIDGE_GT1 || - devid == PCI_CHIP_IVYBRIDGE_M_GT1) - return 2; - else - return 4; -} -#define NUM_SUBBANKS 8 -#define BYTES_PER_BANK (128 << 10) -/* Each row addresses [up to] 4b. This multiplied by the number of subbanks - * will give the L3 size per bank. - * TODO: Row size is fixed on IVB, and variable on HSW.*/ -#define MAX_ROW (1<<12) -#define MAX_BANKS_PER_SLICE 4 -#define NUM_REGS (MAX_BANKS_PER_SLICE * NUM_SUBBANKS) -#define MAX_SLICES (IS_HSW_GT3(devid) ? 2 : 1) -#define REAL_MAX_SLICES 2 -/* TODO support SLM config */ -#define L3_SIZE ((MAX_ROW * 4) * NUM_SUBBANKS * num_banks()) - -struct __attribute__ ((__packed__)) l3_log_register { - uint32_t row0_enable : 1; - uint32_t rsvd2 : 4; - uint32_t row0 : 11; - uint32_t row1_enable : 1; - uint32_t rsvd1 : 4; - uint32_t row1 : 11; -} l3logs[REAL_MAX_SLICES][MAX_BANKS_PER_SLICE][NUM_SUBBANKS]; - -static int which_slice = -1; -#define for_each_slice(__i) \ - for ((__i) = (which_slice == -1) ? 0 : which_slice; \ - (__i) < ((which_slice == -1) ? MAX_SLICES : (which_slice + 1)); \ - (__i)++) - -static void decode_dft(uint32_t dft) -{ - if (IS_IVYBRIDGE(devid) || !(dft & 1)) { - printf("Error injection disabled\n"); - return; - } - printf("Error injection enabled\n"); - printf(" Hang = %s\n", (dft >> 28) & 0x1 ? "yes" : "no"); - printf(" Row = %d\n", (dft >> 7) & 0x7ff); - printf(" Bank = %d\n", (dft >> 2) & 0x3); - printf(" Subbank = %d\n", (dft >> 4) & 0x7); - printf(" Slice = %d\n", (dft >> 1) & 0x1); -} - -static void dumpit(int slice) -{ - int i, j; - - for (i = 0; i < MAX_BANKS_PER_SLICE; i++) { - for (j = 0; j < NUM_SUBBANKS; j++) { - struct l3_log_register *reg = &l3logs[slice][i][j]; - - if (reg->row0_enable) - printf("Slice %d, Row %d, Bank %d, Subbank %d is disabled\n", - slice, reg->row0, i, j); - if (reg->row1_enable) - printf("Slice %d, Row %d, Bank %d, Subbank %d is disabled\n", - slice, reg->row1, i, j); - } - } -} - -static int disable_rbs(int row, int bank, int sbank, int slice) -{ - struct l3_log_register *reg = &l3logs[slice][bank][sbank]; - - // can't map more than 2 rows - if (reg->row0_enable && reg->row1_enable) - return -1; - - // can't remap the same row twice - if ((reg->row0_enable && reg->row0 == row) || - (reg->row1_enable && reg->row1 == row)) { - return -1; - } - - if (reg->row0_enable) { - reg->row1 = row; - reg->row1_enable = 1; - } else { - reg->row0 = row; - reg->row0_enable = 1; - } - - return 0; -} - -static void enables_rbs(int row, int bank, int sbank, int slice) -{ - struct l3_log_register *reg = &l3logs[slice][bank][sbank]; - - if (!reg->row0_enable && !reg->row1_enable) - return; - - if (reg->row1_enable && reg->row1 == row) - reg->row1_enable = 0; - else if (reg->row0_enable && reg->row0 == row) - reg->row0_enable = 0; -} - -static void usage(const char *name) -{ - printf("usage: %s [OPTIONS] [ACTION]\n" - "Operate on the i915 L3 GPU cache (should be run as root)\n\n" - " OPTIONS:\n" - " -r, --row=[row] The row to act upon (default 0)\n" - " -b, --bank=[bank] The bank to act upon (default 0)\n" - " -s, --subbank=[subbank] The subbank to act upon (default 0)\n" - " -w, --slice=[slice] Which slice to act on (default: -1 [all])\n" - " , --daemon Run the listener (-L) as a daemon\n" - " ACTIONS (only 1 may be specified at a time):\n" - " -h, --help Display this help\n" - " -H, --hw-info Display the current L3 properties\n" - " -l, --list List the current L3 logs\n" - " -a, --clear-all Clear all disabled rows\n" - " -e, --enable Enable row, bank, subbank (undo -d)\n" - " -d, --disable=<row,bank,subbank> Disable row, bank, subbank (inline arguments are deprecated. Please use -r, -b, -s instead\n" - " -i, --inject [HSW only] Cause hardware to inject a row errors\n" - " -u, --uninject [HSW only] Turn off hardware error injectection (undo -i)\n" - " -L, --listen Listen for uevent errors\n", - name); -} - -int main(int argc, char *argv[]) -{ - const int device = drm_get_card(); - char *path[REAL_MAX_SLICES]; - uint32_t dft; - int row = 0, bank = 0, sbank = 0; - int fd[REAL_MAX_SLICES] = {0}, ret, i; - int action = '0'; - int drm_fd = drm_open_any(); - int daemonize = 0; - devid = intel_get_drm_devid(drm_fd); - - if (intel_gen(devid) < 7 || IS_VALLEYVIEW(devid)) - exit(EXIT_SUCCESS); - - assert(intel_register_access_init(intel_get_pci_device(), 0) == 0); - - ret = asprintf(&path[0], "/sys/class/drm/card%d/l3_parity", device); - assert(ret != -1); - ret = asprintf(&path[1], "/sys/class/drm/card%d/l3_parity_slice_1", device); - assert(ret != -1); - - for_each_slice(i) { - fd[i] = open(path[i], O_RDWR); - assert(fd[i]); - ret = read(fd[i], l3logs[i], NUM_REGS * sizeof(uint32_t)); - if (ret == -1) { - perror("Reading sysfs"); - exit(EXIT_FAILURE); - } - assert(lseek(fd[i], 0, SEEK_SET) == 0); - } - - /* NB: It is potentially unsafe to read this register if the kernel is - * actively using this register range, or we're running multiple - * instances of this tool. Since neither of those cases should occur - * (and the tool should be root only) we can safely ignore this for - * now. Just be aware of this if for some reason a hang is reported - * when using this tool. - */ - dft = intel_register_read(0xb038); - - while (1) { - int c, option_index = 0; - struct option long_options[] = { - { "help", no_argument, 0, 'h' }, - { "list", no_argument, 0, 'l' }, - { "clear-all", no_argument, 0, 'a' }, - { "enable", no_argument, 0, 'e' }, - { "disable", optional_argument, 0, 'd' }, - { "inject", no_argument, 0, 'i' }, - { "uninject", no_argument, 0, 'u' }, - { "hw-info", no_argument, 0, 'H' }, - { "listen", no_argument, 0, 'L' }, - { "row", required_argument, 0, 'r' }, - { "bank", required_argument, 0, 'b' }, - { "subbank", required_argument, 0, 's' }, - { "slice", required_argument, 0, 'w' }, - { "daemon", no_argument, &daemonize, 1 }, - {0, 0, 0, 0} - }; - - c = getopt_long(argc, argv, "hHr:b:s:w:aled::iuL", long_options, - &option_index); - if (c == -1) - break; - - if (c == 0) - continue; - - switch (c) { - case '?': - case 'h': - usage(argv[0]); - exit(EXIT_SUCCESS); - case 'H': - printf("Number of slices: %d\n", MAX_SLICES); - printf("Number of banks: %d\n", num_banks()); - printf("Subbanks per bank: %d\n", NUM_SUBBANKS); - printf("Max L3 size: %dK\n", L3_SIZE >> 10); - printf("Has error injection: %s\n", IS_HASWELL(devid) ? "yes" : "no"); - exit(EXIT_SUCCESS); - case 'r': - row = atoi(optarg); - if (row >= MAX_ROW) - exit(EXIT_FAILURE); - break; - case 'b': - bank = atoi(optarg); - if (bank >= num_banks() || bank >= MAX_BANKS_PER_SLICE) - exit(EXIT_FAILURE); - break; - case 's': - sbank = atoi(optarg); - if (sbank >= NUM_SUBBANKS) - exit(EXIT_FAILURE); - break; - case 'w': - which_slice = atoi(optarg); - if (which_slice >= MAX_SLICES) - exit(EXIT_FAILURE); - break; - case 'i': - case 'u': - if (!IS_HASWELL(devid)) { - fprintf(stderr, "Error injection supported on HSW+ only\n"); - exit(EXIT_FAILURE); - } - case 'd': - if (optarg) { - ret = sscanf(optarg, "%d,%d,%d", &row, &bank, &sbank); - if (ret != 3) - exit(EXIT_FAILURE); - } - case 'a': - case 'l': - case 'e': - case 'L': - if (action != '0') { - fprintf(stderr, "Only one action may be specified\n"); - exit(EXIT_FAILURE); - } - action = c; - break; - default: - abort(); - } - } - - if (action == 'i') { - if (((dft >> 1) & 1) != which_slice) { - fprintf(stderr, "DFT register already has slice %d enabled, and we don't support multiple slices. Try modifying -w; but sometimes the register sticks in the wrong way\n", (dft >> 1) & 1); - exit(EXIT_FAILURE); - } - - if (which_slice == -1) { - fprintf(stderr, "Cannot inject errors to multiple slices (modify -w)\n"); - exit(EXIT_FAILURE); - } - if (dft & 1 && ((dft >> 1) && 1) == which_slice) - printf("warning: overwriting existing injections. This is very dangerous.\n"); - } - - /* Daemon doesn't work like the other commands */ - if (action == 'L') { -#ifndef HAVE_UDEV - fprintf(stderr, "Daemon requires udev support. Please reconfigure.\n"); - exit(EXIT_FAILURE); -#else - struct l3_parity par; - struct l3_location loc; - if (daemonize) { - assert(daemon(0, 0) == 0); - openlog(argv[0], LOG_CONS | LOG_PID, LOG_USER); - } - memset(&par, 0, sizeof(par)); - assert(l3_uevent_setup(&par) == 0); - assert(l3_listen(&par, daemonize == 1, &loc) == 0); - exit(EXIT_SUCCESS); -#endif - } - - if (action == 'l') - decode_dft(dft); - - /* Per slice operations */ - for_each_slice(i) { - switch (action) { - case 'l': - dumpit(i); - break; - case 'a': - memset(l3logs[i], 0, NUM_REGS * sizeof(struct l3_log_register)); - break; - case 'e': - enables_rbs(row, bank, sbank, i); - break; - case 'd': - assert(disable_rbs(row, bank, sbank, i) == 0); - break; - case 'i': - if (bank == 3) { - fprintf(stderr, "The hardware does not support error inject on bank 3.\n"); - exit(EXIT_FAILURE); - } - dft |= row << 7; - dft |= sbank << 4; - dft |= bank << 2; - assert(i < 2); - dft |= i << 1; /* slice */ - dft |= 1 << 0; /* enable */ - intel_register_write(0xb038, dft); - break; - case 'u': - intel_register_write(0xb038, dft & ~(1<<0)); - break; - case 'L': - break; - default: - abort(); - } - } - - intel_register_access_fini(); - if (action == 'l') - exit(EXIT_SUCCESS); - - for_each_slice(i) { - ret = write(fd[i], l3logs[i], NUM_REGS * sizeof(uint32_t)); - if (ret == -1) { - perror("Writing sysfs"); - exit(EXIT_FAILURE); - } - close(fd[i]); - } - - - exit(EXIT_SUCCESS); -} diff --git a/tools/intel_l3_parity.h b/tools/intel_l3_parity.h deleted file mode 100644 index 65697c4f..00000000 --- a/tools/intel_l3_parity.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef INTEL_L3_PARITY_H_ -#define INTEL_L3_PARITY_H_ - -#include <stdint.h> -#include <stdbool.h> - -struct l3_parity { - struct udev *udev; - struct udev_monitor *uevent_monitor; - int fd; - fd_set fdset; -}; - -struct l3_location { - uint8_t slice; - uint16_t row; - uint8_t bank; - uint8_t subbank; -}; - -#if HAVE_UDEV -int l3_uevent_setup(struct l3_parity *par); -/* Listens (blocks) for an l3 parity event. Returns the location of the error. */ -int l3_listen(struct l3_parity *par, bool daemon, struct l3_location *loc); -#define l3_uevent_teardown(par) {} -#else -#define l3_uevent_setup(par, daemon, loc) -1 -#define l3_listen(par) -1 -#endif - -#endif diff --git a/tools/intel_l3_udev_listener.c b/tools/intel_l3_udev_listener.c deleted file mode 100644 index 261630e9..00000000 --- a/tools/intel_l3_udev_listener.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#if HAVE_UDEV -#include <libudev.h> -#ifndef _GNU_SOURCE -#define _GNU_SOURCE -#endif -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <unistd.h> -#include <assert.h> -#include <syslog.h> -#include "i915_drm.h" -#include "intel_l3_parity.h" - -#ifndef I915_L3_PARITY_UEVENT -#define I915_L3_PARITY_UEVENT "L3_PARITY_ERROR" -#endif - -int l3_uevent_setup(struct l3_parity *par) -{ - struct udev *udev; - struct udev_monitor *uevent_monitor; - fd_set fdset; - int fd, ret = -1; - - udev = udev_new(); - if (!udev) { - return -1; - } - - uevent_monitor = udev_monitor_new_from_netlink(udev, "udev"); - if (!uevent_monitor) - goto err_out; - - ret = udev_monitor_filter_add_match_subsystem_devtype(uevent_monitor, "drm", "drm_minor"); - if (ret < 0) - goto err_out; - - ret = udev_monitor_enable_receiving(uevent_monitor); - if (ret < 0) - goto err_out; - - fd = udev_monitor_get_fd(uevent_monitor); - FD_ZERO(&fdset); - FD_SET(fd, &fdset); - - par->udev = udev; - par->fd = fd; - par->fdset = fdset; - par->uevent_monitor = uevent_monitor; - return 0; - -err_out: - udev_unref(udev); - return ret; -} - -int l3_listen(struct l3_parity *par, bool daemon, struct l3_location *loc) -{ - struct udev_device *udev_dev; - const char *parity_status; - char *err_msg; - int ret; - -again: - ret = select(par->fd + 1, &par->fdset, NULL, NULL, NULL); - /* Number of bits set is returned, must be >= 1 */ - if (ret <= 0) { - return ret; - } - - assert(FD_ISSET(par->fd, &par->fdset)); - - udev_dev = udev_monitor_receive_device(par->uevent_monitor); - if (!udev_dev) - return -1; - - parity_status = udev_device_get_property_value(udev_dev, I915_L3_PARITY_UEVENT); - if (strncmp(parity_status, "1", 1)) - goto again; - - loc->slice = atoi(udev_device_get_property_value(udev_dev, "SLICE")); - loc->row = atoi(udev_device_get_property_value(udev_dev, "ROW")); - loc->bank = atoi(udev_device_get_property_value(udev_dev, "BANK")); - loc->subbank = atoi(udev_device_get_property_value(udev_dev, "SUBBANK")); - - udev_device_unref(udev_dev); - - asprintf(&err_msg, "Parity error detected on: %d,%d,%d,%d. " - "Try to run intel_l3_parity -r %d -b %d -s %d -w %d -d", - loc->slice, loc->row, loc->bank, loc->subbank, - loc->row, loc->bank, loc->subbank, loc->slice); - if (daemon) { - syslog(LOG_INFO, "%s\n", err_msg); - goto again; - } - - fprintf(stderr, "%s\n", err_msg); - - free(err_msg); - - return 0; -} -#endif diff --git a/tools/intel_lid.c b/tools/intel_lid.c deleted file mode 100644 index 0703e2e1..00000000 --- a/tools/intel_lid.c +++ /dev/null @@ -1,145 +0,0 @@ -/* - * Copyright © 2009 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Zhenyu Wang <zhenyu.z.wang@intel.com> - * - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <stdarg.h> -#include <pciaccess.h> -#include <err.h> -#include <fcntl.h> -#include <unistd.h> -#include <dirent.h> -#include <sys/stat.h> -#include <sys/types.h> - -#include "intel_io.h" -#include "intel_reg.h" -#include "intel_bios.h" -#include "intel_chipset.h" - -enum lid_status { - LID_UNKNOWN = -1, - LID_OPEN, - LID_CLOSE, -}; - -#define ACPI_BUTTON "/proc/acpi/button/" -#define ACPI_LID "/proc/acpi/button/lid/" - -static int i830_lvds_acpi_lid_state(void) -{ - int fd; - DIR *button_dir; - DIR *lid_dir; - struct dirent *lid_dent; - char *state_name; - char state[64]; - enum lid_status ret = LID_UNKNOWN; - - button_dir = opendir(ACPI_BUTTON); - /* If acpi button driver is not loaded, bypass ACPI check method */ - if (button_dir == NULL) - goto out; - closedir(button_dir); - - lid_dir = opendir(ACPI_LID); - - /* no acpi lid object found */ - if (lid_dir == NULL) - goto out; - - while (1) { - lid_dent = readdir(lid_dir); - if (lid_dent == NULL) { - /* no LID object */ - closedir(lid_dir); - goto out; - } - if (strcmp(lid_dent->d_name, ".") && - strcmp(lid_dent->d_name, "..")) { - break; - } - } - state_name = malloc(strlen(ACPI_LID) + strlen(lid_dent->d_name) + 7); - memset(state_name, 0, strlen(ACPI_LID) + strlen(lid_dent->d_name) + 7); - strcat(state_name, ACPI_LID); - strcat(state_name, lid_dent->d_name); - strcat(state_name, "/state"); - - closedir(lid_dir); - - if ((fd = open(state_name, O_RDONLY)) == -1) { - free(state_name); - goto out; - } - free(state_name); - if (read(fd, state, 64) == -1) { - close(fd); - goto out; - } - close(fd); - if (strstr(state, "open")) - ret = LID_OPEN; - else if (strstr(state, "closed")) - ret = LID_CLOSE; - else /* "unsupported" */ - ret = LID_UNKNOWN; - -out: - return ret; -} - -int main(int argc, char **argv) -{ - int swf14, acpi_lid; - - intel_mmio_use_pci_bar(intel_get_pci_device()); - - while (1) { - swf14 = INREG(SWF14); - - printf("Intel LVDS Lid status:\n"); - printf("\tSWF14(0x%x) : %s\n", swf14, - swf14 & SWF14_LID_SWITCH_EN ? "close" : "open"); - - acpi_lid = i830_lvds_acpi_lid_state(); - switch (acpi_lid) { - case LID_UNKNOWN: - printf("\tACPI Lid state : unknown\n"); - break; - case LID_OPEN: - printf("\tACPI Lid state : open\n"); - break; - case LID_CLOSE: - printf("\tACPI Lid state : close\n"); - break; - } - sleep(2); - } - return 0; -} diff --git a/tools/intel_opregion_decode.c b/tools/intel_opregion_decode.c deleted file mode 100644 index b1956610..00000000 --- a/tools/intel_opregion_decode.c +++ /dev/null @@ -1,449 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Jani Nikula <jani.nikula@intel.com> - * - */ - -#include <errno.h> -#include <fcntl.h> -#include <getopt.h> -#include <stdint.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <unistd.h> -#include <sys/mman.h> -#include <sys/stat.h> -#include <sys/types.h> - -#include "intel_io.h" -#include "drmtest.h" - -#define OPREGION_HEADER_OFFSET 0 -#define OPREGION_ACPI_OFFSET 0x100 -#define OPREGION_SWSCI_OFFSET 0x200 -#define OPREGION_ASLE_OFFSET 0x300 -#define OPREGION_VBT_OFFSET 0x400 -#define OPREGION_ASLE_EXT_OFFSET 0x1C00 - -#define MBOX_ACPI (1 << 0) -#define MBOX_SWSCI (1 << 1) -#define MBOX_ASLE (1 << 2) -#define MBOX_VBT (1 << 3) -#define MBOX_ASLE_EXT (1 << 4) - -struct opregion_header { - char sign[16]; - uint32_t size; - uint32_t over; - char sver[32]; - char vver[16]; - char gver[16]; - uint32_t mbox; - uint32_t dmod; - uint32_t pcon; - char dver[32]; - uint8_t rsv1[124]; -} __attribute__((packed)); - -/* OpRegion mailbox #1: public ACPI methods */ -struct opregion_acpi { - uint32_t drdy; /* driver readiness */ - uint32_t csts; /* notification status */ - uint32_t cevt; /* current event */ - uint8_t rsvd1[20]; - uint32_t didl[8]; /* supported display devices ID list */ - uint32_t cpdl[8]; /* currently presented display list */ - uint32_t cadl[8]; /* currently active display list */ - uint32_t nadl[8]; /* next active devices list */ - uint32_t aslp; /* ASL sleep time-out */ - uint32_t tidx; /* toggle table index */ - uint32_t chpd; /* current hotplug enable indicator */ - uint32_t clid; /* current lid state*/ - uint32_t cdck; /* current docking state */ - uint32_t sxsw; /* Sx state resume */ - uint32_t evts; /* ASL supported events */ - uint32_t cnot; /* current OS notification */ - uint32_t nrdy; /* driver status */ - uint32_t did2[7]; - uint32_t cpd2[7]; - uint8_t rsvd2[4]; -} __attribute__((packed)); - -/* OpRegion mailbox #2: SWSCI */ -struct opregion_swsci { - uint32_t scic; /* SWSCI command|status|data */ - uint32_t parm; /* command parameters */ - uint32_t dslp; /* driver sleep time-out */ - uint8_t rsvd[244]; -} __attribute__((packed)); - -/* OpRegion mailbox #3: ASLE */ -struct opregion_asle { - uint32_t ardy; /* driver readiness */ - uint32_t aslc; /* ASLE interrupt command */ - uint32_t tche; /* technology enabled indicator */ - uint32_t alsi; /* current ALS illuminance reading */ - uint32_t bclp; /* backlight brightness to set */ - uint32_t pfit; /* panel fitting state */ - uint32_t cblv; /* current brightness level */ - uint16_t bclm[20]; /* backlight level duty cycle mapping table */ - uint32_t cpfm; /* current panel fitting mode */ - uint32_t epfm; /* enabled panel fitting modes */ - uint8_t plut_header; /* panel LUT and identifier */ - uint8_t plut_identifier[10]; /* panel LUT and identifier */ - uint8_t plut[63]; /* panel LUT and identifier */ - uint32_t pfmb; /* PWM freq and min brightness */ - uint32_t ccdv; - uint32_t pcft; - uint32_t srot; - uint32_t iuer; - uint8_t fdss[8]; - uint32_t fdsp; - uint32_t stat; - uint8_t rsvd[86]; -} __attribute__((packed)); - -/* OpRegion mailbox #4: VBT */ -struct opregion_vbt { - char product_string[20]; - /* rest ignored */ -} __attribute__((packed)); - -/* OpRegion mailbox #5: ASLE extension */ -struct opregion_asle_ext { - uint32_t phed; - uint8_t bddc[256]; -} __attribute__((packed)); - -static uint32_t decode_header(const void *buffer) -{ - const struct opregion_header *header = buffer; - char *s; - - if (strncmp("IntelGraphicsMem", header->sign, sizeof(header->sign))) { - fprintf(stderr, "invalid opregion signature\n"); - return 0; - } - - printf("OpRegion Header:\n"); - - s = strndup(header->sign, sizeof(header->sign)); - printf("\tsign:\t%s\n", s); - free(s); - - printf("\tsize:\t0x%08x\n", header->size); - printf("\tover:\t0x%08x\n", header->over); - - s = strndup(header->sver, sizeof(header->sver)); - printf("\tsver:\t%s\n", s); - free(s); - - s = strndup(header->vver, sizeof(header->vver)); - printf("\tvver:\t%s\n", s); - free(s); - - s = strndup(header->gver, sizeof(header->gver)); - printf("\tgver:\t%s\n", s); - free(s); - - printf("\tmbox:\t0x%08x\n", header->mbox); - - printf("\tdmod:\t0x%08x\n", header->dmod); - printf("\tpcon:\t0x%08x\n", header->pcon); - - s = strndup(header->dver, sizeof(header->dver)); - printf("\tdver:\t%s\n", s); - free(s); - - printf("\n"); - - return header->mbox; -} - -static void decode_acpi(const void *buffer) -{ - const struct opregion_acpi *acpi = buffer; - int i; - - printf("OpRegion Mailbox 1: Public ACPI Methods:\n"); - - printf("\tdrdy:\t0x%08x\n", acpi->drdy); - printf("\tcsts:\t0x%08x\n", acpi->csts); - printf("\tcevt:\t0x%08x\n", acpi->cevt); - - printf("\tdidl:\n"); - for (i = 0; i < ARRAY_SIZE(acpi->didl); i++) - printf("\t\tdidl[%d]:\t0x%08x\n", i, acpi->didl[i]); - - printf("\tcpdl:\n"); - for (i = 0; i < ARRAY_SIZE(acpi->cpdl); i++) - printf("\t\tcpdl[%d]:\t0x%08x\n", i, acpi->cpdl[i]); - - printf("\tcadl:\n"); - for (i = 0; i < ARRAY_SIZE(acpi->cadl); i++) - printf("\t\tcadl[%d]:\t0x%08x\n", i, acpi->cadl[i]); - - printf("\tnadl:\n"); - for (i = 0; i < ARRAY_SIZE(acpi->nadl); i++) - printf("\t\tnadl[%d]:\t0x%08x\n", i, acpi->nadl[i]); - - printf("\taslp:\t0x%08x\n", acpi->aslp); - printf("\ttidx:\t0x%08x\n", acpi->tidx); - printf("\tchpd:\t0x%08x\n", acpi->chpd); - printf("\tclid:\t0x%08x\n", acpi->clid); - printf("\tcdck:\t0x%08x\n", acpi->cdck); - printf("\tsxsw:\t0x%08x\n", acpi->sxsw); - printf("\tevts:\t0x%08x\n", acpi->evts); - printf("\tcnot:\t0x%08x\n", acpi->cnot); - printf("\tnrdy:\t0x%08x\n", acpi->nrdy); - - printf("\tdid2:\n"); - for (i = 0; i < ARRAY_SIZE(acpi->did2); i++) - printf("\t\tdid2[%d]:\t0x%08x\n", i, acpi->did2[i]); - - printf("\tcpd2:\n"); - for (i = 0; i < ARRAY_SIZE(acpi->cpd2); i++) - printf("\t\tcpd2[%d]:\t0x%08x\n", i, acpi->cpd2[i]); - - printf("\n"); -} - -static void decode_swsci(const void *buffer) -{ - const struct opregion_swsci *swsci = buffer; - - printf("OpRegion Mailbox 2: Software SCI Interface (SWSCI):\n"); - - printf("\tscic:\t0x%08x\n", swsci->scic); - printf("\tparm:\t0x%08x\n", swsci->parm); - printf("\tdslp:\t0x%08x\n", swsci->dslp); - - printf("\n"); -} - -static void decode_asle(const void *buffer) -{ - const struct opregion_asle *asle = buffer; - int i; - - printf("OpRegion Mailbox 3: BIOS to Driver Notification (ASLE):\n"); - - printf("\tardy:\t0x%08x\n", asle->ardy); - printf("\taslc:\t0x%08x\n", asle->aslc); - printf("\ttche:\t0x%08x\n", asle->tche); - printf("\talsi:\t0x%08x\n", asle->alsi); - printf("\tbclp:\t0x%08x\n", asle->bclp); - printf("\tpfit:\t0x%08x\n", asle->pfit); - printf("\tcblv:\t0x%08x\n", asle->cblv); - - printf("\tbclm:\n"); - for (i = 0; i < ARRAY_SIZE(asle->bclm); i++) { - int valid = asle->bclm[i] & (1 << 15); - int percentage = (asle->bclm[i] & 0x7f00) >> 8; - int duty_cycle = asle->bclm[i] & 0xff; - - printf("\t\tbclm[%d]:\t0x%04x", i, asle->bclm[i]); - if (valid) - printf(" (%3d%% -> 0x%02x)\n", percentage, duty_cycle); - else - printf("\n"); - - } - - printf("\tcpfm:\t0x%08x\n", asle->cpfm); - printf("\tepfm:\t0x%08x\n", asle->epfm); - - printf("\tplut header:\t0x%02x\n", asle->plut_header); - - printf("\tplut identifier:"); - for (i = 0; i < ARRAY_SIZE(asle->plut_identifier); i++) - printf(" %02x", asle->plut_identifier[i]); - printf("\n"); - - printf("\tplut:\n"); - for (i = 0; i < ARRAY_SIZE(asle->plut); i++) { - const int COLUMNS = 7; - - if (i % COLUMNS == 0) - printf("\t\tplut[%d]:\t", i / COLUMNS); - - printf("%02x ", asle->plut[i]); - - if (i % COLUMNS == COLUMNS - 1) - printf("\n"); - } - - printf("\tpfmb:\t0x%08x\n", asle->pfmb); - printf("\tccdv:\t0x%08x\n", asle->ccdv); - printf("\tpcft:\t0x%08x\n", asle->pcft); - printf("\tsrot:\t0x%08x\n", asle->srot); - printf("\tiuer:\t0x%08x\n", asle->iuer); - - printf("\tfdss:\t"); - for (i = 0; i < ARRAY_SIZE(asle->fdss); i++) - printf("%02x ", asle->fdss[i]); - printf("\n"); - - printf("\tfdsp:\t0x%08x\n", asle->fdsp); - printf("\tstat:\t0x%08x\n", asle->stat); - - printf("\n"); -} - -static void decode_vbt(const void *buffer) -{ - const struct opregion_vbt *vbt = buffer; - char *s; - - printf("OpRegion Mailbox 4: Video BIOS Table (VBT):\n"); - - s = strndup(vbt->product_string, sizeof(vbt->product_string)); - printf("\tproduct string:\t%s\n", s); - free(s); - - printf("\t(use intel_bios_reader to decode the VBT)\n"); - - printf("\n"); -} - -static void decode_asle_ext(const void *buffer) -{ - const struct opregion_asle_ext *asle_ext = buffer; - int i; - - printf("OpRegion Mailbox 5: BIOS to Driver Notification Extension:\n"); - - printf("\tphed:\t0x%08x\n", asle_ext->phed); - - printf("\tbddc:\n"); - for (i = 0; i < ARRAY_SIZE(asle_ext->bddc); i++) { - const int COLUMNS = 16; - - if (i % COLUMNS == 0) - printf("\t\tbddc[0x%02x]:\t", i); - - printf("%02x ", asle_ext->bddc[i]); - - if (i % COLUMNS == COLUMNS - 1) - printf("\n"); - } - - printf("\n"); -} - -static void decode_opregion(const uint8_t *opregion, int size) -{ - uint32_t mbox; - - /* XXX: allow decoding up to size */ - if (OPREGION_ASLE_EXT_OFFSET + sizeof(struct opregion_asle_ext) > size) { - fprintf(stderr, "buffer too small\n"); - return; - } - - mbox = decode_header(opregion + OPREGION_HEADER_OFFSET); - if (mbox & MBOX_ACPI) - decode_acpi(opregion + OPREGION_ACPI_OFFSET); - if (mbox & MBOX_SWSCI) - decode_swsci(opregion + OPREGION_SWSCI_OFFSET); - if (mbox & MBOX_ASLE) - decode_asle(opregion + OPREGION_ASLE_OFFSET); - if (mbox & MBOX_VBT) - decode_vbt(opregion + OPREGION_VBT_OFFSET); - if (mbox & MBOX_ASLE_EXT) - decode_asle_ext(opregion + OPREGION_ASLE_EXT_OFFSET); -} - -int main(int argc, char *argv[]) -{ - const char *filename = "/sys/kernel/debug/dri/0/i915_opregion"; - int fd; - struct stat finfo; - uint8_t *opregion; - int c, option_index = 0; - - static struct option long_options[] = { - { "file", required_argument, 0, 'f' }, - { "help", no_argument, 0, 'h' }, - { 0 }, - }; - - while ((c = getopt_long(argc, argv, "hf:", - long_options, &option_index)) != -1) { - switch (c) { - case 'h': - printf("usage: intel_opregion_decode [-f|--file=<input>]\n"); - return 0; - case 'f': - filename = optarg; - break; - default: - fprintf(stderr, "unkown command options\n"); - return 1; - } - } - - fd = open(filename, O_RDONLY); - if (fd == -1) { - printf("Couldn't open \"%s\": %s\n", filename, strerror(errno)); - return 1; - } - - if (stat(filename, &finfo)) { - printf("failed to stat \"%s\": %s\n", filename, strerror(errno)); - return 1; - } - - if (finfo.st_size == 0) { - int len = 0, ret; - finfo.st_size = 8192; - opregion = malloc(finfo.st_size); - while ((ret = read(fd, opregion + len, finfo.st_size - len))) { - if (ret < 0) { - printf("failed to read \"%s\": %s\n", filename, - strerror(errno)); - return 1; - } - - len += ret; - if (len == finfo.st_size) { - finfo.st_size *= 2; - opregion = realloc(opregion, finfo.st_size); - } - } - } else { - opregion = mmap(NULL, finfo.st_size, PROT_READ, MAP_SHARED, - fd, 0); - if (opregion == MAP_FAILED) { - printf("failed to map \"%s\": %s\n", filename, - strerror(errno)); - return 1; - } - } - - decode_opregion(opregion, finfo.st_size); - - return 0; -} diff --git a/tools/intel_panel_fitter.c b/tools/intel_panel_fitter.c deleted file mode 100644 index 5519361e..00000000 --- a/tools/intel_panel_fitter.c +++ /dev/null @@ -1,346 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Paulo Zanoni <paulo.r.zanoni@intel.com> - */ - -#include <assert.h> -#include <stdbool.h> -#include <stdio.h> -#include <unistd.h> -#include <stdlib.h> -#include <string.h> -#include "intel_io.h" -#include "intel_chipset.h" -#include "intel_reg.h" - -int gen; - -uint32_t HTOTAL[] = { 0x60000, 0x61000, 0x62000 }; -uint32_t VTOTAL[] = { 0x6000C, 0x6100C, 0x6200C }; -uint32_t PIPECONF[] = { 0x70008, 0x71008, 0x72008 }; -uint32_t PIPESRC[] = { 0x6001C, 0x6101C, 0x6201C }; -uint32_t PF_CTRL1[] = { 0x68080, 0x68880, 0x69080 }; -uint32_t PF_WIN_POS[] = { 0x68070, 0x68870, 0x69070 }; -uint32_t PF_WIN_SZ[] = { 0x68074, 0x68874, 0x69074 }; - -#define PIPECONF_ENABLE (1 << 31) -#define PIPECONF_INTERLACE_MASK (7 << 21) -#define PIPECONF_PF_PD (0 << 21) -#define PIPECONF_PF_ID (1 << 21) -#define PIPECONF_IF_ID (3 << 21) - -#define HTOTAL_ACTIVE_MASK (0xFFF << 0) -#define VTOTAL_ACTIVE_MASK (0xFFF << 0) - -#define PIPESRC_HORIZ_MASK (0xFFF << 16) -#define PIPESRC_VERT_MASK (0xFFF << 0) - -/*#define PF_ENABLE (1 << 31)*/ -#define PF_PIPE_MASK (3 << 29) -#define PF_FILTER_MASK (3 << 23) -#define PF_FILTER_MED (1 << 23) -#define PF_PIPE_A (0 << 29) -#define PF_PIPE_B (1 << 29) -#define PF_PIPE_C (2 << 29) - -#define PF_WIN_SZ_X_MASK (0x1FFF << 16) -#define PF_WIN_SZ_Y_MASK (0xFFF << 0) - -struct pipe_info { - bool enabled; - bool pf_enabled; - uint32_t interlace_mode; - uint32_t tot_width; /* htotal */ - uint32_t tot_height; /* vtotal */ - uint32_t src_width; /* pipesrc.x */ - uint32_t src_height; /* pipesrc.y */ - uint32_t dst_width; /* pf_win_sz.x */ - uint32_t dst_height; /* pf_win_sz.y */ -}; - -static void read_pipe_info(int intel_pipe, struct pipe_info *info) -{ - uint32_t conf, vtotal, htotal, src, ctrl1, win_sz; - - conf = INREG(PIPECONF[intel_pipe]); - htotal = INREG(HTOTAL[intel_pipe]); - vtotal = INREG(VTOTAL[intel_pipe]); - src = INREG(PIPESRC[intel_pipe]); - ctrl1 = INREG(PF_CTRL1[intel_pipe]); - win_sz = INREG(PF_WIN_SZ[intel_pipe]); - - info->enabled = (conf & PIPECONF_ENABLE) ? true : false; - info->tot_width = (htotal & HTOTAL_ACTIVE_MASK) + 1; - info->tot_height = (vtotal & VTOTAL_ACTIVE_MASK) + 1; - info->src_width = ((src & PIPESRC_HORIZ_MASK) >> 16) + 1; - info->src_height = (src & PIPESRC_VERT_MASK) + 1; - info->interlace_mode = conf & PIPECONF_INTERLACE_MASK; - info->pf_enabled = ctrl1 & PF_ENABLE; - info->dst_width = (win_sz & PF_WIN_SZ_X_MASK) >> 16; - info->dst_height = win_sz & PF_WIN_SZ_Y_MASK; -} - -static void dump_pipe(int intel_pipe) -{ - struct pipe_info info; - - read_pipe_info(intel_pipe, &info); - - printf("\nPipe %c:\n", intel_pipe + 'A'); - - printf("- %s\n", info.enabled ? "enabled" : "disabled"); - if (!info.enabled) - return; - - switch (info.interlace_mode) { - case PIPECONF_PF_PD: - printf("- progressive\n"); - break; - case PIPECONF_PF_ID: - printf("- interlaced (progressive fetch)\n"); - break; - case PIPECONF_IF_ID: - printf("- interlaced (interlaced fetch)\n"); - break; - default: - assert(0); - } - - printf("- pf %s\n", info.pf_enabled ? "enabled" : "disabled"); - if (!info.pf_enabled) - return; - - printf("- tot %dx%d\n", info.tot_width, info.tot_height); - printf("- src %dx%d\n", info.src_width, info.src_height); - printf("- dst %dx%d\n", info.dst_width, info.dst_height); -} - -static void dump_info(void) -{ - int i; - int pipes; - - if (gen < 7) - pipes = 2; - else - pipes = 3; - - for (i = 0; i < pipes; i++) { - dump_pipe(i); - } -} - -static int change_screen_size(int intel_pipe, int x, int y) -{ - struct pipe_info info; - uint32_t dst_width, dst_height, pos_x, pos_y; - uint32_t ctrl1_val; - uint32_t win_pos_val; - uint32_t win_sz_val; - - read_pipe_info(intel_pipe, &info); - - if (x == 0) { - if (info.dst_width != 0) - dst_width = info.dst_width; - else - dst_width = info.src_width; - } else { - dst_width = x; - } - - if (y == 0) { - if (info.dst_height != 0) - dst_height = info.dst_height; - else - dst_height = info.src_height; - } else { - dst_height = y; - } - - pos_x = abs((info.tot_width - dst_width)) / 2; - pos_y = abs((info.tot_height - dst_height)) / 2; - - if (pos_x == 1) - pos_x = 0; - - if (info.src_width / (double) dst_width > 1.125) { - printf("X is too small\n"); - return 1; - } else if (info.tot_width < dst_width) { - printf("X is too big\n"); - return 1; - } else if (dst_width & 1) { - printf("X must be even\n"); - return 1; - } else if (info.src_height / (double) dst_height > 1.125) { - printf("Y is too small\n"); - return 1; - } else if (info.tot_height < dst_height) { - printf("Y is too big\n"); - return 1; - } else if (dst_height & 1) { - printf("Y must be even\n"); - return 1; - } - - printf("Changing size for pipe %c:\n" - "- width: %d -> %d\n" - "- height: %d -> %d\n" - "- pos: %dx%d\n", - intel_pipe + 'A', info.src_width, dst_width, info.src_height, - dst_height, pos_x, pos_y); - - ctrl1_val = PF_ENABLE | PF_FILTER_MED; - - /* This can break stuff if the panel fitter is already enabled for - * another pipe */ - if (gen >= 7) { - switch (intel_pipe) { - case 0: - ctrl1_val |= PF_PIPE_A; - break; - case 1: - ctrl1_val |= PF_PIPE_B; - break; - case 2: - ctrl1_val |= PF_PIPE_C; - break; - default: - assert(0); - } - } - OUTREG(PF_CTRL1[intel_pipe], ctrl1_val); - - win_pos_val = pos_x << 16; - win_pos_val |= pos_y; - OUTREG(PF_WIN_POS[intel_pipe], win_pos_val); - - win_sz_val = dst_width << 16; - win_sz_val |= dst_height; - OUTREG(PF_WIN_SZ[intel_pipe], win_sz_val); - - return 0; -} - -static int disable_panel_fitter(int intel_pipe) -{ - OUTREG(PF_CTRL1[intel_pipe], 0); - OUTREG(PF_WIN_POS[intel_pipe], 0); - OUTREG(PF_WIN_SZ[intel_pipe], 0); - return 0; -} - -static void print_usage(void) -{ - printf("Options:\n" -" -p pipe: pipe to be used (A, B or C)\n" -" -x value: final screen width size in pixels\n" -" -y value: final screen height size in pixels\n" -" -d: disable panel fitter\n" -" -l: list the current state of each pipe\n" -" -h: prints this message\n"); -} - -int main (int argc, char *argv[]) -{ - int opt; - int ret = 0; - char intel_pipe = '\0'; - int x = 0, y = 0; - bool do_disable = false, do_dump = false, do_usage = false; - struct pci_device *pci_dev; - uint32_t devid; - - printf("WARNING:\n" - "This tool is a workaround for people that don't have a Kernel " - "with overscan compensation properties: it is just a temporary " - "solution that may or may not work. Use it at your own risk.\n"); - - pci_dev = intel_get_pci_device(); - intel_register_access_init(pci_dev, 0); - devid = pci_dev->device_id; - - if (!HAS_PCH_SPLIT(devid)) { - printf("This tool was only tested on Ironlake and newer\n"); - ret = 1; - goto out; - } - if (IS_GEN5(devid)) - gen = 5; - else if (IS_GEN6(devid)) - gen = 6; - else - gen = 7; - - while ((opt = getopt(argc, argv, "p:x:y:dlh")) != -1) { - switch (opt) { - case 'p': - intel_pipe = optarg[0]; - if (intel_pipe != 'A' && intel_pipe != 'B' && - (gen <= 6 || intel_pipe != 'C')) { - printf("Invalid pipe\n"); - ret = 1; - goto out; - } - break; - case 'x': - x = atoi(optarg); - break; - case 'y': - y = atoi(optarg); - break; - case 'd': - do_disable = true; - break; - case 'l': - do_dump = true; - break; - case 'h': - do_usage = true; - break; - default: - do_usage = true; - ret = 1; - } - } - - if (do_usage) { - print_usage(); - } else if (do_dump) { - dump_info(); - } else if (intel_pipe) { - if (do_disable) - ret = disable_panel_fitter(intel_pipe - 'A'); - else - ret = change_screen_size(intel_pipe - 'A', x, y); - } else { - print_usage(); - ret = 1; - } - -out: - intel_register_access_fini(); - return ret; -} diff --git a/tools/intel_perf_counters.c b/tools/intel_perf_counters.c deleted file mode 100644 index 739f926d..00000000 --- a/tools/intel_perf_counters.c +++ /dev/null @@ -1,533 +0,0 @@ -/* - * Copyright © 2010, 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * Kenneth Graunke <kenneth@whitecape.org> - * - * While documentation for performance counters is suspiciously missing from the - * Sandybridge PRM, they were documented in Volume 1 Part 3 of the Ironlake PRM. - * - * A lot of the Ironlake PRM actually unintentionally documents Sandybridge - * due to mistakes made when updating the documentation for Gen6+. Many of - * these mislabeled sections carried forward to the public documentation. - * - * The Ironlake PRMs have been publicly available since 2010 and are online at: - * https://01.org/linuxgraphics/documentation/2010-intel-core-processor-family - */ - -#include <unistd.h> -#include <stdbool.h> -#include <stdlib.h> -#include <stdio.h> -#include <err.h> -#include <sys/ioctl.h> - -#include "drm.h" -#include "i915_drm.h" -#include "drmtest.h" -#include "intel_io.h" -#include "intel_bufmgr.h" -#include "intel_batchbuffer.h" -#include "intel_chipset.h" - -#define GEN5_COUNTER_COUNT 29 - -const char *gen5_counter_names[GEN5_COUNTER_COUNT] = { - "cycles the CS unit is starved", - "cycles the CS unit is stalled", - "cycles the VF unit is starved", - "cycles the VF unit is stalled", - "cycles the VS unit is starved", - "cycles the VS unit is stalled", - "cycles the GS unit is starved", - "cycles the GS unit is stalled", - "cycles the CL unit is starved", - "cycles the CL unit is stalled", - "cycles the SF unit is starved", - "cycles the SF unit is stalled", - "cycles the WZ unit is starved", - "cycles the WZ unit is stalled", - "Z buffer read/write ", - "cycles each EU was active ", - "cycles each EU was suspended ", - "cycles threads loaded all EUs", - "cycles filtering active ", - "cycles PS threads executed ", - "subspans written to RC ", - "bytes read for texture reads ", - "texels returned from sampler ", - "polygons not culled ", - "clocks MASF has valid message", - "64b writes/reads from RC ", - "reads on dataport ", - "clocks MASF has valid msg not consumed by sampler", - "cycles any EU is stalled for math", -}; - -#define GEN6_COUNTER_COUNT 29 - -/** - * Sandybridge: Counter Select = 001 - * A0 A1 A2 A3 A4 TIMESTAMP RPT_ID - * A5 A6 A7 A8 A9 A10 A11 A12 - * A13 A14 A15 A16 A17 A18 A19 A20 - * A21 A22 A23 A24 A25 A26 A27 A28 - */ -const int gen6_counter_format = 1; - -/** - * Names for aggregating counters A0-A28. - * - * While the Ironlake PRM clearly documents that there are 29 counters (A0-A28), - * it only lists the names for 28 of them; one is missing. However, careful - * examination reveals a pattern: there are five GS counters (Active, Stall, - * Core Stall, # threads loaded, and ready but not running time). There are - * also five PS counters, in the same order. But there are only four VS - * counters listed - the number of VS threads loaded is missing. Presumably, - * it exists and is counter 5, and the rest are shifted over one place. - */ -const char *gen6_counter_names[GEN6_COUNTER_COUNT] = { - [0] = "Aggregated Core Array Active", - [1] = "Aggregated Core Array Stalled", - [2] = "Vertex Shader Active Time", - [3] = "Vertex Shader Stall Time", - [4] = "Vertex Shader Stall Time - Core Stall", - [5] = "# VS threads loaded", - [6] = "Vertex Shader Ready but not running time", - [7] = "Geometry Shader Active Time", - [8] = "Geometry Shader Stall Time", - [9] = "Geometry Shader Stall Time - Core Stall", - [10] = "# GS threads loaded", - [11] = "Geometry Shader ready but not running Time", - [12] = "Pixel Shader Active Time", - [13] = "Pixel Shader Stall Time", - [14] = "Pixel Shader Stall Time - Core Stall", - [15] = "# PS threads loaded", - [16] = "Pixel Shader ready but not running Time", - [17] = "Early Z Test Pixels Passing", - [18] = "Early Z Test Pixels Failing", - [19] = "Early Stencil Test Pixels Passing", - [20] = "Early Stencil Test Pixels Failing", - [21] = "Pixel Kill Count", - [22] = "Alpha Test Pixels Failed", - [23] = "Post PS Stencil Pixels Failed", - [24] = "Post PS Z buffer Pixels Failed", - [25] = "Pixels/samples Written in the frame buffer", - [26] = "GPU Busy", - [27] = "CL active and not stalled", - [28] = "SF active and stalled", -}; - -#define GEN7_COUNTER_COUNT 44 - -/** - * Names for aggregating counters A0-A44. Uninitialized fields are "Reserved." - */ -const char *gen7_counter_names[GEN7_COUNTER_COUNT] = { - /* A0: - * The sum of all cycles on all cores actively executing instructions - * This does not count the time taken to service Send instructions. - * This time is considered by shader active counters to give the result. - */ - [0] = "Aggregated Core Array Active", - /* A1: - * The sum of all cycles on all cores where the EU is not idle and is - * not actively executing ISA instructions. Generally this means that - * all loaded threads on the EU are stalled on some data dependency, - * but this also includes the time during which the TS is loading the - * thread dispatch header into the EU prior to thread execution and no - * other thread is fully loaded. - */ - [1] = "Aggregated Core Array Stalled", - /* A2: - * Total time in clocks the vertex shader spent active on all cores. - */ - [2] = "Vertex Shader Active Time", - /* A4: - * Total time in clocks the vertex shader spent stalled on all cores - - * and the entire core was stalled as well. - */ - [4] = "Vertex Shader Stall Time - Core Stall", - /* A5: Number of VS threads loaded at any given time in the EUs. */ - [5] = "# VS threads loaded", - /* A7: - * Total time in clocks the Hull shader spent active on all cores. - */ - [7] = "Hull Shader Active Time", - /* A9: - * Total time in clocks the Hull shader spent stalled on all cores - - * and the entire core was stalled as well. - */ - [9] = "Hull Shader Stall Time - Core Stall", - /* A10: Number of HS threads loaded at any given time in the EUs. */ - [10] = "# HS threads loaded", - /* A12: - * Total time in clocks the Domain shader spent active on all cores. - */ - [12] = "Domain Shader Active Time", - /* A14: - * Total time in clocks the domain shader spent stalled on all cores - - * and the entire core was stalled as well. - */ - [14] = "Domain Shader Stall Time - Core Stall", - /* A15: Number of DS threads loaded at any given time in the EUs. */ - [15] = "# DS threads loaded", - /* A17: - * Total time in clocks the compute shader spent active on all cores. - */ - [17] = "Compute Shader Active Time", - /* A19: - * Total time in clocks the compute shader spent stalled on all cores - - * and the entire core was stalled as well. - */ - [19] = "Compute Shader Stall Time - Core Stall", - /* A20: Number of CS threads loaded at any given time in the EUs. */ - [20] = "# CS threads loaded", - /* A22: - * Total time in clocks the geometry shader spent active on all cores. - */ - [22] = "Geometry Shader Active Time", - /* A24: - * Total time in clocks the geometry shader spent stalled on all cores - - * and the entire core was stalled as well. - */ - [24] = "Geometry Shader Stall Time - Core Stall", - /* A25: Number of GS threads loaded at any time in the EUs. */ - [25] = "# GS threads loaded", - /* A27: - * Total time in clocks the pixel shader spent active on all cores. - */ - [27] = "Pixel Shader Active Time", - /* A29: - * Total time in clocks the pixel shader spent stalled on all cores - - * and the entire core was stalled as well. - */ - [29] = "Pixel Shader Stall Time - Core Stall", - /* A30: Number of PS threads loaded at any given time in the EUs. */ - [30] = "# PS threads loaded", - /* A32: Count of pixels that pass the fast check (8x8). */ - [32] = "HiZ Fast Z Test Pixels Passing", - /* A33: Count of pixels that fail the fast check (8x8). */ - [33] = "HiZ Fast Z Test Pixels Failing", - /* A34: Count of pixels passing the slow check (2x2). */ - [34] = "Slow Z Test Pixels Passing", - /* A35: Count of pixels that fail the slow check (2x2). */ - [35] = "Slow Z Test Pixels Failing", - /* A36: Number of pixels/samples killed in the pixel shader. - * Ivybridge/Baytrail Erratum: Count reported is 2X the actual count for - * dual source render target messages i.e. when PS has two output colors. - */ - [36] = "Pixel Kill Count", - /* A37: - * Number of pixels/samples that fail alpha-test. Alpha to coverage - * may have some challenges in per-pixel invocation. - */ - [37] = "Alpha Test Pixels Failed", - /* A38: - * Number of pixels/samples failing stencil test after the pixel shader - * has executed. - */ - [38] = "Post PS Stencil Pixels Failed", - /* A39: - * Number of pixels/samples fail Z test after the pixel shader has - * executed. - */ - [39] = "Post PS Z buffer Pixels Failed", - /* A40: - * Number of render target writes. MRT scenarios will cause this - * counter to increment multiple times. - */ - [40] = "3D/GPGPU Render Target Writes", - /* A41: Render engine is not idle. - * - * GPU Busy aggregate counter doesn't increment under the following - * conditions: - * - * 1. Context Switch in Progress. - * 2. GPU stalled on executing MI_WAIT_FOR_EVENT. - * 3. GPU stalled on execution MI_SEMAPHORE_MBOX. - * 4. RCS idle but other parts of GPU active (e.g. only media engines - * active) - */ - [41] = "Render Engine Busy", - /* A42: - * VSunit is stalling VF (upstream unit) and starving HS (downstream - * unit). - */ - [42] = "VS bottleneck", - /* A43: - * GSunit is stalling DS (upstream unit) and starving SOL (downstream - * unit). - */ - [43] = "GS bottleneck", -}; - -/** - * Ivybridge - Counter Select = 101 - * A4 A3 A2 A1 A0 TIMESTAMP ReportID - * A12 A11 A10 A9 A8 A7 A6 A5 - * A20 A19 A18 A17 A16 A15 A14 A13 - * A28 A27 A26 A25 A24 A23 A22 A21 - * A36 A35 A34 A33 A32 A31 A30 A29 - * A44 A43 A42 A41 A40 A39 A38 A37 - * C3 C2 C1 C0 B3 B2 B1 B0 - * C11 C10 C9 C8 C7 C6 C5 C4 - */ -const int gen7_counter_format = 5; /* 0b101 */ - -int have_totals = 0; -uint32_t *totals; -uint32_t *last_counter; -static drm_intel_bufmgr *bufmgr; -struct intel_batchbuffer *batch; - -/* DW0 */ -#define GEN5_MI_REPORT_PERF_COUNT ((0x26 << 23) | (3 - 2)) -#define MI_COUNTER_SET_0 (0 << 6) -#define MI_COUNTER_SET_1 (1 << 6) -/* DW1 */ -#define MI_COUNTER_ADDRESS_GTT (1 << 0) -/* DW2: report ID */ - -/** - * According to the Sandybridge PRM, Volume 1, Part 1, page 48, - * MI_REPORT_PERF_COUNT is now opcode 0x28. The Ironlake PRM, Volume 1, - * Part 3 details how it works. - */ -/* DW0 */ -#define GEN6_MI_REPORT_PERF_COUNT (0x28 << 23) -/* DW1 and 2 are the same as above */ - -/* OACONTROL exists on Gen6+ but is documented in the Ironlake PRM */ -#define OACONTROL 0x2360 -# define OACONTROL_COUNTER_SELECT_SHIFT 2 -# define PERFORMANCE_COUNTER_ENABLE (1 << 0) - -static void -gen5_get_counters(void) -{ - int i; - drm_intel_bo *stats_bo; - uint32_t *stats_result; - - stats_bo = drm_intel_bo_alloc(bufmgr, "stats", 4096, 4096); - - BEGIN_BATCH(6, 2); - OUT_BATCH(GEN5_MI_REPORT_PERF_COUNT | MI_COUNTER_SET_0); - OUT_RELOC(stats_bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - 0); - OUT_BATCH(0); - - OUT_BATCH(GEN5_MI_REPORT_PERF_COUNT | MI_COUNTER_SET_1); - OUT_RELOC(stats_bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - 64); - OUT_BATCH(0); - - ADVANCE_BATCH(); - - intel_batchbuffer_flush(batch); - - drm_intel_bo_map(stats_bo, 0); - stats_result = stats_bo->virtual; - /* skip REPORT_ID, TIMESTAMP */ - stats_result += 3; - for (i = 0 ; i < GEN5_COUNTER_COUNT; i++) { - totals[i] += stats_result[i] - last_counter[i]; - last_counter[i] = stats_result[i]; - } - - drm_intel_bo_unmap(stats_bo); - drm_intel_bo_unreference(stats_bo); -} - -static void -gen6_get_counters(void) -{ - int i; - drm_intel_bo *stats_bo; - uint32_t *stats_result; - - /* Map from counter names to their index in the buffer object */ - static const int buffer_index[GEN6_COUNTER_COUNT] = - { - 7, 6, 5, 4, 3, - 15, 14, 13, 12, 11, 10, 9, 8, - 23, 22, 21, 20, 19, 18, 17, 16, - 31, 30, 29, 28, 27, 26, 25, 24, - }; - - stats_bo = drm_intel_bo_alloc(bufmgr, "stats", 4096, 4096); - - BEGIN_BATCH(3, 1); - OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT | (3 - 2)); - OUT_RELOC(stats_bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - MI_COUNTER_ADDRESS_GTT); - OUT_BATCH(0); - ADVANCE_BATCH(); - - intel_batchbuffer_flush_on_ring(batch, I915_EXEC_RENDER); - - drm_intel_bo_map(stats_bo, 0); - stats_result = stats_bo->virtual; - for (i = 0; i < GEN6_COUNTER_COUNT; i++) { - totals[i] += stats_result[buffer_index[i]] - last_counter[i]; - last_counter[i] = stats_result[buffer_index[i]]; - } - - drm_intel_bo_unmap(stats_bo); - drm_intel_bo_unreference(stats_bo); -} - -static void -gen7_get_counters(void) -{ - int i; - drm_intel_bo *stats_bo; - uint32_t *stats_result; - - stats_bo = drm_intel_bo_alloc(bufmgr, "stats", 4096, 4096); - - BEGIN_BATCH(3, 1); - OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT | (3 - 2)); - OUT_RELOC(stats_bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - intel_batchbuffer_flush_on_ring(batch, I915_EXEC_RENDER); - - drm_intel_bo_map(stats_bo, 0); - stats_result = stats_bo->virtual; - /* skip REPORT_ID, TIMESTAMP */ - stats_result += 3; - for (i = 0; i < GEN7_COUNTER_COUNT; i++) { - /* Ignore "Reserved" counters */ - if (!gen7_counter_names[i]) - continue; - totals[i] += stats_result[i] - last_counter[i]; - last_counter[i] = stats_result[i]; - } - - drm_intel_bo_unmap(stats_bo); - drm_intel_bo_unreference(stats_bo); -} - -#define STATS_CHECK_FREQUENCY 100 -#define STATS_REPORT_FREQUENCY 2 - -int -main(int argc, char **argv) -{ - uint32_t devid; - int counter_format; - int counter_count; - const char **counter_name; - void (*get_counters)(void); - int i; - char clear_screen[] = {0x1b, '[', 'H', - 0x1b, '[', 'J', - 0x0}; - bool oacontrol = true; - int fd; - int l; - - fd = drm_open_any(); - devid = intel_get_drm_devid(fd); - - bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); - drm_intel_bufmgr_gem_enable_reuse(bufmgr); - batch = intel_batchbuffer_alloc(bufmgr, devid); - - if (IS_GEN5(devid)) { - counter_name = gen5_counter_names; - counter_count = GEN5_COUNTER_COUNT; - get_counters = gen5_get_counters; - oacontrol = false; - } else if (IS_GEN6(devid)) { - counter_name = gen6_counter_names; - counter_count = GEN6_COUNTER_COUNT; - counter_format = gen6_counter_format; - get_counters = gen6_get_counters; - } else if (IS_GEN7(devid)) { - counter_name = gen7_counter_names; - counter_count = GEN7_COUNTER_COUNT; - counter_format = gen7_counter_format; - get_counters = gen7_get_counters; - } else { - printf("This tool is not yet supported on your platform.\n"); - abort(); - } - - if (oacontrol) { - /* Forcewake */ - intel_register_access_init(intel_get_pci_device(), 0); - - /* Enable performance counters */ - intel_register_write(OACONTROL, - counter_format << OACONTROL_COUNTER_SELECT_SHIFT | - PERFORMANCE_COUNTER_ENABLE); - } - - totals = calloc(counter_count, sizeof(uint32_t)); - last_counter = calloc(counter_count, sizeof(uint32_t)); - - for (;;) { - for (l = 0; l < STATS_CHECK_FREQUENCY; l++) { - printf("%s", clear_screen); - - if (l % (STATS_CHECK_FREQUENCY / STATS_REPORT_FREQUENCY) == 0) { - if (have_totals) { - for (i = 0; i < counter_count; i++) { - /* Ignore "Reserved" counters */ - if (!counter_name[i]) - continue; - printf("%s: %u\n", counter_name[i], - totals[i]); - totals[i] = 0; - } - } - } - - get_counters(); - have_totals = 1; - - usleep(1000000 / STATS_CHECK_FREQUENCY); - } - } - - if (oacontrol) { - /* Disable performance counters */ - intel_register_write(OACONTROL, 0); - - /* Forcewake */ - intel_register_access_fini(); - } - - free(totals); - free(last_counter); - - return 0; -} diff --git a/tools/intel_reg_checker.c b/tools/intel_reg_checker.c deleted file mode 100644 index 22d97961..00000000 --- a/tools/intel_reg_checker.c +++ /dev/null @@ -1,400 +0,0 @@ -/* Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <unistd.h> -#include <stdlib.h> -#include <stdio.h> -#include <err.h> -#include <string.h> -#include <stdbool.h> -#include "intel_io.h" -#include "intel_chipset.h" - -static uint32_t devid; -static int gen; - -static inline uint32_t -read_reg(uint32_t reg) -{ - return *(volatile uint32_t *)((volatile char *)mmio + reg); -} - -static uint32_t -read_and_print_reg(const char *name, uint32_t reg) -{ - uint32_t val = read_reg(reg); - - printf("%s (0x%x): 0x%08x\n", name, reg, val); - - return val; -} - -static void -check_chicken_unset(const char *name, uint32_t reg) -{ - uint32_t val = read_and_print_reg(name, reg); - - - if (val != 0) { - fprintf(stderr, " WARN: chicken bits set\n"); - } else { - printf(" OK: chicken bits unset\n"); - } -} - -static void -check_bit(uint32_t val, int bit, const char *bitname, bool set) -{ - if (!!(val & (1 << bit)) != set) { - fprintf(stderr, " (bit %2d) FAIL: %s must be %s\n", - bit, bitname, set ? "set" : "unset"); - } else { - printf(" (bit %2d) OK: %s\n", bit, bitname); - } -} - -static void -check_perf_bit(uint32_t val, int bit, const char *bitname, bool set) -{ - if (!!(val & (1 << bit)) != set) { - printf(" (bit %2d) PERF: %s should be %s\n", - bit, bitname, set ? "set" : "unset"); - } else { - printf(" (bit %2d) OK: %s\n", bit, bitname); - } -} - -static void -check_mi_mode(void) -{ - /* Described in page 14-16 of the IHD_OS_Vol1_Part3.pdf - * specification. - */ - - uint32_t mi_mode = read_and_print_reg("MI_MODE", 0x209c); - - /* From page 14: - * - * Async Flip Performance mode - * Project: All - * Default Value: 0h - * Format: U1 - * [DevSNB] This bit must be set to ‘1’ - */ - if (gen == 6) - check_bit(mi_mode, 14, "Async Flip Performance mode", true); - else - check_perf_bit(mi_mode, 14, "Async Flip Performance mode", - false); - - check_perf_bit(mi_mode, 13, "Flush Performance Mode", false); - - /* Our driver relies on MI_FLUSH, unfortunately. */ - if (gen >= 6) - check_bit(mi_mode, 12, "MI_FLUSH enable", true); - - /* From page 15: - * - * "1h: LRA mode of allocation. Used for validation purposes" - */ - if (gen < 7) - check_bit(mi_mode, 7, "Vertex Shader Cache Mode", false); - - /* From page 16: - * - * "To avoid deadlock conditions in hardware this bit - * needs to be set for normal operation. - */ - check_bit(mi_mode, 6, "Vertex Shader Timer Dispatch Enable", true); -} - -static void -check_gfx_mode(void) -{ - /* Described in page 17-19 of the IHD_OS_Vol1_Part3.pdf - * specification. - */ - uint32_t gfx_mode; - - if (gen < 6) - return; - - if (gen == 6) - gfx_mode = read_and_print_reg("GFX_MODE", 0x2520); - else - gfx_mode = read_and_print_reg("GFX_MODE", 0x229c); - - /* Our driver only updates page tables at batchbuffer - * boundaries, so we don't need TLB flushes at other times. - */ - check_perf_bit(gfx_mode, 13, "Flush TLB Invalidation Mode", true); -} - -static void -check_gt_mode(void) -{ - /* Described in page 20-22 of the IHD_OS_Vol1_Part3.pdf - * specification. - */ - uint32_t gt_mode; - - if (gen < 6) - return; - - if (gen == 6) - gt_mode = read_and_print_reg("GT_MODE", 0x20d0); - else - gt_mode = read_and_print_reg("GT_MODE", 0x7008); - - if (gen == 6) - check_perf_bit(gt_mode, 8, "Full Rate Sampler Disable", false); - - /* For DevSmallGT, this bit must be set, which means disable - * hashing. - */ - if (devid == PCI_CHIP_SANDYBRIDGE_GT1 || - devid == PCI_CHIP_SANDYBRIDGE_M_GT1) - check_bit(gt_mode, 6, "WIZ Hashing disable", true); - else if (gen == 6) - check_perf_bit(gt_mode, 6, "WIZ Hashing disable", false); - - if (gen == 6) { - check_perf_bit(gt_mode, 5, "TD Four Row Dispatch Disable", - false); - check_perf_bit(gt_mode, 4, "Full Size URB Disable", false); - check_perf_bit(gt_mode, 3, "Full Size SF FIFO Disable", false); - check_perf_bit(gt_mode, 1, "VS Quad Thread Dispatch Disable", - false); - } -} - -static void -check_cache_mode_0(void) -{ - /* Described in page 23-25 of the IHD_OS_Vol1_Part3.pdf - * specification. - */ - uint32_t cache_mode_0; - - if (gen >= 7) - cache_mode_0 = read_and_print_reg("CACHE_MODE_0", 0x7000); - else - cache_mode_0 = read_and_print_reg("CACHE_MODE_0", 0x2120); - - check_perf_bit(cache_mode_0, 15, "Sampler L2 Disable", false); - check_perf_bit(cache_mode_0, 9, "Sampler L2 TLB Prefetch Enable", true); - check_perf_bit(cache_mode_0, 8, - "Depth Related Cache Pipelined Flush Disable", false); - - /* From page 24: - * - * "If this bit is set, RCCunit will have LRA as - * replacement policy. The default value i.e. ( when this - * bit is reset ) indicates that non-LRA eviction - * policy. This bit must be reset. LRA replacement policy - * is not supported." - * - * And the same for STC Eviction Policy. - */ - check_bit(cache_mode_0, 5, "STC LRA Eviction Policy", false); - if (gen >= 6) - check_bit(cache_mode_0, 4, "RCC LRA Eviction Policy", false); - - check_perf_bit(cache_mode_0, 3, "Hierarchical Z Disable", false); - - if (gen == 6) { - check_perf_bit(cache_mode_0, 2, - "Hierarchical Z RAW Stall Optimization " - "Disable", false); - } - - /* From page 25: - * - * "This bit must be 0. Operational Flushes [DevSNB] are - * not supported in [DevSNB]. SW must flush the render - * target after front buffer rendering." - */ - check_bit(cache_mode_0, 0, "Render Cache Operational Flush", false); -} - - -static void -check_cache_mode_1(void) -{ - /* Described in page 23-25 of the IHD_OS_Vol1_Part3.pdf - * specification. - */ - uint32_t cache_mode_1; - - if (gen >= 7) - cache_mode_1 = read_and_print_reg("CACHE_MODE_1", 0x7004); - else - cache_mode_1 = read_and_print_reg("CACHE_MODE_1", 0x2124); - - if (gen >= 7) { - check_perf_bit(cache_mode_1, 13, - "STC Address Lookup Optimization Disable", - false); - } - - /* From page 24: - * - * "If this bit is set, Hizunit will have LRA as - * replacement policy. The default value i.e. (when this - * bit is reset) indicates the non-LRA eviction - * policy. For performance reasons, this bit must be - * reset." - */ - check_bit(cache_mode_1, 12, "HIZ LRA Eviction Policy", false); - - /* Page 26 describes these bits as reserved (debug only). */ - check_bit(cache_mode_1, 11, - "DAP Instruction and State Cache Invalidate", false); - check_bit(cache_mode_1, 10, - "Instruction L1 Cache and In-Flight Queue Disable", - false); - check_bit(cache_mode_1, 9, "Instruction L2 Cache Fill Buffers Disable", - false); - - - if (gen >= 7) { - check_perf_bit(cache_mode_1, 6, - "Pixel Backend sub-span collection " - "Optimization Disable", - false); - check_perf_bit(cache_mode_1, 5, "MCS Cache Disable", false); - } - check_perf_bit(cache_mode_1, 4, "Data Disable", false); - - if (gen == 6) { - /* In a later update of the documentation, it says: - * - * "[DevSNB:A0{WKA1}] [DevSNB]: This bit must be - * set for depth buffer format - * D24_UNORM_S8_UINT." - * - * XXX: Does that mean A0 only, or all DevSNB? - */ - check_perf_bit(cache_mode_1, 3, - "Depth Read Hit Write-Only Optimization " - "Disable", false); - - check_perf_bit(cache_mode_1, 2, - "Depth Cache LRA Hunt Feature Disable", - false); - } - - check_bit(cache_mode_1, 1, "Instruction and State L2 Cache Disable", - false); - check_bit(cache_mode_1, 0, "Instruction and State L1 Cache Disable", - false); -} - - -static void -check_3d_chicken4(void) -{ - /* Described in page 23-25 of the IHD_OS_Vol1_Part3.pdf - * specification. - */ - uint32_t _3d_chicken4 = read_and_print_reg("3D_CHICKEN4", 0x20d4); - - check_perf_bit(_3d_chicken4, 6, "3D Scoreboard Hashing Enable", true); - - if (_3d_chicken4 & 0x0fbf) { - fprintf(stderr, - " WARN: other non-thread deps bits set\n"); - } else { - printf(" OK: other non-thread deps bits unset\n"); - } -} - -static void -check_dpfc_control_sa(void) -{ - uint32_t dpfc_control_sa; - - if (gen != 6) - return; - - dpfc_control_sa = read_and_print_reg("DPFC_CONTROL_SA", 0x100100); - - /* This is needed for framebuffer compression for us to be - * able to access the framebuffer by the CPU through the GTT. - */ - check_bit(dpfc_control_sa, 29, "CPU Fence Enable", true); -} - -int main(int argc, char** argv) -{ - struct pci_device *dev; - - dev = intel_get_pci_device(); - devid = dev->device_id; - intel_mmio_use_pci_bar(dev); - - if (IS_GEN7(devid)) - gen = 7; - else if (IS_GEN6(devid)) - gen = 6; - else if (IS_GEN5(devid)) - gen = 5; - else - gen = 4; - - check_mi_mode(); - check_gfx_mode(); - check_gt_mode(); - check_cache_mode_0(); - check_cache_mode_1(); - - if (gen < 7) { - check_chicken_unset("3D_CHICKEN", 0x2084); - check_chicken_unset("3D_CHICKEN2", 0x208c); - } else { - check_chicken_unset("FF_SLICE_CHICKEN", 0x2088); - } - if (gen >= 6) - check_chicken_unset("3D_CHICKEN3", 0x2090); - if (gen == 6) - check_3d_chicken4(); - - if (gen >= 7) { - check_chicken_unset("FF_SLICE_CS_CHICKEN1", 0x20e0); - check_chicken_unset("FF_SLICE_CS_CHICKEN2", 0x20e4); - check_chicken_unset("FF_SLICE_CS_CHICKEN3", 0x20e8); - check_chicken_unset("COMMON_SLICE_CHICKEN1", 0x7010); - check_chicken_unset("COMMON_SLICE_CHICKEN2", 0x7014); - check_chicken_unset("WM_CHICKEN", 0x5580); - check_chicken_unset("HALF_SLICE_CHICKEN", 0xe100); - check_chicken_unset("HALF_SLICE_CHICKEN2", 0xe180); - check_chicken_unset("ROW_CHICKEN", 0xe4f0); - check_chicken_unset("ROW_CHICKEN2", 0xe4f4); - } - - check_chicken_unset("ECOSKPD", 0x21d0); - - check_dpfc_control_sa(); - - return 0; -} - diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c deleted file mode 100644 index 0b6d8879..00000000 --- a/tools/intel_reg_dumper.c +++ /dev/null @@ -1,2984 +0,0 @@ -/* - * Copyright © 2006,2009 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -#define _GNU_SOURCE -#include <ctype.h> -#include <stdbool.h> -#include <stdlib.h> -#include <stdio.h> -#include <string.h> -#include <err.h> -#include <unistd.h> -#include "intel_io.h" -#include "intel_chipset.h" -#include "intel_reg.h" -#include "drmtest.h" - -static uint32_t devid = 0; - -#define DEBUGSTRING(func) static void func(char *result, int len, int reg, uint32_t val) - -DEBUGSTRING(i830_16bit_func) -{ - snprintf(result, len, "0x%04x", (uint16_t) val); -} - -DEBUGSTRING(i830_debug_dcc) -{ - const char *addressing = NULL; - - if (!IS_MOBILE(devid)) - return; - - if (IS_965(devid)) { - if (val & (1 << 1)) - addressing = "dual channel interleaved"; - else - addressing = "single or dual channel asymmetric"; - } else { - switch (val & 3) { - case 0: - addressing = "single channel"; - break; - case 1: - addressing = "dual channel asymmetric"; - break; - case 2: - addressing = "dual channel interleaved"; - break; - case 3: - addressing = "unknown channel layout"; - break; - } - } - - snprintf(result, len, "%s, XOR randomization: %sabled, XOR bit: %d", - addressing, - (val & (1 << 10)) ? "dis" : "en", - (val & (1 << 9)) ? 17 : 11); -} - -DEBUGSTRING(i830_debug_chdecmisc) -{ - const char *enhmodesel = NULL; - - switch ((val >> 5) & 3) { - case 1: - enhmodesel = "XOR bank/rank"; - break; - case 2: - enhmodesel = "swap bank"; - break; - case 3: - enhmodesel = "XOR bank"; - break; - case 0: - enhmodesel = "none"; - break; - } - - snprintf(result, len, - "%s, ch2 enh %sabled, ch1 enh %sabled, " - "ch0 enh %sabled, " - "flex %sabled, ep %spresent", enhmodesel, - (val & (1 << 4)) ? "en" : "dis", - (val & (1 << 3)) ? "en" : "dis", - (val & (1 << 2)) ? "en" : "dis", - (val & (1 << 1)) ? "en" : "dis", - (val & (1 << 0)) ? "" : "not "); -} - -DEBUGSTRING(i830_debug_xyminus1) -{ - snprintf(result, len, "%d, %d", (val & 0xffff) + 1, - ((val & 0xffff0000) >> 16) + 1); -} - -DEBUGSTRING(i830_debug_yxminus1) -{ - snprintf(result, len, "%d, %d", ((val & 0xffff0000) >> 16) + 1, - (val & 0xffff) + 1); -} - -DEBUGSTRING(i830_debug_xy) -{ - snprintf(result, len, "%d, %d", (val & 0xffff), ((val & 0xffff0000) >> 16)); -} - -DEBUGSTRING(i830_debug_dspstride) -{ - snprintf(result, len, "%d bytes", val); -} - -DEBUGSTRING(i830_debug_dspcntr) -{ - const char *enabled = val & DISPLAY_PLANE_ENABLE ? "enabled" : "disabled"; - char plane = val & DISPPLANE_SEL_PIPE_B ? 'B' : 'A'; - if (HAS_PCH_SPLIT(devid)) - snprintf(result, len, "%s", enabled); - else - snprintf(result, len, "%s, pipe %c", enabled, plane); -} - -DEBUGSTRING(i830_debug_pipeconf) -{ - const char *enabled = val & PIPEACONF_ENABLE ? "enabled" : "disabled"; - const char *bit30, *interlace; - - if (IS_965(devid)) - bit30 = val & I965_PIPECONF_ACTIVE ? "active" : "inactive"; - else - bit30 = - val & PIPEACONF_DOUBLE_WIDE ? "double-wide" : "single-wide"; - - if (HAS_PCH_SPLIT(devid)) { - const char *bpc, *rotation; - - switch ((val >> 21) & 7) { - case 0: - interlace = "pf-pd"; - break; - case 1: - interlace = "pf-id"; - break; - case 3: - interlace = "if-id"; - break; - case 4: - interlace = "if-id-dbl"; - break; - case 5: - interlace = "pf-id-dbl"; - break; - default: - interlace = "rsvd"; - break; - } - - switch ((val >> 14) & 3) { - case 0: - rotation = "rotate 0"; - break; - case 1: - rotation = "rotate 90"; - break; - case 2: - rotation = "rotate 180"; - break; - case 3: - rotation = "rotate 270"; - break; - } - - switch (val & (7 << 5)) { - case PIPECONF_8BPP: - bpc = "8bpc"; - break; - case PIPECONF_10BPP: - bpc = "10bpc"; - break; - case PIPECONF_6BPP: - bpc = "6bpc"; - break; - case PIPECONF_12BPP: - bpc = "12bpc"; - break; - default: - bpc = "invalid bpc"; - break; - } - snprintf(result, len, "%s, %s, %s, %s, %s", enabled, bit30, - interlace, rotation, bpc); - } else if (IS_GEN4(devid)) { - switch ((val >> 21) & 7) { - case 0: - case 1: - case 2: - case 3: - interlace = "progressive"; - break; - case 4: - interlace = "interlaced embedded"; - break; - case 5: - interlace = "interlaced"; - break; - case 6: - interlace = "interlaced sdvo"; - break; - case 7: - interlace = "interlaced legacy"; - break; - } - snprintf(result, len, "%s, %s, %s", enabled, bit30, interlace); - } else - snprintf(result, len, "%s, %s", enabled, bit30); -} - -DEBUGSTRING(i830_debug_pipestat) -{ - const char *_FIFO_UNDERRUN = val & FIFO_UNDERRUN ? " FIFO_UNDERRUN" : ""; - const char *_CRC_ERROR_ENABLE = - val & CRC_ERROR_ENABLE ? " CRC_ERROR_ENABLE" : ""; - const char *_CRC_DONE_ENABLE = - val & CRC_DONE_ENABLE ? " CRC_DONE_ENABLE" : ""; - const char *_GMBUS_EVENT_ENABLE = - val & GMBUS_EVENT_ENABLE ? " GMBUS_EVENT_ENABLE" : ""; - const char *_VSYNC_INT_ENABLE = - val & VSYNC_INT_ENABLE ? " VSYNC_INT_ENABLE" : ""; - const char *_DLINE_COMPARE_ENABLE = - val & DLINE_COMPARE_ENABLE ? " DLINE_COMPARE_ENABLE" : ""; - const char *_DPST_EVENT_ENABLE = - val & DPST_EVENT_ENABLE ? " DPST_EVENT_ENABLE" : ""; - const char *_LBLC_EVENT_ENABLE = - val & LBLC_EVENT_ENABLE ? " LBLC_EVENT_ENABLE" : ""; - const char *_OFIELD_INT_ENABLE = - val & OFIELD_INT_ENABLE ? " OFIELD_INT_ENABLE" : ""; - const char *_EFIELD_INT_ENABLE = - val & EFIELD_INT_ENABLE ? " EFIELD_INT_ENABLE" : ""; - const char *_SVBLANK_INT_ENABLE = - val & SVBLANK_INT_ENABLE ? " SVBLANK_INT_ENABLE" : ""; - const char *_VBLANK_INT_ENABLE = - val & VBLANK_INT_ENABLE ? " VBLANK_INT_ENABLE" : ""; - const char *_OREG_UPDATE_ENABLE = - val & OREG_UPDATE_ENABLE ? " OREG_UPDATE_ENABLE" : ""; - const char *_CRC_ERROR_INT_STATUS = - val & CRC_ERROR_INT_STATUS ? " CRC_ERROR_INT_STATUS" : ""; - const char *_CRC_DONE_INT_STATUS = - val & CRC_DONE_INT_STATUS ? " CRC_DONE_INT_STATUS" : ""; - const char *_GMBUS_INT_STATUS = - val & GMBUS_INT_STATUS ? " GMBUS_INT_STATUS" : ""; - const char *_VSYNC_INT_STATUS = - val & VSYNC_INT_STATUS ? " VSYNC_INT_STATUS" : ""; - const char *_DLINE_COMPARE_STATUS = - val & DLINE_COMPARE_STATUS ? " DLINE_COMPARE_STATUS" : ""; - const char *_DPST_EVENT_STATUS = - val & DPST_EVENT_STATUS ? " DPST_EVENT_STATUS" : ""; - const char *_LBLC_EVENT_STATUS = - val & LBLC_EVENT_STATUS ? " LBLC_EVENT_STATUS" : ""; - const char *_OFIELD_INT_STATUS = - val & OFIELD_INT_STATUS ? " OFIELD_INT_STATUS" : ""; - const char *_EFIELD_INT_STATUS = - val & EFIELD_INT_STATUS ? " EFIELD_INT_STATUS" : ""; - const char *_SVBLANK_INT_STATUS = - val & SVBLANK_INT_STATUS ? " SVBLANK_INT_STATUS" : ""; - const char *_VBLANK_INT_STATUS = - val & VBLANK_INT_STATUS ? " VBLANK_INT_STATUS" : ""; - const char *_OREG_UPDATE_STATUS = - val & OREG_UPDATE_STATUS ? " OREG_UPDATE_STATUS" : ""; - snprintf(result, len, - "status:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", - _FIFO_UNDERRUN, - _CRC_ERROR_ENABLE, - _CRC_DONE_ENABLE, - _GMBUS_EVENT_ENABLE, - _VSYNC_INT_ENABLE, - _DLINE_COMPARE_ENABLE, - _DPST_EVENT_ENABLE, - _LBLC_EVENT_ENABLE, - _OFIELD_INT_ENABLE, - _EFIELD_INT_ENABLE, - _SVBLANK_INT_ENABLE, - _VBLANK_INT_ENABLE, - _OREG_UPDATE_ENABLE, - _CRC_ERROR_INT_STATUS, - _CRC_DONE_INT_STATUS, - _GMBUS_INT_STATUS, - _VSYNC_INT_STATUS, - _DLINE_COMPARE_STATUS, - _DPST_EVENT_STATUS, - _LBLC_EVENT_STATUS, - _OFIELD_INT_STATUS, - _EFIELD_INT_STATUS, - _SVBLANK_INT_STATUS, - _VBLANK_INT_STATUS, - _OREG_UPDATE_STATUS); -} - -DEBUGSTRING(ivb_debug_port) -{ - const char *drrs = NULL; - switch (val & (2 << 30)) { - case PORT_DBG_DRRS_HW_STATE_OFF: - drrs = "off"; - break; - case PORT_DBG_DRRS_HW_STATE_LOW: - drrs = "low"; - break; - case PORT_DBG_DRRS_HW_STATE_HIGH: - drrs = "high"; - break; - } - snprintf(result, len, "HW DRRS %s", - drrs); -} - -DEBUGSTRING(i830_debug_hvtotal) -{ - snprintf(result, len, "%d active, %d total", - (val & 0xffff) + 1, - ((val & 0xffff0000) >> 16) + 1); -} - -DEBUGSTRING(i830_debug_hvsyncblank) -{ - snprintf(result, len, "%d start, %d end", - (val & 0xffff) + 1, - ((val & 0xffff0000) >> 16) + 1); -} - -DEBUGSTRING(i830_debug_vgacntrl) -{ - snprintf(result, len, "%s", - val & VGA_DISP_DISABLE ? "disabled" : "enabled"); -} - -DEBUGSTRING(i830_debug_fp) -{ - if (IS_IGD(devid)) { - snprintf(result, len, "n = %d, m1 = %d, m2 = %d", - ffs((val & FP_N_IGD_DIV_MASK) >> - FP_N_DIV_SHIFT) - 1, - ((val & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT), - ((val & FP_M2_IGD_DIV_MASK) >> - FP_M2_DIV_SHIFT)); - } - snprintf(result, len, "n = %d, m1 = %d, m2 = %d", - ((val & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT), - ((val & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT), - ((val & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT)); -} - -DEBUGSTRING(i830_debug_vga_pd) -{ - int vga0_p1, vga0_p2, vga1_p1, vga1_p2; - - /* XXX: i9xx version */ - - if (val & VGA0_PD_P1_DIV_2) - vga0_p1 = 2; - else - vga0_p1 = ((val & VGA0_PD_P1_MASK) >> VGA0_PD_P1_SHIFT) + 2; - vga0_p2 = (val & VGA0_PD_P2_DIV_4) ? 4 : 2; - - if (val & VGA1_PD_P1_DIV_2) - vga1_p1 = 2; - else - vga1_p1 = ((val & VGA1_PD_P1_MASK) >> VGA1_PD_P1_SHIFT) + 2; - vga1_p2 = (val & VGA1_PD_P2_DIV_4) ? 4 : 2; - - snprintf(result, len, "vga0 p1 = %d, p2 = %d, vga1 p1 = %d, p2 = %d", - vga0_p1, vga0_p2, vga1_p1, vga1_p2); -} - -DEBUGSTRING(i830_debug_pp_status) -{ - const char *status = val & PP_ON ? "on" : "off"; - const char *ready = val & PP_READY ? "ready" : "not ready"; - const char *seq = "unknown"; - - switch (val & PP_SEQUENCE_MASK) { - case PP_SEQUENCE_NONE: - seq = "idle"; - break; - case PP_SEQUENCE_ON: - seq = "on"; - break; - case PP_SEQUENCE_OFF: - seq = "off"; - break; - } - - snprintf(result, len, "%s, %s, sequencing %s", status, ready, seq); -} - -DEBUGSTRING(i830_debug_pp_control) -{ - snprintf(result, len, "power target: %s", - val & POWER_TARGET_ON ? "on" : "off"); -} - -DEBUGSTRING(i830_debug_dpll) -{ - const char *enabled = val & DPLL_VCO_ENABLE ? "enabled" : "disabled"; - const char *dvomode = val & DPLL_DVO_HIGH_SPEED ? "dvo" : "non-dvo"; - const char *vgamode = val & DPLL_VGA_MODE_DIS ? "" : ", VGA"; - const char *mode = "unknown"; - const char *clock = "unknown"; - const char *fpextra = val & DISPLAY_RATE_SELECT_FPA1 ? ", using FPx1!" : ""; - char sdvoextra[20]; - int p1, p2 = 0; - - if (IS_GEN2(devid)) { - char is_lvds = (INREG(LVDS) & LVDS_PORT_EN) && (reg == DPLL_B); - - if (is_lvds) { - mode = "LVDS"; - p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) - >> DPLL_FPA01_P1_POST_DIV_SHIFT); - if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) == - LVDS_CLKB_POWER_UP) - p2 = 7; - else - p2 = 14; - - } else { - mode = "DAC/serial"; - if (val & PLL_P1_DIVIDE_BY_TWO) { - p1 = 2; - } else { - /* Map the number in the field to (3, 33) */ - p1 = ((val & DPLL_FPA01_P1_POST_DIV_MASK_I830) - >> DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; - } - if (val & PLL_P2_DIVIDE_BY_4) - p2 = 4; - else - p2 = 2; - } - } else { - if (IS_IGD(devid)) { - p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_IGD) >> - DPLL_FPA01_P1_POST_DIV_SHIFT_IGD); - } else { - p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >> - DPLL_FPA01_P1_POST_DIV_SHIFT); - } - switch (val & DPLL_MODE_MASK) { - case DPLLB_MODE_DAC_SERIAL: - mode = "DAC/serial"; - p2 = val & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? 5 : 10; - break; - case DPLLB_MODE_LVDS: - mode = "LVDS"; - p2 = val & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14; - break; - } - } - - switch (val & PLL_REF_INPUT_MASK) { - case PLL_REF_INPUT_DREFCLK: - clock = "default"; - break; - case PLL_REF_INPUT_TVCLKINA: - clock = "TV A"; - break; - case PLL_REF_INPUT_TVCLKINBC: - clock = "TV B/C"; - break; - case PLLB_REF_INPUT_SPREADSPECTRUMIN: - if (reg == DPLL_B) - clock = "spread spectrum"; - break; - } - - if (IS_945(devid)) { - sprintf(sdvoextra, ", SDVO mult %d", - (int)((val & SDVO_MULTIPLIER_MASK) >> - SDVO_MULTIPLIER_SHIFT_HIRES) + 1); - } else { - sdvoextra[0] = '\0'; - } - - snprintf(result, len, "%s, %s%s, %s clock, %s mode, p1 = %d, " - "p2 = %d%s%s", - enabled, dvomode, vgamode, clock, mode, p1, p2, - fpextra, sdvoextra); -} - -DEBUGSTRING(i830_debug_dpll_test) -{ - const char *dpllandiv = val & DPLLA_TEST_N_BYPASS ? ", DPLLA N bypassed" : ""; - const char *dpllamdiv = val & DPLLA_TEST_M_BYPASS ? ", DPLLA M bypassed" : ""; - const char *dpllainput = val & DPLLA_INPUT_BUFFER_ENABLE ? - "" : ", DPLLA input buffer disabled"; - const char *dpllbndiv = val & DPLLB_TEST_N_BYPASS ? ", DPLLB N bypassed" : ""; - const char *dpllbmdiv = val & DPLLB_TEST_M_BYPASS ? ", DPLLB M bypassed" : ""; - const char *dpllbinput = val & DPLLB_INPUT_BUFFER_ENABLE ? - "" : ", DPLLB input buffer disabled"; - - snprintf(result, len, "%s%s%s%s%s%s", - dpllandiv, dpllamdiv, dpllainput, - dpllbndiv, dpllbmdiv, dpllbinput); -} - -DEBUGSTRING(i830_debug_adpa) -{ - char disp_pipe = (val & ADPA_PIPE_B_SELECT) ? 'B' : 'A'; - const char *enable = (val & ADPA_DAC_ENABLE) ? "enabled" : "disabled"; - char hsync = (val & ADPA_HSYNC_ACTIVE_HIGH) ? '+' : '-'; - char vsync = (val & ADPA_VSYNC_ACTIVE_HIGH) ? '+' : '-'; - - if (HAS_CPT) - disp_pipe = val & (1<<29) ? 'B' : 'A'; - - if (HAS_PCH_SPLIT(devid)) - snprintf(result, len, "%s, transcoder %c, %chsync, %cvsync", - enable, disp_pipe, hsync, vsync); - else - snprintf(result, len, "%s, pipe %c, %chsync, %cvsync", - enable, disp_pipe, hsync, vsync); -} - -DEBUGSTRING(i830_debug_lvds) -{ - char disp_pipe = val & LVDS_PIPEB_SELECT ? 'B' : 'A'; - const char *enable = val & LVDS_PORT_EN ? "enabled" : "disabled"; - int depth; - const char *channels; - - if ((val & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP) - depth = 24; - else - depth = 18; - if ((val & LVDS_B0B3_POWER_MASK) == LVDS_B0B3_POWER_UP) - channels = "2 channels"; - else - channels = "1 channel"; - - if (HAS_CPT) - disp_pipe = val & (1<<29) ? 'B' : 'A'; - - snprintf(result, len, "%s, pipe %c, %d bit, %s", - enable, disp_pipe, depth, channels); -} - -DEBUGSTRING(i830_debug_dvo) -{ - const char *enable = val & DVO_ENABLE ? "enabled" : "disabled"; - char disp_pipe = val & DVO_PIPE_B_SELECT ? 'B' : 'A'; - const char *stall; - char hsync = val & DVO_HSYNC_ACTIVE_HIGH ? '+' : '-'; - char vsync = val & DVO_VSYNC_ACTIVE_HIGH ? '+' : '-'; - - switch (val & DVO_PIPE_STALL_MASK) { - case DVO_PIPE_STALL_UNUSED: - stall = "no stall"; - break; - case DVO_PIPE_STALL: - stall = "stall"; - break; - case DVO_PIPE_STALL_TV: - stall = "TV stall"; - break; - default: - stall = "unknown stall"; - break; - } - - snprintf(result, len, "%s, pipe %c, %s, %chsync, %cvsync", - enable, disp_pipe, stall, hsync, vsync); -} - -DEBUGSTRING(i830_debug_sdvo) -{ - const char *enable = val & SDVO_ENABLE ? "enabled" : "disabled"; - char disp_pipe = val & SDVO_PIPE_B_SELECT ? 'B' : 'A'; - const char *stall = val & SDVO_STALL_SELECT ? "enabled" : "disabled"; - const char *detected = val & SDVO_DETECTED ? "" : "not "; - const char *gang = val & SDVOC_GANG_MODE ? ", gang mode" : ""; - char sdvoextra[20]; - - if (IS_915(devid)) { - sprintf(sdvoextra, ", SDVO mult %d", - (int)((val & SDVO_PORT_MULTIPLY_MASK) >> - SDVO_PORT_MULTIPLY_SHIFT) + 1); - } else { - sdvoextra[0] = '\0'; - } - - snprintf(result, len, "%s, pipe %c, stall %s, %sdetected%s%s", - enable, disp_pipe, stall, detected, sdvoextra, gang); -} - -DEBUGSTRING(i830_debug_dspclk_gate_d) -{ - const char *DPUNIT_B = val & DPUNIT_B_CLOCK_GATE_DISABLE ? " DPUNIT_B" : ""; - const char *VSUNIT = val & VSUNIT_CLOCK_GATE_DISABLE ? " VSUNIT" : ""; - const char *VRHUNIT = val & VRHUNIT_CLOCK_GATE_DISABLE ? " VRHUNIT" : ""; - const char *VRDUNIT = val & VRDUNIT_CLOCK_GATE_DISABLE ? " VRDUNIT" : ""; - const char *AUDUNIT = val & AUDUNIT_CLOCK_GATE_DISABLE ? " AUDUNIT" : ""; - const char *DPUNIT_A = val & DPUNIT_A_CLOCK_GATE_DISABLE ? " DPUNIT_A" : ""; - const char *DPCUNIT = val & DPCUNIT_CLOCK_GATE_DISABLE ? " DPCUNIT" : ""; - const char *TVRUNIT = val & TVRUNIT_CLOCK_GATE_DISABLE ? " TVRUNIT" : ""; - const char *TVCUNIT = val & TVCUNIT_CLOCK_GATE_DISABLE ? " TVCUNIT" : ""; - const char *TVFUNIT = val & TVFUNIT_CLOCK_GATE_DISABLE ? " TVFUNIT" : ""; - const char *TVEUNIT = val & TVEUNIT_CLOCK_GATE_DISABLE ? " TVEUNIT" : ""; - const char *DVSUNIT = val & DVSUNIT_CLOCK_GATE_DISABLE ? " DVSUNIT" : ""; - const char *DSSUNIT = val & DSSUNIT_CLOCK_GATE_DISABLE ? " DSSUNIT" : ""; - const char *DDBUNIT = val & DDBUNIT_CLOCK_GATE_DISABLE ? " DDBUNIT" : ""; - const char *DPRUNIT = val & DPRUNIT_CLOCK_GATE_DISABLE ? " DPRUNIT" : ""; - const char *DPFUNIT = val & DPFUNIT_CLOCK_GATE_DISABLE ? " DPFUNIT" : ""; - const char *DPBMUNIT = val & DPBMUNIT_CLOCK_GATE_DISABLE ? " DPBMUNIT" : ""; - const char *DPLSUNIT = val & DPLSUNIT_CLOCK_GATE_DISABLE ? " DPLSUNIT" : ""; - const char *DPLUNIT = val & DPLUNIT_CLOCK_GATE_DISABLE ? " DPLUNIT" : ""; - const char *DPOUNIT = val & DPOUNIT_CLOCK_GATE_DISABLE ? " DPOUNIT" : ""; - const char *DPBUNIT = val & DPBUNIT_CLOCK_GATE_DISABLE ? " DPBUNIT" : ""; - const char *DCUNIT = val & DCUNIT_CLOCK_GATE_DISABLE ? " DCUNIT" : ""; - const char *DPUNIT = val & DPUNIT_CLOCK_GATE_DISABLE ? " DPUNIT" : ""; - const char *VRUNIT = val & VRUNIT_CLOCK_GATE_DISABLE ? " VRUNIT" : ""; - const char *OVHUNIT = val & OVHUNIT_CLOCK_GATE_DISABLE ? " OVHUNIT" : ""; - const char *DPIOUNIT = val & DPIOUNIT_CLOCK_GATE_DISABLE ? " DPIOUNIT" : ""; - const char *OVFUNIT = val & OVFUNIT_CLOCK_GATE_DISABLE ? " OVFUNIT" : ""; - const char *OVBUNIT = val & OVBUNIT_CLOCK_GATE_DISABLE ? " OVBUNIT" : ""; - const char *OVRUNIT = val & OVRUNIT_CLOCK_GATE_DISABLE ? " OVRUNIT" : ""; - const char *OVCUNIT = val & OVCUNIT_CLOCK_GATE_DISABLE ? " OVCUNIT" : ""; - const char *OVUUNIT = val & OVUUNIT_CLOCK_GATE_DISABLE ? " OVUUNIT" : ""; - const char *OVLUNIT = val & OVLUNIT_CLOCK_GATE_DISABLE ? " OVLUNIT" : ""; - - snprintf(result, len, - "clock gates disabled:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", - DPUNIT_B, VSUNIT, VRHUNIT, VRDUNIT, AUDUNIT, DPUNIT_A, DPCUNIT, - TVRUNIT, TVCUNIT, TVFUNIT, TVEUNIT, DVSUNIT, DSSUNIT, DDBUNIT, - DPRUNIT, DPFUNIT, DPBMUNIT, DPLSUNIT, DPLUNIT, DPOUNIT, DPBUNIT, - DCUNIT, DPUNIT, VRUNIT, OVHUNIT, DPIOUNIT, OVFUNIT, OVBUNIT, - OVRUNIT, OVCUNIT, OVUUNIT, OVLUNIT); -} - -DEBUGSTRING(i810_debug_915_fence) -{ - char format = (val & 1 << 12) ? 'Y' : 'X'; - int pitch = 128 << ((val & 0x70) >> 4); - unsigned int offset = val & 0x0ff00000; - int size = (1024 * 1024) << ((val & 0x700) >> 8); - - if (IS_965(devid) || (IS_915(devid) && reg >= FENCE_NEW)) - return; - - if (format == 'X') - pitch *= 4; - if (val & 1) { - snprintf(result, len, "enabled, %c tiled, %4d pitch, 0x%08x - 0x%08x (%dkb)", - format, pitch, offset, offset + size, - size / 1024); - } else { - snprintf(result, len, "disabled"); - } -} - -DEBUGSTRING(i810_debug_965_fence_start) -{ - const char *enable = (val & FENCE_VALID) ? " enabled" : "disabled"; - char format = (val & I965_FENCE_Y_MAJOR) ? 'Y' : 'X'; - int pitch = ((val & 0xffc) >> 2) * 128 + 128; - unsigned int offset = val & 0xfffff000; - - if (!IS_965(devid)) - return; - - snprintf(result, len, "%s, %c tile walk, %4d pitch, 0x%08x start", - enable, format, pitch, offset); -} - -DEBUGSTRING(i810_debug_965_fence_end) -{ - unsigned int end = val & 0xfffff000; - - if (!IS_965(devid)) - return; - - snprintf(result, len, " 0x%08x end", end); -} - -#define DEFINEREG(reg) \ - { reg, #reg, NULL, 0 } -#define DEFINEREG_16BIT(reg) \ - { reg, #reg, i830_16bit_func, 0 } -#define DEFINEREG2(reg, func) \ - { reg, #reg, func, 0 } - -struct reg_debug { - int reg; - const char *name; - void (*debug_output) (char *result, int len, int reg, uint32_t val); - uint32_t val; -}; - -static struct reg_debug intel_debug_regs[] = { - DEFINEREG2(DCC, i830_debug_dcc), - DEFINEREG2(CHDECMISC, i830_debug_chdecmisc), - DEFINEREG_16BIT(C0DRB0), - DEFINEREG_16BIT(C0DRB1), - DEFINEREG_16BIT(C0DRB2), - DEFINEREG_16BIT(C0DRB3), - DEFINEREG_16BIT(C1DRB0), - DEFINEREG_16BIT(C1DRB1), - DEFINEREG_16BIT(C1DRB2), - DEFINEREG_16BIT(C1DRB3), - DEFINEREG_16BIT(C0DRA01), - DEFINEREG_16BIT(C0DRA23), - DEFINEREG_16BIT(C1DRA01), - DEFINEREG_16BIT(C1DRA23), - - DEFINEREG(PGETBL_CTL), - - DEFINEREG2(VCLK_DIVISOR_VGA0, i830_debug_fp), - DEFINEREG2(VCLK_DIVISOR_VGA1, i830_debug_fp), - DEFINEREG2(VCLK_POST_DIV, i830_debug_vga_pd), - DEFINEREG2(DPLL_TEST, i830_debug_dpll_test), - DEFINEREG(CACHE_MODE_0), - DEFINEREG(D_STATE), - DEFINEREG2(DSPCLK_GATE_D, i830_debug_dspclk_gate_d), - DEFINEREG(RENCLK_GATE_D1), - DEFINEREG(RENCLK_GATE_D2), -/* DEFINEREG(RAMCLK_GATE_D), CRL only */ - DEFINEREG2(SDVOB, i830_debug_sdvo), - DEFINEREG2(SDVOC, i830_debug_sdvo), -/* DEFINEREG(UDIB_SVB_SHB_CODES), CRL only */ -/* DEFINEREG(UDIB_SHA_BLANK_CODES), CRL only */ - DEFINEREG(SDVOUDI), - DEFINEREG(DSPARB), - DEFINEREG(FW_BLC), - DEFINEREG(FW_BLC2), - DEFINEREG(FW_BLC_SELF), - DEFINEREG(DSPFW1), - DEFINEREG(DSPFW2), - DEFINEREG(DSPFW3), - - DEFINEREG2(ADPA, i830_debug_adpa), - DEFINEREG2(LVDS, i830_debug_lvds), - DEFINEREG2(DVOA, i830_debug_dvo), - DEFINEREG2(DVOB, i830_debug_dvo), - DEFINEREG2(DVOC, i830_debug_dvo), - DEFINEREG(DVOA_SRCDIM), - DEFINEREG(DVOB_SRCDIM), - DEFINEREG(DVOC_SRCDIM), - - DEFINEREG(BLC_PWM_CTL), - DEFINEREG(BLC_PWM_CTL2), - - DEFINEREG2(PP_CONTROL, i830_debug_pp_control), - DEFINEREG2(PP_STATUS, i830_debug_pp_status), - DEFINEREG(PP_ON_DELAYS), - DEFINEREG(PP_OFF_DELAYS), - DEFINEREG(PP_DIVISOR), - DEFINEREG(PFIT_CONTROL), - DEFINEREG(PFIT_PGM_RATIOS), - DEFINEREG(PORT_HOTPLUG_EN), - DEFINEREG(PORT_HOTPLUG_STAT), - - DEFINEREG2(DSPACNTR, i830_debug_dspcntr), - DEFINEREG2(DSPASTRIDE, i830_debug_dspstride), - DEFINEREG2(DSPAPOS, i830_debug_xy), - DEFINEREG2(DSPASIZE, i830_debug_xyminus1), - DEFINEREG(DSPABASE), - DEFINEREG(DSPASURF), - DEFINEREG(DSPATILEOFF), - DEFINEREG2(PIPEACONF, i830_debug_pipeconf), - DEFINEREG2(PIPEASRC, i830_debug_yxminus1), - DEFINEREG2(PIPEASTAT, i830_debug_pipestat), - DEFINEREG(PIPEA_GMCH_DATA_M), - DEFINEREG(PIPEA_GMCH_DATA_N), - DEFINEREG(PIPEA_DP_LINK_M), - DEFINEREG(PIPEA_DP_LINK_N), - DEFINEREG(CURSOR_A_BASE), - DEFINEREG(CURSOR_A_CONTROL), - DEFINEREG(CURSOR_A_POSITION), - - DEFINEREG2(FPA0, i830_debug_fp), - DEFINEREG2(FPA1, i830_debug_fp), - DEFINEREG2(DPLL_A, i830_debug_dpll), - DEFINEREG(DPLL_A_MD), - DEFINEREG2(HTOTAL_A, i830_debug_hvtotal), - DEFINEREG2(HBLANK_A, i830_debug_hvsyncblank), - DEFINEREG2(HSYNC_A, i830_debug_hvsyncblank), - DEFINEREG2(VTOTAL_A, i830_debug_hvtotal), - DEFINEREG2(VBLANK_A, i830_debug_hvsyncblank), - DEFINEREG2(VSYNC_A, i830_debug_hvsyncblank), - DEFINEREG(BCLRPAT_A), - DEFINEREG(VSYNCSHIFT_A), - - DEFINEREG2(DSPBCNTR, i830_debug_dspcntr), - DEFINEREG2(DSPBSTRIDE, i830_debug_dspstride), - DEFINEREG2(DSPBPOS, i830_debug_xy), - DEFINEREG2(DSPBSIZE, i830_debug_xyminus1), - DEFINEREG(DSPBBASE), - DEFINEREG(DSPBSURF), - DEFINEREG(DSPBTILEOFF), - DEFINEREG2(PIPEBCONF, i830_debug_pipeconf), - DEFINEREG2(PIPEBSRC, i830_debug_yxminus1), - DEFINEREG2(PIPEBSTAT, i830_debug_pipestat), - DEFINEREG(PIPEB_GMCH_DATA_M), - DEFINEREG(PIPEB_GMCH_DATA_N), - DEFINEREG(PIPEB_DP_LINK_M), - DEFINEREG(PIPEB_DP_LINK_N), - DEFINEREG(CURSOR_B_BASE), - DEFINEREG(CURSOR_B_CONTROL), - DEFINEREG(CURSOR_B_POSITION), - - DEFINEREG2(FPB0, i830_debug_fp), - DEFINEREG2(FPB1, i830_debug_fp), - DEFINEREG2(DPLL_B, i830_debug_dpll), - DEFINEREG(DPLL_B_MD), - DEFINEREG2(HTOTAL_B, i830_debug_hvtotal), - DEFINEREG2(HBLANK_B, i830_debug_hvsyncblank), - DEFINEREG2(HSYNC_B, i830_debug_hvsyncblank), - DEFINEREG2(VTOTAL_B, i830_debug_hvtotal), - DEFINEREG2(VBLANK_B, i830_debug_hvsyncblank), - DEFINEREG2(VSYNC_B, i830_debug_hvsyncblank), - DEFINEREG(BCLRPAT_B), - DEFINEREG(VSYNCSHIFT_B), - - DEFINEREG(VCLK_DIVISOR_VGA0), - DEFINEREG(VCLK_DIVISOR_VGA1), - DEFINEREG(VCLK_POST_DIV), - DEFINEREG2(VGACNTRL, i830_debug_vgacntrl), - - DEFINEREG(TV_CTL), - DEFINEREG(TV_DAC), - DEFINEREG(TV_CSC_Y), - DEFINEREG(TV_CSC_Y2), - DEFINEREG(TV_CSC_U), - DEFINEREG(TV_CSC_U2), - DEFINEREG(TV_CSC_V), - DEFINEREG(TV_CSC_V2), - DEFINEREG(TV_CLR_KNOBS), - DEFINEREG(TV_CLR_LEVEL), - DEFINEREG(TV_H_CTL_1), - DEFINEREG(TV_H_CTL_2), - DEFINEREG(TV_H_CTL_3), - DEFINEREG(TV_V_CTL_1), - DEFINEREG(TV_V_CTL_2), - DEFINEREG(TV_V_CTL_3), - DEFINEREG(TV_V_CTL_4), - DEFINEREG(TV_V_CTL_5), - DEFINEREG(TV_V_CTL_6), - DEFINEREG(TV_V_CTL_7), - DEFINEREG(TV_SC_CTL_1), - DEFINEREG(TV_SC_CTL_2), - DEFINEREG(TV_SC_CTL_3), - DEFINEREG(TV_WIN_POS), - DEFINEREG(TV_WIN_SIZE), - DEFINEREG(TV_FILTER_CTL_1), - DEFINEREG(TV_FILTER_CTL_2), - DEFINEREG(TV_FILTER_CTL_3), - DEFINEREG(TV_CC_CONTROL), - DEFINEREG(TV_CC_DATA), - DEFINEREG(TV_H_LUMA_0), - DEFINEREG(TV_H_LUMA_59), - DEFINEREG(TV_H_CHROMA_0), - DEFINEREG(TV_H_CHROMA_59), - - DEFINEREG(FBC_CFB_BASE), - DEFINEREG(FBC_LL_BASE), - DEFINEREG(FBC_CONTROL), - DEFINEREG(FBC_COMMAND), - DEFINEREG(FBC_STATUS), - DEFINEREG(FBC_CONTROL2), - DEFINEREG(FBC_FENCE_OFF), - DEFINEREG(FBC_MOD_NUM), - - DEFINEREG(MI_MODE), - /* DEFINEREG(MI_DISPLAY_POWER_DOWN), CRL only */ - DEFINEREG(MI_ARB_STATE), - DEFINEREG(MI_RDRET_STATE), - DEFINEREG(ECOSKPD), - - DEFINEREG(DP_B), - DEFINEREG(DPB_AUX_CH_CTL), - DEFINEREG(DPB_AUX_CH_DATA1), - DEFINEREG(DPB_AUX_CH_DATA2), - DEFINEREG(DPB_AUX_CH_DATA3), - DEFINEREG(DPB_AUX_CH_DATA4), - DEFINEREG(DPB_AUX_CH_DATA5), - - DEFINEREG(DP_C), - DEFINEREG(DPC_AUX_CH_CTL), - DEFINEREG(DPC_AUX_CH_DATA1), - DEFINEREG(DPC_AUX_CH_DATA2), - DEFINEREG(DPC_AUX_CH_DATA3), - DEFINEREG(DPC_AUX_CH_DATA4), - DEFINEREG(DPC_AUX_CH_DATA5), - - DEFINEREG(DP_D), - DEFINEREG(DPD_AUX_CH_CTL), - DEFINEREG(DPD_AUX_CH_DATA1), - DEFINEREG(DPD_AUX_CH_DATA2), - DEFINEREG(DPD_AUX_CH_DATA3), - DEFINEREG(DPD_AUX_CH_DATA4), - DEFINEREG(DPD_AUX_CH_DATA5), - - DEFINEREG(AUD_CONFIG), - DEFINEREG(AUD_HDMIW_STATUS), - DEFINEREG(AUD_CONV_CHCNT), - DEFINEREG(VIDEO_DIP_CTL), - DEFINEREG(AUD_PINW_CNTR), - DEFINEREG(AUD_CNTL_ST), - DEFINEREG(AUD_PIN_CAP), - DEFINEREG(AUD_PINW_CAP), - DEFINEREG(AUD_PINW_UNSOLRESP), - DEFINEREG(AUD_OUT_DIG_CNVT), - DEFINEREG(AUD_OUT_CWCAP), - DEFINEREG(AUD_GRP_CAP), - -#define DEFINEFENCE_915(i) \ - { FENCE+i*4, "FENCE " #i, i810_debug_915_fence, 0 } -#define DEFINEFENCE_945(i) \ - { FENCE_NEW+(i - 8) * 4, "FENCE " #i, i810_debug_915_fence, 0 } - - DEFINEFENCE_915(0), - DEFINEFENCE_915(1), - DEFINEFENCE_915(2), - DEFINEFENCE_915(3), - DEFINEFENCE_915(4), - DEFINEFENCE_915(5), - DEFINEFENCE_915(6), - DEFINEFENCE_915(7), - DEFINEFENCE_945(8), - DEFINEFENCE_945(9), - DEFINEFENCE_945(10), - DEFINEFENCE_945(11), - DEFINEFENCE_945(12), - DEFINEFENCE_945(13), - DEFINEFENCE_945(14), - DEFINEFENCE_945(15), - -#define DEFINEFENCE_965(i) \ - { FENCE_NEW+i*8, "FENCE START " #i, i810_debug_965_fence_start, 0 }, \ - { FENCE_NEW+i*8+4, "FENCE END " #i, i810_debug_965_fence_end, 0 } - - DEFINEFENCE_965(0), - DEFINEFENCE_965(1), - DEFINEFENCE_965(2), - DEFINEFENCE_965(3), - DEFINEFENCE_965(4), - DEFINEFENCE_965(5), - DEFINEFENCE_965(6), - DEFINEFENCE_965(7), - DEFINEFENCE_965(8), - DEFINEFENCE_965(9), - DEFINEFENCE_965(10), - DEFINEFENCE_965(11), - DEFINEFENCE_965(12), - DEFINEFENCE_965(13), - DEFINEFENCE_965(14), - DEFINEFENCE_965(15), - - DEFINEREG(INST_PM), -}; - -DEBUGSTRING(ironlake_debug_rr_hw_ctl) -{ - snprintf(result, len, "low %d, high %d", val & RR_HW_LOW_POWER_FRAMES_MASK, - (val & RR_HW_HIGH_POWER_FRAMES_MASK) >> 8); -} - -DEBUGSTRING(ironlake_debug_m_tu) -{ - snprintf(result, len, "TU %d, val 0x%x %d", (val >> 25) + 1, val & 0xffffff, - val & 0xffffff); -} - -DEBUGSTRING(ironlake_debug_n) -{ - snprintf(result, len, "val 0x%x %d", val & 0xffffff, val & 0xffffff); -} - -DEBUGSTRING(ironlake_debug_fdi_tx_ctl) -{ - const char *train = NULL, *voltage = NULL, *pre_emphasis = NULL, *portw = - NULL; - - switch (val & FDI_LINK_TRAIN_NONE) { - case FDI_LINK_TRAIN_PATTERN_1: - train = "pattern_1"; - break; - case FDI_LINK_TRAIN_PATTERN_2: - train = "pattern_2"; - break; - case FDI_LINK_TRAIN_PATTERN_IDLE: - train = "pattern_idle"; - break; - case FDI_LINK_TRAIN_NONE: - train = "not train"; - break; - } - - if (HAS_CPT) { - /* SNB B0 */ - switch (val & (0x3f << 22)) { - case FDI_LINK_TRAIN_400MV_0DB_SNB_B: - voltage = "0.4V"; - pre_emphasis = "0dB"; - break; - case FDI_LINK_TRAIN_400MV_6DB_SNB_B: - voltage = "0.4V"; - pre_emphasis = "6dB"; - break; - case FDI_LINK_TRAIN_600MV_3_5DB_SNB_B: - voltage = "0.6V"; - pre_emphasis = "3.5dB"; - break; - case FDI_LINK_TRAIN_800MV_0DB_SNB_B: - voltage = "0.8V"; - pre_emphasis = "0dB"; - break; - } - - } else { - - switch (val & (7 << 25)) { - case FDI_LINK_TRAIN_VOLTAGE_0_4V: - voltage = "0.4V"; - break; - case FDI_LINK_TRAIN_VOLTAGE_0_6V: - voltage = "0.6V"; - break; - case FDI_LINK_TRAIN_VOLTAGE_0_8V: - voltage = "0.8V"; - break; - case FDI_LINK_TRAIN_VOLTAGE_1_2V: - voltage = "1.2V"; - break; - default: - voltage = "reserved"; - } - - switch (val & (7 << 22)) { - case FDI_LINK_TRAIN_PRE_EMPHASIS_NONE: - pre_emphasis = "none"; - break; - case FDI_LINK_TRAIN_PRE_EMPHASIS_1_5X: - pre_emphasis = "1.5x"; - break; - case FDI_LINK_TRAIN_PRE_EMPHASIS_2X: - pre_emphasis = "2x"; - break; - case FDI_LINK_TRAIN_PRE_EMPHASIS_3X: - pre_emphasis = "3x"; - break; - default: - pre_emphasis = "reserved"; - } - - } - - switch (val & (7 << 19)) { - case FDI_DP_PORT_WIDTH_X1: - portw = "X1"; - break; - case FDI_DP_PORT_WIDTH_X2: - portw = "X2"; - break; - case FDI_DP_PORT_WIDTH_X3: - portw = "X3"; - break; - case FDI_DP_PORT_WIDTH_X4: - portw = "X4"; - break; - } - - snprintf(result, len, "%s, train pattern %s, voltage swing %s," - "pre-emphasis %s, port width %s, enhanced framing %s, FDI PLL %s, scrambing %s, master mode %s", - val & FDI_TX_ENABLE ? "enable" : "disable", - train, voltage, pre_emphasis, portw, - val & FDI_TX_ENHANCE_FRAME_ENABLE ? "enable" : - "disable", - val & FDI_TX_PLL_ENABLE ? "enable" : "disable", - val & (1 << 7) ? "disable" : "enable", - val & (1 << 0) ? "enable" : "disable"); -} - -DEBUGSTRING(ironlake_debug_fdi_rx_ctl) -{ - const char *train = NULL, *portw = NULL, *bpc = NULL; - - if (HAS_CPT) { - switch (val & FDI_LINK_TRAIN_PATTERN_MASK_CPT) { - case FDI_LINK_TRAIN_PATTERN_1_CPT: - train = "pattern_1"; - break; - case FDI_LINK_TRAIN_PATTERN_2_CPT: - train = "pattern_2"; - break; - case FDI_LINK_TRAIN_PATTERN_IDLE_CPT: - train = "pattern_idle"; - break; - case FDI_LINK_TRAIN_NORMAL_CPT: - train = "not train"; - break; - } - } else { - switch (val & FDI_LINK_TRAIN_NONE) { - case FDI_LINK_TRAIN_PATTERN_1: - train = "pattern_1"; - break; - case FDI_LINK_TRAIN_PATTERN_2: - train = "pattern_2"; - break; - case FDI_LINK_TRAIN_PATTERN_IDLE: - train = "pattern_idle"; - break; - case FDI_LINK_TRAIN_NONE: - train = "not train"; - break; - } - } - - switch (val & (7 << 19)) { - case FDI_DP_PORT_WIDTH_X1: - portw = "X1"; - break; - case FDI_DP_PORT_WIDTH_X2: - portw = "X2"; - break; - case FDI_DP_PORT_WIDTH_X3: - portw = "X3"; - break; - case FDI_DP_PORT_WIDTH_X4: - portw = "X4"; - break; - } - - switch (val & (7 << 16)) { - case FDI_8BPC: - bpc = "8bpc"; - break; - case FDI_10BPC: - bpc = "10bpc"; - break; - case FDI_6BPC: - bpc = "6bpc"; - break; - case FDI_12BPC: - bpc = "12bpc"; - break; - } - - snprintf(result, len, "%s, train pattern %s, port width %s, %s," - "link_reverse_strap_overwrite %s, dmi_link_reverse %s, FDI PLL %s," - "FS ecc %s, FE ecc %s, FS err report %s, FE err report %s," - "scrambing %s, enhanced framing %s, %s", - val & FDI_RX_ENABLE ? "enable" : "disable", - train, portw, bpc, - val & FDI_LINK_REVERSE_OVERWRITE ? "yes" : "no", - val & FDI_DMI_LINK_REVERSE_MASK ? "yes" : "no", - val & FDI_RX_PLL_ENABLE ? "enable" : "disable", - val & FDI_FS_ERR_CORRECT_ENABLE ? "enable" : "disable", - val & FDI_FE_ERR_CORRECT_ENABLE ? "enable" : "disable", - val & FDI_FS_ERR_REPORT_ENABLE ? "enable" : "disable", - val & FDI_FE_ERR_REPORT_ENABLE ? "enable" : "disable", - val & (1 << 7) ? "disable" : "enable", - val & FDI_RX_ENHANCE_FRAME_ENABLE ? "enable" : - "disable", val & FDI_SEL_PCDCLK ? "PCDClk" : "RawClk"); -} - -DEBUGSTRING(ironlake_debug_dspstride) -{ - snprintf(result, len, "%d", val >> 6); -} - -DEBUGSTRING(ironlake_debug_pch_dpll) -{ - const char *enable = val & DPLL_VCO_ENABLE ? "enable" : "disable"; - const char *highspeed = val & DPLL_DVO_HIGH_SPEED ? "yes" : "no"; - const char *mode = NULL; - const char *p2 = NULL; - int fpa0_p1, fpa1_p1; - const char *refclk = NULL; - int sdvo_mul; - - if ((val & DPLLB_MODE_LVDS) == DPLLB_MODE_LVDS) { - mode = "LVDS"; - if (val & DPLLB_LVDS_P2_CLOCK_DIV_7) - p2 = "Div 7"; - else - p2 = "Div 14"; - } else if ((val & DPLLB_MODE_LVDS) == DPLLB_MODE_DAC_SERIAL) { - mode = "Non-LVDS"; - if (val & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5) - p2 = "Div 5"; - else - p2 = "Div 10"; - } - fpa0_p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >> 16); - fpa1_p1 = ffs((val & DPLL_FPA1_P1_POST_DIV_MASK)); - - switch (val & PLL_REF_INPUT_MASK) { - case PLL_REF_INPUT_DREFCLK: - refclk = "default 120Mhz"; - break; - case PLL_REF_INPUT_SUPER_SSC: - refclk = "SuperSSC 120Mhz"; - break; - case PLL_REF_INPUT_TVCLKINBC: - refclk = "SDVO TVClkIn"; - break; - case PLLB_REF_INPUT_SPREADSPECTRUMIN: - refclk = "SSC"; - break; - case PLL_REF_INPUT_DMICLK: - refclk = "DMI RefCLK"; - break; - } - - sdvo_mul = ((val & PLL_REF_SDVO_HDMI_MULTIPLIER_MASK) >> 9) + 1; - - snprintf(result, len, "%s, sdvo high speed %s, mode %s, p2 %s, " - "FPA0 P1 %d, FPA1 P1 %d, refclk %s, sdvo/hdmi mul %d", - enable, highspeed, mode, p2, fpa0_p1, fpa1_p1, refclk, - sdvo_mul); -} - -DEBUGSTRING(ironlake_debug_dref_ctl) -{ - const char *cpu_source; - const char *ssc_source = val & DREF_SSC_SOURCE_ENABLE ? "enable" : "disable"; - const char *nonspread_source = - val & DREF_NONSPREAD_SOURCE_ENABLE ? "enable" : "disable"; - const char *superspread_source = - val & DREF_SUPERSPREAD_SOURCE_ENABLE ? "enable" : "disable"; - const char *ssc4_mode = - val & DREF_SSC4_CENTERSPREAD ? "centerspread" : "downspread"; - const char *ssc1 = val & DREF_SSC1_ENABLE ? "enable" : "disable"; - const char *ssc4 = val & DREF_SSC4_ENABLE ? "enable" : "disable"; - - switch (val & DREF_CPU_SOURCE_OUTPUT_NONSPREAD) { - case DREF_CPU_SOURCE_OUTPUT_DISABLE: - cpu_source = "disable"; - break; - case DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD: - cpu_source = "downspread"; - break; - case DREF_CPU_SOURCE_OUTPUT_NONSPREAD: - cpu_source = "nonspread"; - break; - default: - cpu_source = "reserved"; - } - snprintf(result, len, "cpu source %s, ssc_source %s, nonspread_source %s, " - "superspread_source %s, ssc4_mode %s, ssc1 %s, ssc4 %s", - cpu_source, ssc_source, nonspread_source, - superspread_source, ssc4_mode, ssc1, ssc4); -} - -DEBUGSTRING(ironlake_debug_rawclk_freq) -{ - const char *tp1 = NULL, *tp2 = NULL; - - switch (val & FDL_TP1_TIMER_MASK) { - case 0: - tp1 = "0.5us"; - break; - case (1 << 12): - tp1 = "1.0us"; - break; - case (2 << 12): - tp1 = "2.0us"; - break; - case (3 << 12): - tp1 = "4.0us"; - break; - } - switch (val & FDL_TP2_TIMER_MASK) { - case 0: - tp2 = "1.5us"; - break; - case (1 << 10): - tp2 = "3.0us"; - break; - case (2 << 10): - tp2 = "6.0us"; - break; - case (3 << 10): - tp2 = "12.0us"; - break; - } - snprintf(result, len, "FDL_TP1 timer %s, FDL_TP2 timer %s, freq %d", - tp1, tp2, val & RAWCLK_FREQ_MASK); - -} - -DEBUGSTRING(ironlake_debug_fdi_rx_misc) -{ - snprintf(result, len, "FDI Delay %d", val & ((1 << 13) - 1)); -} - -DEBUGSTRING(ironlake_debug_transconf) -{ - const char *enable = val & TRANS_ENABLE ? "enable" : "disable"; - const char *state = val & TRANS_STATE_ENABLE ? "active" : "inactive"; - const char *interlace; - - switch ((val >> 21) & 7) { - case 0: - interlace = "progressive"; - break; - case 2: - if (IS_GEN5(devid)) - interlace = "interlaced sdvo"; - else - interlace = "rsvd"; - break; - case 3: - interlace = "interlaced"; - break; - default: - interlace = "rsvd"; - } - - snprintf(result, len, "%s, %s, %s", enable, state, interlace); -} - -DEBUGSTRING(ironlake_debug_panel_fitting) -{ - const char *vadapt = NULL, *filter_sel = NULL; - - switch (val & (3 << 25)) { - case 0: - vadapt = "least"; - break; - case (1 << 25): - vadapt = "moderate"; - break; - case (2 << 25): - vadapt = "reserved"; - break; - case (3 << 25): - vadapt = "most"; - break; - } - - switch (val & (3 << 23)) { - case 0: - filter_sel = "programmed"; - break; - case (1 << 23): - filter_sel = "hardcoded"; - break; - case (2 << 23): - filter_sel = "edge_enhance"; - break; - case (3 << 23): - filter_sel = "edge_soften"; - break; - } - - snprintf(result, len, - "%s, auto_scale %s, auto_scale_cal %s, v_filter %s, vadapt %s, mode %s, filter_sel %s," - "chroma pre-filter %s, vert3tap %s, v_inter_invert %s", - val & PF_ENABLE ? "enable" : "disable", - val & (1 << 30) ? "no" : "yes", - val & (1 << 29) ? "yes" : "no", - val & (1 << 28) ? "bypass" : "enable", - val & (1 << 27) ? "enable" : "disable", - vadapt, - filter_sel, - val & (1 << 22) ? "enable" : "disable", - val & (1 << 21) ? "force" : "auto", - val & (1 << 20) ? "field 0" : "field 1"); -} - -DEBUGSTRING(ironlake_debug_panel_fitting_2) -{ - snprintf(result, len, - "vscale %f", - val / (float) (1<<15)); -} - -DEBUGSTRING(ironlake_debug_panel_fitting_3) -{ - snprintf(result, len, - "vscale initial phase %f", - val / (float) (1<<15)); -} - -DEBUGSTRING(ironlake_debug_panel_fitting_4) -{ - snprintf(result, len, - "hscale %f", - val / (float) (1<<15)); -} - -DEBUGSTRING(ironlake_debug_pf_win) -{ - int a, b; - - a = (val >> 16) & 0x1fff; - b = val & 0xfff; - - snprintf(result, len, "%d, %d", a, b); -} - -DEBUGSTRING(ironlake_debug_hdmi) -{ - int disp_pipe; - const char *enable, *bpc = NULL, *encoding; - const char *mode, *audio, *vsync, *hsync, *detect; - - if (val & PORT_ENABLE) - enable = "enabled"; - else - enable = "disabled"; - - if (HAS_CPT) - disp_pipe = (val & (3<<29)) >> 29; - else - disp_pipe = (val & TRANSCODER_B) >> 29; - - switch (val & (7 << 26)) { - case COLOR_FORMAT_8bpc: - bpc = "8bpc"; - break; - case COLOR_FORMAT_12bpc: - bpc = "12bpc"; - break; - } - - if ((val & (3 << 10)) == TMDS_ENCODING) - encoding = "TMDS"; - else - encoding = "SDVO"; - - if (val & (1 << 9)) - mode = "HDMI"; - else - mode = "DVI"; - - if (val & AUDIO_ENABLE) - audio = "enabled"; - else - audio = "disabled"; - - if (val & VSYNC_ACTIVE_HIGH) - vsync = "+vsync"; - else - vsync = "-vsync"; - - if (val & HSYNC_ACTIVE_HIGH) - hsync = "+hsync"; - else - hsync = "-hsync"; - - if (val & PORT_DETECTED) - detect = "detected"; - else - detect = "non-detected"; - - snprintf(result, len, "%s pipe %c %s %s %s audio %s %s %s %s", - enable, disp_pipe + 'A', bpc, encoding, mode, audio, vsync, hsync, detect); -} - -DEBUGSTRING(snb_debug_dpll_sel) -{ - const char *transa, *transb; - const char *dplla = NULL, *dpllb = NULL; - - if (!HAS_CPT) - return; - - if (val & TRANSA_DPLL_ENABLE) { - transa = "enable"; - if (val & TRANSA_DPLLB_SEL) - dplla = "B"; - else - dplla = "A"; - } else - transa = "disable"; - - if (val & TRANSB_DPLL_ENABLE) { - transb = "enable"; - if (val & TRANSB_DPLLB_SEL) - dpllb = "B"; - else - dpllb = "A"; - } else - transb = "disable"; - - snprintf(result, len, "TransA DPLL %s (DPLL %s), TransB DPLL %s (DPLL %s)", - transa, dplla, transb, dpllb); -} - -DEBUGSTRING(snb_debug_trans_dp_ctl) -{ - const char *enable, *port = NULL, *bpc = NULL, *vsync, *hsync; - - if (!HAS_CPT) - return; - - if (val & TRANS_DP_OUTPUT_ENABLE) - enable = "enable"; - else - enable = "disable"; - - switch (val & TRANS_DP_PORT_SEL_MASK) { - case TRANS_DP_PORT_SEL_B: - port = "B"; - break; - case TRANS_DP_PORT_SEL_C: - port = "C"; - break; - case TRANS_DP_PORT_SEL_D: - port = "D"; - break; - default: - port = "none"; - break; - } - - switch (val & (7<<9)) { - case TRANS_DP_8BPC: - bpc = "8bpc"; - break; - case TRANS_DP_10BPC: - bpc = "10bpc"; - break; - case TRANS_DP_6BPC: - bpc = "6bpc"; - break; - case TRANS_DP_12BPC: - bpc = "12bpc"; - break; - } - - if (val & TRANS_DP_VSYNC_ACTIVE_HIGH) - vsync = "+vsync"; - else - vsync = "-vsync"; - - if (val & TRANS_DP_HSYNC_ACTIVE_HIGH) - hsync = "+hsync"; - else - hsync = "-hsync"; - - snprintf(result, len, "%s port %s %s %s %s", - enable, port, bpc, vsync, hsync); -} - -DEBUGSTRING(ilk_debug_pp_control) -{ - snprintf(result, len, "blacklight %s, %spower down on reset, panel %s", - (val & (1 << 2)) ? "enabled" : "disabled", - (val & (1 << 1)) ? "" : "do not ", - (val & (1 << 0)) ? "on" : "off"); -} - -DEBUGSTRING(hsw_debug_port_clk_sel) -{ - const char *clock = NULL; - - switch ((val >> 29 ) & 7) { - case 0: - clock = "LCPLL 2700"; - break; - case 1: - clock = "LCPLL 1350"; - break; - case 2: - clock = "LCPLL 810"; - break; - case 3: - clock = "SPLL"; - break; - case 4: - clock = "WRPLL 1"; - break; - case 5: - clock = "WRPLL 2"; - break; - case 6: - clock = "Reserved"; - break; - case 7: - clock = "None"; - break; - } - - snprintf(result, len, "%s", clock); -} - -DEBUGSTRING(hsw_debug_pipe_clk_sel) -{ - const char *clock; - - switch ((val >> 29) & 7) { - case 0: - clock = "None"; - break; - case 2: - clock = "DDIB"; - break; - case 3: - clock = "DDIC"; - break; - case 4: - clock = "DDID"; - break; - case 5: - clock = "DDIE"; - break; - default: - clock = "Reserved"; - break; - } - - snprintf(result, len, "%s", clock); -} - -DEBUGSTRING(hsw_debug_ddi_buf_ctl) -{ - const char *enable, *reversal, *width, *detected; - - enable = (val & (1<<31)) ? "enabled" : "disabled"; - reversal = (val & (1<<16)) ? "reversed" : "not reversed"; - - switch ((val >> 1) & 7) { - case 0: - width = "x1"; - break; - case 1: - width = "x2"; - break; - case 3: - width = "x4"; - break; - default: - width = "reserved"; - break; - } - - detected = (val & 1) ? "detected" : "not detected"; - - snprintf(result, len, "%s %s %s %s", enable, reversal, width, detected); -} - -DEBUGSTRING(hsw_debug_sfuse_strap) -{ - const char *display, *crt, *lane_reversal, *portb, *portc, *portd; - - display = (val & (1<<7)) ? "disabled" : "enabled"; - crt = (val & (1<<6)) ? "yes" : "no"; - lane_reversal = (val & (1<<4)) ? "yes" : "no"; - portb = (val & (1<<2)) ? "yes" : "no"; - portc = (val & (1<<1)) ? "yes" : "no"; - portd = (val & (1<<0)) ? "yes" : "no"; - - snprintf(result, len, "display %s, crt %s, lane reversal %s, " - "port b %s, port c %s, port d %s", display, crt, lane_reversal, - portb, portc, portd); -} - -DEBUGSTRING(hsw_debug_pipe_ddi_func_ctl) -{ - const char *enable, *port, *mode, *bpc, *vsync, *hsync, *edp_input; - const char *width; - - enable = (val & (1<<31)) ? "enabled" : "disabled"; - - switch ((val >> 28) & 7) { - case 0: - port = "no port"; - break; - case 1: - port = "DDIB"; - break; - case 2: - port = "DDIC"; - break; - case 3: - port = "DDID"; - break; - case 4: - port = "DDIE"; - break; - default: - port = "port reserved"; - break; - } - - switch ((val >> 24) & 7) { - case 0: - mode = "HDMI"; - break; - case 1: - mode = "DVI"; - break; - case 2: - mode = "DP SST"; - break; - case 3: - mode = "DP MST"; - break; - case 4: - mode = "FDI"; - break; - case 5: - default: - mode = "mode reserved"; - break; - } - - switch ((val >> 20) & 7) { - case 0: - bpc = "8 bpc"; - break; - case 1: - bpc = "10 bpc"; - break; - case 2: - bpc = "6 bpc"; - break; - case 3: - bpc = "12 bpc"; - break; - default: - bpc = "bpc reserved"; - break; - } - - hsync = (val & (1<<16)) ? "+HSync" : "-HSync"; - vsync = (val & (1<<17)) ? "+VSync" : "-VSync"; - - switch ((val >> 12) & 7) { - case 0: - edp_input = "EDP A ON"; - break; - case 4: - edp_input = "EDP A ONOFF"; - break; - case 5: - edp_input = "EDP B ONOFF"; - break; - case 6: - edp_input = "EDP C ONOFF"; - break; - default: - edp_input = "EDP input reserved"; - break; - } - - switch ((val >> 1) & 7) { - case 0: - width = "x1"; - break; - case 1: - width = "x2"; - break; - case 3: - width = "x4"; - break; - default: - width = "reserved width"; - break; - } - - snprintf(result, len, "%s, %s, %s, %s, %s, %s, %s, %s", enable, - port, mode, bpc, vsync, hsync, edp_input, width); -} - -DEBUGSTRING(hsw_debug_wm_pipe) -{ - uint32_t primary, sprite, cursor; - - primary = (val >> 16) & 0x7F; - sprite = (val >> 8) & 0x7F; - cursor = val & 0x3F; - - snprintf(result, len, "primary %d, sprite %d, pipe %d", primary, - sprite, cursor); -} - -DEBUGSTRING(hsw_debug_lp_wm) -{ - const char *enable; - uint32_t latency, fbc, pri, cur; - - enable = ((val >> 31) & 1) ? "enabled" : "disabled"; - latency = (val >> 24) & 0x7F; - fbc = (val >> 20) & 0xF; - pri = (val >> 8) & 0x3FF; - cur = val & 0xFF; - - snprintf(result, len, "%s, latency %d, fbc %d, pri %d, cur %d", - enable, latency, fbc, pri, cur); -} - -DEBUGSTRING(hsw_debug_sinterrupt) -{ - int portd, portc, portb, crt; - - portd = (val >> 23) & 1; - portc = (val >> 22) & 1; - portb = (val >> 21) & 1; - crt = (val >> 19) & 1; - - snprintf(result, len, "port d:%d, port c:%d, port b:%d, crt:%d", - portd, portc, portb, crt); -} - -DEBUGSTRING(ilk_debug_blc_pwm_cpu_ctl2) -{ - int enable, blinking, granularity; - const char *pipe; - - enable = (val >> 31) & 1; - - if (IS_GEN5(devid) || IS_GEN6(devid)) { - pipe = ((val >> 29) & 1) ? "B" : "A"; - } else { - switch ((val >> 29) & 3) { - case 0: - pipe = "A"; - break; - case 1: - pipe = "B"; - break; - case 2: - pipe = "C"; - break; - case 3: - if (IS_IVYBRIDGE(devid)) - pipe = "reserved"; - else - pipe = "EDP"; - break; - } - } - - if (IS_GEN5(devid) || IS_GEN6(devid) || IS_IVYBRIDGE(devid)) { - snprintf(result, len, "enable %d, pipe %s", enable, pipe); - } else { - blinking = (val >> 28) & 1; - granularity = ((val >> 27) & 1) ? 8 : 128; - - snprintf(result, len, "enable %d, pipe %s, blinking %d, " - "granularity %d", enable, pipe, blinking, - granularity); - } -} - -DEBUGSTRING(ilk_debug_blc_pwm_cpu_ctl) -{ - int cycle, freq; - - cycle = (val & 0xFFFF); - - if (IS_GEN5(devid) || IS_GEN6(devid) || IS_IVYBRIDGE(devid)) { - snprintf(result, len, "cycle %d", cycle); - } else { - freq = (val >> 16) & 0xFFFF; - - snprintf(result, len, "cycle %d, freq %d", cycle, freq); - } -} - -DEBUGSTRING(ibx_debug_blc_pwm_ctl1) -{ - int enable, override, inverted_polarity; - - enable = (val >> 31) & 1; - override = (val >> 30) & 1; - inverted_polarity = (val >> 29) & 1; - - snprintf(result, len, "enable %d, override %d, inverted polarity %d", - enable, override, inverted_polarity); -} - -DEBUGSTRING(ibx_debug_blc_pwm_ctl2) -{ - int freq, cycle; - - freq = (val >> 16) & 0xFFFF; - cycle = val & 0xFFFF; - - snprintf(result, len, "freq %d, cycle %d", freq, cycle); -} - -DEBUGSTRING(hsw_debug_blc_misc_ctl) -{ - const char *sel; - - sel = (val & 1) ? "PWM1-CPU PWM2-PCH" : "PWM1-PCH PWM2-CPU"; - - snprintf(result, len, "%s", sel); -} - -DEBUGSTRING(hsw_debug_util_pin_ctl) -{ - int enable, data, inverted_polarity; - const char *transcoder, *mode; - - enable = (val >> 31) & 1; - - switch ((val >> 29) & 3) { - case 0: - transcoder = "A"; - break; - case 1: - transcoder = "B"; - break; - case 2: - transcoder = "C"; - break; - case 3: - transcoder = "EDP"; - break; - } - - switch ((val >> 24) & 0xF) { - case 0: - mode = "data"; - break; - case 1: - mode = "PWM"; - break; - case 4: - mode = "Vblank"; - break; - case 5: - mode = "Vsync"; - break; - default: - mode = "reserved"; - break; - } - - data = (val >> 23) & 1; - inverted_polarity = (val >> 22) & 1; - - snprintf(result, len, "enable %d, transcoder %s, mode %s, data %d " - "inverted polarity %d", enable, transcoder, mode, data, - inverted_polarity); -} - -static struct reg_debug gen6_fences[] = { -#define DEFINEFENCE_SNB(i) \ - { FENCE_REG_SANDYBRIDGE_0 + (i) * 8, "FENCE START "#i, NULL, 0 }, \ - { FENCE_REG_SANDYBRIDGE_0 + (i) * 8 + 4, "FENCE END "#i, NULL, 0 } - DEFINEFENCE_SNB(0), - DEFINEFENCE_SNB(1), - DEFINEFENCE_SNB(2), - DEFINEFENCE_SNB(3), - DEFINEFENCE_SNB(4), - DEFINEFENCE_SNB(5), - DEFINEFENCE_SNB(6), - DEFINEFENCE_SNB(7), - DEFINEFENCE_SNB(8), - DEFINEFENCE_SNB(9), - DEFINEFENCE_SNB(10), - DEFINEFENCE_SNB(11), - DEFINEFENCE_SNB(12), - DEFINEFENCE_SNB(13), - DEFINEFENCE_SNB(14), - DEFINEFENCE_SNB(15), - DEFINEFENCE_SNB(16), - DEFINEFENCE_SNB(17), - DEFINEFENCE_SNB(18), - DEFINEFENCE_SNB(19), - DEFINEFENCE_SNB(20), - DEFINEFENCE_SNB(20), - DEFINEFENCE_SNB(21), - DEFINEFENCE_SNB(22), - DEFINEFENCE_SNB(23), - DEFINEFENCE_SNB(24), - DEFINEFENCE_SNB(25), - DEFINEFENCE_SNB(26), - DEFINEFENCE_SNB(27), - DEFINEFENCE_SNB(28), - DEFINEFENCE_SNB(29), - DEFINEFENCE_SNB(30), - DEFINEFENCE_SNB(31), -}; - -static struct reg_debug ironlake_debug_regs[] = { - DEFINEREG(PGETBL_CTL), - DEFINEREG(INSTDONE_I965), - DEFINEREG(INSTDONE_1), - DEFINEREG2(CPU_VGACNTRL, i830_debug_vgacntrl), - DEFINEREG(DIGITAL_PORT_HOTPLUG_CNTRL), - - DEFINEREG2(RR_HW_CTL, ironlake_debug_rr_hw_ctl), - - DEFINEREG(FDI_PLL_BIOS_0), - DEFINEREG(FDI_PLL_BIOS_1), - DEFINEREG(FDI_PLL_BIOS_2), - - DEFINEREG(DISPLAY_PORT_PLL_BIOS_0), - DEFINEREG(DISPLAY_PORT_PLL_BIOS_1), - DEFINEREG(DISPLAY_PORT_PLL_BIOS_2), - - DEFINEREG(FDI_PLL_FREQ_CTL), - - /* pipe B */ - - DEFINEREG2(PIPEACONF, i830_debug_pipeconf), - - DEFINEREG2(HTOTAL_A, i830_debug_hvtotal), - DEFINEREG2(HBLANK_A, i830_debug_hvsyncblank), - DEFINEREG2(HSYNC_A, i830_debug_hvsyncblank), - DEFINEREG2(VTOTAL_A, i830_debug_hvtotal), - DEFINEREG2(VBLANK_A, i830_debug_hvsyncblank), - DEFINEREG2(VSYNC_A, i830_debug_hvsyncblank), - DEFINEREG(VSYNCSHIFT_A), - DEFINEREG2(PIPEASRC, i830_debug_yxminus1), - - DEFINEREG2(PIPEA_DATA_M1, ironlake_debug_m_tu), - DEFINEREG2(PIPEA_DATA_N1, ironlake_debug_n), - DEFINEREG2(PIPEA_DATA_M2, ironlake_debug_m_tu), - DEFINEREG2(PIPEA_DATA_N2, ironlake_debug_n), - - DEFINEREG2(PIPEA_LINK_M1, ironlake_debug_n), - DEFINEREG2(PIPEA_LINK_N1, ironlake_debug_n), - DEFINEREG2(PIPEA_LINK_M2, ironlake_debug_n), - DEFINEREG2(PIPEA_LINK_N2, ironlake_debug_n), - - DEFINEREG2(DSPACNTR, i830_debug_dspcntr), - DEFINEREG(DSPABASE), - DEFINEREG2(DSPASTRIDE, ironlake_debug_dspstride), - DEFINEREG(DSPASURF), - DEFINEREG2(DSPATILEOFF, i830_debug_xy), - - /* pipe B */ - - DEFINEREG2(PIPEBCONF, i830_debug_pipeconf), - - DEFINEREG2(HTOTAL_B, i830_debug_hvtotal), - DEFINEREG2(HBLANK_B, i830_debug_hvsyncblank), - DEFINEREG2(HSYNC_B, i830_debug_hvsyncblank), - DEFINEREG2(VTOTAL_B, i830_debug_hvtotal), - DEFINEREG2(VBLANK_B, i830_debug_hvsyncblank), - DEFINEREG2(VSYNC_B, i830_debug_hvsyncblank), - DEFINEREG(VSYNCSHIFT_B), - DEFINEREG2(PIPEBSRC, i830_debug_yxminus1), - - DEFINEREG2(PIPEB_DATA_M1, ironlake_debug_m_tu), - DEFINEREG2(PIPEB_DATA_N1, ironlake_debug_n), - DEFINEREG2(PIPEB_DATA_M2, ironlake_debug_m_tu), - DEFINEREG2(PIPEB_DATA_N2, ironlake_debug_n), - - DEFINEREG2(PIPEB_LINK_M1, ironlake_debug_n), - DEFINEREG2(PIPEB_LINK_N1, ironlake_debug_n), - DEFINEREG2(PIPEB_LINK_M2, ironlake_debug_n), - DEFINEREG2(PIPEB_LINK_N2, ironlake_debug_n), - - DEFINEREG2(DSPBCNTR, i830_debug_dspcntr), - DEFINEREG(DSPBBASE), - DEFINEREG2(DSPBSTRIDE, ironlake_debug_dspstride), - DEFINEREG(DSPBSURF), - DEFINEREG2(DSPBTILEOFF, i830_debug_xy), - - /* pipe C */ - - DEFINEREG2(PIPECCONF, i830_debug_pipeconf), - - DEFINEREG2(HTOTAL_C, i830_debug_hvtotal), - DEFINEREG2(HBLANK_C, i830_debug_hvsyncblank), - DEFINEREG2(HSYNC_C, i830_debug_hvsyncblank), - DEFINEREG2(VTOTAL_C, i830_debug_hvtotal), - DEFINEREG2(VBLANK_C, i830_debug_hvsyncblank), - DEFINEREG2(VSYNC_C, i830_debug_hvsyncblank), - DEFINEREG(VSYNCSHIFT_C), - DEFINEREG2(PIPECSRC, i830_debug_yxminus1), - - DEFINEREG2(PIPEC_DATA_M1, ironlake_debug_m_tu), - DEFINEREG2(PIPEC_DATA_N1, ironlake_debug_n), - DEFINEREG2(PIPEC_DATA_M2, ironlake_debug_m_tu), - DEFINEREG2(PIPEC_DATA_N2, ironlake_debug_n), - - DEFINEREG2(PIPEC_LINK_M1, ironlake_debug_n), - DEFINEREG2(PIPEC_LINK_N1, ironlake_debug_n), - DEFINEREG2(PIPEC_LINK_M2, ironlake_debug_n), - DEFINEREG2(PIPEC_LINK_N2, ironlake_debug_n), - - DEFINEREG2(DSPCCNTR, i830_debug_dspcntr), - DEFINEREG(DSPCBASE), - DEFINEREG2(DSPCSTRIDE, ironlake_debug_dspstride), - DEFINEREG(DSPCSURF), - DEFINEREG2(DSPCTILEOFF, i830_debug_xy), - - /* Panel fitter */ - - DEFINEREG2(PFA_CTL_1, ironlake_debug_panel_fitting), - DEFINEREG2(PFA_CTL_2, ironlake_debug_panel_fitting_2), - DEFINEREG2(PFA_CTL_3, ironlake_debug_panel_fitting_3), - DEFINEREG2(PFA_CTL_4, ironlake_debug_panel_fitting_4), - DEFINEREG2(PFA_WIN_POS, ironlake_debug_pf_win), - DEFINEREG2(PFA_WIN_SIZE, ironlake_debug_pf_win), - DEFINEREG2(PFB_CTL_1, ironlake_debug_panel_fitting), - DEFINEREG2(PFB_CTL_2, ironlake_debug_panel_fitting_2), - DEFINEREG2(PFB_CTL_3, ironlake_debug_panel_fitting_3), - DEFINEREG2(PFB_CTL_4, ironlake_debug_panel_fitting_4), - DEFINEREG2(PFB_WIN_POS, ironlake_debug_pf_win), - DEFINEREG2(PFB_WIN_SIZE, ironlake_debug_pf_win), - DEFINEREG2(PFC_CTL_1, ironlake_debug_panel_fitting), - DEFINEREG2(PFC_CTL_2, ironlake_debug_panel_fitting_2), - DEFINEREG2(PFC_CTL_3, ironlake_debug_panel_fitting_3), - DEFINEREG2(PFC_CTL_4, ironlake_debug_panel_fitting_4), - DEFINEREG2(PFC_WIN_POS, ironlake_debug_pf_win), - DEFINEREG2(PFC_WIN_SIZE, ironlake_debug_pf_win), - - /* PCH */ - - DEFINEREG2(PCH_DREF_CONTROL, ironlake_debug_dref_ctl), - DEFINEREG2(PCH_RAWCLK_FREQ, ironlake_debug_rawclk_freq), - DEFINEREG(PCH_DPLL_TMR_CFG), - DEFINEREG(PCH_SSC4_PARMS), - DEFINEREG(PCH_SSC4_AUX_PARMS), - DEFINEREG2(PCH_DPLL_SEL, snb_debug_dpll_sel), - DEFINEREG(PCH_DPLL_ANALOG_CTL), - - DEFINEREG2(PCH_DPLL_A, ironlake_debug_pch_dpll), - DEFINEREG2(PCH_DPLL_B, ironlake_debug_pch_dpll), - DEFINEREG2(PCH_FPA0, i830_debug_fp), - DEFINEREG2(PCH_FPA1, i830_debug_fp), - DEFINEREG2(PCH_FPB0, i830_debug_fp), - DEFINEREG2(PCH_FPB1, i830_debug_fp), - - DEFINEREG2(TRANS_HTOTAL_A, i830_debug_hvtotal), - DEFINEREG2(TRANS_HBLANK_A, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_HSYNC_A, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_VTOTAL_A, i830_debug_hvtotal), - DEFINEREG2(TRANS_VBLANK_A, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_VSYNC_A, i830_debug_hvsyncblank), - DEFINEREG(TRANS_VSYNCSHIFT_A), - - DEFINEREG2(TRANSA_DATA_M1, ironlake_debug_m_tu), - DEFINEREG2(TRANSA_DATA_N1, ironlake_debug_n), - DEFINEREG2(TRANSA_DATA_M2, ironlake_debug_m_tu), - DEFINEREG2(TRANSA_DATA_N2, ironlake_debug_n), - DEFINEREG2(TRANSA_DP_LINK_M1, ironlake_debug_n), - DEFINEREG2(TRANSA_DP_LINK_N1, ironlake_debug_n), - DEFINEREG2(TRANSA_DP_LINK_M2, ironlake_debug_n), - DEFINEREG2(TRANSA_DP_LINK_N2, ironlake_debug_n), - - DEFINEREG2(TRANS_HTOTAL_B, i830_debug_hvtotal), - DEFINEREG2(TRANS_HBLANK_B, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_HSYNC_B, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_VTOTAL_B, i830_debug_hvtotal), - DEFINEREG2(TRANS_VBLANK_B, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_VSYNC_B, i830_debug_hvsyncblank), - DEFINEREG(TRANS_VSYNCSHIFT_B), - - DEFINEREG2(TRANSB_DATA_M1, ironlake_debug_m_tu), - DEFINEREG2(TRANSB_DATA_N1, ironlake_debug_n), - DEFINEREG2(TRANSB_DATA_M2, ironlake_debug_m_tu), - DEFINEREG2(TRANSB_DATA_N2, ironlake_debug_n), - DEFINEREG2(TRANSB_DP_LINK_M1, ironlake_debug_n), - DEFINEREG2(TRANSB_DP_LINK_N1, ironlake_debug_n), - DEFINEREG2(TRANSB_DP_LINK_M2, ironlake_debug_n), - DEFINEREG2(TRANSB_DP_LINK_N2, ironlake_debug_n), - - DEFINEREG2(TRANS_HTOTAL_C, i830_debug_hvtotal), - DEFINEREG2(TRANS_HBLANK_C, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_HSYNC_C, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_VTOTAL_C, i830_debug_hvtotal), - DEFINEREG2(TRANS_VBLANK_C, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_VSYNC_C, i830_debug_hvsyncblank), - DEFINEREG(TRANS_VSYNCSHIFT_C), - - DEFINEREG2(TRANSC_DATA_M1, ironlake_debug_m_tu), - DEFINEREG2(TRANSC_DATA_N1, ironlake_debug_n), - DEFINEREG2(TRANSC_DATA_M2, ironlake_debug_m_tu), - DEFINEREG2(TRANSC_DATA_N2, ironlake_debug_n), - DEFINEREG2(TRANSC_DP_LINK_M1, ironlake_debug_n), - DEFINEREG2(TRANSC_DP_LINK_N1, ironlake_debug_n), - DEFINEREG2(TRANSC_DP_LINK_M2, ironlake_debug_n), - DEFINEREG2(TRANSC_DP_LINK_N2, ironlake_debug_n), - - DEFINEREG2(TRANSACONF, ironlake_debug_transconf), - DEFINEREG2(TRANSBCONF, ironlake_debug_transconf), - DEFINEREG2(TRANSCCONF, ironlake_debug_transconf), - - DEFINEREG2(FDI_TXA_CTL, ironlake_debug_fdi_tx_ctl), - DEFINEREG2(FDI_TXB_CTL, ironlake_debug_fdi_tx_ctl), - DEFINEREG2(FDI_TXC_CTL, ironlake_debug_fdi_tx_ctl), - DEFINEREG2(FDI_RXA_CTL, ironlake_debug_fdi_rx_ctl), - DEFINEREG2(FDI_RXB_CTL, ironlake_debug_fdi_rx_ctl), - DEFINEREG2(FDI_RXC_CTL, ironlake_debug_fdi_rx_ctl), - - DEFINEREG(DPAFE_BMFUNC), - DEFINEREG(DPAFE_DL_IREFCAL0), - DEFINEREG(DPAFE_DL_IREFCAL1), - DEFINEREG(DPAFE_DP_IREFCAL), - - DEFINEREG(PCH_DSPCLK_GATE_D), - DEFINEREG(PCH_DSP_CHICKEN1), - DEFINEREG(PCH_DSP_CHICKEN2), - DEFINEREG(PCH_DSP_CHICKEN3), - - DEFINEREG2(FDI_RXA_MISC, ironlake_debug_fdi_rx_misc), - DEFINEREG2(FDI_RXB_MISC, ironlake_debug_fdi_rx_misc), - DEFINEREG2(FDI_RXC_MISC, ironlake_debug_fdi_rx_misc), - DEFINEREG(FDI_RXA_TUSIZE1), - DEFINEREG(FDI_RXA_TUSIZE2), - DEFINEREG(FDI_RXB_TUSIZE1), - DEFINEREG(FDI_RXB_TUSIZE2), - DEFINEREG(FDI_RXC_TUSIZE1), - DEFINEREG(FDI_RXC_TUSIZE2), - - DEFINEREG(FDI_PLL_CTL_1), - DEFINEREG(FDI_PLL_CTL_2), - - DEFINEREG(FDI_RXA_IIR), - DEFINEREG(FDI_RXA_IMR), - DEFINEREG(FDI_RXB_IIR), - DEFINEREG(FDI_RXB_IMR), - - DEFINEREG2(PCH_ADPA, i830_debug_adpa), - DEFINEREG2(HDMIB, ironlake_debug_hdmi), - DEFINEREG2(HDMIC, ironlake_debug_hdmi), - DEFINEREG2(HDMID, ironlake_debug_hdmi), - DEFINEREG2(PCH_LVDS, i830_debug_lvds), - DEFINEREG(CPU_eDP_A), - DEFINEREG(PCH_DP_B), - DEFINEREG(PCH_DP_C), - DEFINEREG(PCH_DP_D), - DEFINEREG2(TRANS_DP_CTL_A, snb_debug_trans_dp_ctl), - DEFINEREG2(TRANS_DP_CTL_B, snb_debug_trans_dp_ctl), - DEFINEREG2(TRANS_DP_CTL_C, snb_debug_trans_dp_ctl), - - DEFINEREG2(BLC_PWM_CPU_CTL2, ilk_debug_blc_pwm_cpu_ctl2), - DEFINEREG2(BLC_PWM_CPU_CTL, ilk_debug_blc_pwm_cpu_ctl), - DEFINEREG2(BLC_PWM_PCH_CTL1, ibx_debug_blc_pwm_ctl1), - DEFINEREG2(BLC_PWM_PCH_CTL2, ibx_debug_blc_pwm_ctl2), - - DEFINEREG2(PCH_PP_STATUS, i830_debug_pp_status), - DEFINEREG2(PCH_PP_CONTROL, ilk_debug_pp_control), - DEFINEREG(PCH_PP_ON_DELAYS), - DEFINEREG(PCH_PP_OFF_DELAYS), - DEFINEREG(PCH_PP_DIVISOR), - - DEFINEREG2(PORT_DBG, ivb_debug_port), - - DEFINEREG(RC6_RESIDENCY_TIME), - DEFINEREG(RC6p_RESIDENCY_TIME), - DEFINEREG(RC6pp_RESIDENCY_TIME), -}; - -static struct reg_debug haswell_debug_regs[] = { - /* Power wells */ - DEFINEREG(HSW_PWR_WELL_CTL1), - DEFINEREG(HSW_PWR_WELL_CTL2), - DEFINEREG(HSW_PWR_WELL_CTL3), - DEFINEREG(HSW_PWR_WELL_CTL4), - DEFINEREG(HSW_PWR_WELL_CTL5), - DEFINEREG(HSW_PWR_WELL_CTL6), - - /* DDI pipe function */ - DEFINEREG2(PIPE_DDI_FUNC_CTL_A, hsw_debug_pipe_ddi_func_ctl), - DEFINEREG2(PIPE_DDI_FUNC_CTL_B, hsw_debug_pipe_ddi_func_ctl), - DEFINEREG2(PIPE_DDI_FUNC_CTL_C, hsw_debug_pipe_ddi_func_ctl), - DEFINEREG2(PIPE_DDI_FUNC_CTL_EDP, hsw_debug_pipe_ddi_func_ctl), - - /* DP transport control */ - DEFINEREG(DP_TP_CTL_A), - DEFINEREG(DP_TP_CTL_B), - DEFINEREG(DP_TP_CTL_C), - DEFINEREG(DP_TP_CTL_D), - DEFINEREG(DP_TP_CTL_E), - - /* DP status */ - DEFINEREG(DP_TP_STATUS_B), - DEFINEREG(DP_TP_STATUS_C), - DEFINEREG(DP_TP_STATUS_D), - DEFINEREG(DP_TP_STATUS_E), - - /* DDI buffer control */ - DEFINEREG2(DDI_BUF_CTL_A, hsw_debug_ddi_buf_ctl), - DEFINEREG2(DDI_BUF_CTL_B, hsw_debug_ddi_buf_ctl), - DEFINEREG2(DDI_BUF_CTL_C, hsw_debug_ddi_buf_ctl), - DEFINEREG2(DDI_BUF_CTL_D, hsw_debug_ddi_buf_ctl), - DEFINEREG2(DDI_BUF_CTL_E, hsw_debug_ddi_buf_ctl), - - /* Clocks */ - DEFINEREG(SPLL_CTL), - DEFINEREG(LCPLL_CTL), - DEFINEREG(WRPLL_CTL1), - DEFINEREG(WRPLL_CTL2), - - /* DDI port clock control */ - DEFINEREG2(PORT_CLK_SEL_A, hsw_debug_port_clk_sel), - DEFINEREG2(PORT_CLK_SEL_B, hsw_debug_port_clk_sel), - DEFINEREG2(PORT_CLK_SEL_C, hsw_debug_port_clk_sel), - DEFINEREG2(PORT_CLK_SEL_D, hsw_debug_port_clk_sel), - DEFINEREG2(PORT_CLK_SEL_E, hsw_debug_port_clk_sel), - - /* Pipe clock control */ - DEFINEREG2(PIPE_CLK_SEL_A, hsw_debug_pipe_clk_sel), - DEFINEREG2(PIPE_CLK_SEL_B, hsw_debug_pipe_clk_sel), - DEFINEREG2(PIPE_CLK_SEL_C, hsw_debug_pipe_clk_sel), - - /* Watermarks */ - DEFINEREG2(WM_PIPE_A, hsw_debug_wm_pipe), - DEFINEREG2(WM_PIPE_B, hsw_debug_wm_pipe), - DEFINEREG2(WM_PIPE_C, hsw_debug_wm_pipe), - DEFINEREG2(WM_LP1, hsw_debug_lp_wm), - DEFINEREG2(WM_LP2, hsw_debug_lp_wm), - DEFINEREG2(WM_LP3, hsw_debug_lp_wm), - DEFINEREG(WM_LP1_SPR), - DEFINEREG(WM_LP2_SPR), - DEFINEREG(WM_LP3_SPR), - DEFINEREG(WM_MISC), - DEFINEREG(WM_SR_CNT), - DEFINEREG(PIPE_WM_LINETIME_A), - DEFINEREG(PIPE_WM_LINETIME_B), - DEFINEREG(PIPE_WM_LINETIME_C), - DEFINEREG(WM_DBG), - - /* Fuses */ - DEFINEREG2(SFUSE_STRAP, hsw_debug_sfuse_strap), - - /* Pipe A */ - DEFINEREG2(PIPEASRC, i830_debug_yxminus1), - DEFINEREG2(DSPACNTR, i830_debug_dspcntr), - DEFINEREG2(DSPASTRIDE, ironlake_debug_dspstride), - DEFINEREG(DSPASURF), - DEFINEREG2(DSPATILEOFF, i830_debug_xy), - - /* Pipe B */ - DEFINEREG2(PIPEBSRC, i830_debug_yxminus1), - DEFINEREG2(DSPBCNTR, i830_debug_dspcntr), - DEFINEREG2(DSPBSTRIDE, ironlake_debug_dspstride), - DEFINEREG(DSPBSURF), - DEFINEREG2(DSPBTILEOFF, i830_debug_xy), - - /* Pipe C */ - DEFINEREG2(PIPECSRC, i830_debug_yxminus1), - DEFINEREG2(DSPCCNTR, i830_debug_dspcntr), - DEFINEREG2(DSPCSTRIDE, ironlake_debug_dspstride), - DEFINEREG(DSPCSURF), - DEFINEREG2(DSPCTILEOFF, i830_debug_xy), - - /* Transcoder A */ - DEFINEREG2(PIPEACONF, i830_debug_pipeconf), - DEFINEREG2(HTOTAL_A, i830_debug_hvtotal), - DEFINEREG2(HBLANK_A, i830_debug_hvsyncblank), - DEFINEREG2(HSYNC_A, i830_debug_hvsyncblank), - DEFINEREG2(VTOTAL_A, i830_debug_hvtotal), - DEFINEREG2(VBLANK_A, i830_debug_hvsyncblank), - DEFINEREG2(VSYNC_A, i830_debug_hvsyncblank), - DEFINEREG(VSYNCSHIFT_A), - DEFINEREG2(PIPEA_DATA_M1, ironlake_debug_m_tu), - DEFINEREG2(PIPEA_DATA_N1, ironlake_debug_n), - DEFINEREG2(PIPEA_LINK_M1, ironlake_debug_n), - DEFINEREG2(PIPEA_LINK_N1, ironlake_debug_n), - - /* Transcoder B */ - DEFINEREG2(PIPEBCONF, i830_debug_pipeconf), - DEFINEREG2(HTOTAL_B, i830_debug_hvtotal), - DEFINEREG2(HBLANK_B, i830_debug_hvsyncblank), - DEFINEREG2(HSYNC_B, i830_debug_hvsyncblank), - DEFINEREG2(VTOTAL_B, i830_debug_hvtotal), - DEFINEREG2(VBLANK_B, i830_debug_hvsyncblank), - DEFINEREG2(VSYNC_B, i830_debug_hvsyncblank), - DEFINEREG(VSYNCSHIFT_B), - DEFINEREG2(PIPEB_DATA_M1, ironlake_debug_m_tu), - DEFINEREG2(PIPEB_DATA_N1, ironlake_debug_n), - DEFINEREG2(PIPEB_LINK_M1, ironlake_debug_n), - DEFINEREG2(PIPEB_LINK_N1, ironlake_debug_n), - - /* Transcoder C */ - DEFINEREG2(PIPECCONF, i830_debug_pipeconf), - DEFINEREG2(HTOTAL_C, i830_debug_hvtotal), - DEFINEREG2(HBLANK_C, i830_debug_hvsyncblank), - DEFINEREG2(HSYNC_C, i830_debug_hvsyncblank), - DEFINEREG2(VTOTAL_C, i830_debug_hvtotal), - DEFINEREG2(VBLANK_C, i830_debug_hvsyncblank), - DEFINEREG2(VSYNC_C, i830_debug_hvsyncblank), - DEFINEREG(VSYNCSHIFT_C), - DEFINEREG2(PIPEC_DATA_M1, ironlake_debug_m_tu), - DEFINEREG2(PIPEC_DATA_N1, ironlake_debug_n), - DEFINEREG2(PIPEC_LINK_M1, ironlake_debug_n), - DEFINEREG2(PIPEC_LINK_N1, ironlake_debug_n), - - /* Transcoder EDP */ - DEFINEREG2(PIPEEDPCONF, i830_debug_pipeconf), - DEFINEREG2(HTOTAL_EDP, i830_debug_hvtotal), - DEFINEREG2(HBLANK_EDP, i830_debug_hvsyncblank), - DEFINEREG2(HSYNC_EDP, i830_debug_hvsyncblank), - DEFINEREG2(VTOTAL_EDP, i830_debug_hvtotal), - DEFINEREG2(VBLANK_EDP, i830_debug_hvsyncblank), - DEFINEREG2(VSYNC_EDP, i830_debug_hvsyncblank), - DEFINEREG(VSYNCSHIFT_EDP), - DEFINEREG2(PIPEEDP_DATA_M1, ironlake_debug_m_tu), - DEFINEREG2(PIPEEDP_DATA_N1, ironlake_debug_n), - DEFINEREG2(PIPEEDP_LINK_M1, ironlake_debug_n), - DEFINEREG2(PIPEEDP_LINK_N1, ironlake_debug_n), - - /* Panel fitter */ - DEFINEREG2(PFA_CTL_1, ironlake_debug_panel_fitting), - DEFINEREG2(PFA_WIN_POS, ironlake_debug_pf_win), - DEFINEREG2(PFA_WIN_SIZE, ironlake_debug_pf_win), - - DEFINEREG2(PFB_CTL_1, ironlake_debug_panel_fitting), - DEFINEREG2(PFB_WIN_POS, ironlake_debug_pf_win), - DEFINEREG2(PFB_WIN_SIZE, ironlake_debug_pf_win), - - DEFINEREG2(PFC_CTL_1, ironlake_debug_panel_fitting), - DEFINEREG2(PFC_WIN_POS, ironlake_debug_pf_win), - DEFINEREG2(PFC_WIN_SIZE, ironlake_debug_pf_win), - - /* LPT */ - - DEFINEREG2(TRANS_HTOTAL_A, i830_debug_hvtotal), - DEFINEREG2(TRANS_HBLANK_A, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_HSYNC_A, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_VTOTAL_A, i830_debug_hvtotal), - DEFINEREG2(TRANS_VBLANK_A, i830_debug_hvsyncblank), - DEFINEREG2(TRANS_VSYNC_A, i830_debug_hvsyncblank), - DEFINEREG(TRANS_VSYNCSHIFT_A), - - DEFINEREG2(TRANSACONF, ironlake_debug_transconf), - - DEFINEREG2(FDI_RXA_MISC, ironlake_debug_fdi_rx_misc), - DEFINEREG(FDI_RXA_TUSIZE1), - DEFINEREG(FDI_RXA_IIR), - DEFINEREG(FDI_RXA_IMR), - - DEFINEREG2(BLC_PWM_CPU_CTL2, ilk_debug_blc_pwm_cpu_ctl2), - DEFINEREG2(BLC_PWM_CPU_CTL, ilk_debug_blc_pwm_cpu_ctl), - DEFINEREG2(BLC_PWM2_CPU_CTL2, ilk_debug_blc_pwm_cpu_ctl2), - DEFINEREG2(BLC_PWM2_CPU_CTL, ilk_debug_blc_pwm_cpu_ctl), - DEFINEREG2(BLC_MISC_CTL, hsw_debug_blc_misc_ctl), - DEFINEREG2(BLC_PWM_PCH_CTL1, ibx_debug_blc_pwm_ctl1), - DEFINEREG2(BLC_PWM_PCH_CTL2, ibx_debug_blc_pwm_ctl2), - - DEFINEREG2(UTIL_PIN_CTL, hsw_debug_util_pin_ctl), - - DEFINEREG2(PCH_PP_STATUS, i830_debug_pp_status), - DEFINEREG2(PCH_PP_CONTROL, ilk_debug_pp_control), - DEFINEREG(PCH_PP_ON_DELAYS), - DEFINEREG(PCH_PP_OFF_DELAYS), - DEFINEREG(PCH_PP_DIVISOR), - - DEFINEREG(PIXCLK_GATE), - - DEFINEREG2(SDEISR, hsw_debug_sinterrupt), - - DEFINEREG(RC6_RESIDENCY_TIME), -}; - -static struct reg_debug i945gm_mi_regs[] = { - DEFINEREG(PGETBL_CTL), - DEFINEREG(PGTBL_ER), - DEFINEREG(EXCC), - DEFINEREG(HWS_PGA), - DEFINEREG(IPEIR), - DEFINEREG(IPEHR), - DEFINEREG(INSTDONE), - DEFINEREG(NOP_ID), - DEFINEREG(HWSTAM), - DEFINEREG(SCPD0), - DEFINEREG(IER), - DEFINEREG(IIR), - DEFINEREG(IMR), - DEFINEREG(ISR), - DEFINEREG(EIR), - DEFINEREG(EMR), - DEFINEREG(ESR), - DEFINEREG(INST_PM), - DEFINEREG(ECOSKPD), -}; - -static void -_intel_dump_reg(struct reg_debug *reg, uint32_t val) -{ - char debug[1024]; - - if (reg->debug_output != NULL) { - reg->debug_output(debug, sizeof(debug), reg->reg, val); - printf("%30.30s: 0x%08x (%s)\n", - reg->name, val, debug); - } else { - printf("%30.30s: 0x%08x\n", reg->name, val); - } -} - -#define intel_dump_regs(regs) _intel_dump_regs(regs, ARRAY_SIZE(regs)) - -static void -_intel_dump_regs(struct reg_debug *regs, int count) -{ - int i; - - for (i = 0; i < count; i++) { - uint32_t val = INREG(regs[i].reg); - - _intel_dump_reg(®s[i], val); - } -} - -DEBUGSTRING(gen6_rp_control) -{ - snprintf(result, len, "%s", - (val & (1 << 7)) ? "enabled" : "disabled"); -} - -static struct reg_debug gen6_rp_debug_regs[] = { - DEFINEREG2(GEN6_RP_CONTROL, gen6_rp_control), - DEFINEREG(GEN6_RPNSWREQ), - DEFINEREG(GEN6_RP_DOWN_TIMEOUT), - DEFINEREG(GEN6_RP_INTERRUPT_LIMITS), - DEFINEREG(GEN6_RP_UP_THRESHOLD), - DEFINEREG(GEN6_RP_UP_EI), - DEFINEREG(GEN6_RP_DOWN_EI), - DEFINEREG(GEN6_RP_IDLE_HYSTERSIS), - DEFINEREG(GEN6_RC_STATE), - DEFINEREG(GEN6_RC_CONTROL), - DEFINEREG(GEN6_RC1_WAKE_RATE_LIMIT), - DEFINEREG(GEN6_RC6_WAKE_RATE_LIMIT), - DEFINEREG(GEN6_RC_EVALUATION_INTERVAL), - DEFINEREG(GEN6_RC_IDLE_HYSTERSIS), - DEFINEREG(GEN6_RC_SLEEP), - DEFINEREG(GEN6_RC1e_THRESHOLD), - DEFINEREG(GEN6_RC6_THRESHOLD), - DEFINEREG(GEN6_RC_VIDEO_FREQ), - DEFINEREG(GEN6_PMIER), - DEFINEREG(GEN6_PMIMR), - DEFINEREG(GEN6_PMINTRMSK), -}; - -#define DECLARE_REGS(d,r) \ - { .description = d, .regs = r, .count = ARRAY_SIZE(r) } -static struct { - const char *description; - struct reg_debug *regs; - int count; -} known_registers[] = { - DECLARE_REGS("Gen5", ironlake_debug_regs), - DECLARE_REGS("i945GM", i945gm_mi_regs), - DECLARE_REGS("Gen2", intel_debug_regs), - DECLARE_REGS("Gen6", gen6_rp_debug_regs), - DECLARE_REGS("Gen7.5", haswell_debug_regs), - DECLARE_REGS("Gen6+", gen6_fences), -}; -#undef DECLARE_REGS - -static void -dump_reg(struct reg_debug *reg, uint32_t val, const char *prefix) -{ - char debug[1024]; - - if (reg->debug_output != NULL) { - reg->debug_output(debug, sizeof(debug), reg->reg, val); - printf("%s: %s (0x%x): 0x%08x (%s)\n", - prefix, reg->name, reg->reg, val, debug); - } else { - printf("%s: %s (0x%x): 0x%08x\n", - prefix, reg->name, reg->reg, val); - } -} - -static void -str_to_upper(char *str) -{ - while(*str) { - *str = toupper(*str); - str++; - } -} - -static void -decode_register_name(char *name, uint32_t val) -{ - int i, j; - - str_to_upper(name); - - for (i = 0; i < ARRAY_SIZE(known_registers); i++) { - struct reg_debug *regs = known_registers[i].regs; - - for (j = 0; j < known_registers[i].count; j++) - if (strstr(regs[j].name, name)) - dump_reg(®s[j], val, - known_registers[i].description); - } -} - -static void -decode_register_address(int address, uint32_t val) -{ - int i, j; - - for (i = 0; i < ARRAY_SIZE(known_registers); i++) { - struct reg_debug *regs = known_registers[i].regs; - - for (j = 0; j < known_registers[i].count; j++) - if (regs[j].reg == address) - dump_reg(®s[j], val, - known_registers[i].description); - } -} - -static void -decode_register(char *name, uint32_t val) -{ - long int address; - char *end; - - address = strtoul(name, &end, 0); - - /* found a register address */ - if (address && *end == '\0') - decode_register_address(address, val); - else - decode_register_name(name, val); -} - -static void -intel_dump_other_regs(void) -{ - int i; - int fp, dpll; - int disp_pipe; - int n, m1, m2, m, p1, p2; - int ref; - int dot; - int phase; -#if 0 - int msr; - int crt; -#endif - -#if 0 - i830DumpIndexed(pScrn, "SR", 0x3c4, 0x3c5, 0, 7); - msr = INREG8(0x3cc); - printf("%20.20s: 0x%02x\n", - "MSR", (unsigned int)msr); - - i830DumpAR(pScrn); - if (msr & 1) - crt = 0x3d0; - else - crt = 0x3b0; - i830DumpIndexed(pScrn, "CR", crt + 4, crt + 5, 0, 0x24); -#endif - for (disp_pipe = 0; disp_pipe <= 1; disp_pipe++) { - fp = INREG(disp_pipe == 0 ? FPA0 : FPB0); - dpll = INREG(disp_pipe == 0 ? DPLL_A : DPLL_B); - if (IS_GEN2(devid)) { - uint32_t lvds = INREG(LVDS); - if (devid == PCI_CHIP_I855_GM && - (lvds & LVDS_PORT_EN) && - (lvds & LVDS_PIPEB_SELECT) == (disp_pipe << 30)) { - if ((lvds & LVDS_CLKB_POWER_MASK) == - LVDS_CLKB_POWER_UP) - p2 = 7; - else - p2 = 14; - switch ((dpll >> 16) & 0x3f) { - case 0x01: - p1 = 1; - break; - case 0x02: - p1 = 2; - break; - case 0x04: - p1 = 3; - break; - case 0x08: - p1 = 4; - break; - case 0x10: - p1 = 5; - break; - case 0x20: - p1 = 6; - break; - default: - p1 = 1; - printf("LVDS P1 0x%x invalid encoding\n", - (dpll >> 16) & 0x3f); - break; - } - } else { - if (dpll & (1 << 23)) - p2 = 4; - else - p2 = 2; - if (dpll & PLL_P1_DIVIDE_BY_TWO) - p1 = 2; - else - p1 = ((dpll >> 16) & 0x3f) + 2; - } - - switch ((dpll >> 13) & 0x3) { - case 0: - ref = 48000; - break; - case 3: - ref = 66000; - break; - default: - ref = 0; - printf("ref out of range\n"); - break; - } - } else { - uint32_t lvds = INREG(LVDS); - if ((lvds & LVDS_PORT_EN) && - (lvds & LVDS_PIPEB_SELECT) == (disp_pipe << 30)) { - if ((lvds & LVDS_CLKB_POWER_MASK) == - LVDS_CLKB_POWER_UP) - p2 = 7; - else - p2 = 14; - } else { - switch ((dpll >> 24) & 0x3) { - case 0: - p2 = 10; - break; - case 1: - p2 = 5; - break; - default: - p2 = 1; - printf("p2 out of range\n"); - break; - } - } - if (IS_IGD(devid)) - i = (dpll >> DPLL_FPA01_P1_POST_DIV_SHIFT_IGD) & - 0x1ff; - else - i = (dpll >> DPLL_FPA01_P1_POST_DIV_SHIFT) & - 0xff; - switch (i) { - case 1: - p1 = 1; - break; - case 2: - p1 = 2; - break; - case 4: - p1 = 3; - break; - case 8: - p1 = 4; - break; - case 16: - p1 = 5; - break; - case 32: - p1 = 6; - break; - case 64: - p1 = 7; - break; - case 128: - p1 = 8; - break; - case 256: - if (IS_IGD(devid)) { - p1 = 9; - break; - } /* fallback */ - default: - p1 = 1; - printf("p1 out of range\n"); - break; - } - - switch ((dpll >> 13) & 0x3) { - case 0: - ref = 96000; - break; - case 3: - ref = 100000; - break; - default: - ref = 0; - printf("ref out of range\n"); - break; - } - } - if (IS_965(devid)) { - phase = (dpll >> 9) & 0xf; - switch (phase) { - case 6: - break; - default: - printf("SDVO phase shift %d out of range -- probobly not " - "an issue.\n", phase); - break; - } - } - switch ((dpll >> 8) & 1) { - case 0: - break; - default: - printf("fp select out of range\n"); - break; - } - m1 = ((fp >> 8) & 0x3f); - if (IS_IGD(devid)) { - n = ffs((fp & FP_N_IGD_DIV_MASK) >> FP_N_DIV_SHIFT) - 1; - m2 = (fp & FP_M2_IGD_DIV_MASK) >> FP_M2_DIV_SHIFT; - m = m2 + 2; - dot = (ref * m) / n / (p1 * p2); - } else { - n = ((fp >> 16) & 0x3f); - m2 = ((fp >> 0) & 0x3f); - //m = 5 * (m1 + 2) + (m2 + 2); - dot = - (ref * (5 * (m1 + 2) + (m2 + 2)) / (n + 2)) / (p1 * - p2); - } - - printf("pipe %s dot %d n %d m1 %d m2 %d p1 %d p2 %d\n", - disp_pipe == 0 ? "A" : "B", dot, n, m1, m2, p1, p2); - } -} - -/* - * This program reads a lot of display registers. If we don't turn on the power - * well, dmesg will get flooded with tons of messages about unclaimed registers. - * So here we enable the "Debug" power well register and then restore its state - * later. It's impossible to guarantee that other things won't mess with the - * debug register between our put and get calls, but at least we're trying our - * best to keep things working fine, and it's the debug register anyway. - */ -static uint32_t power_well_get(void) -{ - uint32_t ret; - int i; - - if (!IS_HASWELL(devid)) - return 0; - - ret = INREG(HSW_PWR_WELL_CTL4) & HSW_PWR_WELL_ENABLE_REQUEST; - - OUTREG(HSW_PWR_WELL_CTL4, HSW_PWR_WELL_ENABLE_REQUEST); - - for (i = 0; i < 20; i++) { - if (INREG(HSW_PWR_WELL_CTL4) & HSW_PWR_WELL_STATE_ENABLED) - break; - usleep(1000); - } - - return ret; -} - -static void power_well_put(uint32_t power_well) -{ - if (!IS_HASWELL(devid)) - return; - - OUTREG(HSW_PWR_WELL_CTL4, power_well); -} - -static void print_usage(void) -{ - printf("Usage: intel_reg_dumper [options] [file]\n" - " intel_reg_dumper [options] register value\n" - "Options:\n" - " -d id when a dump file is used, use 'id' as device id (in " - "hex)\n" - " -h prints this help\n"); -} - -int main(int argc, char** argv) -{ - struct pci_device *pci_dev; - int opt, n_args; - char *file = NULL, *reg_name = NULL; - uint32_t reg_val, power_well; - - while ((opt = getopt(argc, argv, "d:h")) != -1) { - switch (opt) { - case 'd': - devid = strtol(optarg, NULL, 16); - break; - case 'h': - print_usage(); - return 0; - default: - print_usage(); - return 1; - } - } - - n_args = argc - optind; - if (n_args == 1) { - file = argv[optind]; - } else if (n_args == 2) { - reg_name = argv[optind]; - reg_val = strtoul(argv[optind + 1], NULL, 0); - } else if (n_args) { - print_usage(); - return 1; - } - - /* the tool operates in "single" mode, decode a single register given - * on the command line: intel_reg_dumper PCH_PP_CONTROL 0xabcd0002 */ - if (reg_name) { - decode_register(reg_name, reg_val); - return 0; - } - - if (file) { - intel_mmio_use_dump_file(file); - if (devid) { - if (IS_GEN5(devid)) - intel_pch = PCH_IBX; - else if (IS_GEN6(devid) || IS_IVYBRIDGE(devid)) - intel_pch = PCH_CPT; - else if (IS_HASWELL(devid)) - intel_pch = PCH_LPT; - else - intel_pch = PCH_NONE; - } else { - printf("Dumping from file without -d argument. " - "Assuming Ironlake machine.\n"); - devid = 0x0042; - intel_pch = PCH_IBX; - } - } else { - pci_dev = intel_get_pci_device(); - devid = pci_dev->device_id; - - intel_register_access_init(pci_dev, 1); - - if (HAS_PCH_SPLIT(devid)) - intel_check_pch(); - } - - power_well = power_well_get(); - - if (IS_HASWELL(devid) || IS_BROADWELL(devid)) { - intel_dump_regs(haswell_debug_regs); - } else if (IS_GEN5(devid) || IS_GEN6(devid) || IS_IVYBRIDGE(devid)) { - intel_dump_regs(ironlake_debug_regs); - } else if (IS_945GM(devid)) { - intel_dump_regs(i945gm_mi_regs); - intel_dump_regs(intel_debug_regs); - intel_dump_other_regs(); - } else { - intel_dump_regs(intel_debug_regs); - intel_dump_other_regs(); - } - - if (intel_gen(devid) >= 6) { - intel_dump_regs(gen6_fences); - intel_dump_regs(gen6_rp_debug_regs); - } - - power_well_put(power_well); - - intel_register_access_fini(); - return 0; -} diff --git a/tools/intel_reg_read.c b/tools/intel_reg_read.c deleted file mode 100644 index 3b912914..00000000 --- a/tools/intel_reg_read.c +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Copyright © 2010 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Zhenyu Wang <zhenyuw@linux.intel.com> - * - */ - -#include <unistd.h> -#include <stdlib.h> -#include <stdio.h> -#include <err.h> -#include <string.h> -#include "intel_io.h" -#include "intel_chipset.h" - -static void bit_decode(uint32_t reg) -{ - int i; - - for (i=31; i >= 0; i--) - printf(" %2d", i); - printf("\n"); - - for (i=31; i >= 0; i--) - printf(" %2d", (reg & (1 << i)) && 1); - printf("\n"); -} - -static void dump_range(uint32_t start, uint32_t end) -{ - int i; - - for (i = start; i < end; i += 4) - printf("0x%X : 0x%X\n", i, - *(volatile uint32_t *)((volatile char*)mmio + i)); -} - -static void usage(char *cmdname) -{ - printf("Usage: %s [-f|-d] [addr1] [addr2] .. [addrN]\n", cmdname); - printf("\t -f : read back full range of registers.\n"); - printf("\t WARNING! This option may result in a machine hang!\n"); - printf("\t -d : decode register bits.\n"); - printf("\t -c : number of dwords to dump (can't be used with -f/-d).\n"); - printf("\t addr : in 0xXXXX format\n"); -} - -int main(int argc, char** argv) -{ - int ret = 0; - uint32_t reg; - int i, ch; - char *cmdname = strdup(argv[0]); - int full_dump = 0; - int decode_bits = 0; - int dwords = 1; - - while ((ch = getopt(argc, argv, "dfhc:")) != -1) { - switch(ch) { - case 'd': - decode_bits = 1; - break; - case 'f': - full_dump = 1; - break; - case 'h': - usage(cmdname); - ret = 1; - goto out; - case 'c': - dwords = strtol(optarg, NULL, 0); - break; - } - } - argc -= optind; - argv += optind; - - if (argc < 1) { - usage(cmdname); - ret = 1; - goto out; - } - - if ((dwords > 1) && (argc != 1 || full_dump || decode_bits)) { - usage(cmdname); - ret = 1; - goto out; - } - - intel_register_access_init(intel_get_pci_device(), 0); - - if (full_dump) { - dump_range(0x00000, 0x00fff); /* VGA registers */ - dump_range(0x02000, 0x02fff); /* instruction, memory, interrupt control registers */ - dump_range(0x03000, 0x031ff); /* FENCE and PPGTT control registers */ - dump_range(0x03200, 0x03fff); /* frame buffer compression registers */ - dump_range(0x05000, 0x05fff); /* I/O control registers */ - dump_range(0x06000, 0x06fff); /* clock control registers */ - dump_range(0x07000, 0x07fff); /* 3D internal debug registers */ - dump_range(0x07400, 0x088ff); /* GPE debug registers */ - dump_range(0x0a000, 0x0afff); /* display palette registers */ - dump_range(0x10000, 0x13fff); /* MMIO MCHBAR */ - dump_range(0x30000, 0x3ffff); /* overlay registers */ - dump_range(0x60000, 0x6ffff); /* display engine pipeline registers */ - dump_range(0x70000, 0x72fff); /* display and cursor registers */ - dump_range(0x73000, 0x73fff); /* performance counters */ - } else { - for (i=0; i < argc; i++) { - sscanf(argv[i], "0x%x", ®); - dump_range(reg, reg + (dwords * 4)); - - if (decode_bits) - bit_decode(*(volatile uint32_t *)((volatile char*)mmio + reg)); - } - } - - intel_register_access_fini(); - -out: - free(cmdname); - return ret; -} - diff --git a/tools/intel_reg_snapshot.c b/tools/intel_reg_snapshot.c deleted file mode 100644 index b756bf69..00000000 --- a/tools/intel_reg_snapshot.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright © 2010 Red Hat, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: - * Adam Jackson <ajax@redhat.com> - */ - -#include <unistd.h> -#include <assert.h> -#include "intel_io.h" -#include "intel_chipset.h" - -int main(int argc, char** argv) -{ - struct pci_device *pci_dev; - uint32_t devid; - int mmio_bar; - int ret; - - pci_dev = intel_get_pci_device(); - devid = pci_dev->device_id; - intel_mmio_use_pci_bar(pci_dev); - - if (IS_GEN2(devid)) - mmio_bar = 1; - else - mmio_bar = 0; - - ret = write(1, mmio, pci_dev->regions[mmio_bar].size); - assert(ret > 0); - - return 0; -} diff --git a/tools/intel_reg_write.c b/tools/intel_reg_write.c deleted file mode 100644 index ff4e561e..00000000 --- a/tools/intel_reg_write.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright © 2007 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Ben Gamari <bgamari.foss@gmail.com> - * - */ - -#include <unistd.h> -#include <stdlib.h> -#include <stdio.h> -#include <err.h> -#include "intel_io.h" -#include "intel_chipset.h" - -int main(int argc, char** argv) -{ - uint32_t reg, value; - volatile uint32_t *ptr; - - if (argc < 3) { - printf("Usage: %s addr value\n", argv[0]); - printf(" WARNING: This is dangerous to you and your system's health.\n"); - printf(" Only for use in debugging.\n"); - exit(1); - } - - intel_register_access_init(intel_get_pci_device(), 0); - sscanf(argv[1], "0x%x", ®); - sscanf(argv[2], "0x%x", &value); - ptr = (volatile uint32_t *)((volatile char *)mmio + reg); - - printf("Value before: 0x%X\n", *ptr); - *ptr = value; - printf("Value after: 0x%X\n", *ptr); - - intel_register_access_fini(); - return 0; -} - diff --git a/tools/intel_stepping.c b/tools/intel_stepping.c deleted file mode 100644 index 7839ef59..00000000 --- a/tools/intel_stepping.c +++ /dev/null @@ -1,295 +0,0 @@ -/* - * Copyright © 2007 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Eric Anholt <eric@anholt.net> - * - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <stdarg.h> -#include <pciaccess.h> -#include <err.h> -#include "intel_chipset.h" -#include "intel_io.h" -#include "intel_reg.h" - -static void -print_clock(const char *name, int clock) { - if (clock == -1) - printf("%s clock: unknown", name); - else - printf("%s clock: %d Mhz", name, clock); -} - -static int -print_clock_info(struct pci_device *pci_dev) -{ - uint32_t devid = pci_dev->device_id; - uint16_t gcfgc; - - if (IS_GM45(devid)) { - int core_clock = -1; - - pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); - - switch (gcfgc & 0xf) { - case 8: - core_clock = 266; - break; - case 9: - core_clock = 320; - break; - case 11: - core_clock = 400; - break; - case 13: - core_clock = 533; - break; - } - print_clock("core", core_clock); - } else if (IS_965(devid) && IS_MOBILE(devid)) { - int render_clock = -1, sampler_clock = -1; - - pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); - - switch (gcfgc & 0xf) { - case 2: - render_clock = 250; sampler_clock = 267; - break; - case 3: - render_clock = 320; sampler_clock = 333; - break; - case 4: - render_clock = 400; sampler_clock = 444; - break; - case 5: - render_clock = 500; sampler_clock = 533; - break; - } - - print_clock("render", render_clock); - printf(" "); - print_clock("sampler", sampler_clock); - } else if (IS_945(devid) && IS_MOBILE(devid)) { - int render_clock = -1, display_clock = -1; - - pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); - - switch (gcfgc & 0x7) { - case 0: - render_clock = 166; - break; - case 1: - render_clock = 200; - break; - case 3: - render_clock = 250; - break; - case 5: - render_clock = 400; - break; - } - - switch (gcfgc & 0x70) { - case 0: - display_clock = 200; - break; - case 4: - display_clock = 320; - break; - } - if (gcfgc & (1 << 7)) - display_clock = 133; - - print_clock("render", render_clock); - printf(" "); - print_clock("display", display_clock); - } else if (IS_915(devid) && IS_MOBILE(devid)) { - int render_clock = -1, display_clock = -1; - - pci_device_cfg_read_u16(pci_dev, &gcfgc, I915_GCFGC); - - switch (gcfgc & 0x7) { - case 0: - render_clock = 160; - break; - case 1: - render_clock = 190; - break; - case 4: - render_clock = 333; - break; - } - if (gcfgc & (1 << 13)) - render_clock = 133; - - switch (gcfgc & 0x70) { - case 0: - display_clock = 190; - break; - case 4: - display_clock = 333; - break; - } - if (gcfgc & (1 << 7)) - display_clock = 133; - - print_clock("render", render_clock); - printf(" "); - print_clock("display", display_clock); - } - - printf("\n"); - return -1; -} - -int main(int argc, char **argv) -{ - struct pci_device *dev, *bridge; - int error; - uint8_t stepping; - const char *step_desc = "??"; - - error = pci_system_init(); - if (error != 0) { - fprintf(stderr, "Couldn't initialize PCI system: %s\n", - strerror(error)); - exit(1); - } - - /* Grab the graphics card */ - dev = pci_device_find_by_slot(0, 0, 2, 0); - if (dev == NULL) - errx(1, "Couldn't find graphics card"); - - error = pci_device_probe(dev); - if (error != 0) { - fprintf(stderr, "Couldn't probe graphics card: %s\n", - strerror(error)); - exit(1); - } - - if (dev->vendor_id != 0x8086) - errx(1, "Graphics card is non-intel"); - - bridge = pci_device_find_by_slot(0, 0, 0, 0); - if (dev == NULL) - errx(1, "Couldn't bridge"); - - error = pci_device_cfg_read_u8(bridge, &stepping, 8); - if (error != 0) { - fprintf(stderr, "Couldn't read revision ID: %s\n", - strerror(error)); - exit(1); - } - - switch (dev->device_id) { - case PCI_CHIP_I915_G: - if (stepping < 0x04) - step_desc = "<B1"; - else if (stepping == 0x04) - step_desc = "B1"; - else if (stepping == 0x0e) - step_desc = "C2"; - else if (stepping > 0x0e) - step_desc = ">C2"; - else - step_desc = ">B1 <C2"; - break; - case PCI_CHIP_I915_GM: - if (stepping < 0x03) - step_desc = "<B1"; - else if (stepping == 0x03) - step_desc = "B1/C0"; - else if (stepping == 0x04) - step_desc = "C1/C2"; - else - step_desc = ">C2"; - break; - case PCI_CHIP_I945_GM: - if (stepping < 0x03) - step_desc = "<A3"; - else if (stepping == 0x03) - step_desc = "A3"; - else - step_desc = ">A3"; - break; - case PCI_CHIP_I965_G: - case PCI_CHIP_I965_Q: - if (stepping < 0x02) - step_desc = "<C1"; - else if (stepping == 0x02) - step_desc = "C1/C2"; - else - step_desc = ">C2"; - break; - case PCI_CHIP_I965_GM: - if (stepping < 0x03) - step_desc = "<C0"; - else if (stepping == 0x03) - step_desc = "C0"; - else - step_desc = ">C0"; - break; - case PCI_CHIP_I965_G_1: - if (stepping < 0x03) - step_desc = "<E0"; - else if (stepping == 0x03) - step_desc = "E0"; - else - step_desc = ">E0"; - break; - case PCI_CHIP_GM45_GM: - if (stepping < 0x07) - step_desc = "<B3"; - else if (stepping == 0x03) - step_desc = "B3"; - else - step_desc = ">B3"; - break; - case PCI_CHIP_G45_G: - case PCI_CHIP_Q45_G: - case PCI_CHIP_G41_G: - if (stepping < 0x02) - step_desc = "<A2"; - else if (stepping == 0x02) - step_desc = "A2"; - else if (stepping == 0x03) - step_desc = "A3"; - else - step_desc = ">A3"; - break; - } - - printf("Vendor: 0x%04x, Device: 0x%04x, Revision: 0x%02x (%s)\n", - dev->vendor_id, - dev->device_id, - stepping, - step_desc); - - print_clock_info(dev); - - return 0; -} diff --git a/tools/intel_vga_read.c b/tools/intel_vga_read.c deleted file mode 100644 index e635c59c..00000000 --- a/tools/intel_vga_read.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Ville Syrjälä <ville.syrjala@linux.intel.com> - * - */ - -#include <assert.h> -#include <stdbool.h> -#include <stdint.h> -#include <stdio.h> -#include <unistd.h> -#include <sys/io.h> -#include "intel_io.h" -#include "intel_chipset.h" - -static uint8_t read_reg(uint32_t reg, bool use_mmio) -{ - if (use_mmio) - return *((volatile uint8_t *)mmio + reg); - else - return inb(reg); -} - -static void usage(const char *cmdname) -{ - printf("Usage: %s [-m] [addr1] [addr2] .. [addrN]\n", cmdname); - printf("\t -m : use MMIO instead of port IO\n"); - printf("\t addr : in 0xXXXX format\n"); -} - -int main(int argc, char *argv[]) -{ - bool use_mmio = false; - int ret = 0; - uint32_t reg; - int i, ch; - const char *cmdname = argv[0]; - - while ((ch = getopt(argc, argv, "m")) != -1) { - switch(ch) { - case 'm': - use_mmio = true; - break; - default: - break; - } - } - argc -= optind; - argv += optind; - - if (argc < 1) { - usage(cmdname); - return 1; - } - - if (use_mmio) - intel_register_access_init(intel_get_pci_device(), 0); - else - assert(iopl(3) == 0); - - for (i = 0; i < argc; i++) { - sscanf(argv[i], "0x%x", ®); - printf("0x%X : 0x%X\n", reg, read_reg(reg, use_mmio)); - } - - if (use_mmio) - intel_register_access_fini(); - else - iopl(0); - - return ret; -} - diff --git a/tools/intel_vga_write.c b/tools/intel_vga_write.c deleted file mode 100644 index 4fb09d6a..00000000 --- a/tools/intel_vga_write.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Ville Syrjälä <ville.syrjala@linux.intel.com> - * - */ - -#include <assert.h> -#include <stdbool.h> -#include <stdint.h> -#include <stdio.h> -#include <unistd.h> -#include <sys/io.h> -#include "intel_io.h" -#include "intel_chipset.h" - -static void write_reg(uint32_t reg, uint8_t val, bool use_mmio) -{ - if (use_mmio) - *((volatile uint8_t *)mmio + reg) = val; - else - outb(val, reg); -} - -static void usage(const char *cmdname) -{ - printf("Usage: %s [-m] addr value\n", cmdname); - printf("\t -m : use MMIO instead of port IO\n"); - printf("\t addr,value : in 0xXXXX format\n"); -} - -int main(int argc, char *argv[]) -{ - bool use_mmio = false; - int ret = 0; - uint32_t reg, val; - int ch; - const char *cmdname = argv[0]; - - while ((ch = getopt(argc, argv, "m")) != -1) { - switch(ch) { - case 'm': - use_mmio = true; - break; - default: - break; - } - } - argc -= optind; - argv += optind; - - if (argc < 2) { - usage(cmdname); - return 1; - } - - sscanf(argv[0], "0x%x", ®); - sscanf(argv[1], "0x%x", &val); - - if (use_mmio) - intel_register_access_init(intel_get_pci_device(), 0); - else - assert(iopl(3) == 0); - - write_reg(reg, val, use_mmio); - - if (use_mmio) - intel_register_access_fini(); - else - iopl(0); - - return ret; -} - diff --git a/tools/null_state_gen/.gitignore b/tools/null_state_gen/.gitignore deleted file mode 100644 index 170bcef7..00000000 --- a/tools/null_state_gen/.gitignore +++ /dev/null @@ -1 +0,0 @@ -intel_null_state_gen diff --git a/tools/null_state_gen/Makefile.am b/tools/null_state_gen/Makefile.am deleted file mode 100644 index bf8cbdb9..00000000 --- a/tools/null_state_gen/Makefile.am +++ /dev/null @@ -1,28 +0,0 @@ -GPU_TOOLS_PATH := $(top_srcdir) -AM_CPPFLAGS = -I$(top_srcdir) - -noinst_PROGRAMS = intel_null_state_gen - -intel_null_state_gen_SOURCES = \ - intel_batchbuffer.c \ - intel_batchbuffer.h \ - intel_renderstate_gen6.c \ - intel_renderstate_gen7.c \ - intel_renderstate_gen8.c \ - intel_renderstate_gen9.c \ - intel_null_state_gen.c - -gens := 6 7 8 9 - -h = /tmp/intel_renderstate_gen$$gen.c -states: intel_null_state_gen - for gen in $(gens); do \ - head -n 22 intel_null_state_gen.c >$(h); \ - if test -d $(GPU_TOOLS_PATH)/.git; then \ - echo -n " * Generated by: " >>$(h); \ - git describe >>$(h); \ - fi; \ - echo " */" >>$(h); \ - echo "" >>$(h); \ - ./intel_null_state_gen $$gen >>$(h); \ - done diff --git a/tools/null_state_gen/intel_batchbuffer.c b/tools/null_state_gen/intel_batchbuffer.c deleted file mode 100644 index a31ea38e..00000000 --- a/tools/null_state_gen/intel_batchbuffer.c +++ /dev/null @@ -1,291 +0,0 @@ -/************************************************************************** - * - * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Copyright 2014 Intel Corporation - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <errno.h> -#include <assert.h> - -#include "intel_batchbuffer.h" - -void bb_area_emit(struct bb_area *a, uint32_t dword, item_type type, const char *str) -{ - struct bb_item *item; - assert(a != NULL); - assert(a->num_items < MAX_ITEMS); - item = &a->item[a->num_items]; - - item->data = dword; - item->type = type; - strncpy(item->str, str, MAX_STRLEN); - item->str[MAX_STRLEN - 1] = 0; - - a->num_items++; -} - -void bb_area_emit_offset(struct bb_area *a, unsigned offset, uint32_t dword, item_type type, const char *str) -{ - const unsigned i = offset / 4; - struct bb_item *item; - assert(a != NULL); - assert(a->num_items < MAX_ITEMS); - assert(i < a->num_items); - item = &a->item[i]; - - item->data = dword; - item->type = type; - strncpy(item->str, str, MAX_STRLEN); - item->str[MAX_STRLEN - 1] = 0; -} - -static struct bb_item *bb_area_get(struct bb_area *a, unsigned i) -{ - assert (i < a->num_items); - return &a->item[i]; -} - -static unsigned bb_area_items(struct bb_area *a) -{ - return a->num_items; -} - -static unsigned long bb_area_used(struct bb_area *a) -{ - assert(a != NULL); - assert(a->num_items <= MAX_ITEMS); - - return a->num_items * 4; -} - -static unsigned long bb_area_room(struct bb_area *a) -{ - assert (a != NULL); - assert (a->num_items <= MAX_ITEMS); - - return (MAX_ITEMS - a->num_items) * 4; -} - -struct intel_batchbuffer *intel_batchbuffer_create(void) -{ - struct intel_batchbuffer *batch; - - batch = calloc(1, sizeof(*batch)); - if (batch == NULL) - return NULL; - - batch->cmds = calloc(1, sizeof(struct bb_area)); - if (batch->cmds == NULL) { - free(batch); - return NULL; - } - - batch->state = calloc(1, sizeof(struct bb_area)); - if (batch->state == NULL) { - free(batch->cmds); - free(batch); - return NULL; - } - - batch->state_start_offset = -1; - batch->cmds_end_offset = -1; - - return batch; -} - -static void bb_area_align(struct bb_area *a, unsigned align) -{ - if (align == 0) - return; - - assert((align % 4) == 0); - - while ((a->num_items * 4) % align != 0) - bb_area_emit(a, 0, PAD, "align pad"); -} - -static int reloc_exists(struct intel_batchbuffer *batch, uint32_t offset) -{ - int i; - - for (i = 0; i < batch->cmds->num_items; i++) - if ((batch->cmds->item[i].type == RELOC || - batch->cmds->item[i].type == RELOC_STATE) && - i * 4 == offset) - return 1; - - return 0; -} - -int intel_batch_is_reloc(struct intel_batchbuffer *batch, unsigned i) -{ - return reloc_exists(batch, i * 4); -} - -static void intel_batch_cmd_align(struct intel_batchbuffer *batch, unsigned align) -{ - bb_area_align(batch->cmds, align); -} - -static void intel_batch_state_align(struct intel_batchbuffer *batch, unsigned align) -{ - bb_area_align(batch->state, align); -} - -unsigned intel_batch_num_cmds(struct intel_batchbuffer *batch) -{ - return bb_area_items(batch->cmds); -} - -static unsigned intel_batch_num_state(struct intel_batchbuffer *batch) -{ - return bb_area_items(batch->state); -} - -struct bb_item *intel_batch_cmd_get(struct intel_batchbuffer *batch, unsigned i) -{ - return bb_area_get(batch->cmds, i); -} - -struct bb_item *intel_batch_state_get(struct intel_batchbuffer *batch, unsigned i) -{ - return bb_area_get(batch->state, i); -} - -uint32_t intel_batch_state_offset(struct intel_batchbuffer *batch, unsigned align) -{ - intel_batch_state_align(batch, align); - return bb_area_used(batch->state); -} - -uint32_t intel_batch_state_alloc(struct intel_batchbuffer *batch, unsigned bytes, unsigned align, - const char *str) -{ - unsigned offset; - unsigned dwords = bytes/4; - assert ((bytes % 4) == 0); - assert (bb_area_room(batch->state) >= bytes); - - offset = intel_batch_state_offset(batch, align); - - while (dwords--) - bb_area_emit(batch->state, 0, UNINITIALIZED, str); - - return offset; -} - -uint32_t intel_batch_state_copy(struct intel_batchbuffer *batch, - void *d, unsigned bytes, - unsigned align, - const char *str) -{ - unsigned offset; - unsigned i; - unsigned dwords = bytes/4; - assert (d); - assert ((bytes % 4) == 0); - assert (bb_area_room(batch->state) >= bytes); - - offset = intel_batch_state_offset(batch, align); - - for (i = 0; i < dwords; i++) { - char offsetinside[80]; - sprintf(offsetinside, "%s: 0x%x", str, i * 4); - - uint32_t *s = (uint32_t *)(uint8_t *)d + i; - bb_area_emit(batch->state, *s, STATE, offsetinside); - } - - return offset; -} - -void intel_batch_relocate_state(struct intel_batchbuffer *batch) -{ - unsigned int i; - - assert (batch->state_start_offset == -1); - - batch->cmds_end_offset = bb_area_used(batch->cmds) - 4; - - /* Hardcoded, could track max align done also */ - intel_batch_cmd_align(batch, 64); - - batch->state_start_offset = bb_area_used(batch->cmds); - - for (i = 0; i < bb_area_items(batch->state); i++) { - const struct bb_item *s = bb_area_get(batch->state, i); - - bb_area_emit(batch->cmds, s->data, s->type, s->str); - } - - for (i = 0; i < bb_area_items(batch->cmds); i++) { - struct bb_item *s = bb_area_get(batch->cmds, i); - - if (s->type == STATE_OFFSET || s->type == RELOC_STATE) - s->data += batch->state_start_offset; - } -} - -const char *intel_batch_type_as_str(const struct bb_item *item) -{ - switch (item->type) { - case UNINITIALIZED: - return "UNINITIALIZED"; - case CMD: - return "CMD"; - case STATE: - return "STATE"; - case PAD: - return "PAD"; - case RELOC: - return "RELOC"; - case RELOC_STATE: - return "RELOC_STATE"; - case STATE_OFFSET: - return "STATE_OFFSET"; - } - - return "UNKNOWN"; -} - -void intel_batch_cmd_emit_null(struct intel_batchbuffer *batch, - const int cmd, const int len, const int len_bias, - const char *str) -{ - int i; - - assert(len > 1); - assert((len - len_bias) >= 0); - - bb_area_emit(batch->cmds, (cmd | (len - len_bias)), CMD, str); - - for (i = len_bias-1; i < len; i++) - OUT_BATCH(0); -} diff --git a/tools/null_state_gen/intel_batchbuffer.h b/tools/null_state_gen/intel_batchbuffer.h deleted file mode 100644 index 8b87c020..00000000 --- a/tools/null_state_gen/intel_batchbuffer.h +++ /dev/null @@ -1,104 +0,0 @@ -/************************************************************************** - * - * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Copyright 2014 Intel Corporation - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#ifndef _INTEL_BATCHBUFFER_H -#define _INTEL_BATCHBUFFER_H - -#include <stdint.h> - -#define MAX_RELOCS 64 -#define MAX_ITEMS 1024 -#define MAX_STRLEN 256 - -#define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1)) - -typedef enum { - UNINITIALIZED, - CMD, - STATE, - RELOC, - RELOC_STATE, - STATE_OFFSET, - PAD, -} item_type; - -struct bb_item { - uint32_t data; - item_type type; - char str[MAX_STRLEN]; -}; - -struct bb_area { - struct bb_item item[MAX_ITEMS]; - unsigned long num_items; -}; - -struct intel_batchbuffer { - struct bb_area *cmds; - struct bb_area *state; - unsigned long cmds_end_offset; - unsigned long state_start_offset; -}; - -struct intel_batchbuffer *intel_batchbuffer_create(void); - -#define OUT_CMD_B(cmd, len, bias) intel_batch_cmd_emit_null(batch, (cmd), (len), (bias), #cmd " " #len) -#define OUT_CMD(cmd, len) OUT_CMD_B(cmd, len, 2) - -#define OUT_BATCH(d) bb_area_emit(batch->cmds, d, CMD, #d) -#define OUT_BATCH_STATE_OFFSET(d) bb_area_emit(batch->cmds, d, STATE_OFFSET, #d) -#define OUT_RELOC(batch, read_domain, write_domain, d) bb_area_emit(batch->cmds, d, RELOC, #d) -#define OUT_RELOC_STATE(batch, read_domain, write_domain, d) bb_area_emit(batch->cmds, d, RELOC_STATE, #d); -#define OUT_STATE(d) bb_area_emit(batch->state, d, STATE, #d) -#define OUT_STATE_OFFSET(offset) bb_area_emit(batch->state, offset, STATE_OFFSET, #offset) -#define OUT_STATE_STRUCT(name, align) intel_batch_state_copy(batch, &name, sizeof(name), align, #name " " #align) - -uint32_t intel_batch_state_copy(struct intel_batchbuffer *batch, void *d, unsigned bytes, unsigned align, - const char *name); -uint32_t intel_batch_state_alloc(struct intel_batchbuffer *batch, unsigned bytes, unsigned align, - const char *name); -uint32_t intel_batch_state_offset(struct intel_batchbuffer *batch, unsigned align); -unsigned intel_batch_num_cmds(struct intel_batchbuffer *batch); - -struct bb_item *intel_batch_cmd_get(struct intel_batchbuffer *batch, unsigned i); -int intel_batch_is_reloc(struct intel_batchbuffer *batch, unsigned i); - -void intel_batch_relocate_state(struct intel_batchbuffer *batch); - -const char *intel_batch_type_as_str(const struct bb_item *item); - -void bb_area_emit(struct bb_area *a, uint32_t dword, item_type type, const char *str); -void bb_area_emit_offset(struct bb_area *a, unsigned i, uint32_t dword, item_type type, const char *str); - -void intel_batch_cmd_emit_null(struct intel_batchbuffer *batch, - const int cmd, - const int len, const int len_bias, - const char *str); -#endif diff --git a/tools/null_state_gen/intel_null_state_gen.c b/tools/null_state_gen/intel_null_state_gen.c deleted file mode 100644 index 8024ac3d..00000000 --- a/tools/null_state_gen/intel_null_state_gen.c +++ /dev/null @@ -1,165 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Mika Kuoppala <mika.kuoppala@intel.com> - * Armin Reese <armin.c.reese@intel.com> - */ - -#include <stdio.h> -#include <stdlib.h> -#include <errno.h> -#include <assert.h> - -#include "intel_batchbuffer.h" - -extern int gen6_setup_null_render_state(struct intel_batchbuffer *batch); -extern int gen7_setup_null_render_state(struct intel_batchbuffer *batch); -extern int gen8_setup_null_render_state(struct intel_batchbuffer *batch); -extern int gen9_setup_null_render_state(struct intel_batchbuffer *batch); - -static int debug = 0; - -static void print_usage(char *s) -{ - fprintf(stderr, "%s: <gen>\n" - " gen: gen to generate for (6,7,8,9)\n", - s); -} - -/* Creates the intel_renderstate_genX.c file for the particular - * GEN product - */ -static int print_state(int gen, struct intel_batchbuffer *batch) -{ - int i; - unsigned long cmds; - - fprintf(stderr, "Generating for gen%d\n", gen); - - printf("#include \"intel_renderstate.h\"\n\n"); - - /* Relocation offsets. These are byte offsets in the golden context - * batch buffer where the BB graphics address will be added to - * the indirect state offset already stored in those locations. The - * resulting value will inform the GPU where the indirect states are. - */ - printf("static const u32 gen%d_null_state_relocs[] = {\n", gen); - for (i = 0; i < batch->cmds->num_items; i++) { - if (intel_batch_is_reloc(batch, i)) - printf("\t0x%08x,\n", i * 4); - } - printf("\t-1,\n};\n\n"); - - /* GPU commands to execute to set up the RCS golden state. This - * state will become the default config. - */ - printf("static const u32 gen%d_null_state_batch[] = {\n", gen); - for (i = 0; i < intel_batch_num_cmds(batch); i++) { - const int offset = i * 4; - const struct bb_item *cmd = intel_batch_cmd_get(batch, i); - printf("\t0x%08x,", cmd->data); - - if (debug) - printf("\t /* 0x%08x %s '%s' */", offset, - intel_batch_type_as_str(cmd), cmd->str); - - if (offset == batch->cmds_end_offset) { - cmds = i + 1; - printf("\t /* cmds end */"); - } - - if (intel_batch_is_reloc(batch, i)) - printf("\t /* reloc */"); - - if (offset == batch->state_start_offset) - printf("\t /* state start */"); - - if (i == intel_batch_num_cmds(batch) - 1) - printf("\t /* state end */"); - - printf("\n"); - } - - printf("};\n\nRO_RENDERSTATE(%d);\n", gen); - - fprintf(stderr, "Commands %lu (%lu bytes)\n", cmds, cmds * 4); - fprintf(stderr, "State %lu (%lu bytes)\n", batch->state->num_items, batch->state->num_items * 4); - fprintf(stderr, "Total %lu (%lu bytes)\n", batch->cmds->num_items, batch->cmds->num_items * 4); - fprintf(stderr, "\n"); - - return 0; -} - -/* Selects generator function for the given product and executes it. */ -static int do_generate(int gen) -{ - struct intel_batchbuffer *batch; - int ret = -EINVAL; - int (*null_state_gen)(struct intel_batchbuffer *batch) = NULL; - - batch = intel_batchbuffer_create(); - if (batch == NULL) - return -ENOMEM; - - switch (gen) { - case 6: - null_state_gen = gen6_setup_null_render_state; - break; - - case 7: - null_state_gen = gen7_setup_null_render_state; - break; - - case 8: - null_state_gen = gen8_setup_null_render_state; - break; - case 9: - null_state_gen = gen9_setup_null_render_state; - break; - } - - if (null_state_gen == NULL) { - printf("no generator found for %d\n", gen); - return -EINVAL; - } - - null_state_gen(batch); - intel_batch_relocate_state(batch); - - ret = print_state(gen, batch); - - return ret; -} - -int main(int argc, char *argv[]) -{ - if (argc < 2) { - print_usage(argv[0]); - return 1; - } - - if (argc > 2) - debug = 1; - - return do_generate(atoi(argv[1])); -} diff --git a/tools/null_state_gen/intel_renderstate_gen6.c b/tools/null_state_gen/intel_renderstate_gen6.c deleted file mode 100644 index f18bb12f..00000000 --- a/tools/null_state_gen/intel_renderstate_gen6.c +++ /dev/null @@ -1,501 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Mika Kuoppala <mika.kuoppala@intel.com> - */ - -#include "intel_batchbuffer.h" -#include <lib/gen6_render.h> -#include <lib/intel_reg.h> -#include <string.h> - -static const uint32_t ps_kernel_nomask_affine[][4] = { - { 0x0060005a, 0x204077be, 0x000000c0, 0x008d0040 }, - { 0x0060005a, 0x206077be, 0x000000c0, 0x008d0080 }, - { 0x0060005a, 0x208077be, 0x000000d0, 0x008d0040 }, - { 0x0060005a, 0x20a077be, 0x000000d0, 0x008d0080 }, - { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, - { 0x02800031, 0x21c01cc9, 0x00000020, 0x0a8a0001 }, - { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, - { 0x00600001, 0x206003be, 0x008d01e0, 0x00000000 }, - { 0x00600001, 0x208003be, 0x008d0200, 0x00000000 }, - { 0x00600001, 0x20a003be, 0x008d0220, 0x00000000 }, - { 0x00600001, 0x20c003be, 0x008d0240, 0x00000000 }, - { 0x00600001, 0x20e003be, 0x008d0260, 0x00000000 }, - { 0x00600001, 0x210003be, 0x008d0280, 0x00000000 }, - { 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 }, - { 0x05800031, 0x24001cc8, 0x00000040, 0x90019000 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, -}; - -static uint32_t -gen6_bind_buf_null(struct intel_batchbuffer *batch) -{ - struct gen6_surface_state ss; - memset(&ss, 0, sizeof(ss)); - - return OUT_STATE_STRUCT(ss, 32); -} - -static uint32_t -gen6_bind_surfaces(struct intel_batchbuffer *batch) -{ - unsigned offset; - - offset = intel_batch_state_alloc(batch, 32, 32, "bind surfaces"); - - bb_area_emit_offset(batch->state, offset, gen6_bind_buf_null(batch), STATE_OFFSET, "bind 1"); - bb_area_emit_offset(batch->state, offset + 4, gen6_bind_buf_null(batch), STATE_OFFSET, "bind 2"); - - return offset; -} - -static void -gen6_emit_sip(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_STATE_SIP | 0); - OUT_BATCH(0); -} - -static void -gen6_emit_urb(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_URB | (3 - 2)); - OUT_BATCH((1 - 1) << GEN6_3DSTATE_URB_VS_SIZE_SHIFT | - 24 << GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT); /* at least 24 on GEN6 */ - OUT_BATCH(0 << GEN6_3DSTATE_URB_GS_SIZE_SHIFT | - 0 << GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT); /* no GS thread */ -} - -static void -gen6_emit_state_base_address(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (10 - 2)); - OUT_BATCH(0); /* general */ - OUT_RELOC(batch, - I915_GEM_DOMAIN_INSTRUCTION, 0, - BASE_ADDRESS_MODIFY); - OUT_RELOC(batch, /* instruction */ - I915_GEM_DOMAIN_INSTRUCTION, 0, - BASE_ADDRESS_MODIFY); - OUT_BATCH(0); /* indirect */ - OUT_RELOC(batch, - I915_GEM_DOMAIN_INSTRUCTION, 0, - BASE_ADDRESS_MODIFY); - - /* upper bounds, disable */ - OUT_BATCH(0); - OUT_BATCH(BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - OUT_BATCH(BASE_ADDRESS_MODIFY); -} - -static void -gen6_emit_viewports(struct intel_batchbuffer *batch, uint32_t cc_vp) -{ - OUT_BATCH(GEN6_3DSTATE_VIEWPORT_STATE_POINTERS | - GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC | - (4 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH_STATE_OFFSET(cc_vp); -} - -static void -gen6_emit_vs(struct intel_batchbuffer *batch) -{ - /* disable VS constant buffer */ - OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - - OUT_BATCH(GEN6_3DSTATE_VS | (6 - 2)); - OUT_BATCH(0); /* no VS kernel */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); /* pass-through */ -} - -static void -gen6_emit_gs(struct intel_batchbuffer *batch) -{ - /* disable GS constant buffer */ - OUT_BATCH(GEN6_3DSTATE_CONSTANT_GS | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - - OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2)); - OUT_BATCH(0); /* no GS kernel */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); /* pass-through */ -} - -static void -gen6_emit_clip(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); /* pass-through */ - OUT_BATCH(0); -} - -static void -gen6_emit_wm_constants(struct intel_batchbuffer *batch) -{ - /* disable WM constant buffer */ - OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void -gen6_emit_null_depth_buffer(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_DEPTH_BUFFER | (7 - 2)); - OUT_BATCH(GEN6_SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | - GEN6_DEPTHFORMAT_D32_FLOAT << GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - - OUT_BATCH(GEN6_3DSTATE_CLEAR_PARAMS | (2 - 2)); - OUT_BATCH(0); -} - -static void -gen6_emit_invariant(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D); - - OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | (3 - 2)); - OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | - GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ - OUT_BATCH(0); - - OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); - OUT_BATCH(1); -} - -static void -gen6_emit_cc(struct intel_batchbuffer *batch, uint32_t blend) -{ - OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS | (4 - 2)); - OUT_BATCH_STATE_OFFSET(blend | 1); - OUT_BATCH(1024 | 1); - OUT_BATCH(1024 | 1); -} - -static void -gen6_emit_sampler(struct intel_batchbuffer *batch, uint32_t state) -{ - OUT_BATCH(GEN6_3DSTATE_SAMPLER_STATE_POINTERS | - GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS | - (4 - 2)); - OUT_BATCH(0); /* VS */ - OUT_BATCH(0); /* GS */ - OUT_BATCH_STATE_OFFSET(state); -} - -static void -gen6_emit_sf(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_SF | (20 - 2)); - OUT_BATCH(1 << GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT | - 1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT | - 1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT); - OUT_BATCH(0); - OUT_BATCH(GEN6_3DSTATE_SF_CULL_NONE); - OUT_BATCH(2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); /* DW4 */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); /* DW9 */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); /* DW14 */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); /* DW19 */ -} - -static void -gen6_emit_wm(struct intel_batchbuffer *batch, int kernel) -{ - OUT_BATCH(GEN6_3DSTATE_WM | (9 - 2)); - OUT_BATCH_STATE_OFFSET(kernel); - OUT_BATCH(1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT | - 2 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT); - OUT_BATCH(0); - OUT_BATCH(6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT); /* DW4 */ - OUT_BATCH((40 - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT | - GEN6_3DSTATE_WM_DISPATCH_ENABLE | - GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); - OUT_BATCH(1 << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT | - GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void -gen6_emit_binding_table(struct intel_batchbuffer *batch, uint32_t wm_table) -{ - OUT_BATCH(GEN6_3DSTATE_BINDING_TABLE_POINTERS | - GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS | - (4 - 2)); - OUT_BATCH(0); /* vs */ - OUT_BATCH(0); /* gs */ - OUT_BATCH_STATE_OFFSET(wm_table); -} - -static void -gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); - OUT_BATCH(0xffffffff); - OUT_BATCH(0 | 0); - OUT_BATCH(0); -} - -static void -gen6_emit_vertex_elements(struct intel_batchbuffer *batch) -{ - /* The VUE layout - * dword 0-3: pad (0.0, 0.0, 0.0. 0.0) - * dword 4-7: position (x, y, 1.0, 1.0), - * dword 8-11: texture coordinate 0 (u0, v0, 0, 0) - * - * dword 4-11 are fetched from vertex buffer - */ - OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (2 * 3 + 1 - 2)); - - OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | - 0 << VE0_OFFSET_SHIFT); - OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); - - /* x,y */ - OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | - 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ - OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | - GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | - GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT | - GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); - - /* u0, v0 */ - OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | - 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ - OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | - GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); -} - -static uint32_t -gen6_create_cc_viewport(struct intel_batchbuffer *batch) -{ - struct gen6_cc_viewport vp; - - memset(&vp, 0, sizeof(vp)); - - vp.min_depth = -1.e35; - vp.max_depth = 1.e35; - - return OUT_STATE_STRUCT(vp, 32); -} - -static uint32_t -gen6_create_cc_blend(struct intel_batchbuffer *batch) -{ - struct gen6_blend_state blend; - - memset(&blend, 0, sizeof(blend)); - - blend.blend0.dest_blend_factor = GEN6_BLENDFACTOR_ZERO; - blend.blend0.source_blend_factor = GEN6_BLENDFACTOR_ONE; - blend.blend0.blend_func = GEN6_BLENDFUNCTION_ADD; - blend.blend0.blend_enable = 1; - - blend.blend1.post_blend_clamp_enable = 1; - blend.blend1.pre_blend_clamp_enable = 1; - - return OUT_STATE_STRUCT(blend, 64); -} - -static uint32_t -gen6_create_kernel(struct intel_batchbuffer *batch) -{ - return intel_batch_state_copy(batch, ps_kernel_nomask_affine, - sizeof(ps_kernel_nomask_affine), - 64, "ps_kernel"); -} - -static uint32_t -gen6_create_sampler(struct intel_batchbuffer *batch, - sampler_filter_t filter, - sampler_extend_t extend) -{ - struct gen6_sampler_state ss; - - memset(&ss, 0, sizeof(ss)); - - ss.ss0.lod_preclamp = 1; /* GL mode */ - - /* We use the legacy mode to get the semantics specified by - * the Render extension. */ - ss.ss0.border_color_mode = GEN6_BORDER_COLOR_MODE_LEGACY; - - switch (filter) { - default: - case SAMPLER_FILTER_NEAREST: - ss.ss0.min_filter = GEN6_MAPFILTER_NEAREST; - ss.ss0.mag_filter = GEN6_MAPFILTER_NEAREST; - break; - case SAMPLER_FILTER_BILINEAR: - ss.ss0.min_filter = GEN6_MAPFILTER_LINEAR; - ss.ss0.mag_filter = GEN6_MAPFILTER_LINEAR; - break; - } - - switch (extend) { - default: - case SAMPLER_EXTEND_NONE: - ss.ss1.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; - ss.ss1.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; - ss.ss1.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; - break; - case SAMPLER_EXTEND_REPEAT: - ss.ss1.r_wrap_mode = GEN6_TEXCOORDMODE_WRAP; - ss.ss1.s_wrap_mode = GEN6_TEXCOORDMODE_WRAP; - ss.ss1.t_wrap_mode = GEN6_TEXCOORDMODE_WRAP; - break; - case SAMPLER_EXTEND_PAD: - ss.ss1.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; - ss.ss1.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; - ss.ss1.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; - break; - case SAMPLER_EXTEND_REFLECT: - ss.ss1.r_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; - ss.ss1.s_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; - ss.ss1.t_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; - break; - } - - return OUT_STATE_STRUCT(ss, 32); -} - -static uint32_t -gen6_create_vertex_buffer(struct intel_batchbuffer *batch) -{ - uint16_t v[2]; - - v[0] = 0; - v[1] = 0; - - return intel_batch_state_copy(batch, v, sizeof(v), 8, "vertex buffer"); -} - -static void gen6_emit_vertex_buffer(struct intel_batchbuffer *batch) -{ - uint32_t offset; - - offset = gen6_create_vertex_buffer(batch); - - OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | 3); - OUT_BATCH(VB0_VERTEXDATA | - 0 << VB0_BUFFER_INDEX_SHIFT | - VB0_NULL_VERTEX_BUFFER | - 0 << VB0_BUFFER_PITCH_SHIFT); - OUT_RELOC_STATE(batch, I915_GEM_DOMAIN_VERTEX, 0, offset); - OUT_RELOC_STATE(batch, I915_GEM_DOMAIN_VERTEX, 0, offset); - OUT_BATCH(0); -} - -void gen6_setup_null_render_state(struct intel_batchbuffer *batch) -{ - uint32_t wm_state, wm_kernel, wm_table; - uint32_t cc_vp, cc_blend; - - wm_table = gen6_bind_surfaces(batch); - wm_kernel = gen6_create_kernel(batch); - wm_state = gen6_create_sampler(batch, - SAMPLER_FILTER_NEAREST, - SAMPLER_EXTEND_NONE); - - cc_vp = gen6_create_cc_viewport(batch); - cc_blend = gen6_create_cc_blend(batch); - - gen6_emit_invariant(batch); - gen6_emit_state_base_address(batch); - - gen6_emit_sip(batch); - gen6_emit_urb(batch); - - gen6_emit_viewports(batch, cc_vp); - gen6_emit_vs(batch); - gen6_emit_gs(batch); - gen6_emit_clip(batch); - gen6_emit_wm_constants(batch); - gen6_emit_null_depth_buffer(batch); - - gen6_emit_drawing_rectangle(batch); - gen6_emit_cc(batch, cc_blend); - gen6_emit_sampler(batch, wm_state); - gen6_emit_sf(batch); - gen6_emit_wm(batch, wm_kernel); - gen6_emit_vertex_elements(batch); - gen6_emit_binding_table(batch, wm_table); - - gen6_emit_vertex_buffer(batch); - - OUT_BATCH(MI_BATCH_BUFFER_END); -} diff --git a/tools/null_state_gen/intel_renderstate_gen7.c b/tools/null_state_gen/intel_renderstate_gen7.c deleted file mode 100644 index a48fb272..00000000 --- a/tools/null_state_gen/intel_renderstate_gen7.c +++ /dev/null @@ -1,456 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Mika Kuoppala <mika.kuoppala@intel.com> - */ - -#include "intel_batchbuffer.h" -#include <lib/gen7_render.h> -#include <lib/intel_reg.h> -#include <string.h> - -static const uint32_t ps_kernel[][4] = { - { 0x0080005a, 0x2e2077bd, 0x000000c0, 0x008d0040 }, - { 0x0080005a, 0x2e6077bd, 0x000000d0, 0x008d0040 }, - { 0x02800031, 0x21801fa9, 0x008d0e20, 0x08840001 }, - { 0x00800001, 0x2e2003bd, 0x008d0180, 0x00000000 }, - { 0x00800001, 0x2e6003bd, 0x008d01c0, 0x00000000 }, - { 0x00800001, 0x2ea003bd, 0x008d0200, 0x00000000 }, - { 0x00800001, 0x2ee003bd, 0x008d0240, 0x00000000 }, - { 0x05800031, 0x20001fa8, 0x008d0e20, 0x90031000 }, -}; - -static uint32_t -gen7_bind_buf_null(struct intel_batchbuffer *batch) -{ - return intel_batch_state_alloc(batch, 32, 32, "bind buf null"); -} - -static void -gen7_emit_vertex_elements(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS | - ((2 * (1 + 2)) + 1 - 2)); - - OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | - GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT << - GEN7_VE0_FORMAT_SHIFT | - 0 << GEN7_VE0_OFFSET_SHIFT); - - OUT_BATCH(GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_0_SHIFT | - GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_1_SHIFT | - GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | - GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_3_SHIFT); - - /* x,y */ - OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | - GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | - 0 << GEN7_VE0_OFFSET_SHIFT); /* offsets vb in bytes */ - OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | - GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | - GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | - GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT); - - /* s,t */ - OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | - GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | - 4 << GEN7_VE0_OFFSET_SHIFT); /* offset vb in bytes */ - OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | - GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | - GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | - GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT); -} - -static uint32_t -gen7_create_vertex_buffer(struct intel_batchbuffer *batch) -{ - uint16_t *v; - - return intel_batch_state_alloc(batch, 12*sizeof(*v), 8, "vertex buffer"); -} - -static void gen7_emit_vertex_buffer(struct intel_batchbuffer *batch) -{ - uint32_t offset; - - offset = gen7_create_vertex_buffer(batch); - - OUT_BATCH(GEN7_3DSTATE_VERTEX_BUFFERS | (5 - 2)); - OUT_BATCH(0 << GEN7_VB0_BUFFER_INDEX_SHIFT | - GEN7_VB0_VERTEXDATA | - GEN7_VB0_ADDRESS_MODIFY_ENABLE | - GEN7_VB0_NULL_VERTEX_BUFFER | - 4*2 << GEN7_VB0_BUFFER_PITCH_SHIFT); - - OUT_RELOC_STATE(batch, I915_GEM_DOMAIN_VERTEX, 0, offset); - OUT_BATCH(~0); - OUT_BATCH(0); -} - -static uint32_t -gen7_bind_surfaces(struct intel_batchbuffer *batch) -{ - unsigned offset; - - offset = intel_batch_state_alloc(batch, 8, 32, "bind surfaces"); - - bb_area_emit_offset(batch->state, offset, gen7_bind_buf_null(batch), STATE_OFFSET, "bind 1"); - bb_area_emit_offset(batch->state, offset + 4, gen7_bind_buf_null(batch), STATE_OFFSET, "bind 2"); - - return offset; -} - -static void -gen7_emit_binding_table(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); - OUT_BATCH_STATE_OFFSET(gen7_bind_surfaces(batch)); -} - -static void -gen7_emit_drawing_rectangle(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); - /* Purposedly set min > max for null rectangle */ - OUT_BATCH(0xffffffff); - OUT_BATCH(0 | 0); - OUT_BATCH(0); -} - -static uint32_t -gen7_create_blend_state(struct intel_batchbuffer *batch) -{ - struct gen7_blend_state blend; - memset(&blend, 0, sizeof(blend)); - - blend.blend0.dest_blend_factor = GEN7_BLENDFACTOR_ZERO; - blend.blend0.source_blend_factor = GEN7_BLENDFACTOR_ONE; - blend.blend0.blend_func = GEN7_BLENDFUNCTION_ADD; - blend.blend1.post_blend_clamp_enable = 1; - blend.blend1.pre_blend_clamp_enable = 1; - - return OUT_STATE_STRUCT(blend, 64); -} - -static void -gen7_emit_state_base_address(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2)); - OUT_BATCH(0); - OUT_RELOC(batch, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); - OUT_RELOC(batch, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - OUT_RELOC(batch, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); - - OUT_BATCH(0); - OUT_BATCH(0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - OUT_BATCH(0 | BASE_ADDRESS_MODIFY); -} - -static uint32_t -gen7_create_cc_viewport(struct intel_batchbuffer *batch) -{ - struct gen7_cc_viewport vp; - memset(&vp, 0, sizeof(vp)); - - vp.min_depth = -1.e35; - vp.max_depth = 1.e35; - - return OUT_STATE_STRUCT(vp, 32); -} - -static void -gen7_emit_cc(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); - OUT_BATCH_STATE_OFFSET(gen7_create_blend_state(batch)); - - OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); - OUT_BATCH_STATE_OFFSET(gen7_create_cc_viewport(batch)); -} - -static uint32_t -gen7_create_sampler(struct intel_batchbuffer *batch) -{ - struct gen7_sampler_state ss; - memset(&ss, 0, sizeof(ss)); - - ss.ss0.min_filter = GEN7_MAPFILTER_NEAREST; - ss.ss0.mag_filter = GEN7_MAPFILTER_NEAREST; - - ss.ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; - ss.ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; - ss.ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; - - ss.ss3.non_normalized_coord = 1; - - return OUT_STATE_STRUCT(ss, 32); -} - -static void -gen7_emit_sampler(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2)); - OUT_BATCH_STATE_OFFSET(gen7_create_sampler(batch)); -} - -static void -gen7_emit_multisample(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE | (4 - 2)); - OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | - GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ - OUT_BATCH(0); - OUT_BATCH(0); - - OUT_BATCH(GEN7_3DSTATE_SAMPLE_MASK | (2 - 2)); - OUT_BATCH(1); -} - -static void -gen7_emit_urb(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); - OUT_BATCH(8); /* in 1KBs */ - - /* num of VS entries must be divisible by 8 if size < 9 */ - OUT_BATCH(GEN7_3DSTATE_URB_VS | (2 - 2)); - OUT_BATCH((64 << GEN7_URB_ENTRY_NUMBER_SHIFT) | - (2 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT | - (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); - - OUT_BATCH(GEN7_3DSTATE_URB_HS | (2 - 2)); - OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | - (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); - - OUT_BATCH(GEN7_3DSTATE_URB_DS | (2 - 2)); - OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | - (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); - - OUT_BATCH(GEN7_3DSTATE_URB_GS | (2 - 2)); - OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | - (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); -} - -static void -gen7_emit_vs(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_VS | (6 - 2)); - OUT_BATCH(0); /* no VS kernel */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); /* pass-through */ -} - -static void -gen7_emit_hs(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_HS | (7 - 2)); - OUT_BATCH(0); /* no HS kernel */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); /* pass-through */ -} - -static void -gen7_emit_te(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_TE | (4 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void -gen7_emit_ds(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_DS | (6 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void -gen7_emit_gs(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_GS | (7 - 2)); - OUT_BATCH(0); /* no GS kernel */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); /* pass-through */ -} - -static void -gen7_emit_streamout(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (3 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void -gen7_emit_sf(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_SF | (7 - 2)); - OUT_BATCH(0); - OUT_BATCH(GEN7_3DSTATE_SF_CULL_NONE); - OUT_BATCH(2 << GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void -gen7_emit_sbe(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_SBE | (14 - 2)); - OUT_BATCH(1 << GEN7_SBE_NUM_OUTPUTS_SHIFT | - 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | - 1 << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT); - OUT_BATCH(0); - OUT_BATCH(0); /* dw4 */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); /* dw8 */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); /* dw12 */ - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void -gen7_emit_ps(struct intel_batchbuffer *batch) -{ - int threads; - -#if 0 /* XXX: Do we need separate state for hsw or not */ - if (IS_HASWELL(batch->dev)) - threads = 40 << HSW_PS_MAX_THREADS_SHIFT | - 1 << HSW_PS_SAMPLE_MASK_SHIFT; - else -#endif - threads = 40 << IVB_PS_MAX_THREADS_SHIFT; - - OUT_BATCH(GEN7_3DSTATE_PS | (8 - 2)); - OUT_BATCH_STATE_OFFSET(intel_batch_state_copy(batch, ps_kernel, - sizeof(ps_kernel), 64, "ps kernel")); - OUT_BATCH(1 << GEN7_PS_SAMPLER_COUNT_SHIFT | - 2 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT); - OUT_BATCH(0); /* scratch address */ - OUT_BATCH(threads | - GEN7_PS_16_DISPATCH_ENABLE | - GEN7_PS_ATTRIBUTE_ENABLE); - OUT_BATCH(6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void -gen7_emit_clip(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_CLIP | (4 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); /* pass-through */ - OUT_BATCH(0); - - OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2)); - OUT_BATCH(0); -} - -static void -gen7_emit_wm(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_WM | (3 - 2)); - OUT_BATCH(GEN7_WM_DISPATCH_ENABLE | - GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); - OUT_BATCH(0); -} - -static void -gen7_emit_null_depth_buffer(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2)); - OUT_BATCH(GEN7_SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | - GEN7_DEPTHFORMAT_D32_FLOAT << - GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); - OUT_BATCH(0); /* disable depth, stencil and hiz */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - - OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); -} - -void gen7_setup_null_render_state(struct intel_batchbuffer *batch) -{ - int ret; - - OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_3D); - - gen7_emit_state_base_address(batch); - gen7_emit_multisample(batch); - gen7_emit_urb(batch); - gen7_emit_vs(batch); - gen7_emit_hs(batch); - gen7_emit_te(batch); - gen7_emit_ds(batch); - gen7_emit_gs(batch); - gen7_emit_clip(batch); - gen7_emit_sf(batch); - gen7_emit_wm(batch); - gen7_emit_streamout(batch); - gen7_emit_null_depth_buffer(batch); - - gen7_emit_cc(batch); - gen7_emit_sampler(batch); - gen7_emit_sbe(batch); - gen7_emit_ps(batch); - gen7_emit_vertex_elements(batch); - gen7_emit_vertex_buffer(batch); - gen7_emit_binding_table(batch); - gen7_emit_drawing_rectangle(batch); - - OUT_BATCH(GEN7_3DPRIMITIVE | (7 - 2)); - OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST); - OUT_BATCH(3); - OUT_BATCH(0); - OUT_BATCH(1); /* single instance */ - OUT_BATCH(0); /* start instance location */ - OUT_BATCH(0); /* index buffer offset, ignored */ - - OUT_BATCH(MI_BATCH_BUFFER_END); -} diff --git a/tools/null_state_gen/intel_renderstate_gen8.c b/tools/null_state_gen/intel_renderstate_gen8.c deleted file mode 100644 index 2d7a4b0e..00000000 --- a/tools/null_state_gen/intel_renderstate_gen8.c +++ /dev/null @@ -1,441 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Mika Kuoppala <mika.kuoppala@intel.com> - */ - -#include "intel_batchbuffer.h" -#include <lib/gen8_render.h> -#include <lib/intel_reg.h> -#include <string.h> - -static void gen8_emit_wm(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2)); - OUT_BATCH(GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION); -} - -static void gen8_emit_ps(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_PS | (12 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); /* kernel hi */ - OUT_BATCH(GEN7_PS_SPF_MODE); - OUT_BATCH(0); /* scratch space stuff */ - OUT_BATCH(0); /* scratch hi */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); // kernel 1 - OUT_BATCH(0); /* kernel 1 hi */ - OUT_BATCH(0); // kernel 2 - OUT_BATCH(0); /* kernel 2 hi */ -} - -static void gen8_emit_sf(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_SF | (4 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(1 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT | - 1 << GEN6_3DSTATE_SF_VERTEX_SUB_PIXEL_PRECISION_SHIFT | - GEN7_SF_POINT_WIDTH_FROM_SOURCE | - 8); -} - -static void gen8_emit_vs(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_VS | (9 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(GEN7_VS_FLOATING_POINT_MODE_ALTERNATE); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void gen8_emit_hs(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_HS | (9 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT); - OUT_BATCH(0); -} - -static void gen8_emit_raster(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN8_3DSTATE_RASTER | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0.0); - OUT_BATCH(0.0); - OUT_BATCH(0.0); -} - -static void gen8_emit_urb(struct intel_batchbuffer *batch) -{ - const int vs_entries = 64; - const int vs_size = 2; - const int vs_start = 4; - - OUT_BATCH(GEN7_3DSTATE_URB_VS); - OUT_BATCH(vs_entries | ((vs_size - 1) << 16) | (vs_start << 25)); - - OUT_BATCH(GEN7_3DSTATE_URB_HS); - OUT_BATCH(0x0f << 25); - - OUT_BATCH(GEN7_3DSTATE_URB_DS); - OUT_BATCH(0x0f << 25); - - OUT_BATCH(GEN7_3DSTATE_URB_GS); - OUT_BATCH(0x0f << 25); -} - -static void gen8_emit_vf_topology(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN8_3DSTATE_VF_TOPOLOGY); - OUT_BATCH(_3DPRIM_TRILIST); -} - -static void gen8_emit_so_decl_list(struct intel_batchbuffer *batch) -{ - const int num_decls = 128; - int i; - - OUT_BATCH(GEN8_3DSTATE_SO_DECL_LIST | ((2 * num_decls) + 1)); - OUT_BATCH(0); - OUT_BATCH(num_decls); - - for (i = 0; i < num_decls; i++) { - OUT_BATCH(0); - OUT_BATCH(0); - } -} - -static void gen8_emit_so_buffer(struct intel_batchbuffer *batch, const int index) -{ - OUT_BATCH(GEN8_3DSTATE_SO_BUFFER | (8 - 2)); - OUT_BATCH(index << 29); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void gen8_emit_state_base_address(struct intel_batchbuffer *batch) { - const unsigned offset = 0; - OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (16 - 2)); - - /* general */ - OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - - /* stateless data port */ - OUT_BATCH(0); - - /* surface state base addess */ - OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - - /* dynamic state base address */ - OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - - /* indirect */ - OUT_BATCH(BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - - /* instruction */ - OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - - /* general state buffer size */ - OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); - /* dynamic state buffer size */ - OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); - /* indirect object buffer size */ - OUT_BATCH(0 | BUFFER_SIZE_MODIFY); - /* intruction buffer size */ - OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); -} - -static void gen8_emit_chroma_key(struct intel_batchbuffer *batch, const int index) -{ - OUT_BATCH(GEN6_3DSTATE_CHROMA_KEY | (4 - 2)); - OUT_BATCH(index << 30); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void gen8_emit_vertex_buffers(struct intel_batchbuffer *batch) -{ - const int buffers = 33; - int i; - - OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | ((4 * buffers) - 1)); - - for (i = 0; i < buffers; i++) { - OUT_BATCH(i << VB0_BUFFER_INDEX_SHIFT | - GEN7_VB0_BUFFER_ADDR_MOD_EN); - OUT_BATCH(0); /* Addr */ - OUT_BATCH(0); - OUT_BATCH(0); - } -} - -static void gen6_emit_vertex_elements(struct intel_batchbuffer *batch) -{ - const int elements = 34; - int i; - - OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | ((2 * elements - 1))); - - for (i = 0; i < elements; i++) { - if (i == 0) { - OUT_BATCH(VE0_VALID | i); - OUT_BATCH( - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT - ); - } else { - OUT_BATCH(0); - OUT_BATCH(0); - } - } -} - -static void gen8_emit_cc_state_pointers(struct intel_batchbuffer *batch) -{ - union { - float fval; - uint32_t uval; - } u; - - unsigned offset; - - u.fval = 1.0f; - - offset = intel_batch_state_offset(batch, 64); - OUT_STATE(0); - OUT_STATE(0); /* Alpha reference value */ - OUT_STATE(u.uval); /* Blend constant color RED */ - OUT_STATE(u.uval); /* Blend constant color BLUE */ - OUT_STATE(u.uval); /* Blend constant color GREEN */ - OUT_STATE(u.uval); /* Blend constant color ALPHA */ - - OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS); - OUT_BATCH_STATE_OFFSET(offset | 1); -} - -static void gen8_emit_blend_state_pointers(struct intel_batchbuffer *batch) -{ - unsigned offset; - int i; - - offset = intel_batch_state_offset(batch, 64); - - for (i = 0; i < 17; i++) - OUT_STATE(0); - - OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); - OUT_BATCH_STATE_OFFSET(offset | 1); -} - -static void gen8_emit_ps_extra(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN8_3DSTATE_PS_EXTRA | (2 - 2)); - OUT_BATCH(GEN8_PSX_PIXEL_SHADER_VALID | - GEN8_PSX_ATTRIBUTE_ENABLE); - -} - -static void gen8_emit_ps_blend(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN8_3DSTATE_PS_BLEND | (2 - 2)); - OUT_BATCH(GEN8_PS_BLEND_HAS_WRITEABLE_RT); -} - -static void gen8_emit_viewport_state_pointers_cc(struct intel_batchbuffer *batch) -{ - unsigned offset; - - offset = intel_batch_state_offset(batch, 32); - - OUT_STATE((uint32_t)0.0f); /* Minimum depth */ - OUT_STATE((uint32_t)0.0f); /* Maximum depth */ - - OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); - OUT_BATCH_STATE_OFFSET(offset); -} - -static void gen8_emit_viewport_state_pointers_sf_clip(struct intel_batchbuffer *batch) -{ - unsigned offset; - int i; - - offset = intel_batch_state_offset(batch, 64); - - for (i = 0; i < 16; i++) - OUT_STATE(0); - - OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP | (2 - 2)); - OUT_BATCH_STATE_OFFSET(offset); -} - -static void gen8_emit_primitive(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DPRIMITIVE | (7-2)); - OUT_BATCH(4); /* gen8+ ignore the topology type field */ - OUT_BATCH(1); /* vertex count */ - OUT_BATCH(0); - OUT_BATCH(1); /* single instance */ - OUT_BATCH(0); /* start instance location */ - OUT_BATCH(0); /* index buffer offset, ignored */ -} - -int gen8_setup_null_render_state(struct intel_batchbuffer *batch) -{ - int ret; - int i; - -#define GEN8_PIPE_CONTROL_GLOBAL_GTT (1 << 24) - - OUT_BATCH(GEN6_PIPE_CONTROL | (6 - 2)); - OUT_BATCH(GEN8_PIPE_CONTROL_GLOBAL_GTT); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - - OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D); - - gen8_emit_wm(batch); - gen8_emit_ps(batch); - gen8_emit_sf(batch); - - OUT_CMD(GEN7_3DSTATE_SBE, 4); - OUT_CMD(GEN8_3DSTATE_SBE_SWIZ, 11); - - gen8_emit_vs(batch); - gen8_emit_hs(batch); - - OUT_CMD(GEN7_3DSTATE_GS, 10); - OUT_CMD(GEN7_3DSTATE_STREAMOUT, 5); - OUT_CMD(GEN7_3DSTATE_DS, 9); - OUT_CMD(GEN6_3DSTATE_CLIP, 4); - gen8_emit_raster(batch); - OUT_CMD(GEN7_3DSTATE_TE, 4); - OUT_CMD(GEN8_3DSTATE_VF, 2); - OUT_CMD(GEN8_3DSTATE_WM_HZ_OP, 5); - - gen8_emit_urb(batch); - - OUT_CMD(GEN8_3DSTATE_BIND_TABLE_POOL_ALLOC, 4); - OUT_CMD(GEN8_3DSTATE_GATHER_POOL_ALLOC, 4); - OUT_CMD(GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC, 4); - OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS, 2); - OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS, 2); - OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS, 2); - OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS, 2); - OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS, 2); - OUT_CMD(GEN6_3DSTATE_CONSTANT_VS, 11); - OUT_CMD(GEN7_3DSTATE_CONSTANT_HS, 11); - OUT_CMD(GEN7_3DSTATE_CONSTANT_DS, 11); - OUT_CMD(GEN7_3DSTATE_CONSTANT_GS, 11); - OUT_CMD(GEN7_3DSTATE_CONSTANT_PS, 11); - OUT_CMD(GEN8_3DSTATE_VF_INSTANCING, 3); - OUT_CMD(GEN8_3DSTATE_VF_SGVS, 2); - - gen8_emit_vf_topology(batch); - gen8_emit_so_decl_list(batch); - - gen8_emit_so_buffer(batch, 0); - gen8_emit_so_buffer(batch, 1); - gen8_emit_so_buffer(batch, 2); - gen8_emit_so_buffer(batch, 3); - - gen8_emit_state_base_address(batch); - - OUT_CMD(GEN6_STATE_SIP, 3); - OUT_CMD(GEN6_3DSTATE_DRAWING_RECTANGLE, 4); - OUT_CMD(GEN7_3DSTATE_DEPTH_BUFFER, 8); - - gen8_emit_chroma_key(batch, 0); - gen8_emit_chroma_key(batch, 1); - gen8_emit_chroma_key(batch, 2); - gen8_emit_chroma_key(batch, 3); - - OUT_CMD(GEN6_3DSTATE_LINE_STIPPLE, 3); - OUT_CMD(GEN6_3DSTATE_AA_LINE_PARAMS, 3); - OUT_CMD(GEN7_3DSTATE_STENCIL_BUFFER, 5); - OUT_CMD(GEN7_3DSTATE_HIER_DEPTH_BUFFER, 5); - OUT_CMD(GEN7_3DSTATE_CLEAR_PARAMS, 3); - OUT_CMD(GEN6_3DSTATE_MONOFILTER_SIZE, 2); - OUT_CMD(GEN8_3DSTATE_MULTISAMPLE, 2); - OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_OFFSET, 2); - OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_PATTERN, 33); - OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0, 16 + 1); - OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1, 16 + 1); - OUT_CMD(GEN6_3DSTATE_INDEX_BUFFER, 5); - - gen8_emit_vertex_buffers(batch); - gen6_emit_vertex_elements(batch); - - OUT_BATCH(GEN6_3DSTATE_VF_STATISTICS | 1); /* Enable */ - - OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS, 2); - OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS, 2); - OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS, 2); - OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS, 2); - OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS, 2); - - gen8_emit_cc_state_pointers(batch); - gen8_emit_blend_state_pointers(batch); - - gen8_emit_ps_extra(batch); - gen8_emit_ps_blend(batch); - - OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS, 2); - OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS, 2); - OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS, 2); - OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS, 2); - OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS, 2); - - OUT_CMD(GEN6_3DSTATE_SCISSOR_STATE_POINTERS, 2); - - gen8_emit_viewport_state_pointers_cc(batch); - gen8_emit_viewport_state_pointers_sf_clip(batch); - - gen8_emit_primitive(batch); - - OUT_BATCH(MI_BATCH_BUFFER_END); -} diff --git a/tools/null_state_gen/intel_renderstate_gen9.c b/tools/null_state_gen/intel_renderstate_gen9.c deleted file mode 100644 index 6f808f81..00000000 --- a/tools/null_state_gen/intel_renderstate_gen9.c +++ /dev/null @@ -1,477 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Armin Reese <armin.c.reese@intel.com> - * Mika Kuoppala <mika.kuoppala@intel.com> - */ - -#include "intel_batchbuffer.h" -#include <lib/gen9_render.h> -#include <lib/intel_reg.h> - -static void gen8_emit_wm(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2)); - OUT_BATCH(GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION); -} - -static void gen8_emit_ps(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_PS | (12 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); /* kernel hi */ - OUT_BATCH(GEN7_PS_SPF_MODE); - OUT_BATCH(0); /* scratch space stuff */ - OUT_BATCH(0); /* scratch hi */ - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); // kernel 1 - OUT_BATCH(0); /* kernel 1 hi */ - OUT_BATCH(0); // kernel 2 - OUT_BATCH(0); /* kernel 2 hi */ -} - -static void gen8_emit_sf(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_SF | (4 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(1 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT | - 1 << GEN6_3DSTATE_SF_VERTEX_SUB_PIXEL_PRECISION_SHIFT | - GEN7_SF_POINT_WIDTH_FROM_SOURCE | - 8); -} - -static void gen8_emit_vs(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DSTATE_VS | (9 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(GEN7_VS_FLOATING_POINT_MODE_ALTERNATE); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void gen8_emit_hs(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN7_3DSTATE_HS | (9 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT); - OUT_BATCH(0); -} - -static void gen8_emit_raster(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN8_3DSTATE_RASTER | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0.0); - OUT_BATCH(0.0); - OUT_BATCH(0.0); -} - -static void gen8_emit_urb(struct intel_batchbuffer *batch) -{ - const int vs_entries = 64; - const int vs_size = 2; - const int vs_start = 4; - - OUT_BATCH(GEN7_3DSTATE_URB_VS); - OUT_BATCH(vs_entries | ((vs_size - 1) << 16) | (vs_start << 25)); - - OUT_BATCH(GEN7_3DSTATE_URB_HS); - OUT_BATCH(0x0f << 25); - - OUT_BATCH(GEN7_3DSTATE_URB_DS); - OUT_BATCH(0x0f << 25); - - OUT_BATCH(GEN7_3DSTATE_URB_GS); - OUT_BATCH(0x0f << 25); -} - -static void gen8_emit_vf_topology(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN8_3DSTATE_VF_TOPOLOGY); - OUT_BATCH(_3DPRIM_TRILIST); -} - -static void gen8_emit_so_decl_list(struct intel_batchbuffer *batch) -{ - const int num_decls = 128; - int i; - - OUT_BATCH(GEN8_3DSTATE_SO_DECL_LIST | - (((2 * num_decls) + 3) - 2) /* DWORD count - 2 */); - OUT_BATCH(0); - OUT_BATCH(num_decls); - - for (i = 0; i < num_decls; i++) { - OUT_BATCH(0); - OUT_BATCH(0); - } -} - -static void gen8_emit_so_buffer(struct intel_batchbuffer *batch, const int index) -{ - OUT_BATCH(GEN8_3DSTATE_SO_BUFFER | (8 - 2)); - OUT_BATCH(index << 29); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void gen8_emit_chroma_key(struct intel_batchbuffer *batch, const int index) -{ - OUT_BATCH(GEN6_3DSTATE_CHROMA_KEY | (4 - 2)); - OUT_BATCH(index << 30); - OUT_BATCH(0); - OUT_BATCH(0); -} - -static void gen8_emit_vertex_buffers(struct intel_batchbuffer *batch) -{ - const int buffers = 33; - int i; - - OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | - (((4 * buffers) + 1)- 2) /* DWORD count - 2 */); - - for (i = 0; i < buffers; i++) { - OUT_BATCH(i << VB0_BUFFER_INDEX_SHIFT | - GEN7_VB0_BUFFER_ADDR_MOD_EN); - OUT_BATCH(0); /* Address */ - OUT_BATCH(0); - OUT_BATCH(0); - } -} - -static void gen8_emit_vertex_elements(struct intel_batchbuffer *batch) -{ - const int elements = 34; - int i; - - OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | - (((2 * elements) + 1) - 2) /* DWORD count - 2 */); - - /* Element 0 */ - OUT_BATCH(VE0_VALID); - OUT_BATCH( - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | - GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); - /* Elements 1 -> 33 */ - for (i = 1; i < elements; i++) { - OUT_BATCH(0); - OUT_BATCH(0); - } -} - -static void gen8_emit_cc_state_pointers(struct intel_batchbuffer *batch) -{ - union { - float fval; - uint32_t uval; - } u; - - unsigned offset; - - u.fval = 1.0f; - - offset = intel_batch_state_offset(batch, 64); - OUT_STATE(0); - OUT_STATE(0); /* Alpha reference value */ - OUT_STATE(u.uval); /* Blend constant color RED */ - OUT_STATE(u.uval); /* Blend constant color BLUE */ - OUT_STATE(u.uval); /* Blend constant color GREEN */ - OUT_STATE(u.uval); /* Blend constant color ALPHA */ - - OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS); - OUT_BATCH_STATE_OFFSET(offset | 1); -} - -static void gen8_emit_blend_state_pointers(struct intel_batchbuffer *batch) -{ - unsigned offset; - int i; - - offset = intel_batch_state_offset(batch, 64); - - for (i = 0; i < 17; i++) - OUT_STATE(0); - - OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); - OUT_BATCH_STATE_OFFSET(offset | 1); -} - -static void gen8_emit_ps_extra(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN8_3DSTATE_PS_EXTRA | (2 - 2)); - OUT_BATCH(GEN8_PSX_PIXEL_SHADER_VALID | - GEN8_PSX_ATTRIBUTE_ENABLE); - -} - -static void gen8_emit_ps_blend(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN8_3DSTATE_PS_BLEND | (2 - 2)); - OUT_BATCH(GEN8_PS_BLEND_HAS_WRITEABLE_RT); -} - -static void gen8_emit_viewport_state_pointers_cc(struct intel_batchbuffer *batch) -{ - unsigned offset; - - offset = intel_batch_state_offset(batch, 32); - - OUT_STATE((uint32_t)0.0f); /* Minimum depth */ - OUT_STATE((uint32_t)0.0f); /* Maximum depth */ - - OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); - OUT_BATCH_STATE_OFFSET(offset); -} - -static void gen8_emit_viewport_state_pointers_sf_clip(struct intel_batchbuffer *batch) -{ - unsigned offset; - int i; - - offset = intel_batch_state_offset(batch, 64); - - for (i = 0; i < 16; i++) - OUT_STATE(0); - - OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP | (2 - 2)); - OUT_BATCH_STATE_OFFSET(offset); -} - -static void gen8_emit_primitive(struct intel_batchbuffer *batch) -{ - OUT_BATCH(GEN6_3DPRIMITIVE | (7-2)); - OUT_BATCH(4); /* gen8+ ignore the topology type field */ - OUT_BATCH(1); /* vertex count */ - OUT_BATCH(0); - OUT_BATCH(1); /* single instance */ - OUT_BATCH(0); /* start instance location */ - OUT_BATCH(0); /* index buffer offset, ignored */ -} - -static void gen9_emit_state_base_address(struct intel_batchbuffer *batch) { - const unsigned offset = 0; - OUT_BATCH(GEN6_STATE_BASE_ADDRESS | - (19 - 2) /* DWORD count - 2 */); - - /* general state base address - requires BB address - * added to state offset to be stored in this location - */ - OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - - /* stateless data port */ - OUT_BATCH(0); - - /* surface state base address - requires BB address - * added to state offset to be stored in this location - */ - OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - - /* dynamic state base address - requires BB address - * added to state offset to be stored in this location - */ - OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - - /* indirect state base address */ - OUT_BATCH(BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - - /* instruction state base address - requires BB address - * added to state offset to be stored in this location - */ - OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY); - OUT_BATCH(0); - - /* general state buffer size */ - OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); - /* dynamic state buffer size */ - OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); - /* indirect object buffer size */ - OUT_BATCH(0x0 | BUFFER_SIZE_MODIFY); - /* intruction buffer size */ - OUT_BATCH(GEN8_STATE_SIZE_PAGES(1) | BUFFER_SIZE_MODIFY); - - /* bindless surface state base address */ - OUT_BATCH(0); - OUT_BATCH(0); - /* bindless surface state size */ - OUT_BATCH(0); -} - -/* - * Generate the batch buffer commands needed to initialize the 3D engine - * to its "golden state". - */ -int gen9_setup_null_render_state(struct intel_batchbuffer *batch) -{ - int ret; - int i; - -#define GEN8_PIPE_CONTROL_GLOBAL_GTT (1 << 24) - /* PIPE_CONTROL */ - OUT_BATCH(GEN6_PIPE_CONTROL | - (6 - 2)); /* DWORD count - 2 */ - OUT_BATCH(GEN8_PIPE_CONTROL_GLOBAL_GTT); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - - /* PIPELINE_SELECT */ - OUT_BATCH(GEN9_PIPELINE_SELECT | PIPELINE_SELECT_3D); - - gen8_emit_wm(batch); - gen8_emit_ps(batch); - gen8_emit_sf(batch); - - OUT_CMD(GEN7_3DSTATE_SBE, 6); /* Check w/ Gen8 code */ - OUT_CMD(GEN8_3DSTATE_SBE_SWIZ, 11); - - gen8_emit_vs(batch); - gen8_emit_hs(batch); - - OUT_CMD(GEN7_3DSTATE_GS, 10); - OUT_CMD(GEN7_3DSTATE_STREAMOUT, 5); - OUT_CMD(GEN7_3DSTATE_DS, 11); /* Check w/ Gen8 code */ - OUT_CMD(GEN6_3DSTATE_CLIP, 4); - gen8_emit_raster(batch); - OUT_CMD(GEN7_3DSTATE_TE, 4); - OUT_CMD(GEN8_3DSTATE_VF, 2); - OUT_CMD(GEN8_3DSTATE_WM_HZ_OP, 5); - - /* URB States */ - gen8_emit_urb(batch); - - OUT_CMD(GEN8_3DSTATE_BIND_TABLE_POOL_ALLOC, 4); - OUT_CMD(GEN8_3DSTATE_GATHER_POOL_ALLOC, 4); - OUT_CMD(GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC, 4); - - /* Push Constants */ - OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS, 2); - OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS, 2); - OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS, 2); - OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS, 2); - OUT_CMD(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS, 2); - - /* Constants */ - OUT_CMD(GEN6_3DSTATE_CONSTANT_VS, 11); - OUT_CMD(GEN7_3DSTATE_CONSTANT_HS, 11); - OUT_CMD(GEN7_3DSTATE_CONSTANT_DS, 11); - OUT_CMD(GEN7_3DSTATE_CONSTANT_GS, 11); - OUT_CMD(GEN7_3DSTATE_CONSTANT_PS, 11); - - OUT_CMD(GEN8_3DSTATE_VF_INSTANCING, 3); - OUT_CMD(GEN8_3DSTATE_VF_SGVS, 2); - gen8_emit_vf_topology(batch); - - /* Streamer out declaration list */ - gen8_emit_so_decl_list(batch); - - /* Streamer out buffers */ - for (i = 0; i < 4; i++) { - gen8_emit_so_buffer(batch, i); - } - - /* State base addresses */ - gen9_emit_state_base_address(batch); - - OUT_CMD(GEN6_STATE_SIP, 3); - OUT_CMD(GEN6_3DSTATE_DRAWING_RECTANGLE, 4); - OUT_CMD(GEN7_3DSTATE_DEPTH_BUFFER, 8); - - /* Chroma key */ - for (i = 0; i < 4; i++) { - gen8_emit_chroma_key(batch, i); - } - - OUT_CMD(GEN6_3DSTATE_LINE_STIPPLE, 3); - OUT_CMD(GEN6_3DSTATE_AA_LINE_PARAMS, 3); - OUT_CMD(GEN7_3DSTATE_STENCIL_BUFFER, 5); - OUT_CMD(GEN7_3DSTATE_HIER_DEPTH_BUFFER, 5); - OUT_CMD(GEN7_3DSTATE_CLEAR_PARAMS, 3); - OUT_CMD(GEN6_3DSTATE_MONOFILTER_SIZE, 2); - OUT_CMD(GEN8_3DSTATE_MULTISAMPLE, 2); - OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_OFFSET, 2); - OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_PATTERN, 1 + 32); - OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0, 1 + 16); - OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1, 1 + 16); - OUT_CMD(GEN6_3DSTATE_INDEX_BUFFER, 5); - - /* Vertex buffers */ - gen8_emit_vertex_buffers(batch); - gen8_emit_vertex_elements(batch); - OUT_CMD(GEN9_3DSTATE_COMPONENT_PACKING, 5); - - OUT_BATCH(GEN6_3DSTATE_VF_STATISTICS | 1 /* Enable */); - - gen8_emit_cc_state_pointers(batch); - gen8_emit_blend_state_pointers(batch); - gen8_emit_ps_extra(batch); - gen8_emit_ps_blend(batch); - - /* 3D state sampler state pointers */ - OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS, 2); - OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS, 2); - OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS, 2); - OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS, 2); - OUT_CMD(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS, 2); - - OUT_CMD(GEN6_3DSTATE_SCISSOR_STATE_POINTERS, 2); - - gen8_emit_viewport_state_pointers_cc(batch); - gen8_emit_viewport_state_pointers_sf_clip(batch); - - /* 3D state binding table pointers */ - OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS, 2); - OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS, 2); - OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS, 2); - OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS, 2); - OUT_CMD(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS, 2); - - /* Launch 3D operation */ - gen8_emit_primitive(batch); - - OUT_BATCH(MI_BATCH_BUFFER_END); - - return ret; -} diff --git a/tools/quick_dump/.gitignore b/tools/quick_dump/.gitignore deleted file mode 100644 index 918a66bb..00000000 --- a/tools/quick_dump/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -chipset_wrap_python.c -chipset.py diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am deleted file mode 100644 index 641066de..00000000 --- a/tools/quick_dump/Makefile.am +++ /dev/null @@ -1,30 +0,0 @@ -AM_CPPFLAGS = -I$(top_srcdir)/lib -I$(top_builddir)/lib $(PYTHON_CPPFLAGS) $(DRM_CFLAGS) $(CAIRO_CFLAGS) -I$(top_srcdir) - -dist_bin_SCRIPTS = quick_dump.py reg_access.py -bin_SCRIPTS = chipset.py - -lib_LTLIBRARIES = I915ChipsetPython.la -I915ChipsetPython_la_LDFLAGS = -module -avoid-version $(PYTHON_LDFLAGS) -I915ChipsetPython_la_SOURCES = chipset_macro_wrap.c -nodist_I915ChipsetPython_la_SOURCES = chipset_wrap_python.c -I915ChipsetPython_la_LIBADD = \ - $(top_builddir)/lib/libintel_tools.la \ - $(PCIACCESS_LIBS) \ - $(DRM_LIBS) \ - $(CAIRO_LIBS) \ - $(NULL) - -chipset.py: chipset_wrap_python.c - -chipset_wrap_python.c: chipset.i - $(AM_V_GEN)$(SWIG) $(AX_SWIG_PYTHON_OPT) -I/usr/include -I$(top_srcdir)/lib -o $@ $< - -all-local: I915ChipsetPython.la - $(LN_S) -f .libs/I915ChipsetPython.so _chipset.so - -CLEANFILES = chipset_wrap_python.c chipset.py _chipset.so -EXTRA_DIST = $(QUICK_DUMP_EXTRA_DIST) \ - base_interrupt.txt base_other.txt base_power.txt base_rings.txt \ - quick_dump.py \ - reg_access.py \ - chipset.i diff --git a/tools/quick_dump/audio_config_haswell_plus.txt b/tools/quick_dump/audio_config_haswell_plus.txt deleted file mode 100644 index f3fbb67e..00000000 --- a/tools/quick_dump/audio_config_haswell_plus.txt +++ /dev/null @@ -1,35 +0,0 @@ -('AUD_TCA_CONFIG', '0x00065000', '') -('AUD_TCB_CONFIG', '0x00065100', '') -('AUD_TCC_CONFIG', '0x00065200', '') -('AUD_C1_MISC_CTRL', '0x00065010', '') -('AUD_C2_MISC_CTRL', '0x00065110', '') -('AUD_C3_MISC_CTRL', '0x00065210', '') -('AUD_VID_DID', '0x00065020', '') -('AUD_RID', '0x00065024', '') -('AUD_TCA_M_CTS_ENABLE', '0x00065028', '') -('AUD_TCB_M_CTS_ENABLE', '0x00065128', '') -('AUD_TCC_M_CTS_ENABLE', '0x00065228', '') -('AUD_PWRST', '0x0006504C', '') -('AUD_TCA_EDID_DATA', '0x00065050', '') -('AUD_TCB_EDID_DATA', '0x00065150', '') -('AUD_TCC_EDID_DATA', '0x00065250', '') -('AUD_TCA_INFOFR', '0x00065054', '') -('AUD_TCB_INFOFR', '0x00065154', '') -('AUD_TCC_INFOFR', '0x00065254', '') -('AUD_PIPE_CONV_CFG', '0x0006507C', '') -('AUD_C1_DIG_CNVT', '0x00065080', '') -('AUD_C2_DIG_CNVT', '0x00065180', '') -('AUD_C3_DIG_CNVT', '0x00065280', '') -('AUD_C1_STR_DESC', '0x00065084', '') -('AUD_C2_STR_DESC', '0x00065184', '') -('AUD_C3_STR_DESC', '0x00065284', '') -('AUD_OUT_CHAN_MAP', '0x00065088', '') -('AUD_TCA_PIN_PIPE_CONN_ENTRY_LENGTH', '0x000650A8', '') -('AUD_TCB_PIN_PIPE_CONN_ENTRY_LENGTH', '0x000651A8', '') -('AUD_TCC_PIN_PIPE_CONN_ENTRY_LENGTH', '0x000652A8', '') -('AUD_PIPE_CONN_SEL_CTRL', '0x000650AC', '') -('AUD_TCA_DIP_ELD_CTRL_ST', '0x000650B4', '') -('AUD_TCB_DIP_ELD_CTRL_ST', '0x000651B4', '') -('AUD_TCC_DIP_ELD_CTRL_ST', '0x000652B4', '') -('AUD_PIN_ELD_CP_VLD', '0x000650C0', '') -('AUD_HDMI_FIFO_STATUS', '0x000650D4', '') diff --git a/tools/quick_dump/audio_debug_haswell_plus.txt b/tools/quick_dump/audio_debug_haswell_plus.txt deleted file mode 100644 index 9d498bc5..00000000 --- a/tools/quick_dump/audio_debug_haswell_plus.txt +++ /dev/null @@ -1,8 +0,0 @@ -('AUD_ICOI', '0x00065f00', '') -('AUD_IRII', '0x00065f04', '') -('AUD_ICS', '0x00065f08', '') -('AUD_CHICKENBIT_REG', '0x00065f10', '') -('AUD_DP_DIP_STATUS', '0x00065f20', '') -('AUD_TCA_M_CTS', '0x00065f44', '') -('AUD_TCB_M_CTS', '0x00065f54', '') -('AUD_TCC_M_CTS', '0x00065f64', '') diff --git a/tools/quick_dump/base_interrupt.txt b/tools/quick_dump/base_interrupt.txt deleted file mode 100644 index df4244ba..00000000 --- a/tools/quick_dump/base_interrupt.txt +++ /dev/null @@ -1,20 +0,0 @@ -('GEN6_PMINTRMSK', '0x0000a168', '') -('DEISR', '0x00044000', '') -('DEIMR', '0x00044004', '') -('DEIIR', '0x00044008', '') -('DEIER', '0x0004400c', '') -('GTISR', '0x00044010', '') -('GTIMR', '0x00044014', '') -('GTIIR', '0x00044018', '') -('GTIER', '0x0004401c', '') -('GEN6_PMISR', '0x00044020', '') -('GEN6_PMIMR', '0x00044024', '') -('GEN6_PMIIR', '0x00044028', '') -('GEN6_PMIER', '0x0004402c', '') -('SDEISR', '0x000c4000', '') -('SDEIMR', '0x000c4004', '') -('SDEIIR', '0x000c4008', '') -('SDEIER', '0x000c400c', '') -('RENDER_IMR', '0x000020a8', '') -('BSD_IMR', '0x000120a8', '') -('BLT_IMR', '0x000220a8', '') diff --git a/tools/quick_dump/base_other.txt b/tools/quick_dump/base_other.txt deleted file mode 100644 index 5447b413..00000000 --- a/tools/quick_dump/base_other.txt +++ /dev/null @@ -1,7 +0,0 @@ -('PGETBL_CTL', '0x00002020', '') -('MI_MODE', '0x0000209c', '') -('CCID', '0x00002180', '') -('ERROR_GEN6', '0x000040a0', '') -('RENDER_HWSTAM', '0x00002098', '') -('GEN6_BSD_HWSTAM', '0x00012098', '') -('GEN6_BLITTER_HWSTAM', '0x00022098', '') diff --git a/tools/quick_dump/base_power.txt b/tools/quick_dump/base_power.txt deleted file mode 100644 index 4a142e52..00000000 --- a/tools/quick_dump/base_power.txt +++ /dev/null @@ -1,21 +0,0 @@ -('GEN6_RPNSWREQ', '0x0000a008', '') -('GEN6_RC_VIDEO_FREQ', '0x0000a00c', '') -('GEN6_RP_DOWN_TIMEOUT', '0x0000a010', '') -('GEN6_RP_INTERRUPT_LIMITS', '0x0000a014', '') -('GEN6_RP_CONTROL', '0x0000a024', '') -('GEN6_RP_UP_THRESHOLD', '0x0000a02c', '') -('GEN6_RP_UP_EI', '0x0000a068', '') -('GEN6_RP_DOWN_EI', '0x0000a06c', '') -('GEN6_RP_IDLE_HYSTERSIS', '0x0000a070', '') -('GEN6_RC_CONTROL', '0x0000a090', '') -('GEN6_RC_STATE', '0x0000a094', '') -('GEN6_RC1_WAKE_RATE_LIMIT', '0x0000a098', '') -('GEN6_RC6_WAKE_RATE_LIMIT', '0x0000a09c', '') -('GEN6_RC_EVALUATION_INTERVAL', '0x0000a0a8', '') -('GEN6_RC_IDLE_HYSTERSIS', '0x0000a0ac', '') -('GEN6_RC_SLEEP', '0x0000a0b0', '') -('GEN6_RC1e_THRESHOLD', '0x0000a0b4', '') -('GEN6_RC6_THRESHOLD', '0x0000a0b8', '') -('RC6_RESIDENCY_TIME', '0x00138108', '') -('RC6p_RESIDENCY_TIME', '0x0013810c', '') -('RC6pp_RESIDENCY_TIME', '0x00138110', '') diff --git a/tools/quick_dump/base_rings.txt b/tools/quick_dump/base_rings.txt deleted file mode 100644 index f2d6576d..00000000 --- a/tools/quick_dump/base_rings.txt +++ /dev/null @@ -1,33 +0,0 @@ -('RENDER_INSTPM', '0x20c0', '') -('BSD_INSTPM', '0x120c0', '') -('BLT_INSTPM', '0x220c0', '') -('RENDER_RING_TAIL', '0x2030', '') -('BSD_RING_TAIL', '0x12030', '') -('BLT_RING_TAIL', '0x22030', '') -('RENDER_RING_HEAD', '0x2034', '') -('BSD_RING_HEAD', '0x12034', '') -('BLT_RING_HEAD', '0x22034', '') -('RENDER_RING_START', '0x2038', '') -('BSD_RING_START', '0x12038', '') -('BLT_RING_START', '0x22038', '') -('RENDER_RING_CTL', '0x203c', '') -('BSD_RING_CTL', '0x1203c', '') -('BLT_RING_CTL', '0x2203c', '') -('RENDER_IPEIR', '0x2064', '') -('BSD_IPEIR', '0x12064', '') -('BLT_IPEIR', '0x22064', '') -('RENDER_IPEHR', '0x2068', '') -('BSD_IPEHR', '0x12068', '') -('BLT_IPEHR', '0x22068', '') -('RENDER_INSTDONE', '0x206c', '') -('BSD_INSTDONE', '0x1206c', '') -('BLT_INSTDONE', '0x2206c', '') -('RENDER_INSTPS', '0x2070', '') -('BSD_INSTPS', '0x12070', '') -('BLT_INSTPS', '0x22070', '') -('RENDER_RING_ACTHD', '0x2074', '') -('BSD_RING_ACTHD', '0x12074', '') -('BLT_RING_ACTHD', '0x22074', '') -('RENDER_FADDR', '0x2078', '') -('BSD_FADDR', '0x12078', '') -('BLT_FADDR', '0x22078', '') diff --git a/tools/quick_dump/broadwell b/tools/quick_dump/broadwell deleted file mode 100644 index 7888a36b..00000000 --- a/tools/quick_dump/broadwell +++ /dev/null @@ -1,7 +0,0 @@ -common_display.txt -gen7_other.txt -haswell_other.txt -gen8_interrupt.txt -gen8_other.txt -audio_config_haswell_plus.txt -audio_debug_haswell_plus.txt diff --git a/tools/quick_dump/cherryview b/tools/quick_dump/cherryview deleted file mode 100644 index a86abe25..00000000 --- a/tools/quick_dump/cherryview +++ /dev/null @@ -1,8 +0,0 @@ -vlv_pipe_a.txt -vlv_pipe_b.txt -chv_pipe_c.txt -chv_display_base.txt -chv_dpio_phy_x2.txt -chv_dpio_phy_x1.txt -vlv_dsi.txt -gen7_other.txt diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i deleted file mode 100644 index 90db40e8..00000000 --- a/tools/quick_dump/chipset.i +++ /dev/null @@ -1,41 +0,0 @@ -%module chipset -%include "stdint.i" -%{ -#include <pciaccess.h> -#include <stdint.h> -#include "intel_chipset.h" -#include "intel_io.h" -extern int is_sandybridge(unsigned short pciid); -extern int is_ivybridge(unsigned short pciid); -extern int is_valleyview(unsigned short pciid); -extern int is_cherryview(unsigned short pciid); -extern int is_haswell(unsigned short pciid); -extern int is_broadwell(unsigned short pciid); -extern int is_skylake(unsigned short pciid); -extern struct pci_device *intel_get_pci_device(); -extern int intel_register_access_init(struct pci_device *pci_dev, int safe); -extern uint32_t intel_register_read(uint32_t reg); -extern void intel_register_write(uint32_t reg, uint32_t val); -extern void intel_register_access_fini(); -extern int intel_register_access_needs_fakewake(); -extern unsigned short pcidev_to_devid(struct pci_device *pci_dev); -extern uint32_t intel_dpio_reg_read(uint32_t reg, int phy); -extern uint32_t intel_flisdsi_reg_read(uint32_t reg); -%} - -extern int is_sandybridge(unsigned short pciid); -extern int is_ivybridge(unsigned short pciid); -extern int is_valleyview(unsigned short pciid); -extern int is_cherryview(unsigned short pciid); -extern int is_haswell(unsigned short pciid); -extern int is_broadwell(unsigned short pciid); -extern int is_skylake(unsigned short pciid); -extern struct pci_device *intel_get_pci_device(); -extern int intel_register_access_init(struct pci_device *pci_dev, int safe); -extern uint32_t intel_register_read(uint32_t reg); -extern void intel_register_write(uint32_t reg, uint32_t val); -extern void intel_register_access_fini(); -extern int intel_register_access_needs_fakewake(); -extern unsigned short pcidev_to_devid(struct pci_device *pci_dev); -extern uint32_t intel_dpio_reg_read(uint32_t reg, int phy); -extern uint32_t intel_flisdsi_reg_read(uint32_t reg); diff --git a/tools/quick_dump/chipset_macro_wrap.c b/tools/quick_dump/chipset_macro_wrap.c deleted file mode 100644 index fa568d6f..00000000 --- a/tools/quick_dump/chipset_macro_wrap.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <stdbool.h> -#include <stdlib.h> -#include <pciaccess.h> -#include "intel_chipset.h" - -int is_sandybridge(unsigned short pciid) -{ - return IS_GEN6(pciid); -} - -int is_ivybridge(unsigned short pciid) -{ - return IS_IVYBRIDGE(pciid); -} - -int is_valleyview(unsigned short pciid) -{ - return IS_VALLEYVIEW(pciid); -} - -int is_cherryview(unsigned short pciid) -{ - return IS_CHERRYVIEW(pciid); -} - -int is_haswell(unsigned short pciid) -{ - return IS_HASWELL(pciid); -} - -int is_broadwell(unsigned short pciid) -{ - return IS_BROADWELL(pciid); -} - -int is_skylake(unsigned short pciid) -{ - return IS_SKYLAKE(pciid); -} - -/* Simple helper because I couldn't make this work in the script */ -unsigned short pcidev_to_devid(struct pci_device *pdev) -{ - return pdev->device_id; -} diff --git a/tools/quick_dump/chv_display_base.txt b/tools/quick_dump/chv_display_base.txt deleted file mode 100644 index 8b1d495f..00000000 --- a/tools/quick_dump/chv_display_base.txt +++ /dev/null @@ -1,211 +0,0 @@ -('DPFLIPSTAT', '0x70028', '0x180000') -('DPINVGTT', '0x7002C', '0x180000') - -('DSPARB', '0x70030', '0x180000') -('DSPARB2', '0x70060', '0x180000') -('DSPARB3', '0x7006C', '0x180000') - -('DSPHOWM', '0x70064', '0x180000') -('DSPHOWM1', '0x70068', '0x180000') -('FW1', '0x70034', '0x180000') -('FW2', '0x70038', '0x180000') -('FW3', '0x7003C', '0x180000') -('FW4', '0x70070', '0x180000') -('FW5', '0x70074', '0x180000') -('FW6', '0x70078', '0x180000') -('FW7', '0x7007C', '0x180000') -('FW8', '0x700B8', '0x180000') -('FW9', '0x700BC', '0x180000') - -('DDL1', '0x70050', '0x180000') -('DDL2', '0x70054', '0x180000') -('DDL3', '0x70058', '0x180000') - -('VGACNTRL', '0x71400', '0x180000') - -('CBR1', '0x70400', '0x180000') -('CBR2', '0x70404', '0x180000') -('CBR3', '0x7040C', '0x180000') -('CBR4', '0x70450', '0x180000') -('CCBR', '0x70408', '0x180000') - -('SWF00', '0x70410', '0x180000') -('SWF01', '0x70414', '0x180000') -('SWF02', '0x70418', '0x180000') -('SWF03', '0x7041C', '0x180000') -('SWF04', '0x70420', '0x180000') -('SWF05', '0x70424', '0x180000') -('SWF06', '0x70428', '0x180000') -('SWF07', '0x7042C', '0x180000') -('SWF08', '0x70430', '0x180000') -('SWF09', '0x70434', '0x180000') -('SWF0A', '0x70438', '0x180000') -('SWF0B', '0x7043C', '0x180000') -('SWF0C', '0x70440', '0x180000') -('SWF0D', '0x70444', '0x180000') -('SWF0E', '0x70448', '0x180000') -('SWF0F', '0x7044C', '0x180000') -('SWF10', '0x71410', '0x180000') -('SWF11', '0x71414', '0x180000') -('SWF12', '0x71418', '0x180000') -('SWF13', '0x7141C', '0x180000') -('SWF14', '0x71420', '0x180000') -('SWF15', '0x71424', '0x180000') -('SWF16', '0x71428', '0x180000') -('SWF17', '0x7142C', '0x180000') -('SWF18', '0x71430', '0x180000') -('SWF19', '0x71434', '0x180000') -('SWF1A', '0x71438', '0x180000') -('SWF1B', '0x7143C', '0x180000') -('SWF1C', '0x71440', '0x180000') -('SWF1D', '0x71444', '0x180000') -('SWF1E', '0x71448', '0x180000') -('SWF1F', '0x7144C', '0x180000') -('SWF30', '0x72414', '0x180000') -('SWF31', '0x72418', '0x180000') -('SWF32', '0x7241C', '0x180000') - -('PCSRC', '0x73000', '0x180000') -('PCSTAT', '0x73004', '0x180000') -('PCSRC2', '0x73008', '0x180000') -('PCSTAT2', '0x7300C', '0x180000') -('PCSRC3', '0x73010', '0x180000') -('PCSTAT3', '0x73014', '0x180000') - -('PFIT_CONTROL', '0x61230', '0x180000') -('PFIT_PGM_RATIOS', '0x61234', '0x180000') -('PFIT_AUTO_RATION', '0x61238', '0x180000') -('PFIT_INIT_PHASE', '0x6123C', '0x180000') - -('GPIOCTL_0', '0x5010', '0x180000') -('GPIOCTL_1', '0x5014', '0x180000') -('GPIOCTL_2', '0x5018', '0x180000') -('GPIOCTL_3', '0x501C', '0x180000') -('GPIOCTL_4', '0x5020', '0x180000') - -('GMBUS0', '0x5100', '0x180000') -('GMBUS1', '0x5104', '0x180000') -('GMBUS2', '0x5108', '0x180000') -('GMBUS3', '0x510C', '0x180000') -('GMBUS4', '0x5110', '0x180000') -('GMBUS5', '0x5120', '0x180000') -('GMBUS6', '0x5130', '0x180000') -('GMBUS7', '0x5134', '0x180000') - -('RAWCLK_FREQ', '0x6024', '0x180000') -('GMBUSFREQ', '0x6510', '0x180000') -('DSPCLK_GATE_D', '0x6200', '0x180000') -('DSPCLK1_GATE_D', '0x6034', '0x180000') -('RAMCLK_GATE_D', '0x6210', '0x180000') -('D_STATE', '0x6104', '0x180000') -('DPPSR_CGDIS', '0x6204', '0x180000') -('DPPSR1_CGDIS', '0x6220', '0x180000') -('FW_BLC_SELF', '0x6500', '0x180000') -('MI_ARB', '0x6504', '0x180000') -('CZCLK_CDCLK_FREQ_RATIO', '0x6508', '0x180000') -('GCI_CONTROL', '0x650C', '0x180000') -('DOT_MIPI', '0x6038', '0x180000') - -('PORT_HOTPLUG_EN', '0x61110', '0x180000') -('PORT_HOTPLUG_STAT', '0x61114', '0x180000') -('HPD_LONG_VALUE', '0x61120', '0x180000') -('HPD_FILTER_VALUE', '0x61124', '0x180000') - -('HDMIB', '0x61140', '0x180000') -('HDMIC', '0x61160', '0x180000') -('HDMID', '0x6116C', '0x180000') - -('DP2', '0x61154', '0x180000') -('DIGITAL_HPD_CTRL', '0x61164', '0x180000') -('DV_DETERM', '0x61168', '0x180000') - -('DP_AUX_CH_AKSV_HI', '0x64130', '0x180000') -('DP_AUX_CH_AKSV_LO', '0x64134', '0x180000') - -('DP_B', '0x64100', '0x180000') -('DPB_AUX_CH_CTL', '0x64110', '0x180000') -('DPB_AUX_CH_DATA1', '0x64114', '0x180000') -('DPB_AUX_CH_DATA2', '0x64118', '0x180000') -('DPB_AUX_CH_DATA3', '0x6411C', '0x180000') -('DPB_AUX_CH_DATA4', '0x64120', '0x180000') -('DPB_AUX_CH_DATA5', '0x64124', '0x180000') -('DPB_AUX_TST', '0x64150', '0x180000') - -('DP_C', '0x64200', '0x180000') -('DPC_AUX_CH_CTL', '0x64210', '0x180000') -('DPC_AUX_CH_DATA1', '0x64214', '0x180000') -('DPC_AUX_CH_DATA2', '0x64218', '0x180000') -('DPC_AUX_CH_DATA3', '0x6421C', '0x180000') -('DPC_AUX_CH_DATA4', '0x64220', '0x180000') -('DPC_AUX_CH_DATA5', '0x64224', '0x180000') -('DPC_AUX_TST', '0x64228', '0x180000') - -('DP_D', '0x64300', '0x180000') -('DPD_AUX_CH_CTL', '0x64310', '0x180000') -('DPD_AUX_CH_DATA1', '0x64314', '0x180000') -('DPD_AUX_CH_DATA2', '0x64318', '0x180000') -('DPD_AUX_CH_DATA3', '0x6431C', '0x180000') -('DPD_AUX_CH_DATA4', '0x64320', '0x180000') -('DPD_AUX_CH_DATA5', '0x64324', '0x180000') -('DPD_AUX_TST', '0x64328', '0x180000') - -('DPIO_PHY_CONTROL', '0x60100', '0x180000') -('DPIO_PHY_GPIO_DATA', '0x60108', '0x180000') -('DPIO_PHY_STATUS', '0x6240', '0x180000') -('DPIO_PHY_STATUS1', '0x60104', '0x180000') -('DPIO_PHY_STATUS2', '0x6010C', '0x180000') - -('DPIO_BONUS0', '0x64138', '0x180000') -('DPIO_BONUS1', '0x6413C', '0x180000') -('DPIO_BONUS2', '0x64140', '0x180000') -('DPIO_BONUS0_READ_BACK', '0x64144', '0x180000') -('DPIO_BONUS1_READ_BACK', '0x64148', '0x180000') -('DPIO_BONUS2_READ_BACK', '0x6414C', '0x180000') - -('DPA_PIX_GEN_CTRL', '0x61198', '0x180000') -('DPA_PROG_PIXEL_DATA_1', '0x6119C', '0x180000') -('DPA_PROG_PIXEL_DATA_2', '0x611A0', '0x180000') -('DPA_PROG_PIXEL_DATA_3', '0x611A4', '0x180000') -('DPA_PROG_PIXEL_DATA_4', '0x611A8', '0x180000') - -('DPB_PIX_GEN_CTRL', '0x611B0', '0x180000') -('DPB_PROG_PIXEL_DATA_1', '0x611B4', '0x180000') -('DPB_PROG_PIXEL_DATA_2', '0x611B8', '0x180000') -('DPB_PROG_PIXEL_DATA_3', '0x611BC', '0x180000') -('DPB_PROG_PIXEL_DATA_4', '0x611C0', '0x180000') - -('DPC_PIX_GEN_CTRL', '0x611D0', '0x180000') -('DPC_PROG_PIXEL_DATA_1', '0x611D4', '0x180000') -('DPC_PROG_PIXEL_DATA_2', '0x611D8', '0x180000') -('DPC_PROG_PIXEL_DATA_3', '0x611DC', '0x180000') -('DPC_PROG_PIXEL_DATA_4', '0x611E0', '0x180000') - -('AUD_VID_DID', '0x62020', '0x180000') -('AUD_RID', '0x62024', '0x180000') -('AUD_PWRST', '0x6204C', '0x180000') -('AUD_PORT_EN_HD_CFG', '0x6207C', '0x180000') -('AUD_OUT_CH_STR', '0x62088', '0x180000') -('AUD_PINW_CONNLNG_LIST', '0x620A8', '0x180000') -('AUD_PINW_CONNLNG_SEL', '0x620AC', '0x180000') -('AUD_CNTL_ST2', '0x620C0', '0x180000') -('AUD_HDMIW_STATUS', '0x620D4', '0x180000') -('AUD_SSID_DBG', '0x62F00', '0x180000') -('AUD_PWST1_DBG', '0x62F04', '0x180000') -('AUD_PWST2_DBG', '0x62F14', '0x180000') -('AUD_PORT_EN_B_DBG', '0x62F20', '0x180000') -('AUD_PWST3_DBG', '0x62F24', '0x180000') -('AUD_PORT_EN_C_DBG', '0x62F28', '0x180000') -('AUD_PORT_EN_D_DBG', '0x62F2C', '0x180000') -('AUD_CHICKENBIT', '0x62F38', '0x180000') -('AUD_CNTL_ST_B_DBG', '0x62F60', '0x180000') -('AUD_HDMIW_INFOFR_B_DBG', '0x62F64', '0x180000') -('AUD_CNTL_ST_C_DBG', '0x62F70', '0x180000') -('AUD_HDMIW_INFOFR_C_DBG', '0x62F74', '0x180000') -('AUD_CNTL_ST_D_DBG', '0x62F80', '0x180000') -('AUD_HDMIW_INFOFR_D_DBG', '0x62F84', '0x180000') -('AUD_CONFIG_DEFAULT2_REG_PORTB', '0x62F88', '0x180000') -('AUD_CONFIG_DEFAULT2_REG_PORTC', '0x62F8C', '0x180000') -('AUD_CONFIG_DEFAULT2_REG_PORTD', '0x62F90', '0x180000') -('AUD_MCTSA', '0x62F94', '0x180000') -('AUD_MCTSB', '0x62F98', '0x180000') -('AUD_MCTSC', '0x62F9C', '0x180000') diff --git a/tools/quick_dump/chv_dpio_phy_x1.txt b/tools/quick_dump/chv_dpio_phy_x1.txt deleted file mode 100644 index 7b08a2d8..00000000 --- a/tools/quick_dump/chv_dpio_phy_x1.txt +++ /dev/null @@ -1,216 +0,0 @@ -('PLL1_DW0', '0x8000', 'DPIO') -('PLL1_DW1', '0x8004', 'DPIO') -('PLL1_DW2', '0x8008', 'DPIO') -('PLL1_DW3', '0x800C', 'DPIO') -('PLL1_DW4', '0x8010', 'DPIO') -('PLL1_DW5', '0x8014', 'DPIO') -('PLL1_DW6', '0x8018', 'DPIO') -('PLL1_DW7', '0x801C', 'DPIO') -('PLL1_DW8', '0x8020', 'DPIO') -('PLL1_DW9', '0x8024', 'DPIO') -('PLL1_DW10', '0x8028', 'DPIO') -('PLL1_DW11', '0x802C', 'DPIO') -('PLL1_DW12', '0x8030', 'DPIO') -('PLL1_DW13', '0x8034', 'DPIO') -('PLL1_DW14', '0x8038', 'DPIO') -('PLL1_DW15', '0x803C', 'DPIO') -('PLL1_DW16', '0x8040', 'DPIO') -('PLL1_DW17', '0x8044', 'DPIO') -('PLL1_DW18', '0x8048', 'DPIO') -('PLL1_DW19', '0x804C', 'DPIO') -('PLL1_DW20', '0x8050', 'DPIO') -('PLL1_DW21', '0x8054', 'DPIO') -('PLL1_DW22', '0x8058', 'DPIO') -('PLL1_DW23', '0x805C', 'DPIO') -('PLL1_DW24', '0x8060', 'DPIO') -('PLL1_DW25', '0x8064', 'DPIO') -('PLL1_DW26', '0x8068', 'DPIO') -('PLL1_DW27', '0x806C', 'DPIO') -('PLL1_DW28', '0x8070', 'DPIO') -('PLL1_DW29', '0x8074', 'DPIO') -('PLL1_DW30', '0x8078', 'DPIO') -('PLL1_DW31', '0x807C', 'DPIO') -('REF_DW0', '0x80A0', 'DPIO') -('REF_DW1', '0x80A4', 'DPIO') -('REF_DW2', '0x80A8', 'DPIO') -('REF_DW3', '0x80AC', 'DPIO') -('REF_DW4', '0x80B0', 'DPIO') -('REF_DW5', '0x80B4', 'DPIO') -('REF_DW6', '0x80B8', 'DPIO') -('REF_DW7', '0x80BC', 'DPIO') -('REF_DW8', '0x80C0', 'DPIO') -('REF_DW9', '0x80C4', 'DPIO') -('REF_DW10', '0x80C8', 'DPIO') -('REF_DW11', '0x80CC', 'DPIO') -('REF_DW12', '0x80D0', 'DPIO') -('REF_DW13', '0x80D4', 'DPIO') -('REF_DW14', '0x80D8', 'DPIO') -('REF_DW15', '0x80DC', 'DPIO') -('CL1_DW0', '0x8100', 'DPIO') -('CL1_DW1', '0x8104', 'DPIO') -('CL1_DW2', '0x8108', 'DPIO') -('CL1_DW3', '0x810C', 'DPIO') -('CL1_DW4', '0x8110', 'DPIO') -('CL1_DW5', '0x8114', 'DPIO') -('CL1_DW6', '0x8118', 'DPIO') -('CL1_DW7', '0x811C', 'DPIO') -('CL1_DW8', '0x8120', 'DPIO') -('CL1_DW9', '0x8124', 'DPIO') -('CL1_DW10', '0x8128', 'DPIO') -('CL1_DW11', '0x812C', 'DPIO') -('CL1_DW12', '0x8130', 'DPIO') -('CL1_DW13', '0x8134', 'DPIO') -('CL1_DW14', '0x8138', 'DPIO') -('CL1_DW15', '0x813C', 'DPIO') -('CL1_DW16', '0x8140', 'DPIO') -('CL1_DW17', '0x8144', 'DPIO') -('CL1_DW18', '0x8148', 'DPIO') -('CL1_DW19', '0x814C', 'DPIO') -('CL1_DW20', '0x8150', 'DPIO') -('CL1_DW21', '0x8154', 'DPIO') -('CL1_DW22', '0x8158', 'DPIO') -('CL1_DW23', '0x815C', 'DPIO') -('CL1_DW24', '0x8160', 'DPIO') -('CL1_DW25', '0x8164', 'DPIO') -('CL1_DW26', '0x8168', 'DPIO') -('CL1_DW27', '0x816C', 'DPIO') -('CL1_DW28', '0x8170', 'DPIO') -('CL1_DW29', '0x8174', 'DPIO') -('CL1_DW30', '0x8178', 'DPIO') -('CL1_DW31', '0x817C', 'DPIO') -('PCS01_CH0_DW0', '0x0200', 'DPIO') -('PCS01_CH0_DW1', '0x0204', 'DPIO') -('PCS01_CH0_DW2', '0x0208', 'DPIO') -('PCS01_CH0_DW3', '0x020C', 'DPIO') -('PCS01_CH0_DW4', '0x0210', 'DPIO') -('PCS01_CH0_DW5', '0x0214', 'DPIO') -('PCS01_CH0_DW6', '0x0218', 'DPIO') -('PCS01_CH0_DW7', '0x021C', 'DPIO') -('PCS01_CH0_DW8', '0x0220', 'DPIO') -('PCS01_CH0_DW9', '0x0224', 'DPIO') -('PCS01_CH0_DW10', '0x0228', 'DPIO') -('PCS01_CH0_DW11', '0x022C', 'DPIO') -('PCS01_CH0_DW12', '0x0230', 'DPIO') -('PCS01_CH0_DW13', '0x0234', 'DPIO') -('PCS01_CH0_DW14', '0x0238', 'DPIO') -('PCS01_CH0_DW15', '0x023C', 'DPIO') -('PCS01_CH0_DW16', '0x0240', 'DPIO') -('PCS01_CH0_DW17', '0x0244', 'DPIO') -('PCS01_CH0_DW18', '0x0248', 'DPIO') -('PCS01_CH0_DW19', '0x024C', 'DPIO') -('PCS01_CH0_DW20', '0x0250', 'DPIO') -('PCS01_CH0_DW21', '0x0254', 'DPIO') -('PCS01_CH0_DW22', '0x0258', 'DPIO') -('PCS01_CH0_DW23', '0x025C', 'DPIO') -('PCS01_CH0_DW24', '0x0260', 'DPIO') -('PCS01_CH0_DW25', '0x0264', 'DPIO') -('TX0_CH0_DW0', '0x0080', 'DPIO') -('TX0_CH0_DW1', '0x0084', 'DPIO') -('TX0_CH0_DW2', '0x0088', 'DPIO') -('TX0_CH0_DW3', '0x008C', 'DPIO') -('TX0_CH0_DW4', '0x0090', 'DPIO') -('TX0_CH0_DW5', '0x0094', 'DPIO') -('TX0_CH0_DW6', '0x0098', 'DPIO') -('TX0_CH0_DW7', '0x009C', 'DPIO') -('TX0_CH0_DW8', '0x00A0', 'DPIO') -('TX0_CH0_DW9', '0x00A4', 'DPIO') -('TX0_CH0_DW10', '0x00A8', 'DPIO') -('TX0_CH0_DW11', '0x00AC', 'DPIO') -('TX0_CH0_DW12', '0x00B0', 'DPIO') -('TX0_CH0_DW13', '0x00B4', 'DPIO') -('TX0_CH0_DW14', '0x00B8', 'DPIO') -('TX0_CH0_DW15', '0x00BC', 'DPIO') -('TX0_CH0_DW16', '0x00C0', 'DPIO') -('TX0_CH0_DW17', '0x00C4', 'DPIO') -('TX0_CH0_DW18', '0x00C8', 'DPIO') -('TX0_CH0_DW19', '0x00CC', 'DPIO') -('TX0_CH0_DW20', '0x00D0', 'DPIO') -('TX1_CH0_DW0', '0x0280', 'DPIO') -('TX1_CH0_DW1', '0x0284', 'DPIO') -('TX1_CH0_DW2', '0x0288', 'DPIO') -('TX1_CH0_DW3', '0x028C', 'DPIO') -('TX1_CH0_DW4', '0x0290', 'DPIO') -('TX1_CH0_DW5', '0x0294', 'DPIO') -('TX1_CH0_DW6', '0x0298', 'DPIO') -('TX1_CH0_DW7', '0x029C', 'DPIO') -('TX1_CH0_DW8', '0x02A0', 'DPIO') -('TX1_CH0_DW9', '0x02A4', 'DPIO') -('TX1_CH0_DW10', '0x02A8', 'DPIO') -('TX1_CH0_DW11', '0x02AC', 'DPIO') -('TX1_CH0_DW12', '0x02B0', 'DPIO') -('TX1_CH0_DW13', '0x02B4', 'DPIO') -('TX1_CH0_DW14', '0x02B8', 'DPIO') -('TX1_CH0_DW15', '0x02BC', 'DPIO') -('TX1_CH0_DW16', '0x02C0', 'DPIO') -('TX1_CH0_DW17', '0x02C4', 'DPIO') -('TX1_CH0_DW18', '0x02C8', 'DPIO') -('TX1_CH0_DW19', '0x02CC', 'DPIO') -('TX1_CH0_DW20', '0x02D0', 'DPIO') -('PCS23_CH0_DW0', '0x0400', 'DPIO') -('PCS23_CH0_DW1', '0x0404', 'DPIO') -('PCS23_CH0_DW2', '0x0408', 'DPIO') -('PCS23_CH0_DW3', '0x040C', 'DPIO') -('PCS23_CH0_DW4', '0x0410', 'DPIO') -('PCS23_CH0_DW5', '0x0414', 'DPIO') -('PCS23_CH0_DW6', '0x0418', 'DPIO') -('PCS23_CH0_DW7', '0x041C', 'DPIO') -('PCS23_CH0_DW8', '0x0420', 'DPIO') -('PCS23_CH0_DW9', '0x0424', 'DPIO') -('PCS23_CH0_DW10', '0x0428', 'DPIO') -('PCS23_CH0_DW11', '0x042C', 'DPIO') -('PCS23_CH0_DW12', '0x0430', 'DPIO') -('PCS23_CH0_DW13', '0x0434', 'DPIO') -('PCS23_CH0_DW14', '0x0438', 'DPIO') -('PCS23_CH0_DW15', '0x043C', 'DPIO') -('PCS23_CH0_DW16', '0x0440', 'DPIO') -('PCS23_CH0_DW17', '0x0444', 'DPIO') -('PCS23_CH0_DW18', '0x0448', 'DPIO') -('PCS23_CH0_DW19', '0x044C', 'DPIO') -('PCS23_CH0_DW20', '0x0450', 'DPIO') -('PCS23_CH0_DW21', '0x0454', 'DPIO') -('PCS23_CH0_DW22', '0x0458', 'DPIO') -('PCS23_CH0_DW23', '0x045C', 'DPIO') -('PCS23_CH0_DW24', '0x0460', 'DPIO') -('PCS23_CH0_DW25', '0x0464', 'DPIO') -('TX2_CH0_DW0', '0x0480', 'DPIO') -('TX2_CH0_DW1', '0x0484', 'DPIO') -('TX2_CH0_DW2', '0x0488', 'DPIO') -('TX2_CH0_DW3', '0x048C', 'DPIO') -('TX2_CH0_DW4', '0x0490', 'DPIO') -('TX2_CH0_DW5', '0x0494', 'DPIO') -('TX2_CH0_DW6', '0x0498', 'DPIO') -('TX2_CH0_DW7', '0x049C', 'DPIO') -('TX2_CH0_DW8', '0x04A0', 'DPIO') -('TX2_CH0_DW9', '0x04A4', 'DPIO') -('TX2_CH0_DW10', '0x04A8', 'DPIO') -('TX2_CH0_DW11', '0x04AC', 'DPIO') -('TX2_CH0_DW12', '0x04B0', 'DPIO') -('TX2_CH0_DW13', '0x04B4', 'DPIO') -('TX2_CH0_DW14', '0x04B8', 'DPIO') -('TX2_CH0_DW15', '0x04BC', 'DPIO') -('TX2_CH0_DW16', '0x04C0', 'DPIO') -('TX2_CH0_DW17', '0x04C4', 'DPIO') -('TX2_CH0_DW18', '0x04C8', 'DPIO') -('TX2_CH0_DW19', '0x04CC', 'DPIO') -('TX2_CH0_DW20', '0x04D0', 'DPIO') -('TX3_CH0_DW0', '0x0680', 'DPIO') -('TX3_CH0_DW1', '0x0684', 'DPIO') -('TX3_CH0_DW2', '0x0688', 'DPIO') -('TX3_CH0_DW3', '0x068C', 'DPIO') -('TX3_CH0_DW4', '0x0690', 'DPIO') -('TX3_CH0_DW5', '0x0694', 'DPIO') -('TX3_CH0_DW6', '0x0698', 'DPIO') -('TX3_CH0_DW7', '0x069C', 'DPIO') -('TX3_CH0_DW8', '0x06A0', 'DPIO') -('TX3_CH0_DW9', '0x06A4', 'DPIO') -('TX3_CH0_DW10', '0x06A8', 'DPIO') -('TX3_CH0_DW11', '0x06AC', 'DPIO') -('TX3_CH0_DW12', '0x06B0', 'DPIO') -('TX3_CH0_DW13', '0x06B4', 'DPIO') -('TX3_CH0_DW14', '0x06B8', 'DPIO') -('TX3_CH0_DW15', '0x06BC', 'DPIO') -('TX3_CH0_DW16', '0x06C0', 'DPIO') -('TX3_CH0_DW17', '0x06C4', 'DPIO') -('TX3_CH0_DW18', '0x06C8', 'DPIO') -('TX3_CH0_DW19', '0x06CC', 'DPIO') -('TX3_CH0_DW20', '0x06D0', 'DPIO') diff --git a/tools/quick_dump/chv_dpio_phy_x2.txt b/tools/quick_dump/chv_dpio_phy_x2.txt deleted file mode 100644 index 1dd8f684..00000000 --- a/tools/quick_dump/chv_dpio_phy_x2.txt +++ /dev/null @@ -1,392 +0,0 @@ -('PLL1_DW0', '0x8000', 'DPIO2') -('PLL1_DW1', '0x8004', 'DPIO2') -('PLL1_DW2', '0x8008', 'DPIO2') -('PLL1_DW3', '0x800C', 'DPIO2') -('PLL1_DW4', '0x8010', 'DPIO2') -('PLL1_DW5', '0x8014', 'DPIO2') -('PLL1_DW6', '0x8018', 'DPIO2') -('PLL1_DW7', '0x801C', 'DPIO2') -('PLL1_DW8', '0x8020', 'DPIO2') -('PLL1_DW9', '0x8024', 'DPIO2') -('PLL1_DW10', '0x8028', 'DPIO2') -('PLL1_DW11', '0x802C', 'DPIO2') -('PLL1_DW12', '0x8030', 'DPIO2') -('PLL1_DW13', '0x8034', 'DPIO2') -('PLL1_DW14', '0x8038', 'DPIO2') -('PLL1_DW15', '0x803C', 'DPIO2') -('PLL1_DW16', '0x8040', 'DPIO2') -('PLL1_DW17', '0x8044', 'DPIO2') -('PLL1_DW18', '0x8048', 'DPIO2') -('PLL1_DW19', '0x804C', 'DPIO2') -('PLL1_DW20', '0x8050', 'DPIO2') -('PLL1_DW21', '0x8054', 'DPIO2') -('PLL1_DW22', '0x8058', 'DPIO2') -('PLL1_DW23', '0x805C', 'DPIO2') -('PLL1_DW24', '0x8060', 'DPIO2') -('PLL1_DW25', '0x8064', 'DPIO2') -('PLL1_DW26', '0x8068', 'DPIO2') -('PLL1_DW27', '0x806C', 'DPIO2') -('PLL1_DW28', '0x8070', 'DPIO2') -('PLL1_DW29', '0x8074', 'DPIO2') -('PLL1_DW30', '0x8078', 'DPIO2') -('PLL1_DW31', '0x807C', 'DPIO2') -('CL2_DW0', '0x8080', 'DPIO2') -('CL2_DW1', '0x8084', 'DPIO2') -('CL2_DW2', '0x8088', 'DPIO2') -('CL2_DW3', '0x808C', 'DPIO2') -('CL2_DW4', '0x8090', 'DPIO2') -('CL2_DW5', '0x8094', 'DPIO2') -('CL2_DW6', '0x8098', 'DPIO2') -('CL2_DW7', '0x809C', 'DPIO2') -('REF_DW0', '0x80A0', 'DPIO2') -('REF_DW1', '0x80A4', 'DPIO2') -('REF_DW2', '0x80A8', 'DPIO2') -('REF_DW3', '0x80AC', 'DPIO2') -('REF_DW4', '0x80B0', 'DPIO2') -('REF_DW5', '0x80B4', 'DPIO2') -('REF_DW6', '0x80B8', 'DPIO2') -('REF_DW7', '0x80BC', 'DPIO2') -('REF_DW8', '0x80C0', 'DPIO2') -('REF_DW9', '0x80C4', 'DPIO2') -('REF_DW10', '0x80C8', 'DPIO2') -('REF_DW11', '0x80CC', 'DPIO2') -('REF_DW12', '0x80D0', 'DPIO2') -('REF_DW13', '0x80D4', 'DPIO2') -('REF_DW14', '0x80D8', 'DPIO2') -('REF_DW15', '0x80DC', 'DPIO2') -('CL1_DW0', '0x8100', 'DPIO2') -('CL1_DW1', '0x8104', 'DPIO2') -('CL1_DW2', '0x8108', 'DPIO2') -('CL1_DW3', '0x810C', 'DPIO2') -('CL1_DW4', '0x8110', 'DPIO2') -('CL1_DW5', '0x8114', 'DPIO2') -('CL1_DW6', '0x8118', 'DPIO2') -('CL1_DW7', '0x811C', 'DPIO2') -('CL1_DW8', '0x8120', 'DPIO2') -('CL1_DW9', '0x8124', 'DPIO2') -('CL1_DW10', '0x8128', 'DPIO2') -('CL1_DW11', '0x812C', 'DPIO2') -('CL1_DW12', '0x8130', 'DPIO2') -('CL1_DW13', '0x8134', 'DPIO2') -('CL1_DW14', '0x8138', 'DPIO2') -('CL1_DW15', '0x813C', 'DPIO2') -('CL1_DW16', '0x8140', 'DPIO2') -('CL1_DW17', '0x8144', 'DPIO2') -('CL1_DW18', '0x8148', 'DPIO2') -('CL1_DW19', '0x814C', 'DPIO2') -('CL1_DW20', '0x8150', 'DPIO2') -('CL1_DW21', '0x8154', 'DPIO2') -('CL1_DW22', '0x8158', 'DPIO2') -('CL1_DW23', '0x815C', 'DPIO2') -('CL1_DW24', '0x8160', 'DPIO2') -('CL1_DW25', '0x8164', 'DPIO2') -('CL1_DW26', '0x8168', 'DPIO2') -('CL1_DW27', '0x816C', 'DPIO2') -('CL1_DW28', '0x8170', 'DPIO2') -('CL1_DW29', '0x8174', 'DPIO2') -('CL1_DW30', '0x8178', 'DPIO2') -('CL1_DW31', '0x817C', 'DPIO2') -('PLL2_DW0', '0x8180', 'DPIO2') -('PLL2_DW1', '0x8184', 'DPIO2') -('PLL2_DW2', '0x8188', 'DPIO2') -('PLL2_DW3', '0x818C', 'DPIO2') -('PLL2_DW4', '0x8190', 'DPIO2') -('PLL2_DW5', '0x8194', 'DPIO2') -('PLL2_DW6', '0x8198', 'DPIO2') -('PLL2_DW7', '0x819C', 'DPIO2') -('PLL2_DW8', '0x81A0', 'DPIO2') -('PLL2_DW9', '0x81A4', 'DPIO2') -('PLL2_DW10', '0x81A8', 'DPIO2') -('PLL2_DW11', '0x81AC', 'DPIO2') -('PLL2_DW12', '0x81B0', 'DPIO2') -('PLL2_DW13', '0x81B4', 'DPIO2') -('PLL2_DW14', '0x81B8', 'DPIO2') -('PLL2_DW15', '0x81BC', 'DPIO2') -('PLL2_DW16', '0x81C0', 'DPIO2') -('PLL2_DW17', '0x81C4', 'DPIO2') -('PLL2_DW18', '0x81C8', 'DPIO2') -('PLL2_DW19', '0x81CC', 'DPIO2') -('PLL2_DW20', '0x81D0', 'DPIO2') -('PLL2_DW21', '0x81D4', 'DPIO2') -('PLL2_DW22', '0x81D8', 'DPIO2') -('PLL2_DW23', '0x81DC', 'DPIO2') -('PLL2_DW24', '0x81E0', 'DPIO2') -('PLL2_DW25', '0x81E4', 'DPIO2') -('PLL2_DW26', '0x81E8', 'DPIO2') -('PLL2_DW27', '0x81EC', 'DPIO2') -('PLL2_DW28', '0x81F0', 'DPIO2') -('PLL2_DW29', '0x81F4', 'DPIO2') -('PLL2_DW30', '0x81F8', 'DPIO2') -('PLL2_DW31', '0x81FC', 'DPIO2') -('PCS01_CH0_DW0', '0x0200', 'DPIO2') -('PCS01_CH0_DW1', '0x0204', 'DPIO2') -('PCS01_CH0_DW2', '0x0208', 'DPIO2') -('PCS01_CH0_DW3', '0x020C', 'DPIO2') -('PCS01_CH0_DW4', '0x0210', 'DPIO2') -('PCS01_CH0_DW5', '0x0214', 'DPIO2') -('PCS01_CH0_DW6', '0x0218', 'DPIO2') -('PCS01_CH0_DW7', '0x021C', 'DPIO2') -('PCS01_CH0_DW8', '0x0220', 'DPIO2') -('PCS01_CH0_DW9', '0x0224', 'DPIO2') -('PCS01_CH0_DW10', '0x0228', 'DPIO2') -('PCS01_CH0_DW11', '0x022C', 'DPIO2') -('PCS01_CH0_DW12', '0x0230', 'DPIO2') -('PCS01_CH0_DW13', '0x0234', 'DPIO2') -('PCS01_CH0_DW14', '0x0238', 'DPIO2') -('PCS01_CH0_DW15', '0x023C', 'DPIO2') -('PCS01_CH0_DW16', '0x0240', 'DPIO2') -('PCS01_CH0_DW17', '0x0244', 'DPIO2') -('PCS01_CH0_DW18', '0x0248', 'DPIO2') -('PCS01_CH0_DW19', '0x024C', 'DPIO2') -('PCS01_CH0_DW20', '0x0250', 'DPIO2') -('PCS01_CH0_DW21', '0x0254', 'DPIO2') -('PCS01_CH0_DW22', '0x0258', 'DPIO2') -('PCS01_CH0_DW23', '0x025C', 'DPIO2') -('PCS01_CH0_DW24', '0x0260', 'DPIO2') -('PCS01_CH0_DW25', '0x0264', 'DPIO2') -('TX0_CH0_DW0', '0x0080', 'DPIO2') -('TX0_CH0_DW1', '0x0084', 'DPIO2') -('TX0_CH0_DW2', '0x0088', 'DPIO2') -('TX0_CH0_DW3', '0x008C', 'DPIO2') -('TX0_CH0_DW4', '0x0090', 'DPIO2') -('TX0_CH0_DW5', '0x0094', 'DPIO2') -('TX0_CH0_DW6', '0x0098', 'DPIO2') -('TX0_CH0_DW7', '0x009C', 'DPIO2') -('TX0_CH0_DW8', '0x00A0', 'DPIO2') -('TX0_CH0_DW9', '0x00A4', 'DPIO2') -('TX0_CH0_DW10', '0x00A8', 'DPIO2') -('TX0_CH0_DW11', '0x00AC', 'DPIO2') -('TX0_CH0_DW12', '0x00B0', 'DPIO2') -('TX0_CH0_DW13', '0x00B4', 'DPIO2') -('TX0_CH0_DW14', '0x00B8', 'DPIO2') -('TX0_CH0_DW15', '0x00BC', 'DPIO2') -('TX0_CH0_DW16', '0x00C0', 'DPIO2') -('TX0_CH0_DW17', '0x00C4', 'DPIO2') -('TX0_CH0_DW18', '0x00C8', 'DPIO2') -('TX0_CH0_DW19', '0x00CC', 'DPIO2') -('TX0_CH0_DW20', '0x00D0', 'DPIO2') -('TX1_CH0_DW0', '0x0280', 'DPIO2') -('TX1_CH0_DW1', '0x0284', 'DPIO2') -('TX1_CH0_DW2', '0x0288', 'DPIO2') -('TX1_CH0_DW3', '0x028C', 'DPIO2') -('TX1_CH0_DW4', '0x0290', 'DPIO2') -('TX1_CH0_DW5', '0x0294', 'DPIO2') -('TX1_CH0_DW6', '0x0298', 'DPIO2') -('TX1_CH0_DW7', '0x029C', 'DPIO2') -('TX1_CH0_DW8', '0x02A0', 'DPIO2') -('TX1_CH0_DW9', '0x02A4', 'DPIO2') -('TX1_CH0_DW10', '0x02A8', 'DPIO2') -('TX1_CH0_DW11', '0x02AC', 'DPIO2') -('TX1_CH0_DW12', '0x02B0', 'DPIO2') -('TX1_CH0_DW13', '0x02B4', 'DPIO2') -('TX1_CH0_DW14', '0x02B8', 'DPIO2') -('TX1_CH0_DW15', '0x02BC', 'DPIO2') -('TX1_CH0_DW16', '0x02C0', 'DPIO2') -('TX1_CH0_DW17', '0x02C4', 'DPIO2') -('TX1_CH0_DW18', '0x02C8', 'DPIO2') -('TX1_CH0_DW19', '0x02CC', 'DPIO2') -('TX1_CH0_DW20', '0x02D0', 'DPIO2') -('PCS23_CH0_DW0', '0x0400', 'DPIO2') -('PCS23_CH0_DW1', '0x0404', 'DPIO2') -('PCS23_CH0_DW2', '0x0408', 'DPIO2') -('PCS23_CH0_DW3', '0x040C', 'DPIO2') -('PCS23_CH0_DW4', '0x0410', 'DPIO2') -('PCS23_CH0_DW5', '0x0414', 'DPIO2') -('PCS23_CH0_DW6', '0x0418', 'DPIO2') -('PCS23_CH0_DW7', '0x041C', 'DPIO2') -('PCS23_CH0_DW8', '0x0420', 'DPIO2') -('PCS23_CH0_DW9', '0x0424', 'DPIO2') -('PCS23_CH0_DW10', '0x0428', 'DPIO2') -('PCS23_CH0_DW11', '0x042C', 'DPIO2') -('PCS23_CH0_DW12', '0x0430', 'DPIO2') -('PCS23_CH0_DW13', '0x0434', 'DPIO2') -('PCS23_CH0_DW14', '0x0438', 'DPIO2') -('PCS23_CH0_DW15', '0x043C', 'DPIO2') -('PCS23_CH0_DW16', '0x0440', 'DPIO2') -('PCS23_CH0_DW17', '0x0444', 'DPIO2') -('PCS23_CH0_DW18', '0x0448', 'DPIO2') -('PCS23_CH0_DW19', '0x044C', 'DPIO2') -('PCS23_CH0_DW20', '0x0450', 'DPIO2') -('PCS23_CH0_DW21', '0x0454', 'DPIO2') -('PCS23_CH0_DW22', '0x0458', 'DPIO2') -('PCS23_CH0_DW23', '0x045C', 'DPIO2') -('PCS23_CH0_DW24', '0x0460', 'DPIO2') -('PCS23_CH0_DW25', '0x0464', 'DPIO2') -('TX2_CH0_DW0', '0x0480', 'DPIO2') -('TX2_CH0_DW1', '0x0484', 'DPIO2') -('TX2_CH0_DW2', '0x0488', 'DPIO2') -('TX2_CH0_DW3', '0x048C', 'DPIO2') -('TX2_CH0_DW4', '0x0490', 'DPIO2') -('TX2_CH0_DW5', '0x0494', 'DPIO2') -('TX2_CH0_DW6', '0x0498', 'DPIO2') -('TX2_CH0_DW7', '0x049C', 'DPIO2') -('TX2_CH0_DW8', '0x04A0', 'DPIO2') -('TX2_CH0_DW9', '0x04A4', 'DPIO2') -('TX2_CH0_DW10', '0x04A8', 'DPIO2') -('TX2_CH0_DW11', '0x04AC', 'DPIO2') -('TX2_CH0_DW12', '0x04B0', 'DPIO2') -('TX2_CH0_DW13', '0x04B4', 'DPIO2') -('TX2_CH0_DW14', '0x04B8', 'DPIO2') -('TX2_CH0_DW15', '0x04BC', 'DPIO2') -('TX2_CH0_DW16', '0x04C0', 'DPIO2') -('TX2_CH0_DW17', '0x04C4', 'DPIO2') -('TX2_CH0_DW18', '0x04C8', 'DPIO2') -('TX2_CH0_DW19', '0x04CC', 'DPIO2') -('TX2_CH0_DW20', '0x04D0', 'DPIO2') -('TX3_CH0_DW0', '0x0680', 'DPIO2') -('TX3_CH0_DW1', '0x0684', 'DPIO2') -('TX3_CH0_DW2', '0x0688', 'DPIO2') -('TX3_CH0_DW3', '0x068C', 'DPIO2') -('TX3_CH0_DW4', '0x0690', 'DPIO2') -('TX3_CH0_DW5', '0x0694', 'DPIO2') -('TX3_CH0_DW6', '0x0698', 'DPIO2') -('TX3_CH0_DW7', '0x069C', 'DPIO2') -('TX3_CH0_DW8', '0x06A0', 'DPIO2') -('TX3_CH0_DW9', '0x06A4', 'DPIO2') -('TX3_CH0_DW10', '0x06A8', 'DPIO2') -('TX3_CH0_DW11', '0x06AC', 'DPIO2') -('TX3_CH0_DW12', '0x06B0', 'DPIO2') -('TX3_CH0_DW13', '0x06B4', 'DPIO2') -('TX3_CH0_DW14', '0x06B8', 'DPIO2') -('TX3_CH0_DW15', '0x06BC', 'DPIO2') -('TX3_CH0_DW16', '0x06C0', 'DPIO2') -('TX3_CH0_DW17', '0x06C4', 'DPIO2') -('TX3_CH0_DW18', '0x06C8', 'DPIO2') -('TX3_CH0_DW19', '0x06CC', 'DPIO2') -('TX3_CH0_DW20', '0x06D0', 'DPIO2') -('PCS01_CH1_DW0', '0x2600', 'DPIO2') -('PCS01_CH1_DW1', '0x2604', 'DPIO2') -('PCS01_CH1_DW2', '0x2608', 'DPIO2') -('PCS01_CH1_DW3', '0x260C', 'DPIO2') -('PCS01_CH1_DW4', '0x2610', 'DPIO2') -('PCS01_CH1_DW5', '0x2614', 'DPIO2') -('PCS01_CH1_DW6', '0x2618', 'DPIO2') -('PCS01_CH1_DW7', '0x261C', 'DPIO2') -('PCS01_CH1_DW8', '0x2620', 'DPIO2') -('PCS01_CH1_DW9', '0x2624', 'DPIO2') -('PCS01_CH1_DW10', '0x2628', 'DPIO2') -('PCS01_CH1_DW11', '0x262C', 'DPIO2') -('PCS01_CH1_DW12', '0x2630', 'DPIO2') -('PCS01_CH1_DW13', '0x2634', 'DPIO2') -('PCS01_CH1_DW14', '0x2638', 'DPIO2') -('PCS01_CH1_DW15', '0x263C', 'DPIO2') -('PCS01_CH1_DW16', '0x2640', 'DPIO2') -('PCS01_CH1_DW17', '0x2644', 'DPIO2') -('PCS01_CH1_DW18', '0x2648', 'DPIO2') -('PCS01_CH1_DW19', '0x264C', 'DPIO2') -('PCS01_CH1_DW20', '0x2650', 'DPIO2') -('PCS01_CH1_DW21', '0x2654', 'DPIO2') -('PCS01_CH1_DW22', '0x2658', 'DPIO2') -('PCS01_CH1_DW23', '0x265C', 'DPIO2') -('PCS01_CH1_DW24', '0x2660', 'DPIO2') -('PCS01_CH1_DW25', '0x2664', 'DPIO2') -('TX0_CH1_DW0', '0x2480', 'DPIO2') -('TX0_CH1_DW1', '0x2484', 'DPIO2') -('TX0_CH1_DW2', '0x2488', 'DPIO2') -('TX0_CH1_DW3', '0x248C', 'DPIO2') -('TX0_CH1_DW4', '0x2490', 'DPIO2') -('TX0_CH1_DW5', '0x2494', 'DPIO2') -('TX0_CH1_DW6', '0x2498', 'DPIO2') -('TX0_CH1_DW7', '0x249C', 'DPIO2') -('TX0_CH1_DW8', '0x24A0', 'DPIO2') -('TX0_CH1_DW9', '0x24A4', 'DPIO2') -('TX0_CH1_DW10', '0x24A8', 'DPIO2') -('TX0_CH1_DW11', '0x24AC', 'DPIO2') -('TX0_CH1_DW12', '0x24B0', 'DPIO2') -('TX0_CH1_DW13', '0x24B4', 'DPIO2') -('TX0_CH1_DW14', '0x24B8', 'DPIO2') -('TX0_CH1_DW15', '0x24BC', 'DPIO2') -('TX0_CH1_DW16', '0x24C0', 'DPIO2') -('TX0_CH1_DW17', '0x24C4', 'DPIO2') -('TX0_CH1_DW18', '0x24C8', 'DPIO2') -('TX0_CH1_DW19', '0x24CC', 'DPIO2') -('TX0_CH1_DW20', '0x24D0', 'DPIO2') -('TX1_CH1_DW0', '0x2680', 'DPIO2') -('TX1_CH1_DW1', '0x2684', 'DPIO2') -('TX1_CH1_DW2', '0x2688', 'DPIO2') -('TX1_CH1_DW3', '0x268C', 'DPIO2') -('TX1_CH1_DW4', '0x2690', 'DPIO2') -('TX1_CH1_DW5', '0x2694', 'DPIO2') -('TX1_CH1_DW6', '0x2698', 'DPIO2') -('TX1_CH1_DW7', '0x269C', 'DPIO2') -('TX1_CH1_DW8', '0x26A0', 'DPIO2') -('TX1_CH1_DW9', '0x26A4', 'DPIO2') -('TX1_CH1_DW10', '0x26A8', 'DPIO2') -('TX1_CH1_DW11', '0x26AC', 'DPIO2') -('TX1_CH1_DW12', '0x26B0', 'DPIO2') -('TX1_CH1_DW13', '0x26B4', 'DPIO2') -('TX1_CH1_DW14', '0x26B8', 'DPIO2') -('TX1_CH1_DW15', '0x26BC', 'DPIO2') -('TX1_CH1_DW16', '0x26C0', 'DPIO2') -('TX1_CH1_DW17', '0x26C4', 'DPIO2') -('TX1_CH1_DW18', '0x26C8', 'DPIO2') -('TX1_CH1_DW19', '0x26CC', 'DPIO2') -('TX1_CH1_DW20', '0x26D0', 'DPIO2') -('PCS23_CH1_DW0', '0x2800', 'DPIO2') -('PCS23_CH1_DW1', '0x2804', 'DPIO2') -('PCS23_CH1_DW2', '0x2808', 'DPIO2') -('PCS23_CH1_DW3', '0x280C', 'DPIO2') -('PCS23_CH1_DW4', '0x2810', 'DPIO2') -('PCS23_CH1_DW5', '0x2814', 'DPIO2') -('PCS23_CH1_DW6', '0x2818', 'DPIO2') -('PCS23_CH1_DW7', '0x281C', 'DPIO2') -('PCS23_CH1_DW8', '0x2820', 'DPIO2') -('PCS23_CH1_DW9', '0x2824', 'DPIO2') -('PCS23_CH1_DW10', '0x2828', 'DPIO2') -('PCS23_CH1_DW11', '0x282C', 'DPIO2') -('PCS23_CH1_DW12', '0x2830', 'DPIO2') -('PCS23_CH1_DW13', '0x2834', 'DPIO2') -('PCS23_CH1_DW14', '0x2838', 'DPIO2') -('PCS23_CH1_DW15', '0x283C', 'DPIO2') -('PCS23_CH1_DW16', '0x2840', 'DPIO2') -('PCS23_CH1_DW17', '0x2844', 'DPIO2') -('PCS23_CH1_DW18', '0x2848', 'DPIO2') -('PCS23_CH1_DW19', '0x284C', 'DPIO2') -('PCS23_CH1_DW20', '0x2850', 'DPIO2') -('PCS23_CH1_DW21', '0x2854', 'DPIO2') -('PCS23_CH1_DW22', '0x2858', 'DPIO2') -('PCS23_CH1_DW23', '0x285C', 'DPIO2') -('PCS23_CH1_DW24', '0x2860', 'DPIO2') -('PCS23_CH1_DW25', '0x2864', 'DPIO2') -('TX2_CH1_DW0', '0x2880', 'DPIO2') -('TX2_CH1_DW1', '0x2884', 'DPIO2') -('TX2_CH1_DW2', '0x2888', 'DPIO2') -('TX2_CH1_DW3', '0x288C', 'DPIO2') -('TX2_CH1_DW4', '0x2890', 'DPIO2') -('TX2_CH1_DW5', '0x2894', 'DPIO2') -('TX2_CH1_DW6', '0x2898', 'DPIO2') -('TX2_CH1_DW7', '0x289C', 'DPIO2') -('TX2_CH1_DW8', '0x28A0', 'DPIO2') -('TX2_CH1_DW9', '0x28A4', 'DPIO2') -('TX2_CH1_DW10', '0x28A8', 'DPIO2') -('TX2_CH1_DW11', '0x28AC', 'DPIO2') -('TX2_CH1_DW12', '0x28B0', 'DPIO2') -('TX2_CH1_DW13', '0x28B4', 'DPIO2') -('TX2_CH1_DW14', '0x28B8', 'DPIO2') -('TX2_CH1_DW15', '0x28BC', 'DPIO2') -('TX2_CH1_DW16', '0x28C0', 'DPIO2') -('TX2_CH1_DW17', '0x28C4', 'DPIO2') -('TX2_CH1_DW18', '0x28C8', 'DPIO2') -('TX2_CH1_DW19', '0x28CC', 'DPIO2') -('TX2_CH1_DW20', '0x28D0', 'DPIO2') -('TX3_CH1_DW0', '0x2A80', 'DPIO2') -('TX3_CH1_DW1', '0x2A84', 'DPIO2') -('TX3_CH1_DW2', '0x2A88', 'DPIO2') -('TX3_CH1_DW3', '0x2A8C', 'DPIO2') -('TX3_CH1_DW4', '0x2A90', 'DPIO2') -('TX3_CH1_DW5', '0x2A94', 'DPIO2') -('TX3_CH1_DW6', '0x2A98', 'DPIO2') -('TX3_CH1_DW7', '0x2A9C', 'DPIO2') -('TX3_CH1_DW8', '0x2AA0', 'DPIO2') -('TX3_CH1_DW9', '0x2AA4', 'DPIO2') -('TX3_CH1_DW10', '0x2AA8', 'DPIO2') -('TX3_CH1_DW11', '0x2AAC', 'DPIO2') -('TX3_CH1_DW12', '0x2AB0', 'DPIO2') -('TX3_CH1_DW13', '0x2AB4', 'DPIO2') -('TX3_CH1_DW14', '0x2AB8', 'DPIO2') -('TX3_CH1_DW15', '0x2ABC', 'DPIO2') -('TX3_CH1_DW16', '0x2AC0', 'DPIO2') -('TX3_CH1_DW17', '0x2AC4', 'DPIO2') -('TX3_CH1_DW18', '0x2AC8', 'DPIO2') -('TX3_CH1_DW19', '0x2ACC', 'DPIO2') -('TX3_CH1_DW20', '0x2AD0', 'DPIO2') diff --git a/tools/quick_dump/chv_pipe_c.txt b/tools/quick_dump/chv_pipe_c.txt deleted file mode 100644 index 8c5d3f87..00000000 --- a/tools/quick_dump/chv_pipe_c.txt +++ /dev/null @@ -1,168 +0,0 @@ -('PIPEC_DSL', '0x74000', '0x180000') -('PIPEC_SLC', '0x74004', '0x180000') -('PIPECCONF', '0x74008', '0x180000') -('PIPECGCMAXRED', '0x74010', '0x180000') -('PIPECGCMAXGREEN', '0x74014', '0x180000') -('PIPECGCMAXBLUE', '0x74018', '0x180000') -('PIPECSTAT', '0x74024', '0x180000') -('PIPECFRAMECOUNT', '0x74040', '0x180000') -('PIPECFLIPCOUNT', '0x74044', '0x180000') -('PIPECMSAMISC', '0x74048', '0x180000') - -('DSPCADDR', '0x7417C', '0x180000') -('DSPCCNTR', '0x74180', '0x180000') -('DSPCLINOFF', '0x74184', '0x180000') -('DSPCSTRIDE', '0x74188', '0x180000') -('DSPCKEYVAL', '0x74194', '0x180000') -('DSPCKEYMSK', '0x74198', '0x180000') -('DSPCSURF', '0x7419C', '0x180000') -('DSPCTILEOFF', '0x741A4', '0x180000') -('DSPCSURFLIVE', '0x741AC', '0x180000') -('DSPCFLPQSTAT', '0x74200', '0x180000') - -('CURCCNTR', '0x700E0', '0x180000') -('CURCBASE', '0x700E4', '0x180000') -('CURCPOS', '0x700E8', '0x180000') -('CURCRESV', '0x700EC', '0x180000') -('CURCPALET0', '0x700F0', '0x180000') -('CURCPALET1', '0x700F4', '0x180000') -('CURCPALET2', '0x700F8', '0x180000') -('CURCPALET3', '0x700FC', '0x180000') -('CURCLIVEBASE', '0x700B0', '0x180000') - -('SPECNTR', '0x72580', '0x180000') -('SPELINOFF', '0x72584', '0x180000') -('SPESTRIDE', '0x72588', '0x180000') -('SPEPOS', '0x7258C', '0x180000') -('SPESIZE', '0x72590', '0x180000') -('SPEKEYMINVAL', '0x72594', '0x180000') -('SPEKEYMSK', '0x72598', '0x180000') -('SPESURF', '0x7259C', '0x180000') -('SPEKEYMAXVAL', '0x725A0', '0x180000') -('SPETILEOFF', '0x725A4', '0x180000') -('SPECONTALPHA', '0x725A8', '0x180000') -('SPELIVESURF', '0x725AC', '0x180000') -('SPECLRC0', '0x725D0', '0x180000') -('SPECLRC1', '0x725D4', '0x180000') -('SPEGAMC5', '0x725E0', '0x180000') -('SPEGAMC4', '0x725E4', '0x180000') -('SPEGAMC3', '0x725E8', '0x180000') -('SPEGAMC2', '0x725EC', '0x180000') -('SPEGAMC1', '0x725F0', '0x180000') -('SPEGAMC0', '0x725F4', '0x180000') - -('SPFCNTR', '0x72680', '0x180000') -('SPFLINOFF', '0x72684', '0x180000') -('SPFSTRIDE', '0x72688', '0x180000') -('SPFPOS', '0x7268C', '0x180000') -('SPFSIZE', '0x72690', '0x180000') -('SPFKEYMINVAL', '0x72694', '0x180000') -('SPFKEYMSK', '0x72698', '0x180000') -('SPFSURF', '0x7269C', '0x180000') -('SPFKEYMAXVAL', '0x726A0', '0x180000') -('SPFTILEOFF', '0x726A4', '0x180000') -('SPFCONTALPHA', '0x726A8', '0x180000') -('SPFLIVESURF', '0x726AC', '0x180000') -('SPFCLRC0', '0x726D0', '0x180000') -('SPFCLRC1', '0x726D4', '0x180000') -('SPFGAMC5', '0x726E0', '0x180000') -('SPFGAMC4', '0x726E4', '0x180000') -('SPFGAMC3', '0x726E8', '0x180000') -('SPFGAMC2', '0x726EC', '0x180000') -('SPFGAMC1', '0x726F0', '0x180000') -('SPFGAMC0', '0x726F4', '0x180000') - -('DPALETTE_C', '0xC000', '0x180000') -('DPLLC_CTRL', '0x6030', '0x180000') -('DPLLCMD', '0x603C', '0x180000') - -('HTOTAL_C', '0x63000', '0x180000') -('HBLANK_C', '0x63004', '0x180000') -('HSYNC_C', '0x63008', '0x180000') -('VTOTAL_C', '0x6300C', '0x180000') -('VBLANK_C', '0x63010', '0x180000') -('VSYNC_C', '0x63014', '0x180000') -('PIPECSRC', '0x6301C', '0x180000') -('BCLRPAT_C', '0x63020', '0x180000') -('VSYNCSHIFT_C', '0x63028', '0x180000') - -('TRANSC_DATA_M1', '0x63030', '0x180000') -('TRANSC_DATA_N1', '0x63034', '0x180000') -('TRANSC_DATA_M2', '0x63038', '0x180000') -('TRANSC_DATA_N2', '0x6303C', '0x180000') -('TRANSC_LINK_M1', '0x63040', '0x180000') -('TRANSC_LINK_N1', '0x63044', '0x180000') -('TRANSC_LINK_M2', '0x63048', '0x180000') -('TRANSC_LINK_N2', '0x6304C', '0x180000') - -('CRC_CTRL_RED_C', '0x63050', '0x180000') -('CRC_CTRL_GREEN_C', '0x63054', '0x180000') -('CRC_CTRL_BLUE_C', '0x63058', '0x180000') -('CRC_CTRL_ALPHA_C', '0x6305C', '0x180000') -('CRC_CTRL_RESIDUE2_C', '0x63070', '0x180000') -('CRC_RES_RED_C', '0x63060', '0x180000') -('CRC_RES_GREEN_C', '0x63064', '0x180000') -('CRC_RES_BLUE_C', '0x63068', '0x180000') -('CRC_RES_ALPHA_C', '0x6306C', '0x180000') -('CRC_RES_RESIDUAL2_C', '0x63080', '0x180000') - -('PSRCTLC', '0x63090', '0x180000') -('PSRSTATC', '0x63094', '0x180000') -('PSRCRC1C', '0x63098', '0x180000') -('PSRCRC2C', '0x6309C', '0x180000') -('VSCSDPC', '0x630A0', '0x180000') - -('PIPEC_WGCC_C01_C00', '0x630B0', '0x180000') -('PIPEC_WGCC_C02', '0x630B4', '0x180000') -('PIPEC_WGCC_C11_C10', '0x630B8', '0x180000') -('PIPEC_WGCC_C12', '0x630BC', '0x180000') -('PIPEC_WGCC_C21_C20', '0x630C0', '0x180000') -('PIPEC_WGCC_C22', '0x630C4', '0x180000') - -('VIDEO_DIP_CTL_C', '0x611F0', '0x180000') -('VIDEO_DIP_DATA_C', '0x611F4', '0x180000') -('VIDEO_DIP_GDCP_PAYLOAD_C', '0x611F8', '0x180000') - -('PIPEC_CGM_DEGAMMA', '0x6A000', '0x180000') -('PIPEC_CGM_GAMMA', '0x6B000', '0x180000') -('PIPEC_CGM_CSC_COEFF01', '0x6B900', '0x180000') -('PIPEC_CGM_CSC_COEFF23', '0x6B904', '0x180000') -('PIPEC_CGM_CSC_COEFF45', '0x6B908', '0x180000') -('PIPEC_CGM_CSC_COEFF67', '0x6B90C', '0x180000') -('PIPEC_CGM_CSC_COEFF8', '0x6B910', '0x180000') -('PIPEC_CGM_CONTROL', '0x6BA00', '0x180000') - -('PIPEC_PP_STATUS', '0x61900', '0x180000') -('PIPEC_PP_CONTROL', '0x61904', '0x180000') -('PIPEC_PP_ON_DELAYS', '0x61908', '0x180000') -('PIPEC_PP_OFF_DELAYS', '0x6190C', '0x180000') -('PIPEC_PP_DIVISOR', '0x61910', '0x180000') - -('AUD_CONFIG_C', '0x62200', '0x180000') -('AUD_MISC_CTRL_C', '0x62210', '0x180000') -('AUD_CTS_ENABLE_C', '0x62228', '0x180000') -('AUD_HDMIW_HDMIEDID_C', '0x62250', '0x180000') -('AUD_HDMIW_INFOFR_C', '0x62254', '0x180000') -('AUD_OUT_DIG_CNVT_C', '0x62280', '0x180000') -('AUD_OUT_STR_DESC_C', '0x62284', '0x180000') -('AUD_CNTL_ST_C', '0x622B4', '0x180000') -('AUD_OUT_DIG_CNVTC_DBG', '0x62F48', '0x180000') - -('STREAM_C_LPE_AUD_CONFIG', '0x65900', '0x180000') -('STREAM_C_LPE_AUD_CH_STATUS_0', '0x65908', '0x180000') -('STREAM_C_LPE_AUD_CH_STATUS_1', '0x6590C', '0x180000') -('STREAM_C_LPE_AUD_HDMI_CTS_DP_MAUD', '0x65910', '0x180000') -('STREAM_C_LPE_AUD_HDMI_N_DP_NAUD', '0x65914', '0x180000') -('STREAM_C_LPE_AUD_BUFFER_CONFIG', '0x65920', '0x180000') -('STREAM_C_LPE_AUD_BUF_CH_SWP', '0x65924', '0x180000') -('STREAM_C_LPE_AUD_BUF_A_ADDR', '0x65940', '0x180000') -('STREAM_C_LPE_AUD_BUF_A_LENGTH', '0x65944', '0x180000') -('STREAM_C_LPE_AUD_BUF_B_ADDR', '0x65948', '0x180000') -('STREAM_C_LPE_AUD_BUF_B_LENGTH', '0x6594C', '0x180000') -('STREAM_C_LPE_AUD_BUF_C_ADDR', '0x65950', '0x180000') -('STREAM_C_LPE_AUD_BUF_C_LENGTH', '0x65954', '0x180000') -('STREAM_C_LPE_AUD_BUF_D_ADDR', '0x65958', '0x180000') -('STREAM_C_LPE_AUD_BUF_D_LENGTH', '0x6595C', '0x180000') -('STREAM_C_LPE_AUD_CNTL_ST', '0x65960', '0x180000') -('STREAM_C_LPE_AUD_HDMI_STATUS', '0x65964', '0x180000') -('STREAM_C_LPE_AUD_HDMIW_INFOFR', '0x65968', '0x180000') diff --git a/tools/quick_dump/common_display.txt b/tools/quick_dump/common_display.txt deleted file mode 100644 index 8bead7f8..00000000 --- a/tools/quick_dump/common_display.txt +++ /dev/null @@ -1,197 +0,0 @@ -('CPU_VGACNTRL', '0x00041000', '') -('PORT_DBG', '0x00042308', '') -('DIGITAL_PORT_HOTPLUG_CNTRL', '0x00044030', '') -('FDI_PLL_BIOS_0', '0x00046000', '') -('FDI_PLL_BIOS_1', '0x00046004', '') -('FDI_PLL_BIOS_2', '0x00046008', '') -('DISPLAY_PORT_PLL_BIOS_0', '0x0004600c', '') -('DISPLAY_PORT_PLL_BIOS_1', '0x00046010', '') -('DISPLAY_PORT_PLL_BIOS_2', '0x00046014', '') -('FDI_PLL_FREQ_CTL', '0x00046030', '') -('BLC_PWM_CPU_CTL2', '0x00048250', '') -('BLC_PWM_CPU_CTL', '0x00048254', '') -('HTOTAL_A', '0x00060000', '') -('HBLANK_A', '0x00060004', '') -('HSYNC_A', '0x00060008', '') -('VTOTAL_A', '0x0006000c', '') -('VBLANK_A', '0x00060010', '') -('VSYNC_A', '0x00060014', '') -('PIPEASRC', '0x0006001c', '') -('VSYNCSHIFT_A', '0x00060028', '') -('PIPEA_DATA_M1', '0x00060030', '') -('PIPEA_DATA_N1', '0x00060034', '') -('PIPEA_DATA_M2', '0x00060038', '') -('PIPEA_DATA_N2', '0x0006003c', '') -('PIPEA_LINK_M1', '0x00060040', '') -('PIPEA_LINK_N1', '0x00060044', '') -('PIPEA_LINK_M2', '0x00060048', '') -('PIPEA_LINK_N2', '0x0006004c', '') -('FDI_TXA_CTL', '0x00060100', '') -('HTOTAL_B', '0x00061000', '') -('HBLANK_B', '0x00061004', '') -('HSYNC_B', '0x00061008', '') -('VTOTAL_B', '0x0006100c', '') -('VBLANK_B', '0x00061010', '') -('VSYNC_B', '0x00061014', '') -('PIPEBSRC', '0x0006101c', '') -('VSYNCSHIFT_B', '0x00061028', '') -('PIPEB_DATA_M1', '0x00061030', '') -('PIPEB_DATA_N1', '0x00061034', '') -('PIPEB_DATA_M2', '0x00061038', '') -('PIPEB_DATA_N2', '0x0006103c', '') -('PIPEB_LINK_M1', '0x00061040', '') -('PIPEB_LINK_N1', '0x00061044', '') -('PIPEB_LINK_M2', '0x00061048', '') -('PIPEB_LINK_N2', '0x0006104c', '') -('FDI_TXB_CTL', '0x00061100', '') -('HTOTAL_C', '0x00062000', '') -('HBLANK_C', '0x00062004', '') -('HSYNC_C', '0x00062008', '') -('VTOTAL_C', '0x0006200c', '') -('VBLANK_C', '0x00062010', '') -('VSYNC_C', '0x00062014', '') -('PIPECSRC', '0x0006201c', '') -('VSYNCSHIFT_C', '0x00062028', '') -('PIPEC_DATA_M1', '0x00062030', '') -('PIPEC_DATA_N1', '0x00062034', '') -('PIPEC_DATA_M2', '0x00062038', '') -('PIPEC_DATA_N2', '0x0006203c', '') -('PIPEC_LINK_M1', '0x00062040', '') -('PIPEC_LINK_N1', '0x00062044', '') -('PIPEC_LINK_M2', '0x00062048', '') -('PIPEC_LINK_N2', '0x0006204c', '') -('FDI_TXC_CTL', '0x00062100', '') -('CPU_eDP_A', '0x00064000', '') -('PFA_WIN_POS', '0x00068070', '') -('PFA_WIN_SIZE', '0x00068074', '') -('PFA_CTL_1', '0x00068080', '') -('PFA_CTL_2', '0x00068084', '') -('PFA_CTL_3', '0x00068088', '') -('PFA_CTL_4', '0x00068090', '') -('PFB_WIN_POS', '0x00068870', '') -('PFB_WIN_SIZE', '0x00068874', '') -('PFB_CTL_1', '0x00068880', '') -('PFB_CTL_2', '0x00068884', '') -('PFB_CTL_3', '0x00068888', '') -('PFB_CTL_4', '0x00068890', '') -('PFC_WIN_POS', '0x00069070', '') -('PFC_WIN_SIZE', '0x00069074', '') -('PFC_CTL_1', '0x00069080', '') -('PFC_CTL_2', '0x00069084', '') -('PFC_CTL_3', '0x00069088', '') -('PFC_CTL_4', '0x00069090', '') -('PIPEACONF', '0x00070008', '') -('DSPACNTR', '0x00070180', '') -('DSPABASE', '0x00070184', '') -('DSPASTRIDE', '0x00070188', '') -('DSPASURF', '0x0007019c', '') -('DSPATILEOFF', '0x000701a4', '') -('PIPEBCONF', '0x00071008', '') -('DSPBCNTR', '0x00071180', '') -('DSPBBASE', '0x00071184', '') -('DSPBSTRIDE', '0x00071188', '') -('DSPBSURF', '0x0007119c', '') -('DSPBTILEOFF', '0x000711a4', '') -('PIPECCONF', '0x00072008', '') -('DSPCCNTR', '0x00072180', '') -('DSPCBASE', '0x00072184', '') -('DSPCSTRIDE', '0x00072188', '') -('DSPCSURF', '0x0007219c', '') -('DSPCTILEOFF', '0x000721a4', '') -('PCH_DPLL_A', '0x000c6014', '') -('PCH_DPLL_B', '0x000c6018', '') -('PCH_FPA0', '0x000c6040', '') -('PCH_FPA1', '0x000c6044', '') -('PCH_FPB0', '0x000c6048', '') -('PCH_FPB1', '0x000c604c', '') -('PCH_DREF_CONTROL', '0x000c6200', '') -('PCH_RAWCLK_FREQ', '0x000c6204', '') -('PCH_DPLL_TMR_CFG', '0x000c6208', '') -('PCH_SSC4_PARMS', '0x000c6210', '') -('PCH_SSC4_AUX_PARMS', '0x000c6214', '') -('PCH_DPLL_ANALOG_CTL', '0x000c6300', '') -('PCH_DPLL_SEL', '0x000c7000', '') -('PCH_PP_STATUS', '0x000c7200', '') -('PCH_PP_CONTROL', '0x000c7204', '') -('PCH_PP_ON_DELAYS', '0x000c7208', '') -('PCH_PP_OFF_DELAYS', '0x000c720c', '') -('PCH_PP_DIVISOR', '0x000c7210', '') -('BLC_PWM_PCH_CTL1', '0x000c8250', '') -('BLC_PWM_PCH_CTL2', '0x000c8254', '') -('TRANS_HTOTAL_A', '0x000e0000', '') -('TRANS_HBLANK_A', '0x000e0004', '') -('TRANS_HSYNC_A', '0x000e0008', '') -('TRANS_VTOTAL_A', '0x000e000c', '') -('TRANS_VBLANK_A', '0x000e0010', '') -('TRANS_VSYNC_A', '0x000e0014', '') -('TRANS_VSYNCSHIFT_A', '0x000e0028', '') -('TRANSA_DATA_M1', '0x000e0030', '') -('TRANSA_DATA_N1', '0x000e0034', '') -('TRANSA_DATA_M2', '0x000e0038', '') -('TRANSA_DATA_N2', '0x000e003c', '') -('TRANSA_DP_LINK_M1', '0x000e0040', '') -('TRANSA_DP_LINK_N1', '0x000e0044', '') -('TRANSA_DP_LINK_M2', '0x000e0048', '') -('TRANSA_DP_LINK_N2', '0x000e004c', '') -('TRANS_DP_CTL_A', '0x000e0300', '') -('TRANS_HTOTAL_B', '0x000e1000', '') -('TRANS_HBLANK_B', '0x000e1004', '') -('TRANS_HSYNC_B', '0x000e1008', '') -('TRANS_VTOTAL_B', '0x000e100c', '') -('TRANS_VBLANK_B', '0x000e1010', '') -('TRANS_VSYNC_B', '0x000e1014', '') -('TRANS_VSYNCSHIFT_B', '0x000e1028', '') -('TRANSB_DATA_M1', '0x000e1030', '') -('TRANSB_DATA_N1', '0x000e1034', '') -('TRANSB_DATA_M2', '0x000e1038', '') -('TRANSB_DATA_N2', '0x000e103c', '') -('TRANSB_DP_LINK_M1', '0x000e1040', '') -('TRANSB_DP_LINK_N1', '0x000e1044', '') -('TRANSB_DP_LINK_M2', '0x000e1048', '') -('TRANSB_DP_LINK_N2', '0x000e104c', '') -('PCH_ADPA', '0x000e1100', '') -('HDMIB', '0x000e1140', '') -('HDMIC', '0x000e1150', '') -('HDMID', '0x000e1160', '') -('PCH_LVDS', '0x000e1180', '') -('TRANS_DP_CTL_B', '0x000e1300', '') -('TRANS_HTOTAL_C', '0x000e2000', '') -('TRANS_HBLANK_C', '0x000e2004', '') -('TRANS_HSYNC_C', '0x000e2008', '') -('TRANS_VTOTAL_C', '0x000e200c', '') -('TRANS_VBLANK_C', '0x000e2010', '') -('TRANS_VSYNC_C', '0x000e2014', '') -('TRANS_VSYNCSHIFT_C', '0x000e2028', '') -('TRANSC_DATA_M1', '0x000e2030', '') -('TRANSC_DATA_N1', '0x000e2034', '') -('TRANSC_DATA_M2', '0x000e2038', '') -('TRANSC_DATA_N2', '0x000e203c', '') -('TRANSC_DP_LINK_M1', '0x000e2040', '') -('TRANSC_DP_LINK_N1', '0x000e2044', '') -('TRANSC_DP_LINK_M2', '0x000e2048', '') -('TRANSC_DP_LINK_N2', '0x000e204c', '') -('TRANS_DP_CTL_C', '0x000e2300', '') -('PCH_DP_B', '0x000e4100', '') -('PCH_DP_C', '0x000e4200', '') -('PCH_DP_D', '0x000e4300', '') -('TRANSACONF', '0x000f0008', '') -('FDI_RXA_CTL', '0x000f000c', '') -('FDI_RXA_MISC', '0x000f0010', '') -('FDI_RXA_IIR', '0x000f0014', '') -('FDI_RXA_IMR', '0x000f0018', '') -('FDI_RXA_TUSIZE1', '0x000f0030', '') -('FDI_RXA_TUSIZE2', '0x000f0038', '') -('TRANSBCONF', '0x000f1008', '') -('FDI_RXB_CTL', '0x000f100c', '') -('FDI_RXB_MISC', '0x000f1010', '') -('FDI_RXB_IIR', '0x000f1014', '') -('FDI_RXB_IMR', '0x000f1018', '') -('FDI_RXB_TUSIZE1', '0x000f1030', '') -('FDI_RXB_TUSIZE2', '0x000f1038', '') -('TRANSCCONF', '0x000f2008', '') -('FDI_RXC_CTL', '0x000f200c', '') -('FDI_RXC_MISC', '0x000f2010', '') -('FDI_RXC_TUSIZE1', '0x000f2030', '') -('FDI_RXC_TUSIZE2', '0x000f2038', '') -('FDI_PLL_CTL_1', '0x000fe000', '') -('FDI_PLL_CTL_2', '0x000fe004', '') diff --git a/tools/quick_dump/gen6_other.txt b/tools/quick_dump/gen6_other.txt deleted file mode 100644 index 9aa65390..00000000 --- a/tools/quick_dump/gen6_other.txt +++ /dev/null @@ -1 +0,0 @@ -('GFX_MODE', '0x00002520', '') diff --git a/tools/quick_dump/gen7_other.txt b/tools/quick_dump/gen7_other.txt deleted file mode 100644 index 9db9b4e2..00000000 --- a/tools/quick_dump/gen7_other.txt +++ /dev/null @@ -1,3 +0,0 @@ -('RCS_MODE_GEN7', '0x0000229c', '') -('VCS_MODE_GEN7', '0x0001229c', '') -('BCS_MODE_GEN7', '0x0002229c', '') diff --git a/tools/quick_dump/gen8_interrupt.txt b/tools/quick_dump/gen8_interrupt.txt deleted file mode 100644 index d3966488..00000000 --- a/tools/quick_dump/gen8_interrupt.txt +++ /dev/null @@ -1,44 +0,0 @@ -('GEN8_MASTER_IRQ', '0x00044200', '') -('GEN8_GT_ISR0', '0x00044300', '') -('GEN8_GT_IMR0', '0x00044304', '') -('GEN8_GT_IIR0', '0x00044308', '') -('GEN8_GT_IER0', '0x0004430c', '') -('GEN8_GT_ISR1', '0x00044310', '') -('GEN8_GT_IMR1', '0x00044314', '') -('GEN8_GT_IIR1', '0x00044318', '') -('GEN8_GT_IER1', '0x0004431c', '') -('GEN8_GT_ISR2', '0x00044320', '') -('GEN8_GT_IMR2', '0x00044324', '') -('GEN8_GT_IIR2', '0x00044328', '') -('GEN8_GT_IER2', '0x0004432c', '') -('GEN8_GT_ISR3', '0x00044330', '') -('GEN8_GT_IMR3', '0x00044334', '') -('GEN8_GT_IIR3', '0x00044338', '') -('GEN8_GT_IER3', '0x0004433c', '') -('GEN8_DE_PIPE_ISR0', '0x44400', '') -('GEN8_DE_PIPE_IMR0', '0x44404', '') -('GEN8_DE_PIPE_IIR0', '0x44408', '') -('GEN8_DE_PIPE_IER0', '0x4440c', '') -('GEN8_DE_PIPE_ISR1', '0x44410', '') -('GEN8_DE_PIPE_IMR1', '0x44414', '') -('GEN8_DE_PIPE_IIR1', '0x44418', '') -('GEN8_DE_PIPE_IER1', '0x4441c', '') -('GEN8_DE_PIPE_ISR2', '0x44420', '') -('GEN8_DE_PIPE_IMR2', '0x44424', '') -('GEN8_DE_PIPE_IIR2', '0x44428', '') -('GEN8_DE_PIPE_IER2', '0x4442c', '') -('GEN8_DE_PORT_ISR', '0x44440', '') -('GEN8_DE_PORT_IMR', '0x44444', '') -('GEN8_DE_PORT_IIR', '0x44448', '') -('GEN8_DE_PORT_IER', '0x4444c', '') -('GEN8_DE_MISC_ISR', '0x44460', '') -('GEN8_DE_MISC_IMR', '0x44464', '') -('GEN8_DE_MISC_IIR', '0x44468', '') -('GEN8_DE_MISC_IER', '0x4446c', '') -('GEN8_PCU_ISR', '0x444e0', '') -('GEN8_PCU_IMR', '0x444e4', '') -('GEN8_PCU_IIR', '0x444e8', '') -('GEN8_PCU_IER', '0x444ec', '') -('RENDER_IMR', '0x000020a8', '') -('BSD_IMR', '0x000120a8', '') -('BLT_IMR', '0x000220a8', '') diff --git a/tools/quick_dump/gen8_other.txt b/tools/quick_dump/gen8_other.txt deleted file mode 100644 index 02c6f096..00000000 --- a/tools/quick_dump/gen8_other.txt +++ /dev/null @@ -1,2 +0,0 @@ -('PRIVATE_PAT1', '0x000040e0', '') -('PRIVATE_PAT2', '0x000040e4', '') diff --git a/tools/quick_dump/haswell b/tools/quick_dump/haswell deleted file mode 100644 index 94ffb7c7..00000000 --- a/tools/quick_dump/haswell +++ /dev/null @@ -1,5 +0,0 @@ -common_display.txt -gen7_other.txt -haswell_other.txt -audio_config_haswell_plus.txt -audio_debug_haswell_plus.txt diff --git a/tools/quick_dump/haswell_other.txt b/tools/quick_dump/haswell_other.txt deleted file mode 100644 index 4529aabe..00000000 --- a/tools/quick_dump/haswell_other.txt +++ /dev/null @@ -1,25 +0,0 @@ -('VECS_MODE_GEN7', '0x0001a29c', '') - -('HSW_FUSE_STRAP', '0x00042014', '') -('HSW_PWR_WELL_BIOS', '0x00045400', '') -('HSW_PWR_WELL_DRIVER', '0x00045404', '') -('HSW_PWR_WELL_KVMR', '0x00045408', '') -('HSW_PWR_WELL_DEBUG', '0x0004540c', '') -('HSW_PWR_WELL_CTL5', '0x00045410', '') -('HSW_PWR_WELL_CTL6', '0x00045414', '') - -# Watermarks -('WM_PIPE_A', '0x45100', '') -('WM_LINETIME_A', '0x45270', '') -('WM_PIPE_B', '0x45104', '') -('WM_LINETIME_B', '0x45274', '') -('WM_PIPE_C', '0x45200', '') -('WM_LINETIME_C', '0x45278', '') -('WM_LP_1', '0x45108', '') -('WM_LP_2', '0x4510c', '') -('WM_LP_3', '0x45110', '') -('WM_LP_SPR_1', '0x45120', '') -('WM_LP_SPR_2', '0x45124', '') -('WM_LP_SPR_3', '0x45128', '') -('WM_MISC', '0x45260', '') -('WM_DBG', '0x45280', '') diff --git a/tools/quick_dump/ivybridge b/tools/quick_dump/ivybridge deleted file mode 100644 index 79bda9b1..00000000 --- a/tools/quick_dump/ivybridge +++ /dev/null @@ -1,2 +0,0 @@ -common_display.txt -gen7_other.txt diff --git a/tools/quick_dump/quick_dump.py b/tools/quick_dump/quick_dump.py deleted file mode 100755 index 702a9d52..00000000 --- a/tools/quick_dump/quick_dump.py +++ /dev/null @@ -1,117 +0,0 @@ -#!/usr/bin/env python3 - -# register definition format: -# ('register name', 'register offset', 'register type') -# -# register types: -# '' - normal register -# 'DPIO' - DPIO register -# -# vim: tabstop=8 expandtab shiftwidth=4 softtabstop=4 - -import argparse -import os -import sys -import ast -import subprocess -import chipset -import reg_access as reg - -# Ignore lines which are considered comments -def ignore_line(line): - if not line.strip(): - return True - if len(line) > 1: - if line[1] == '/' and line[0] == '/': - return True - if len(line) > 0: - if line[0] == '#' or line[0] == ';': - return True - return False - -def parse_file(file): - print('{0:^10s} | {1:^33s} | {2:^10s}'. format('offset', file.name, 'value')) - print('-' * 59) - for line in file: - if ignore_line(line): - continue - register = ast.literal_eval(line) - intreg = int(register[1], 16) - if register[2] == 'FLISDSI': - val = reg.flisdsi_read(intreg) - elif register[2] == 'DPIO': - val = reg.dpio_read(intreg, 0) - elif register[2] == 'DPIO2': - val = reg.dpio_read(intreg, 1) - else: - if register[2] != '': - intreg = intreg + int(register[2], 16) - val = reg.read(intreg) - print('{0:#010x} | {1:<33} | {2:#010x}'.format(intreg, register[0], val)) - print('') - -def walk_base_files(): - for root, dirs, files in os.walk('.'): - for name in files: - if name.startswith(("base_")): - file = open(name.rstrip(), 'r') - parse_file(file) - -def autodetect_chipset(): - pci_dev = chipset.intel_get_pci_device() - devid = chipset.pcidev_to_devid(pci_dev) - if chipset.is_sandybridge(devid): - return open('sandybridge', 'r') - elif chipset.is_ivybridge(devid): - return open('ivybridge', 'r') - elif chipset.is_cherryview(devid): - return open('cherryview', 'r') - elif chipset.is_valleyview(devid): - return open('valleyview', 'r') - elif chipset.is_haswell(devid): - return open('haswell', 'r') - elif chipset.is_broadwell(devid): - return open('broadwell', 'r') - elif chipset.is_skylake(devid): - return open('skylake', 'r') - else: - print("Autodetect of devid " + hex(devid) + " failed") - return None - -if __name__ == "__main__": - parser = argparse.ArgumentParser(description='Dumb register dumper.') - parser.add_argument('-b', '--baseless', - action='store_true', default=False, - help='baseless mode, ignore files starting with base_') - parser.add_argument('-f', '--file', - type=argparse.FileType('r'), default=None) - parser.add_argument('profile', nargs='?', - type=argparse.FileType('r'), default=None) - - args = parser.parse_args() - - if reg.init() == False: - print("Register initialization failed") - sys.exit() - - # Put us where the script is - os.chdir(os.path.dirname(sys.argv[0])) - - # specifying a file trumps all other things - if args.file != None: - parse_file(args.file) - sys.exit() - - #parse anything named base_ these are assumed to apply for all gens. - if args.baseless == False: - walk_base_files() - - if args.profile == None: - args.profile = autodetect_chipset() - - if args.profile == None: - sys.exit() - - for extra in args.profile: - extra_file = open(extra.rstrip(), 'r') - parse_file(extra_file) diff --git a/tools/quick_dump/reg_access.py b/tools/quick_dump/reg_access.py deleted file mode 100755 index 6a93f63e..00000000 --- a/tools/quick_dump/reg_access.py +++ /dev/null @@ -1,62 +0,0 @@ -#!/usr/bin/env python3 -# vim: tabstop=8 expandtab shiftwidth=4 softtabstop=4 -import chipset - -def read(reg): - val = chipset.intel_register_read(reg) - return val - -def write(reg, val): - chipset.intel_register_write(reg, val) - -def gen6_forcewake_get(): - write(0xa18c, 0x1) - read(0xa180) - -def mt_forcewake_get(): - write(0xa188, 0x10001) - read(0xa180) - -def vlv_forcewake_get(): - write(0x1300b0, 0x10001) - read(0x1300b4) - -# don't be clever, just try all possibilities -def get_wake(): - gen6_forcewake_get() - mt_forcewake_get() - vlv_forcewake_get() - -def dpio_read(reg, phy): - phy = int(phy) - - val = chipset.intel_dpio_reg_read(reg, phy) - return val - -def flisdsi_read(reg): - val = chipset.intel_flisdsi_reg_read(reg) - return val - - -def init(): - pci_dev = chipset.intel_get_pci_device() - ret = chipset.intel_register_access_init(pci_dev, 0) - if ret != 0: - print("Register access init failed"); - return False - - if chipset.intel_register_access_needs_fakewake(): - print("Forcing forcewake. Don't expect your system to work after this.") - get_wake() - - return True - -if __name__ == "__main__": - import sys - - if init() == False: - sys.exit() - - reg = sys.argv[1] - print(hex(read(int(reg,16)))) - chipset.intel_register_access_fini() diff --git a/tools/quick_dump/sandybridge b/tools/quick_dump/sandybridge deleted file mode 100644 index a0a4474a..00000000 --- a/tools/quick_dump/sandybridge +++ /dev/null @@ -1,2 +0,0 @@ -common_display.txt -gen6_other.txt diff --git a/tools/quick_dump/skl_display.txt b/tools/quick_dump/skl_display.txt deleted file mode 100644 index 29f65249..00000000 --- a/tools/quick_dump/skl_display.txt +++ /dev/null @@ -1,285 +0,0 @@ -# CLOCKS -('DPLL_STATUS', '0x6c060', '') -('DPLL1_CFGCR1', '0x6c040', '') -('DPLL2_CFGCR1', '0x6c048', '') -('DPLL3_CFGCR1', '0x6c050', '') -('DPLL1_CFGCR2', '0x6c044', '') -('DPLL2_CFGCR2', '0x6c04c', '') -('DPLL3_CFGCR2', '0x6c054', '') -('DPLL_CTRL1', '0x6c058', '') -('DPLL_CTRL2', '0x6c05c', '') -('CDCLK_CTL', '0x46000', '') -('LCPLL1_CTL', '0x46010', '') -('LCPLL2_CTL', '0x46014', '') -('TRANS_CLK_SEL_A', '0x46140', '') -('TRANS_CLK_SEL_B', '0x46144', '') -('TRANS_CLK_SEL_C', '0x46148', '') -('WRPLL_CTL1', '0x46040', '') -('WRPLL_CTL2', '0x46060', '') -# PIPE_A_PLANE -('PLANE_BUF_CFG_1_A', '0x7027c', '') -('PLANE_BUF_CFG_2_A', '0x7037c', '') -('PLANE_BUF_CFG_3_A', '0x7047c', '') -('PLANE_CTL_1_A', '0x70180', '') -('PLANE_CTL_2_A', '0x70280', '') -('PLANE_CTL_3_A', '0x70380', '') -('PLANE_KEYMAX_1_A', '0x701a0', '') -('PLANE_KEYMAX_2_A', '0x702a0', '') -('PLANE_KEYMAX_3_A', '0x703a0', '') -('PLANE_KEYMSK_1_A', '0x70198', '') -('PLANE_KEYMSK_2_A', '0x70298', '') -('PLANE_KEYMSK_3_A', '0x70398', '') -('PLANE_KEYVAL_1_A', '0x70194', '') -('PLANE_KEYVAL_2_A', '0x70294', '') -('PLANE_KEYVAL_3_A', '0x70394', '') -('PLANE_OFFSET_1_A', '0x701a4', '') -('PLANE_OFFSET_2_A', '0x702a4', '') -('PLANE_OFFSET_3_A', '0x703a4', '') -('PLANE_POS_1_A', '0x7018c', '') -('PLANE_POS_2_A', '0x7028c', '') -('PLANE_POS_3_A', '0x7038c', '') -('PLANE_SIZE_1_A', '0x70190', '') -('PLANE_SIZE_2_A', '0x70290', '') -('PLANE_SIZE_3_A', '0x70390', '') -('PLANE_STRIDE_1_A', '0x70188', '') -('PLANE_STRIDE_2_A', '0x70288', '') -('PLANE_STRIDE_3_A', '0x70388', '') -('PLANE_SURF_1_A', '0x7019c', '') -('PLANE_SURF_2_A', '0x7029c', '') -('PLANE_SURF_3_A', '0x7039c', '') -('PLANE_SURFLIVE_1_A', '0x701ac', '') -('PLANE_SURFLIVE_2_A', '0x702ac', '') -('PLANE_SURFLIVE_3_A', '0x703ac', '') -('PLANE_WM_1_A_0', '0x70240', '') -('PLANE_WM_1_A_1', '0x70244', '') -('PLANE_WM_1_A_2', '0x70248', '') -('PLANE_WM_1_A_3', '0x7024c', '') -('PLANE_WM_1_A_4', '0x70250', '') -('PLANE_WM_1_A_5', '0x70254', '') -('PLANE_WM_1_A_6', '0x70258', '') -('PLANE_WM_1_A_7', '0x7025c', '') -('PLANE_WM_2_A_0', '0x70340', '') -('PLANE_WM_2_A_1', '0x70344', '') -('PLANE_WM_2_A_2', '0x70348', '') -('PLANE_WM_2_A_3', '0x7034c', '') -('PLANE_WM_2_A_4', '0x70350', '') -('PLANE_WM_2_A_5', '0x70354', '') -('PLANE_WM_2_A_6', '0x70358', '') -('PLANE_WM_2_A_7', '0x7035c', '') -('PLANE_WM_3_A_0', '0x70440', '') -('PLANE_WM_3_A_1', '0x70444', '') -('PLANE_WM_3_A_2', '0x70448', '') -('PLANE_WM_3_A_3', '0x7044c', '') -('PLANE_WM_3_A_4', '0x70450', '') -('PLANE_WM_3_A_5', '0x70454', '') -('PLANE_WM_3_A_6', '0x70458', '') -('PLANE_WM_3_A_7', '0x7045c', '') -('PLANE_WM_TRANS_1_A', '0x70268', '') -('PLANE_WM_TRANS_2_A', '0x70368', '') -('PLANE_WM_TRANS_3_A', '0x70468', '') -# PIPE_B_PLANE -('PLANE_BUF_CFG_1_B', '0x7127c', '') -('PLANE_BUF_CFG_2_B', '0x7137c', '') -('PLANE_BUF_CFG_3_B', '0x7147c', '') -('PLANE_CTL_1_B', '0x71180', '') -('PLANE_CTL_2_B', '0x71280', '') -('PLANE_CTL_3_B', '0x71380', '') -('PLANE_KEYMAX_1_B', '0x711a0', '') -('PLANE_KEYMAX_2_B', '0x712a0', '') -('PLANE_KEYMAX_3_B', '0x713a0', '') -('PLANE_KEYMSK_1_B', '0x71198', '') -('PLANE_KEYMSK_2_B', '0x71298', '') -('PLANE_KEYMSK_3_B', '0x71398', '') -('PLANE_KEYVAL_1_B', '0x71194', '') -('PLANE_KEYVAL_2_B', '0x71294', '') -('PLANE_KEYVAL_3_B', '0x71394', '') -('PLANE_OFFSET_1_B', '0x711a4', '') -('PLANE_OFFSET_2_B', '0x712a4', '') -('PLANE_OFFSET_3_B', '0x713a4', '') -('PLANE_POS_1_B', '0x7118c', '') -('PLANE_POS_2_B', '0x7128c', '') -('PLANE_POS_3_B', '0x7138c', '') -('PLANE_SIZE_1_B', '0x71190', '') -('PLANE_SIZE_2_B', '0x71290', '') -('PLANE_SIZE_3_B', '0x71390', '') -('PLANE_STRIDE_1_B', '0x71188', '') -('PLANE_STRIDE_2_B', '0x71288', '') -('PLANE_STRIDE_3_B', '0x71388', '') -('PLANE_SURF_1_B', '0x7119c', '') -('PLANE_SURF_2_B', '0x7129c', '') -('PLANE_SURF_3_B', '0x7139c', '') -('PLANE_SURFLIVE_1_B', '0x711ac', '') -('PLANE_SURFLIVE_2_B', '0x712ac', '') -('PLANE_SURFLIVE_3_B', '0x713ac', '') -('PLANE_WM_1_B_0', '0x71240', '') -('PLANE_WM_1_B_1', '0x71244', '') -('PLANE_WM_1_B_2', '0x71248', '') -('PLANE_WM_1_B_3', '0x7124c', '') -('PLANE_WM_1_B_4', '0x71250', '') -('PLANE_WM_1_B_5', '0x71254', '') -('PLANE_WM_1_B_6', '0x71258', '') -('PLANE_WM_1_B_7', '0x7125c', '') -('PLANE_WM_2_B_0', '0x71340', '') -('PLANE_WM_2_B_1', '0x71344', '') -('PLANE_WM_2_B_2', '0x71348', '') -('PLANE_WM_2_B_3', '0x7134c', '') -('PLANE_WM_2_B_4', '0x71350', '') -('PLANE_WM_2_B_5', '0x71354', '') -('PLANE_WM_2_B_6', '0x71358', '') -('PLANE_WM_2_B_7', '0x7135c', '') -('PLANE_WM_3_B_0', '0x71440', '') -('PLANE_WM_3_B_1', '0x71444', '') -('PLANE_WM_3_B_2', '0x71448', '') -('PLANE_WM_3_B_3', '0x7144c', '') -('PLANE_WM_3_B_4', '0x71450', '') -('PLANE_WM_3_B_5', '0x71454', '') -('PLANE_WM_3_B_6', '0x71458', '') -('PLANE_WM_3_B_7', '0x7145c', '') -('PLANE_WM_TRANS_1_B', '0x71268', '') -('PLANE_WM_TRANS_2_B', '0x71368', '') -('PLANE_WM_TRANS_3_B', '0x71468', '') -# PIPE_C_PLANE -('PLANE_BUF_CFG_1_C', '0x7227c', '') -('PLANE_BUF_CFG_2_C', '0x7237c', '') -('PLANE_BUF_CFG_3_C', '0x7247c', '') -('PLANE_CTL_1_C', '0x72180', '') -('PLANE_CTL_2_C', '0x72280', '') -('PLANE_CTL_3_C', '0x72380', '') -('PLANE_KEYMAX_1_C', '0x721a0', '') -('PLANE_KEYMAX_2_C', '0x722a0', '') -('PLANE_KEYMAX_3_C', '0x723a0', '') -('PLANE_KEYMSK_1_C', '0x72198', '') -('PLANE_KEYMSK_2_C', '0x72298', '') -('PLANE_KEYMSK_3_C', '0x72398', '') -('PLANE_KEYVAL_1_C', '0x72194', '') -('PLANE_KEYVAL_2_C', '0x72294', '') -('PLANE_KEYVAL_3_C', '0x72394', '') -('PLANE_OFFSET_1_C', '0x721a4', '') -('PLANE_OFFSET_2_C', '0x722a4', '') -('PLANE_OFFSET_3_C', '0x723a4', '') -('PLANE_POS_1_C', '0x7218c', '') -('PLANE_POS_2_C', '0x7228c', '') -('PLANE_POS_3_C', '0x7238c', '') -('PLANE_SIZE_1_C', '0x72190', '') -('PLANE_SIZE_2_C', '0x72290', '') -('PLANE_SIZE_3_C', '0x72390', '') -('PLANE_STRIDE_1_C', '0x72188', '') -('PLANE_STRIDE_2_C', '0x72288', '') -('PLANE_STRIDE_3_C', '0x72388', '') -('PLANE_SURF_1_C', '0x7219c', '') -('PLANE_SURF_2_C', '0x7229c', '') -('PLANE_SURF_3_C', '0x7239c', '') -('PLANE_SURFLIVE_1_C', '0x721ac', '') -('PLANE_SURFLIVE_2_C', '0x722ac', '') -('PLANE_SURFLIVE_3_C', '0x723ac', '') -('PLANE_WM_1_C_0', '0x72240', '') -('PLANE_WM_1_C_1', '0x72244', '') -('PLANE_WM_1_C_2', '0x72248', '') -('PLANE_WM_1_C_3', '0x7224c', '') -('PLANE_WM_1_C_4', '0x72250', '') -('PLANE_WM_1_C_5', '0x72254', '') -('PLANE_WM_1_C_6', '0x72258', '') -('PLANE_WM_1_C_7', '0x7225c', '') -('PLANE_WM_2_C_0', '0x72340', '') -('PLANE_WM_2_C_1', '0x72344', '') -('PLANE_WM_2_C_2', '0x72348', '') -('PLANE_WM_2_C_3', '0x7234c', '') -('PLANE_WM_2_C_4', '0x72350', '') -('PLANE_WM_2_C_5', '0x72354', '') -('PLANE_WM_2_C_6', '0x72358', '') -('PLANE_WM_2_C_7', '0x7235c', '') -('PLANE_WM_3_C_0', '0x72440', '') -('PLANE_WM_3_C_1', '0x72444', '') -('PLANE_WM_3_C_2', '0x72448', '') -('PLANE_WM_3_C_3', '0x7244c', '') -('PLANE_WM_3_C_4', '0x72450', '') -('PLANE_WM_3_C_5', '0x72454', '') -('PLANE_WM_3_C_6', '0x72458', '') -('PLANE_WM_3_C_7', '0x7245c', '') -('PLANE_WM_TRANS_1_C', '0x72268', '') -('PLANE_WM_TRANS_2_C', '0x72368', '') -('PLANE_WM_TRANS_3_C', '0x72468', '') -# TRANSCODER_EDP_CONTROL -('TRANS_CONF_EDP', '0x7f008', '') -# TRANSCODER_EDP_TIMING -('TRANS_HBLANK_EDP', '0x6f004', '') -('TRANS_HSYNC_EDP', '0x6f008', '') -('TRANS_HTOTAL_EDP', '0x6f000', '') -('TRANS_SPACE_EDP', '0x6f024', '') -('TRANS_VBLANK_EDP', '0x6f010', '') -('TRANS_VSYNC_EDP', '0x6f014', '') -('TRANS_VSYNCSHIFT_EDP', '0x6f028', '') -('TRANS_VTOTAL_EDP', '0x6f00c', '') -# TRANSCODER_EDP_M_N -('TRANS_DATAM1_EDP', '0x6f030', '') -('TRANS_DATAN1_EDP', '0x6f034', '') -('TRANS_LINKM1_EDP', '0x6f040', '') -('TRANS_LINKN1_EDP', '0x6f044', '') -# TRANSCODER_EDP_DDI_CONTROL -('TRANS_DDI_FUNC_CTL_EDP', '0x6f400', '') -('TRANS_MSA_MISC_EDP', '0x6f410', '') -# TRANSCODER_A_CONTROL -('TRANS_CONF_A', '0x70008', '') -# TRANSCODER_A_TIMING -('TRANS_HBLANK_A', '0x60004', '') -('TRANS_HSYNC_A', '0x60008', '') -('TRANS_HTOTAL_A', '0x60000', '') -('TRANS_MULT_A', '0x6002c', '') -('TRANS_SPACE_A', '0x60024', '') -('TRANS_VBLANK_A', '0x60010', '') -('TRANS_VSYNC_A', '0x60014', '') -('TRANS_VSYNCSHIFT_A', '0x60028', '') -('TRANS_VTOTAL_A', '0x6000c', '') -# TRANSCODER_A_M_N -('TRANS_DATAM1_A', '0x60030', '') -('TRANS_DATAN1_A', '0x60034', '') -('TRANS_LINKM1_A', '0x60040', '') -('TRANS_LINKN1_A', '0x60044', '') -# TRANSCODER_A_DDI_CONTROL -('TRANS_DDI_FUNC_CTL_A', '0x60400', '') -('TRANS_MSA_MISC_A', '0x60410', '') -# TRANSCODER_B_CONTROL -('TRANS_CONF_B', '0x71008', '') -# TRANSCODER_B_TIMING -('TRANS_HBLANK_B', '0x61004', '') -('TRANS_HSYNC_B', '0x61008', '') -('TRANS_HTOTAL_B', '0x61000', '') -('TRANS_MULT_B', '0x6102c', '') -('TRANS_SPACE_B', '0x61024', '') -('TRANS_VBLANK_B', '0x61010', '') -('TRANS_VSYNC_B', '0x61014', '') -('TRANS_VSYNCSHIFT_B', '0x61028', '') -('TRANS_VTOTAL_B', '0x6100c', '') -# TRANSCODER_B_M_N -('TRANS_DATAM1_B', '0x61030', '') -('TRANS_DATAN1_B', '0x61034', '') -('TRANS_LINKM1_B', '0x61040', '') -('TRANS_LINKN1_B', '0x61044', '') -# TRANSCODER_B_DDI_CONTROL -('TRANS_DDI_FUNC_CTL_B', '0x61400', '') -('TRANS_MSA_MISC_B', '0x61410', '') -# TRANSCODER_C_CONTROL -('TRANS_CONF_C', '0x72008', '') -# TRANSCODER_C_TIMING -('TRANS_HBLANK_C', '0x62004', '') -('TRANS_HSYNC_C', '0x62008', '') -('TRANS_HTOTAL_C', '0x62000', '') -('TRANS_MULT_C', '0x6202c', '') -('TRANS_SPACE_C', '0x62024', '') -('TRANS_VBLANK_C', '0x62010', '') -('TRANS_VSYNC_C', '0x62014', '') -('TRANS_VSYNCSHIFT_C', '0x62028', '') -('TRANS_VTOTAL_C', '0x6200c', '') -# TRANSCODER_C_M_N -('TRANS_DATAM1_C', '0x62030', '') -('TRANS_DATAN1_C', '0x62034', '') -('TRANS_LINKM1_C', '0x62040', '') -('TRANS_LINKN1_C', '0x62044', '') -# TRANSCODER_C_DDI_CONTROL -('TRANS_DDI_FUNC_CTL_C', '0x62400', '') -('TRANS_MSA_MISC_C', '0x62410', '') -# WATERMARK -('WM_LINETIME_A', '0x45270', '') -('WM_LINETIME_B', '0x45274', '') -('WM_LINETIME_C', '0x45278', '') -('WM_MISC', '0x45260', '') diff --git a/tools/quick_dump/skylake b/tools/quick_dump/skylake deleted file mode 100644 index d87e1aac..00000000 --- a/tools/quick_dump/skylake +++ /dev/null @@ -1,3 +0,0 @@ -gen8_interrupt.txt -gen8_other.txt -skl_display.txt diff --git a/tools/quick_dump/valleyview b/tools/quick_dump/valleyview deleted file mode 100644 index 2611a982..00000000 --- a/tools/quick_dump/valleyview +++ /dev/null @@ -1,7 +0,0 @@ -vlv_pipe_a.txt -vlv_pipe_b.txt -vlv_display_base.txt -vlv_dpio_phy.txt -vlv_dsi.txt -vlv_flisdsi.txt -gen7_other.txt diff --git a/tools/quick_dump/vlv_display_base.txt b/tools/quick_dump/vlv_display_base.txt deleted file mode 100644 index 5bd855a7..00000000 --- a/tools/quick_dump/vlv_display_base.txt +++ /dev/null @@ -1,180 +0,0 @@ -('DPFLIPSTAT', '0x70028', '0x180000') -('DPINVGTT', '0x7002C', '0x180000') - -('DSPARB', '0x70030', '0x180000') -('DSPARB2', '0x70060', '0x180000') - -('DSPHOWM', '0x70064', '0x180000') -('DSPHOWM1', '0x70068', '0x180000') -('FW1', '0x70034', '0x180000') -('FW2', '0x70038', '0x180000') -('FW3', '0x7003C', '0x180000') -('FW4', '0x70070', '0x180000') -('FW5', '0x70074', '0x180000') -('FW6', '0x70078', '0x180000') -('FW7', '0x7007C', '0x180000') - -('DDL1', '0x70050', '0x180000') -('DDL2', '0x70054', '0x180000') - -('VGACNTRL', '0x71400', '0x180000') - -('CBR1', '0x70400', '0x180000') -('CBR2', '0x70404', '0x180000') -('CBR3', '0x7040C', '0x180000') -('CBR4', '0x70450', '0x180000') -('CCBR', '0x70408', '0x180000') - -('SWF00', '0x70410', '0x180000') -('SWF01', '0x70414', '0x180000') -('SWF02', '0x70418', '0x180000') -('SWF03', '0x7041C', '0x180000') -('SWF04', '0x70420', '0x180000') -('SWF05', '0x70424', '0x180000') -('SWF06', '0x70428', '0x180000') -('SWF07', '0x7042C', '0x180000') -('SWF08', '0x70430', '0x180000') -('SWF09', '0x70434', '0x180000') -('SWF0A', '0x70438', '0x180000') -('SWF0B', '0x7043C', '0x180000') -('SWF0C', '0x70440', '0x180000') -('SWF0D', '0x70444', '0x180000') -('SWF0E', '0x70448', '0x180000') -('SWF0F', '0x7044C', '0x180000') -('SWF10', '0x71410', '0x180000') -('SWF11', '0x71414', '0x180000') -('SWF12', '0x71418', '0x180000') -('SWF13', '0x7141C', '0x180000') -('SWF14', '0x71420', '0x180000') -('SWF15', '0x71424', '0x180000') -('SWF16', '0x71428', '0x180000') -('SWF17', '0x7142C', '0x180000') -('SWF18', '0x71430', '0x180000') -('SWF19', '0x71434', '0x180000') -('SWF1A', '0x71438', '0x180000') -('SWF1B', '0x7143C', '0x180000') -('SWF1C', '0x71440', '0x180000') -('SWF1D', '0x71444', '0x180000') -('SWF1E', '0x71448', '0x180000') -('SWF1F', '0x7144C', '0x180000') -('SWF30', '0x72414', '0x180000') -('SWF31', '0x72418', '0x180000') -('SWF32', '0x7241C', '0x180000') - -('PCSRC', '0x73000', '0x180000') -('PCSTAT', '0x73004', '0x180000') -('PCSRC2', '0x73008', '0x180000') -('PCSTAT2', '0x7300C', '0x180000') - -('PFIT_CONTROL', '0x61230', '0x180000') -('PFIT_PGM_RATIOS', '0x61234', '0x180000') -('PFIT_AUTO_RATION', '0x61238', '0x180000') -('PFIT_INIT_PHASE', '0x6123C', '0x180000') - -('GPIOCTL_0', '0x5010', '0x180000') -('GPIOCTL_1', '0x5014', '0x180000') -('GPIOCTL_2', '0x5018', '0x180000') -('GPIOCTL_3', '0x501C', '0x180000') -('GPIOCTL_4', '0x5020', '0x180000') - -('GMBUS0', '0x5100', '0x180000') -('GMBUS1', '0x5104', '0x180000') -('GMBUS2', '0x5108', '0x180000') -('GMBUS3', '0x510C', '0x180000') -('GMBUS4', '0x5110', '0x180000') -('GMBUS5', '0x5120', '0x180000') -('GMBUS6', '0x5130', '0x180000') -('GMBUS7', '0x5134', '0x180000') - -('RAWCLK_FREQ', '0x6024', '0x180000') -('GMBUSFREQ', '0x6510', '0x180000') -('DSPCLK_GATE_D', '0x6200', '0x180000') -('RAMCLK_GATE_D', '0x6210', '0x180000') -('D_STATE', '0x6104', '0x180000') -('DPPSR_CGDIS', '0x6204', '0x180000') -('FW_BLC_SELF', '0x6500', '0x180000') -('MI_ARB', '0x6504', '0x180000') -('CZCLK_CDCLK_FREQ_RATIO', '0x6508', '0x180000') -('GCI_CONTROL', '0x650C', '0x180000') - -('ADPA', '0x61100', '0x180000') -('CRTIO_DFX', '0x61104', '0x180000') - -('PORT_HOTPLUG_EN', '0x61110', '0x180000') -('PORT_HOTPLUG_STAT', '0x61114', '0x180000') - -('HDMIB', '0x61140', '0x180000') -('HDMIC', '0x61160', '0x180000') - -('DP2', '0x61154', '0x180000') -('DIGITAL_HPD_CTRL', '0x61164', '0x180000') -('DV_DETERM', '0x61168', '0x180000') - -('DP_AUX_CH_AKSV_HI', '0x64130', '0x180000') -('DP_AUX_CH_AKSV_LO', '0x64134', '0x180000') - -('DP_B', '0x64100', '0x180000') -('DPB_AUX_CH_CTL', '0x64110', '0x180000') -('DPB_AUX_CH_DATA1', '0x64114', '0x180000') -('DPB_AUX_CH_DATA2', '0x64118', '0x180000') -('DPB_AUX_CH_DATA3', '0x6411C', '0x180000') -('DPB_AUX_CH_DATA4', '0x64120', '0x180000') -('DPB_AUX_CH_DATA5', '0x64124', '0x180000') -('DPB_AUX_TST', '0x64150', '0x180000') - -('DP_C', '0x64200', '0x180000') -('DPC_AUX_CH_CTL', '0x64210', '0x180000') -('DPC_AUX_CH_DATA1', '0x64214', '0x180000') -('DPC_AUX_CH_DATA2', '0x64218', '0x180000') -('DPC_AUX_CH_DATA3', '0x6421C', '0x180000') -('DPC_AUX_CH_DATA4', '0x64220', '0x180000') -('DPC_AUX_CH_DATA5', '0x64224', '0x180000') -('DPC_AUX_TST', '0x64228', '0x180000') - -('DPIO_BONUS0', '0x64138', '0x180000') -('DPIO_BONUS1', '0x6413C', '0x180000') -('DPIO_BONUS2', '0x64140', '0x180000') -('DPIO_BONUS0_READ_BACK', '0x64144', '0x180000') -('DPIO_BONUS1_READ_BACK', '0x64148', '0x180000') -('DPIO_BONUS2_READ_BACK', '0x6414C', '0x180000') - -('DPA_PIX_GEN_CTRL', '0x61198', '0x180000') -('DPA_PROG_PIXEL_DATA_1', '0x6119C', '0x180000') -('DPA_PROG_PIXEL_DATA_2', '0x611A0', '0x180000') -('DPA_PROG_PIXEL_DATA_3', '0x611A4', '0x180000') -('DPA_PROG_PIXEL_DATA_4', '0x611A8', '0x180000') - -('DPB_PIX_GEN_CTRL', '0x611B0', '0x180000') -('DPB_PROG_PIXEL_DATA_1', '0x611B4', '0x180000') -('DPB_PROG_PIXEL_DATA_2', '0x611B8', '0x180000') -('DPB_PROG_PIXEL_DATA_3', '0x611BC', '0x180000') -('DPB_PROG_PIXEL_DATA_4', '0x611C0', '0x180000') - -('AUD_VID_DID', '0x62020', '0x180000') -('AUD_RID', '0x62024', '0x180000') -('AUD_PWRST', '0x6204C', '0x180000') -('AUD_PORT_EN_HD_CFG', '0x6207C', '0x180000') -('AUD_OUT_CH_STR', '0x62088', '0x180000') -('AUD_PINW_CONNLNG_LIST', '0x620A8', '0x180000') -('AUD_PINW_CONNLNG_SEL', '0x620AC', '0x180000') -('AUD_CNTL_ST2', '0x620C0', '0x180000') -('AUD_HDMIW_STATUS', '0x620D4', '0x180000') -('AUD_SSID_DBG', '0x62F00', '0x180000') -('AUD_PWST1_DBG', '0x62F04', '0x180000') -('AUD_PWST2_DBG', '0x62F14', '0x180000') -('AUD_PORT_EN_B_DBG', '0x62F20', '0x180000') -('AUD_PWST3_DBG', '0x62F24', '0x180000') -('AUD_PORT_EN_C_DBG', '0x62F28', '0x180000') -('AUD_PORT_EN_D_DBG', '0x62F2C', '0x180000') -('AUD_CHICKENBIT', '0x62F38', '0x180000') -('AUD_CNTL_ST_B_DBG', '0x62F60', '0x180000') -('AUD_HDMIW_INFOFR_B_DBG', '0x62F64', '0x180000') -('AUD_CNTL_ST_C_DBG', '0x62F70', '0x180000') -('AUD_HDMIW_INFOFR_C_DBG', '0x62F74', '0x180000') -('AUD_CNTL_ST_D_DBG', '0x62F80', '0x180000') -('AUD_HDMIW_INFOFR_D_DBG', '0x62F84', '0x180000') -('AUD_CONFIG_DEFAULT2_REG_PORTB', '0x62F88', '0x180000') -('AUD_CONFIG_DEFAULT2_REG_PORTC', '0x62F8C', '0x180000') -('AUD_CONFIG_DEFAULT2_REG_PORTD', '0x62F90', '0x180000') -('AUD_MCTSA', '0x62F94', '0x180000') -('AUD_MCTSB', '0x62F98', '0x180000') diff --git a/tools/quick_dump/vlv_dpio_phy.txt b/tools/quick_dump/vlv_dpio_phy.txt deleted file mode 100644 index 622a6156..00000000 --- a/tools/quick_dump/vlv_dpio_phy.txt +++ /dev/null @@ -1,198 +0,0 @@ -('PLL1_DW0', '0x8000', 'DPIO') -('PLL1_DW1', '0x8004', 'DPIO') -('PLL1_DW2', '0x8008', 'DPIO') -('PLL1_DW3', '0x800C', 'DPIO') -('PLL1_DW4', '0x8010', 'DPIO') -('PLL1_DW5', '0x8014', 'DPIO') -('PLL1_DW6', '0x8018', 'DPIO') -('PLL1_DW7', '0x801C', 'DPIO') -('PLL2_DW0', '0x8020', 'DPIO') -('PLL2_DW1', '0x8024', 'DPIO') -('PLL2_DW2', '0x8028', 'DPIO') -('PLL2_DW3', '0x802C', 'DPIO') -('PLL2_DW4', '0x8030', 'DPIO') -('PLL2_DW5', '0x8034', 'DPIO') -('PLL2_DW6', '0x8038', 'DPIO') -('PLL2_DW7', '0x803C', 'DPIO') -('PLL1_EXT_DW0', '0x8040', 'DPIO') -('PLL1_EXT_DW1', '0x8044', 'DPIO') -('PLL1_EXT_DW2', '0x8048', 'DPIO') -('PLL1_EXT_DW3', '0x804C', 'DPIO') -('PLL1_EXT_DW4', '0x8050', 'DPIO') -('PLL1_EXT_DW5', '0x8054', 'DPIO') -('PLL1_EXT_DW6', '0x8058', 'DPIO') -('PLL1_EXT_DW7', '0x805C', 'DPIO') -('PLL2_EXT_DW0', '0x8060', 'DPIO') -('PLL2_EXT_DW1', '0x8064', 'DPIO') -('PLL2_EXT_DW2', '0x8068', 'DPIO') -('PLL2_EXT_DW3', '0x806C', 'DPIO') -('PLL2_EXT_DW4', '0x8070', 'DPIO') -('PLL2_EXT_DW5', '0x8074', 'DPIO') -('PLL2_EXT_DW6', '0x8078', 'DPIO') -('PLL2_EXT_DW7', '0x807C', 'DPIO') -('REF_DW0', '0x80A0', 'DPIO') -('REF_DW1', '0x80A4', 'DPIO') -('REF_DW2', '0x80A8', 'DPIO') -('REF_DW3', '0x80AC', 'DPIO') -('REF_DW4', '0x80B0', 'DPIO') -('REF_DW5', '0x80B4', 'DPIO') -('REF_DW6', '0x80B8', 'DPIO') -('REF_DW7', '0x80BC', 'DPIO') -('REF_DW8', '0x80C0', 'DPIO') -('REF_DW9', '0x80C4', 'DPIO') -('REF_DW10', '0x80C8', 'DPIO') -('REF_DW11', '0x80CC', 'DPIO') -('REF_DW12', '0x80D0', 'DPIO') -('REF_DW13', '0x80D4', 'DPIO') -('REF_DW14', '0x80D8', 'DPIO') -('REF_DW15', '0x80DC', 'DPIO') -('CL_DW0', '0x8100', 'DPIO') -('CL_DW1', '0x8104', 'DPIO') -('CL_DW2', '0x8108', 'DPIO') -('CL_DW3', '0x810C', 'DPIO') -('CL_DW4', '0x8110', 'DPIO') -('CL_DW5', '0x8114', 'DPIO') -('CL_DW6', '0x8118', 'DPIO') -('CL_DW7', '0x811C', 'DPIO') -('CL_DW8', '0x8120', 'DPIO') -('CL_DW9', '0x8124', 'DPIO') -('CL_DW10', '0x8128', 'DPIO') -('CL_DW11', '0x812C', 'DPIO') -('CL_DW12', '0x8130', 'DPIO') -('CL_DW13', '0x8134', 'DPIO') -('CL_DW14', '0x8138', 'DPIO') -('CL_DW15', '0x813C', 'DPIO') -('CL_DW16', '0x8140', 'DPIO') -('CL_DW17', '0x8144', 'DPIO') -('CL_DW18', '0x8148', 'DPIO') -('CL_DW19', '0x814C', 'DPIO') -('CL_DW20', '0x8150', 'DPIO') -('CL_DW21', '0x8154', 'DPIO') -('CL_DW22', '0x8158', 'DPIO') -('CL_DW23', '0x815C', 'DPIO') -('CL_DW24', '0x8160', 'DPIO') -('CL_DW25', '0x8164', 'DPIO') -('CL_DW26', '0x8168', 'DPIO') -('CL_DW27', '0x816C', 'DPIO') -('CL_DW28', '0x8170', 'DPIO') -('CL_DW29', '0x8174', 'DPIO') -('CL_DW30', '0x8178', 'DPIO') -('CL_DW31', '0x817C', 'DPIO') -('PCS01_CH0_DW0', '0x0200', 'DPIO') -('PCS01_CH0_DW1', '0x0204', 'DPIO') -('PCS01_CH0_DW2', '0x0208', 'DPIO') -('PCS01_CH0_DW3', '0x020C', 'DPIO') -('PCS01_CH0_DW4', '0x0210', 'DPIO') -('PCS01_CH0_DW5', '0x0214', 'DPIO') -('PCS01_CH0_DW6', '0x0218', 'DPIO') -('PCS01_CH0_DW7', '0x021C', 'DPIO') -('PCS01_CH0_DW8', '0x0220', 'DPIO') -('PCS01_CH0_DW9', '0x0224', 'DPIO') -('PCS01_CH0_DW10', '0x0228', 'DPIO') -('PCS01_CH0_DW11', '0x022C', 'DPIO') -('PCS01_CH0_DW12', '0x0230', 'DPIO') -('PCS01_CH0_DW13', '0x0234', 'DPIO') -('PCS01_CH0_DW14', '0x0238', 'DPIO') -('PCS01_CH0_DW15', '0x023C', 'DPIO') -('PCS01_CH0_DW16', '0x0240', 'DPIO') -('PCS01_CH0_DW17', '0x0244', 'DPIO') -('PCS01_CH0_DW18', '0x0248', 'DPIO') -('PCS01_CH0_DW19', '0x024C', 'DPIO') -('PCS01_CH0_DW20', '0x0250', 'DPIO') -('PCS01_CH0_DW21', '0x0254', 'DPIO') -('PCS01_CH0_DW22', '0x0258', 'DPIO') -('PCS01_CH0_DW23', '0x025C', 'DPIO') -('PCS01_CH0_DW24', '0x0260', 'DPIO') -('TX0_CH0_DW0', '0x0080', 'DPIO') -('TX0_CH0_DW1', '0x0084', 'DPIO') -('TX0_CH0_DW2', '0x0088', 'DPIO') -('TX0_CH0_DW3', '0x008C', 'DPIO') -('TX0_CH0_DW4', '0x0090', 'DPIO') -('TX0_CH0_DW5', '0x0094', 'DPIO') -('TX0_CH0_DW6', '0x0098', 'DPIO') -('TX0_CH0_DW7', '0x009C', 'DPIO') -('TX0_CH0_DW8', '0x00A0', 'DPIO') -('TX0_CH0_DW9', '0x00A4', 'DPIO') -('TX0_CH0_DW10', '0x00A8', 'DPIO') -('TX0_CH0_DW11', '0x00AC', 'DPIO') -('TX0_CH0_DW12', '0x00B0', 'DPIO') -('TX0_CH0_DW13', '0x00B4', 'DPIO') -('TX0_CH0_DW14', '0x00B8', 'DPIO') -('TX0_CH0_DW15', '0x00BC', 'DPIO') -('TX0_CH0_DW16', '0x00C0', 'DPIO') -('TX1_CH0_DW0', '0x0280', 'DPIO') -('TX1_CH0_DW1', '0x0284', 'DPIO') -('TX1_CH0_DW2', '0x0288', 'DPIO') -('TX1_CH0_DW3', '0x028C', 'DPIO') -('TX1_CH0_DW4', '0x0290', 'DPIO') -('TX1_CH0_DW5', '0x0294', 'DPIO') -('TX1_CH0_DW6', '0x0298', 'DPIO') -('TX1_CH0_DW7', '0x029C', 'DPIO') -('TX1_CH0_DW8', '0x02A0', 'DPIO') -('TX1_CH0_DW9', '0x02A4', 'DPIO') -('TX1_CH0_DW10', '0x02A8', 'DPIO') -('TX1_CH0_DW11', '0x02AC', 'DPIO') -('TX1_CH0_DW12', '0x02B0', 'DPIO') -('TX1_CH0_DW13', '0x02B4', 'DPIO') -('TX1_CH0_DW14', '0x02B8', 'DPIO') -('TX1_CH0_DW15', '0x02BC', 'DPIO') -('TX1_CH0_DW16', '0x02C0', 'DPIO') -('PCS23_CH0_DW0', '0x0400', 'DPIO') -('PCS23_CH0_DW1', '0x0404', 'DPIO') -('PCS23_CH0_DW2', '0x0408', 'DPIO') -('PCS23_CH0_DW3', '0x040C', 'DPIO') -('PCS23_CH0_DW4', '0x0410', 'DPIO') -('PCS23_CH0_DW5', '0x0414', 'DPIO') -('PCS23_CH0_DW6', '0x0418', 'DPIO') -('PCS23_CH0_DW7', '0x041C', 'DPIO') -('PCS23_CH0_DW8', '0x0420', 'DPIO') -('PCS23_CH0_DW9', '0x0424', 'DPIO') -('PCS23_CH0_DW10', '0x0428', 'DPIO') -('PCS23_CH0_DW11', '0x042C', 'DPIO') -('PCS23_CH0_DW12', '0x0430', 'DPIO') -('PCS23_CH0_DW13', '0x0434', 'DPIO') -('PCS23_CH0_DW14', '0x0438', 'DPIO') -('PCS23_CH0_DW15', '0x043C', 'DPIO') -('PCS23_CH0_DW16', '0x0440', 'DPIO') -('PCS23_CH0_DW17', '0x0444', 'DPIO') -('PCS23_CH0_DW18', '0x0448', 'DPIO') -('PCS23_CH0_DW19', '0x044C', 'DPIO') -('PCS23_CH0_DW20', '0x0450', 'DPIO') -('PCS23_CH0_DW21', '0x0454', 'DPIO') -('PCS23_CH0_DW22', '0x0458', 'DPIO') -('PCS23_CH0_DW23', '0x045C', 'DPIO') -('PCS23_CH0_DW24', '0x0460', 'DPIO') -('TX2_CH0_DW0', '0x0480', 'DPIO') -('TX2_CH0_DW1', '0x0484', 'DPIO') -('TX2_CH0_DW2', '0x0488', 'DPIO') -('TX2_CH0_DW3', '0x048C', 'DPIO') -('TX2_CH0_DW4', '0x0490', 'DPIO') -('TX2_CH0_DW5', '0x0494', 'DPIO') -('TX2_CH0_DW6', '0x0498', 'DPIO') -('TX2_CH0_DW7', '0x049C', 'DPIO') -('TX2_CH0_DW8', '0x04A0', 'DPIO') -('TX2_CH0_DW9', '0x04A4', 'DPIO') -('TX2_CH0_DW10', '0x04A8', 'DPIO') -('TX2_CH0_DW11', '0x04AC', 'DPIO') -('TX2_CH0_DW12', '0x04B0', 'DPIO') -('TX2_CH0_DW13', '0x04B4', 'DPIO') -('TX2_CH0_DW14', '0x04B8', 'DPIO') -('TX2_CH0_DW15', '0x04BC', 'DPIO') -('TX2_CH0_DW16', '0x04C0', 'DPIO') -('TX3_CH0_DW0', '0x0680', 'DPIO') -('TX3_CH0_DW1', '0x0684', 'DPIO') -('TX3_CH0_DW2', '0x0688', 'DPIO') -('TX3_CH0_DW3', '0x068C', 'DPIO') -('TX3_CH0_DW4', '0x0690', 'DPIO') -('TX3_CH0_DW5', '0x0694', 'DPIO') -('TX3_CH0_DW6', '0x0698', 'DPIO') -('TX3_CH0_DW7', '0x069C', 'DPIO') -('TX3_CH0_DW8', '0x06A0', 'DPIO') -('TX3_CH0_DW9', '0x06A4', 'DPIO') -('TX3_CH0_DW10', '0x06A8', 'DPIO') -('TX3_CH0_DW11', '0x06AC', 'DPIO') -('TX3_CH0_DW12', '0x06B0', 'DPIO') -('TX3_CH0_DW13', '0x06B4', 'DPIO') -('TX3_CH0_DW14', '0x06B8', 'DPIO') -('TX3_CH0_DW15', '0x06BC', 'DPIO') -('TX3_CH0_DW16', '0x06C0', 'DPIO') diff --git a/tools/quick_dump/vlv_dsi.txt b/tools/quick_dump/vlv_dsi.txt deleted file mode 100644 index 5f62e507..00000000 --- a/tools/quick_dump/vlv_dsi.txt +++ /dev/null @@ -1,108 +0,0 @@ -('MIPIA_PORT_CTRL', '0x61190', '0x180000') -('MIPIA_TEARING_CTRL', '0x61194', '0x180000') -('MIPIA_AUTOPWG', '0x611A0', '0x180000') -('MIPIA_DEVICE_READY', '0xB000', '0x180000') -('MIPIA_INTR_STAT', '0xB004', '0x180000') -('MIPIA_INTR_EN', '0xB008', '0x180000') -('MIPIA_DSI_FUNC_PRG', '0xB00C', '0x180000') -('MIPIA_HS_TX_TIMEOUT', '0xB010', '0x180000') -('MIPIA_LP_RX_TIMEOUT', '0xB014', '0x180000') -('MIPIA_TURN_AROUND_TIMEOUT', '0xB018', '0x180000') -('MIPIA_DEVICE_RESET_TIMER', '0xB01C', '0x180000') -('MIPIA_DPI_RESOLUTION', '0xB020', '0x180000') -('MIPIA_DBI_FIFO_THROTTLE', '0xB024', '0x180000') -('MIPIA_HSYNC_PADDING_COUNT', '0xB028', '0x180000') -('MIPIA_HBP_COUNT', '0xB02C', '0x180000') -('MIPIA_HFP_COUNT', '0xB030', '0x180000') -('MIPIA_HACTIVE_AREA_COUNT', '0xB034', '0x180000') -('MIPIA_VSYNC_PADDING_COUNT', '0xB038', '0x180000') -('MIPIA_VBP_COUNT', '0xB03C', '0x180000') -('MIPIA_VFP_COUNT', '0xB040', '0x180000') -('MIPIA_HIGH_LOW_SWITCH_COUNT', '0xB044', '0x180000') -('MIPIA_DPI_CONTROL', '0xB048', '0x180000') -('MIPIA_DPI_DATA', '0xB04C', '0x180000') -('MIPIA_INIT_COUNT', '0xB050', '0x180000') -('MIPIA_MAX_RETURN_PKT_SIZE', '0xB054', '0x180000') -('MIPIA_VIDEO_MODE_FORMAT', '0xB058', '0x180000') -('MIPIA_EOT_DISABLE', '0xB05C', '0x180000') -('MIPIA_LP_BYTECLK', '0xB060', '0x180000') -('MIPIA_LP_GEN_DATA', '0xB064', '0x180000') -('MIPIA_HS_GEN_DATA', '0xB068', '0x180000') -('MIPIA_LP_GEN_CTRL', '0xB06C', '0x180000') -('MIPIA_HS_GEN_CTRL', '0xB070', '0x180000') -('MIPIA_GEN_FIFO_STAT', '0xB074', '0x180000') -('MIPIA_HS_LS_DBI_ENABLE', '0xB078', '0x180000') -('MIPIA_DPHY_PARAM', '0xB080', '0x180000') -('MIPIA_DBI_BW_CTRL', '0xB084', '0x180000') -('MIPIA_CLK_LANE_SWITCH_TIME_CNT', '0xB088', '0x180000') -('MIPIA_STOP_STATE_STALL', '0xB08C', '0x180000') -('MIPIA_INTR_STAT_REG_1', '0xB090', '0x180000') -('MIPIA_INTR_EN_REG_1', '0xB094', '0x180000') -('MIPIA_DBI_TYPEC_CTRL', '0xB100', '0x180000') -('MIPIA_CTRL', '0xB104', '0x180000') -('MIPIA_DATA_ADDRESS', '0xB108', '0x180000') -('MIPIA_DATA_LENGTH', '0xB10C', '0x180000') -('MIPIA_COMMAND_ADDRESS', '0xB110', '0x180000') -('MIPIA_COMMAND_LENGTH', '0xB114', '0x180000') -('MIPIA_READ_DATA_RETURN0', '0xB118', '0x180000') -('MIPIA_READ_DATA_RETURN1', '0xB11C', '0x180000') -('MIPIA_READ_DATA_RETURN2', '0xB120', '0x180000') -('MIPIA_READ_DATA_RETURN3', '0xB124', '0x180000') -('MIPIA_READ_DATA_RETURN4', '0xB128', '0x180000') -('MIPIA_READ_DATA_RETURN5', '0xB12C', '0x180000') -('MIPIA_READ_DATA_RETURN6', '0xB130', '0x180000') -('MIPIA_READ_DATA_RETURN7', '0xB134', '0x180000') -('MIPIA_READ_DATA_VALID', '0xB138', '0x180000') -('MIPIC_PORT_CTRL', '0x61700', '0x180000') -('MIPIC_TEARING_CTRL', '0x61704', '0x180000') -('MIPIC_DEVICE_READY', '0xB800', '0x180000') -('MIPIC_INTR_STAT', '0xB804', '0x180000') -('MIPIC_INTR_EN', '0xB808', '0x180000') -('MIPIC_DSI_FUNC_PRG', '0xB80C', '0x180000') -('MIPIC_HS_TX_TIMEOUT', '0xB810', '0x180000') -('MIPIC_LP_RX_TIMEOUT', '0xB814', '0x180000') -('MIPIC_TURN_AROUND_TIMEOUT', '0xB818', '0x180000') -('MIPIC_DEVICE_RESET_TIMER', '0xB81C', '0x180000') -('MIPIC_DPI_RESOLUTION', '0xB820', '0x180000') -('MIPIC_DBI_FIFO_THROTTLE', '0xB824', '0x180000') -('MIPIC_HSYNC_PADDING_COUNT', '0xB828', '0x180000') -('MIPIC_HBP_COUNT', '0xB82C', '0x180000') -('MIPIC_HFP_COUNT', '0xB830', '0x180000') -('MIPIC_HACTIVE_AREA_COUNT', '0xB834', '0x180000') -('MIPIC_VSYNC_PADDING_COUNT', '0xB838', '0x180000') -('MIPIC_VBP_COUNT', '0xB83C', '0x180000') -('MIPIC_VFP_COUNT', '0xB840', '0x180000') -('MIPIC_HIGH_LOW_SWITCH_COUNT', '0xB844', '0x180000') -('MIPIC_DPI_CONTROL', '0xB848', '0x180000') -('MIPIC_DPI_DATA', '0xB84C', '0x180000') -('MIPIC_INIT_COUNT', '0xB850', '0x180000') -('MIPIC_MAX_RETURN_PKT_SIZE', '0xB854', '0x180000') -('MIPIC_VIDEO_MODE_FORMAT', '0xB858', '0x180000') -('MIPIC_EOT_DISABLE', '0xB85C', '0x180000') -('MIPIC_LP_BYTECLK', '0xB860', '0x180000') -('MIPIC_LP_GEN_DATA', '0xB864', '0x180000') -('MIPIC_HS_GEN_DATA', '0xB868', '0x180000') -('MIPIC_LP_GEN_CTRL', '0xB86C', '0x180000') -('MIPIC_HS_GEN_CTRL', '0xB870', '0x180000') -('MIPIC_GEN_FIFO_STAT', '0xB874', '0x180000') -('MIPIC_HS_LS_DBI_ENABLE', '0xB878', '0x180000') -('MIPIC_DPHY_PARAM', '0xB880', '0x180000') -('MIPIC_DBI_BW_CTRL', '0xB884', '0x180000') -('MIPIC_CLK_LANE_SWITCH_TIME_CNT', '0xB888', '0x180000') -('MIPIC_STOP_STATE_STALL', '0xB88C', '0x180000') -('MIPIC_INTR_STAT_REG_1', '0xB890', '0x180000') -('MIPIC_INTR_EN_REG_1', '0xB894', '0x180000') -('MIPIC_CTRL', '0xB904', '0x180000') -('MIPIC_DATA_ADDRESS', '0xB908', '0x180000') -('MIPIC_DATA_LENGTH', '0xB90C', '0x180000') -('MIPIC_COMMAND_ADDRESS', '0xB910', '0x180000') -('MIPIC_COMMAND_LENGTH', '0xB914', '0x180000') -('MIPIC_READ_DATA_RETURN0', '0xB918', '0x180000') -('MIPIC_READ_DATA_RETURN1', '0xB91C', '0x180000') -('MIPIC_READ_DATA_RETURN2', '0xB920', '0x180000') -('MIPIC_READ_DATA_RETURN3', '0xB924', '0x180000') -('MIPIC_READ_DATA_RETURN4', '0xB928', '0x180000') -('MIPIC_READ_DATA_RETURN5', '0xB92C', '0x180000') -('MIPIC_READ_DATA_RETURN6', '0xB930', '0x180000') -('MIPIC_READ_DATA_RETURN7', '0xB934', '0x180000') -('MIPIC_READ_DATA_VALID', '0xB938', '0x180000') diff --git a/tools/quick_dump/vlv_flisdsi.txt b/tools/quick_dump/vlv_flisdsi.txt deleted file mode 100644 index 18f2b004..00000000 --- a/tools/quick_dump/vlv_flisdsi.txt +++ /dev/null @@ -1,39 +0,0 @@ -('MIPI4DPHY_RCOMP_IOSFSB_REG0', '0x0000', 'FLISDSI') -('MIPI4DPHY_RCOMP_IOSFSB_REG1', '0x0001', 'FLISDSI') -('MIPI4DPHY_RCOMP_IOSFSB_REG2', '0x0002', 'FLISDSI') -('MIPI4DPHY_RCOMP_IOSFSB_REG3', '0x0003', 'FLISDSI') -('MIPI4DPHY_RCOMP_IOSFSB_REG4', '0x0004', 'FLISDSI') -('MIPI4DPHY_RCOMP_IOSFSB_REG5', '0x0005', 'FLISDSI') -('MIPI4DPHY_RCOMP_IOSFSB_REG6', '0x0006', 'FLISDSI') -('MIPI4DPHY_RCOMP_IOSFSB_REG7', '0x0007', 'FLISDSI') -('DSI_CFG', '0x0008', 'FLISDSI') -('DSI_DLLCOUNTCD_STATUS', '0x0009', 'FLISDSI') -('DSI_RXCDCNTRL', '0x000a', 'FLISDSI') -('DSI_HSRCOMP_STAT', '0x000b', 'FLISDSI') -('DSI_LPRCOMP_STAT', '0x000c', 'FLISDSI') -('DSI_LPRCOMP2', '0x000d', 'FLISDSI') -('DSI_LPRCOMP1', '0x000e', 'FLISDSI') -('DSI_BGCTL', '0x000f', 'FLISDSI') -('DSI_RCCCFG', '0x0010', 'FLISDSI') -('DSI_MISRDOUTLP', '0x0011', 'FLISDSI') -('DSI_RCCRCOMP', '0x0012', 'FLISDSI') -('DSI_BSCOMPARE', '0x0013', 'FLISDSI') -('DSI_RCOMPCTL1', '0x0014', 'FLISDSI') -('DSI_TXCNTRL', '0x0015', 'FLISDSI') -('DSI_MISRDOUT1', '0x0016', 'FLISDSI') -('DSI_DLLCTL2', '0x0017', 'FLISDSI') -('DSI_DLLCTL1', '0x0018', 'FLISDSI') -('DSI_ACIOCFG2', '0x0019', 'FLISDSI') -('DSI_ACIOCFG1', '0x001a', 'FLISDSI') -('DSI_ACIOSS', '0x001b', 'FLISDSI') -('DSI_ACIOERR1', '0x001c', 'FLISDSI') -('DSI_ACIOERR2', '0x001d', 'FLISDSI') -('DSI_MISRDOUT2', '0x001e', 'FLISDSI') -('DSI_RCOMPCTL2', '0x001f', 'FLISDSI') -('DSI_ALL01', '0x0020', 'FLISDSI') -('DSI_DLLCTL3', '0x0021', 'FLISDSI') -('DSI_DATAEYE1', '0x0022', 'FLISDSI') -('DSI_DATAEYE2', '0x0023', 'FLISDSI') -('DSI_DATAEYE3', '0x0024', 'FLISDSI') -('DSI_DATAEYE4', '0x0025', 'FLISDSI') -('DSI_DATAEYE5', '0x0026', 'FLISDSI') diff --git a/tools/quick_dump/vlv_pipe_a.txt b/tools/quick_dump/vlv_pipe_a.txt deleted file mode 100644 index 2b336f35..00000000 --- a/tools/quick_dump/vlv_pipe_a.txt +++ /dev/null @@ -1,175 +0,0 @@ -('PIPEA_DSL', '0x70000', '0x180000') -('PIPEA_SLC', '0x70004', '0x180000') -('PIPEACONF', '0x70008', '0x180000') -('PIPEAGCMAXRED', '0x70010', '0x180000') -('PIPEAGCMAXGREEN', '0x70014', '0x180000') -('PIPEAGCMAXBLUE', '0x70018', '0x180000') -('PIPEASTAT', '0x70024', '0x180000') -('PIPEAFRAMECOUNT', '0x70040', '0x180000') -('PIPEAFLIPCOUNT', '0x70044', '0x180000') -('PIPEAMSAMISC', '0x70048', '0x180000') - -('DSPAADDR', '0x7017C', '0x180000') -('DSPACNTR', '0x70180', '0x180000') -('DSPALINOFF', '0x70184', '0x180000') -('DSPASTRIDE', '0x70188', '0x180000') -('DSPAKEYVAL', '0x70194', '0x180000') -('DSPAKEYMSK', '0x70198', '0x180000') -('DSPASURF', '0x7019C', '0x180000') -('DSPATILEOFF', '0x701A4', '0x180000') -('DSPASURFLIVE', '0x701AC', '0x180000') -('DSPAFLPQSTAT', '0x70200', '0x180000') - -('CURACNTR', '0x70080', '0x180000') -('CURABASE', '0x70084', '0x180000') -('CURAPOS', '0x70088', '0x180000') -('CURARESV', '0x7008C', '0x180000') -('CURAPALET0', '0x70090', '0x180000') -('CURAPALET1', '0x70094', '0x180000') -('CURAPALET2', '0x70098', '0x180000') -('CURAPALET3', '0x7009C', '0x180000') -('CURALIVEBASE', '0x700AC', '0x180000') - -('SPACNTR', '0x72180', '0x180000') -('SPALINOFF', '0x72184', '0x180000') -('SPASTRIDE', '0x72188', '0x180000') -('SPAPOS', '0x7218C', '0x180000') -('SPASIZE', '0x72190', '0x180000') -('SPAKEYMINVAL', '0x72194', '0x180000') -('SPAKEYMSK', '0x72198', '0x180000') -('SPASURF', '0x7219C', '0x180000') -('SPAKEYMAXVAL', '0x721A0', '0x180000') -('SPATILEOFF', '0x721A4', '0x180000') -('SPACONTALPHA', '0x721A8', '0x180000') -('SPALIVESURF', '0x721AC', '0x180000') -('SPACLRC0', '0x721D0', '0x180000') -('SPACLRC1', '0x721D4', '0x180000') -('SPAGAMC5', '0x721E0', '0x180000') -('SPAGAMC4', '0x721E4', '0x180000') -('SPAGAMC3', '0x721E8', '0x180000') -('SPAGAMC2', '0x721EC', '0x180000') -('SPAGAMC1', '0x721F0', '0x180000') -('SPAGAMC0', '0x721F4', '0x180000') - -('SPBCNTR', '0x72280', '0x180000') -('SPBLINOFF', '0x72284', '0x180000') -('SPBSTRIDE', '0x72288', '0x180000') -('SPBPOS', '0x7228C', '0x180000') -('SPBSIZE', '0x72290', '0x180000') -('SPBKEYMINVAL', '0x72294', '0x180000') -('SPBKEYMSK', '0x72298', '0x180000') -('SPBSURF', '0x7229C', '0x180000') -('SPBKEYMAXVAL', '0x722A0', '0x180000') -('SPBTILEOFF', '0x722A4', '0x180000') -('SPBCONTALPHA', '0x722A8', '0x180000') -('SPBLIVESURF', '0x722AC', '0x180000') -('SPBCLRC0', '0x722D0', '0x180000') -('SPBCLRC1', '0x722D4', '0x180000') -('SPBGAMC5', '0x722E0', '0x180000') -('SPBGAMC4', '0x722E4', '0x180000') -('SPBGAMC3', '0x722E8', '0x180000') -('SPBGAMC2', '0x722EC', '0x180000') -('SPBGAMC1', '0x722F0', '0x180000') -('SPBGAMC0', '0x722F4', '0x180000') - -('DPALETTE_A', '0xA000', '0x180000') -('DPLLA_CTRL', '0x6014', '0x180000') -('DPLLAMD', '0x601C', '0x180000') - -('HTOTAL_A', '0x60000', '0x180000') -('HBLANK_A', '0x60004', '0x180000') -('HSYNC_A', '0x60008', '0x180000') -('VTOTAL_A', '0x6000C', '0x180000') -('VBLANK_A', '0x60010', '0x180000') -('VSYNC_A', '0x60014', '0x180000') -('PIPESRCA', '0x6001C', '0x180000') -('BCLRPAT_A', '0x60020', '0x180000') -('VSYNCSHIFT_A', '0x60028', '0x180000') - -('TRANSA_DATA_M1', '0x60030', '0x180000') -('TRANSA_DATA_N1', '0x60034', '0x180000') -('TRANSA_DATA_M2', '0x60038', '0x180000') -('TRANSA_DATA_N2', '0x6003C', '0x180000') -('TRANSA_LINK_M1', '0x60040', '0x180000') -('TRANSA_LINK_N1', '0x60044', '0x180000') -('TRANSA_LINK_M2', '0x60048', '0x180000') -('TRANSA_LINK_N2', '0x6004C', '0x180000') - -('CRC_CTRL_RED_A', '0x60050', '0x180000') -('CRC_CTRL_GREEN_A', '0x60054', '0x180000') -('CRC_CTRL_BLUE_A', '0x60058', '0x180000') -('CRC_CTRL_ALPHA_A', '0x6005C', '0x180000') -('CRC_CTRL_RESIDUE2_A', '0x60070', '0x180000') -('CRC_RES_RED_A', '0x60060', '0x180000') -('CRC_RES_GREEN_A', '0x60064', '0x180000') -('CRC_RES_BLUE_A', '0x60068', '0x180000') -('CRC_RES_ALPHA_A', '0x6006C', '0x180000') -('CRC_RES_RESIDUE2_A', '0x60080', '0x180000') - -('PSRCTLA', '0x60090', '0x180000') -('PSRSTATA', '0x60094', '0x180000') -('PSRCRC1A', '0x60098', '0x180000') -('PSRCRC2A', '0x6009C', '0x180000') -('VSCSDPA', '0x600A0', '0x180000') - -('PIPEA_WGCC_C01_C00', '0x600B0', '0x180000') -('PIPEA_WGCC_C02', '0x600B4', '0x180000') -('PIPEA_WGCC_C11_C10', '0x600B8', '0x180000') -('PIPEA_WGCC_C12', '0x600BC', '0x180000') -('PIPEA_WGCC_C21_C20', '0x600C0', '0x180000') -('PIPEA_WGCC_C22', '0x600C4', '0x180000') - -('VIDEO_DIP_CTL_A', '0x60200', '0x180000') -('VIDEO_DIP_DATA_A', '0x60208', '0x180000') -('VIDEO_DIP_GDCP_PAYLOAD_A', '0x60210', '0x180000') - -('PIPEA_CGM_DEGAMMA', '0x66000', '0x180000') -('PIPEA_CGM_GAMMA', '0x67000', '0x180000') -('PIPEA_CGM_CSC_COEFF01', '0x67900', '0x180000') -('PIPEA_CGM_CSC_COEFF23', '0x67904', '0x180000') -('PIPEA_CGM_CSC_COEFF45', '0x67908', '0x180000') -('PIPEA_CGM_CSC_COEFF67', '0x6790C', '0x180000') -('PIPEA_CGM_CSC_COEFF8', '0x67910', '0x180000') -('PIPEA_CGM_CONTROL', '0x67A00', '0x180000') - -('PIPEA_PP_STATUS', '0x61200', '0x180000') -('PIPEA_PP_CONTROL', '0x61204', '0x180000') -('PIPEA_PP_ON_DELAYS', '0x61208', '0x180000') -('PIPEA_PP_OFF_DELAYS', '0x6120C', '0x180000') -('PIPEA_PP_DIVISOR', '0x61210', '0x180000') - -('PIPEA_BLC_PWM_CLT2', '0x61250', '0x180000') -('PIPEA_BLC_PWM_CTL', '0x61254', '0x180000') -('PIPEA_BLM_HIST_CTL', '0x61260', '0x180000') -('PIPEA_IMG_ENH_BIN_DATA', '0x61264', '0x180000') -('PIPEA_HIST_THRESH_GUARD', '0x61268', '0x180000') - -('AUD_CONFIG_A', '0x62000', '0x180000') -('AUD_MISC_CTRL_A', '0x62010', '0x180000') -('AUD_CTS_ENABLE_A', '0x62028', '0x180000') -('AUD_HDMIW_HDMIEDID_A', '0x62050', '0x180000') -('AUD_HDMIW_INFOFR_A', '0x62054', '0x180000') -('AUD_OUT_DIG_CNVT_A', '0x62080', '0x180000') -('AUD_OUT_STR_DESC_A', '0x62084', '0x180000') -('AUD_CNTL_ST_A', '0x620B4', '0x180000') -('AUD_OUT_STR_DESC_A_DBG', '0x62F08', '0x180000') -('AUD_OUT_DIG_CNVTA_DBG', '0x62F40', '0x180000') - -('STREAM_A_LPE_AUD_CONFIG', '0x65000', '0x180000') -('STREAM_A_LPE_AUD_CH_STATUS_0', '0x65008', '0x180000') -('STREAM_A_LPE_AUD_CH_STATUS_1', '0x6500C', '0x180000') -('STREAM_A_LPE_AUD_HDMI_CTS_DP_MAUD', '0x65010', '0x180000') -('STREAM_A_LPE_AUD_HDMI_N_DP_NAUD', '0x65014', '0x180000') -('STREAM_A_LPE_AUD_BUFFER_CONFIG', '0x65020', '0x180000') -('STREAM_A_LPE_AUD_BUF_CH_SWP', '0x65024', '0x180000') -('STREAM_A_LPE_AUD_BUF_A_ADDR', '0x65040', '0x180000') -('STREAM_A_LPE_AUD_BUF_A_LENGTH', '0x65044', '0x180000') -('STREAM_A_LPE_AUD_BUF_B_ADDR', '0x65048', '0x180000') -('STREAM_A_LPE_AUD_BUF_B_LENGTH', '0x6504C', '0x180000') -('STREAM_A_LPE_AUD_BUF_C_ADDR', '0x65050', '0x180000') -('STREAM_A_LPE_AUD_BUF_C_LENGTH', '0x65054', '0x180000') -('STREAM_A_LPE_AUD_BUF_D_ADDR', '0x65058', '0x180000') -('STREAM_A_LPE_AUD_BUF_D_LENGTH', '0x6505C', '0x180000') -('STREAM_A_LPE_AUD_CNTL_ST', '0x65060', '0x180000') -('STREAM_A_LPE_AUD_HDMI_STATUS', '0x65064', '0x180000') -('STREAM_A_LPE_AUD_HDMIW_INFOFR', '0x65068', '0x180000') diff --git a/tools/quick_dump/vlv_pipe_b.txt b/tools/quick_dump/vlv_pipe_b.txt deleted file mode 100644 index de5e9681..00000000 --- a/tools/quick_dump/vlv_pipe_b.txt +++ /dev/null @@ -1,174 +0,0 @@ -('PIPEB_DSL', '0x71000', '0x180000') -('PIPEB_SLC', '0x71004', '0x180000') -('PIPEBCONF', '0x71008', '0x180000') -('PIPEBGCMAXRED', '0x71010', '0x180000') -('PIPEBGCMAXGREEN', '0x71014', '0x180000') -('PIPEBGCMAXBLUE', '0x71018', '0x180000') -('PIPEBSTAT', '0x71024', '0x180000') -('PIPEBFRAMECOUNT', '0x71040', '0x180000') -('PIPEBFLIPCOUNT', '0x71044', '0x180000') -('PIPEBMSAMISC', '0x71048', '0x180000') - -('DSPBADDR', '0x7117C', '0x180000') -('DSPBCNTR', '0x71180', '0x180000') -('DSPBLINOFF', '0x71184', '0x180000') -('DSPBSTRIDE', '0x71188', '0x180000') -('DSPBKEYVAL', '0x71194', '0x180000') -('DSPBKEYMSK', '0x71198', '0x180000') -('DSPBSURF', '0x7119C', '0x180000') -('DSPBTILEOFF', '0x711A4', '0x180000') -('DSPBSURFLIVE', '0x711AC', '0x180000') -('DSPBFLPQSTAT', '0x71200', '0x180000') - -('CURBCNTR', '0x700C0', '0x180000') -('CURBBASE', '0x700C4', '0x180000') -('CURBPOS', '0x700C8', '0x180000') -('CURBRESV', '0x700CC', '0x180000') -('CURBPALET0', '0x700D0', '0x180000') -('CURBPALET1', '0x700D4', '0x180000') -('CURBPALET2', '0x700D8', '0x180000') -('CURBPALET3', '0x700DC', '0x180000') -('CURBLIVEBASE', '0x700EC', '0x180000') - -('SPCCNTR', '0x72380', '0x180000') -('SPCLINOFF', '0x72384', '0x180000') -('SPCSTRIDE', '0x72388', '0x180000') -('SPCPOS', '0x7238C', '0x180000') -('SPCSIZE', '0x72390', '0x180000') -('SPCKEYMINVAL', '0x72394', '0x180000') -('SPCKEYMSK', '0x72398', '0x180000') -('SPCSURF', '0x7239C', '0x180000') -('SPCKEYMAXVAL', '0x723A0', '0x180000') -('SPCTILEOFF', '0x723A4', '0x180000') -('SPCCONTALPHA', '0x723A8', '0x180000') -('SPCLIVESURF', '0x723AC', '0x180000') -('SPCCLRC0', '0x723D0', '0x180000') -('SPCCLRC1', '0x723D4', '0x180000') -('SPCGAMC5', '0x723E0', '0x180000') -('SPCGAMC4', '0x723E4', '0x180000') -('SPCGAMC3', '0x723E8', '0x180000') -('SPCGAMC2', '0x723EC', '0x180000') -('SPCGAMC1', '0x723F0', '0x180000') -('SPCGAMC0', '0x723F4', '0x180000') - -('SPDCNTR', '0x72480', '0x180000') -('SPDLINOFF', '0x72484', '0x180000') -('SPDSTRIDE', '0x72488', '0x180000') -('SPDPOS', '0x7248C', '0x180000') -('SPDSIZE', '0x72490', '0x180000') -('SPDKEYMINVAL', '0x72494', '0x180000') -('SPDKEYMSK', '0x72498', '0x180000') -('SPDSURF', '0x7249C', '0x180000') -('SPDKEYMAXVAL', '0x724A0', '0x180000') -('SPDTILEOFF', '0x724A4', '0x180000') -('SPDCONTALPHA', '0x724A8', '0x180000') -('SPDLIVESURF', '0x724AC', '0x180000') -('SPDCLRC0', '0x724D0', '0x180000') -('SPDCLRC1', '0x724D4', '0x180000') -('SPDGAMC5', '0x724E0', '0x180000') -('SPDGAMC4', '0x724E4', '0x180000') -('SPDGAMC3', '0x724E8', '0x180000') -('SPDGAMC2', '0x724EC', '0x180000') -('SPDGAMC1', '0x724F0', '0x180000') -('SPDGAMC0', '0x724F4', '0x180000') - -('DPALETTE_B', '0xA800', '0x180000') -('DPLLB_CTRL', '0x6018', '0x180000') -('DPLLBMD', '0x6020', '0x180000') - -('HTOTAL_B', '0x61000', '0x180000') -('HBLANK_B', '0x61004', '0x180000') -('HSYNC_B', '0x61008', '0x180000') -('VTOTAL_B', '0x6100C', '0x180000') -('VBLANK_B', '0x61010', '0x180000') -('VSYNC_B', '0x61014', '0x180000') -('PIPEBSRC', '0x6101C', '0x180000') -('BCLRPAT_B', '0x61020', '0x180000') -('VSYNCSHIFT_B', '0x61028', '0x180000') - -('TRANSB_DATA_M1', '0x61030', '0x180000') -('TRANSB_DATA_N1', '0x61034', '0x180000') -('TRANSB_DATA_M2', '0x61038', '0x180000') -('TRANSB_DATA_N2', '0x6103C', '0x180000') -('TRANSB_LINK_M1', '0x61040', '0x180000') -('TRANSB_LINK_N1', '0x61044', '0x180000') -('TRANSB_LINK_M2', '0x61048', '0x180000') -('TRANSB_LINK_N2', '0x6104C', '0x180000') - -('CRC_CTRL_RED_B', '0x61050', '0x180000') -('CRC_CTRL_GREEN_B', '0x61054', '0x180000') -('CRC_CTRL_BLUE_B', '0x61058', '0x180000') -('CRC_CTRL_ALPHA_B', '0x6105C', '0x180000') -('CRC_CTRL_RESIDUE2_B', '0x61070', '0x180000') -('CRC_RES_RED_B', '0x61060', '0x180000') -('CRC_RES_GREEN_B', '0x61064', '0x180000') -('CRC_RES_BLUE_V', '0x61068', '0x180000') -('CRC_RES_ALPHAB', '0x6106C', '0x180000') -('CRC_RES_RESIDUAL2_B', '0x61080', '0x180000') - -('PSRCTLB', '0x61090', '0x180000') -('PSRSTATB', '0x61094', '0x180000') -('PSRCRC1B', '0x61098', '0x180000') -('PSRCRC2B', '0x6109C', '0x180000') -('VSCSDPB', '0x610A0', '0x180000') - -('PIPEB_WGCC_C01_C00', '0x610B0', '0x180000') -('PIPEB_WGCC_C02', '0x610B4', '0x180000') -('PIPEB_WGCC_C11_C10', '0x610B8', '0x180000') -('PIPEB_WGCC_C12', '0x610BC', '0x180000') -('PIPEB_WGCC_C21_C20', '0x610C0', '0x180000') -('PIPEB_WGCC_C22', '0x610C4', '0x180000') - -('VIDEO_DIP_CTL_B', '0x61170', '0x180000') -('VIDEO_DIP_DATA_B', '0x61174', '0x180000') -('VIDEO_DIP_GDCP_PAYLOAD_B', '0x61178', '0x180000') - -('PIPEB_CGM_DEGAMMA', '0x68000', '0x180000') -('PIPEB_CGM_GAMMA', '0x69000', '0x180000') -('PIPEB_CGM_CSC_COEFF01', '0x69900', '0x180000') -('PIPEB_CGM_CSC_COEFF23', '0x69904', '0x180000') -('PIPEB_CGM_CSC_COEFF45', '0x69908', '0x180000') -('PIPEB_CGM_CSC_COEFF67', '0x6990C', '0x180000') -('PIPEB_CGM_CSC_COEFF8', '0x69910', '0x180000') -('PIPEB_CGM_CONTROL', '0x69A00', '0x180000') - -('PIPEB_PP_STATUS', '0x61300', '0x180000') -('PIPEB_PP_CONTROL', '0x61304', '0x180000') -('PIPEB_PP_ON_DELAYS', '0x61308', '0x180000') -('PIPEB_PP_OFF_DELAYS', '0x6130C', '0x180000') -('PIPEB_PP_DIVISOR', '0x61310', '0x180000') - -('PIPEB_BLC_PWM_CLT2', '0x61350', '0x180000') -('PIPEB_BLC_PWM_CTL', '0x61354', '0x180000') -('PIPEB_BLM_HIST_CTL', '0x61360', '0x180000') -('PIPEB_IMG_ENH_BIN_DATA', '0x61364', '0x180000') -('PIPEB_HIST_THRESH_GUARD', '0x61368', '0x180000') - -('AUD_CONFIG_B', '0x62100', '0x180000') -('AUD_MISC_CTRL_B', '0x62110', '0x180000') -('AUD_CTS_ENABLE_B', '0x62128', '0x180000') -('AUD_HDMIW_HDMIEDID_B', '0x62150', '0x180000') -('AUD_HDMIW_INFOFR_B', '0x62154', '0x180000') -('AUD_OUT_DIG_CNVT_B', '0x62180', '0x180000') -('AUD_OUT_STR_DESC_B', '0x62184', '0x180000') -('AUD_CNTL_ST_B', '0x621B4', '0x180000') -('AUD_OUT_DIG_CNVTB_DBG', '0x62F44', '0x180000') - -('STREAM_B_LPE_AUD_CONFIG', '0x65800', '0x180000') -('STREAM_B_LPE_AUD_CH_STATUS_0', '0x65808', '0x180000') -('STREAM_B_LPE_AUD_CH_STATUS_1', '0x6580C', '0x180000') -('STREAM_B_LPE_AUD_HDMI_CTS_DP_MAUD', '0x65810', '0x180000') -('STREAM_B_LPE_AUD_HDMI_N_DP_NAUD', '0x65814', '0x180000') -('STREAM_B_LPE_AUD_BUFFER_CONFIG', '0x65820', '0x180000') -('STREAM_B_LPE_AUD_BUF_CH_SWP', '0x65824', '0x180000') -('STREAM_B_LPE_AUD_BUF_A_ADDR', '0x65840', '0x180000') -('STREAM_B_LPE_AUD_BUF_A_LENGTH', '0x65844', '0x180000') -('STREAM_B_LPE_AUD_BUF_B_ADDR', '0x65848', '0x180000') -('STREAM_B_LPE_AUD_BUF_B_LENGTH', '0x6584C', '0x180000') -('STREAM_B_LPE_AUD_BUF_C_ADDR', '0x65850', '0x180000') -('STREAM_B_LPE_AUD_BUF_C_LENGTH', '0x65854', '0x180000') -('STREAM_B_LPE_AUD_BUF_D_ADDR', '0x65858', '0x180000') -('STREAM_B_LPE_AUD_BUF_D_LENGTH', '0x6585C', '0x180000') -('STREAM_B_LPE_AUD_CNTL_ST', '0x65860', '0x180000') -('STREAM_B_LPE_AUD_HDMI_STATUS', '0x65864', '0x180000') -('STREAM_B_LPE_AUD_HDMIW_INFOFR', '0x65868', '0x180000') diff --git a/tools/quick_dump/vlv_power.txt b/tools/quick_dump/vlv_power.txt deleted file mode 100644 index afb83e81..00000000 --- a/tools/quick_dump/vlv_power.txt +++ /dev/null @@ -1,14 +0,0 @@ -('GTLC wake control', '0x130090', '') -('GTLC power well status', '0x130094', '') -('Render forcewake req', '0x1300b0', '') -('Render forcewake ack', '0x1300b4', '') -('Counter control', '0x138104', '') -('RC6 counter', '0x138108', '') -('RC6_SLEEP', 0xa0b0, '') -('RC6_WAKE_LIMIT', 0xa09c, '') -('RC_EI', 0xa0a8, '') -('RC_IDLE_HYSTERESIS', 0xa0ac, '') -('RC6_THRESHOLD', 0xa0b8, '') -('RC6p_THRESHOLD', 0xa0bc, '') -('RC6pp_THRESHOLD', 0xa0c0, '') -('RC_CONTROL', 0xa090, '') diff --git a/tools/skl_ddb_allocation.c b/tools/skl_ddb_allocation.c deleted file mode 100644 index c7bfb279..00000000 --- a/tools/skl_ddb_allocation.c +++ /dev/null @@ -1,447 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include <stdint.h> -#include <stdio.h> -#include <stdbool.h> -#include <stddef.h> -#include <string.h> - -/** - * container_of - cast a member of a structure out to the containing structure - * @ptr: the pointer to the member. - * @type: the type of the container struct this is embedded in. - * @member: the name of the member within the struct. - * - */ -#define container_of(ptr, type, member) ({ \ - typeof( ((type *)0)->member ) *__mptr = (ptr); \ - (type *)( (char *)__mptr - offsetof(type,member) );}) - -#define div_u64(a, b) ((a) / (b)) - -/* - * Stub a few defines/structures - */ - -#define I915_MAX_PIPES 3 -#define I915_MAX_PLANES 3 -#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) - -#define for_each_pipe(p) for ((p) = 0; (p) < 3; (p)++) -#define for_each_plane(pipe, p) for ((p) = 0; (p) < 3; (p)++) - -#define for_each_crtc(dev, crtc) \ - for (int i = 0; i < 3 && (crtc = &crtcs[i].base); i++) - -#define for_each_intel_crtc(dev, intel_crtc) \ - for (int i = 0; i < 3, intel_crtc = &crtcs[i]; i++) - -enum pipe { - PIPE_A, - PIPE_B, - PIPE_C, -}; - -enum plane { - PLANE_1, - PLANE_2, - PLANE_3, -}; - -#define pipe_name(p) ((p) + 'A') - -struct drm_device { - void *dev_private; -}; - -struct drm_i915_private { - struct drm_device *dev; -}; - -struct drm_crtc { - struct drm_device *dev; - bool active; -}; - -static bool intel_crtc_active(struct drm_crtc *crtc) -{ - return crtc->active; -} - -struct intel_crtc { - struct drm_crtc base; - enum pipe pipe; -}; - -static int intel_num_planes(struct intel_crtc *crtc) -{ - return 3; -} - -struct intel_crtc crtcs[I915_MAX_PIPES]; - -#define to_intel_crtc(x) container_of(x, struct intel_crtc, base) - -/* - * DDB code - */ - -struct intel_wm_config { - unsigned int num_pipes_active; -}; - -struct intel_plane_wm_parameters { - uint32_t horiz_pixels; - uint32_t vert_pixels; - uint8_t bytes_per_pixel; - bool enabled; - bool scaled; -}; - -struct skl_pipe_wm_parameters { - bool active; - uint32_t pipe_htotal; - uint32_t pixel_rate; /* in KHz */ - struct intel_plane_wm_parameters plane[I915_MAX_PLANES]; - struct intel_plane_wm_parameters cursor; -}; - -struct skl_ddb_entry { - uint16_t start, end; /* in number of blocks. 'end' is exclusive */ -}; - -static inline uint16_t skl_ddb_entry_size(const struct skl_ddb_entry *entry) -{ - /* end not set, clearly no allocation here. start can be 0 though */ - if (entry->end == 0) - return 0; - - return entry->end - entry->start; -} - -static inline bool skl_ddb_entry_equal(const struct skl_ddb_entry *e1, - const struct skl_ddb_entry *e2) -{ - if (e1->start == e2->start && e1->end == e2->end) - return true; - - return false; -} - -struct skl_ddb_allocation { - struct skl_ddb_entry plane[I915_MAX_PIPES][I915_MAX_PLANES]; - struct skl_ddb_entry cursor[I915_MAX_PIPES]; -}; - -/* - * On gen9, we need to allocate Display Data Buffer (DDB) portions to the - * different active planes. - */ - -#define SKL_DDB_SIZE 896 /* in blocks */ - -static void -skl_ddb_get_pipe_allocation_limits(struct drm_device *dev, - struct drm_crtc *for_crtc, - const struct intel_wm_config *config, - const struct skl_pipe_wm_parameters *params, - struct skl_ddb_entry *alloc /* out */) -{ - struct drm_crtc *crtc; - unsigned int pipe_size, ddb_size; - int nth_active_pipe; - - if (!params->active) { - alloc->start = 0; - alloc->end = 0; - return; - } - - ddb_size = SKL_DDB_SIZE; - ddb_size -= 4; /* 4 blocks for bypass path allocation */ - - nth_active_pipe = 0; - for_each_crtc(dev, crtc) { - if (!intel_crtc_active(crtc)) - continue; - - if (crtc == for_crtc) - break; - - nth_active_pipe++; - } - - pipe_size = ddb_size / config->num_pipes_active; - alloc->start = nth_active_pipe * ddb_size / config->num_pipes_active; - alloc->end = alloc->start + pipe_size; -} - -static unsigned int skl_cursor_allocation(const struct intel_wm_config *config) -{ - if (config->num_pipes_active == 1) - return 32; - - return 8; -} - -static unsigned int -skl_plane_relative_data_rate(const struct intel_plane_wm_parameters *p) -{ - return p->horiz_pixels * p->vert_pixels * p->bytes_per_pixel; -} - -/* - * We don't overflow 32 bits. Worst case is 3 planes enabled, each fetching - * a 8192x4096@32bpp framebuffer: - * 3 * 4096 * 8192 * 4 < 2^32 - */ -static unsigned int -skl_get_total_relative_data_rate(struct intel_crtc *intel_crtc, - const struct skl_pipe_wm_parameters *params) -{ - unsigned int total_data_rate = 0; - int plane; - - for (plane = 0; plane < intel_num_planes(intel_crtc); plane++) { - const struct intel_plane_wm_parameters *p; - - p = ¶ms->plane[plane]; - if (!p->enabled) - continue; - - total_data_rate += skl_plane_relative_data_rate(p); - } - - return total_data_rate; -} - -static void -skl_allocate_pipe_ddb(struct drm_crtc *crtc, - const struct intel_wm_config *config, - const struct skl_pipe_wm_parameters *params, - struct skl_ddb_allocation *ddb /* out */) -{ - struct drm_device *dev = crtc->dev; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - enum pipe pipe = intel_crtc->pipe; - struct skl_ddb_entry alloc; - uint16_t alloc_size, start, cursor_blocks; - uint16_t minimum[I915_MAX_PLANES]; - unsigned int total_data_rate; - int plane; - - skl_ddb_get_pipe_allocation_limits(dev, crtc, config, params, &alloc); - alloc_size = skl_ddb_entry_size(&alloc); - if (alloc_size == 0) { - memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); - memset(&ddb->cursor[pipe], 0, sizeof(ddb->cursor[pipe])); - return; - } - - cursor_blocks = skl_cursor_allocation(config); - ddb->cursor[pipe].start = alloc.end - cursor_blocks; - ddb->cursor[pipe].end = alloc.end; - - alloc_size -= cursor_blocks; - alloc.end -= cursor_blocks; - - /* 1. Allocate the mininum required blocks for each active plane */ - for_each_plane(pipe, plane) { - const struct intel_plane_wm_parameters *p; - - p = ¶ms->plane[plane]; - if (!p->enabled) - continue; - - minimum[plane] = 8; - alloc_size -= minimum[plane]; - } - - /* - * 2. Distribute the remaining space in proportion to the amount of - * data each plane needs to fetch from memory. - * - * FIXME: we may not allocate every single block here. - */ - total_data_rate = skl_get_total_relative_data_rate(intel_crtc, params); - - start = alloc.start; - for (plane = 0; plane < intel_num_planes(intel_crtc); plane++) { - const struct intel_plane_wm_parameters *p; - unsigned int data_rate; - uint16_t plane_blocks; - - p = ¶ms->plane[plane]; - if (!p->enabled) - continue; - - data_rate = skl_plane_relative_data_rate(p); - - /* - * promote the expression to 64 bits to avoid overflowing, the - * result is < available as data_rate / total_data_rate < 1 - */ - plane_blocks = minimum[plane]; - plane_blocks += div_u64((uint64_t)alloc_size * data_rate, - total_data_rate); - - ddb->plane[pipe][plane].start = start; - ddb->plane[pipe][plane].end = start + plane_blocks; - - start += plane_blocks; - } - -} - -static void skl_ddb_check_entry(struct skl_ddb_entry *entry, int16_t *cursor) -{ - - if (skl_ddb_entry_size(entry) == 0) - return; - - /* check that ->start is the next available block */ - if (entry->start < *cursor) - printf("error: allocation overlaps previous block\n"); - else if (entry->start >= *cursor + 1) - printf("warning: allocation leaves a hole\n"); - - *cursor = entry->end; -} - -static void skl_ddb_check_last_allocation(int16_t cursor) -{ - uint16_t last_offset = SKL_DDB_SIZE - 4; - - if (cursor < last_offset) - printf("warning: %d blocks not allocated\n", - last_offset - cursor); - else if (cursor > last_offset) - printf("error: allocation greater than available space\n"); -} - -static void skl_ddb_print(struct skl_ddb_allocation *ddb) -{ - struct skl_ddb_entry *entry; - enum pipe pipe; - int plane; - int16_t cursor = 0; - - printf("%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); - - for_each_pipe(pipe) { - printf("Pipe %c\n", pipe_name(pipe)); - - for_each_plane(pipe, plane) { - entry = &ddb->plane[pipe][plane]; - - printf(" Plane%-8d%8u%8u%8u\n", plane + 1, - entry->start, entry->end, - skl_ddb_entry_size(entry)); - - skl_ddb_check_entry(entry, &cursor); - } - - entry = &ddb->cursor[pipe]; - printf(" %-13s%8u%8u%8u\n", "Cursor", entry->start, - entry->end, skl_ddb_entry_size(entry)); - - skl_ddb_check_entry(entry, &cursor); - } - - skl_ddb_check_last_allocation(cursor); -} - -static struct drm_device drm_device; -static struct drm_i915_private drm_i915_private; - -static void init_stub(void) -{ - int i; - - drm_device.dev_private = &drm_i915_private; - drm_i915_private.dev = &drm_device; - - for (i = 0; i < I915_MAX_PIPES; i++) { - crtcs[i].base.dev = &drm_device; - crtcs[i].pipe = i; - } -} - -struct wm_input { - struct intel_wm_config config; - struct skl_pipe_wm_parameters params[I915_MAX_PIPES]; -}; - -static void wm_input_reset(struct wm_input *in) -{ - memset(in, 0, sizeof(*in)); -} - -static void wm_enable_plane(struct wm_input *in, - enum pipe pipe, enum plane plane, - uint32_t width, uint32_t height, int bpp) -{ - enum pipe i; - - in->params[pipe].active = 1; - - in->config.num_pipes_active = 0; - for_each_pipe(i) - if (in->params[i].active) - in->config.num_pipes_active++; - - in->params[pipe].plane[plane].horiz_pixels = width; - in->params[pipe].plane[plane].vert_pixels = height; - in->params[pipe].plane[plane].bytes_per_pixel = bpp; - in->params[pipe].plane[plane].enabled = true; -} - -static void skl_ddb_allocate(struct wm_input *in, - struct skl_ddb_allocation *out) -{ - struct drm_crtc *crtc; - - for_each_crtc(, crtc) { - enum pipe pipe = to_intel_crtc(crtc)->pipe; - - skl_allocate_pipe_ddb(crtc, - &in->config, &in->params[pipe], out); - } -} - -int main(int argc, char **argv) -{ - struct wm_input in; - static struct skl_ddb_allocation ddb; - - init_stub(); - - wm_input_reset(&in); - wm_enable_plane(&in, PIPE_A, PLANE_1, 1280, 1024, 4); - wm_enable_plane(&in, PIPE_A, PLANE_2, 100, 100, 4); - skl_ddb_allocate(&in, &ddb); - skl_ddb_print(&ddb); - - return 0; -} |