diff options
| author | Praveen Paneri <praveen.paneri@intel.com> | 2015-02-25 14:26:21 +0530 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-02-25 16:07:51 +0100 |
| commit | 0f3a5809e7801d4f48759ce4ffda764fcd7fb6bb (patch) | |
| tree | 12fb59c9483472800b2d1737890344417331cde7 | |
| parent | c6d18ee56ba2f148e9146acd832c530b53aab096 (diff) | |
tests/gem_bad_blit.c : Fix dst address for Gen8 onwards
Gen8 Onwards use 48 bit addressing for src and dst base
addresses. This patch fixes this for destination base address.
Signed-off-by: Praveen Paneri <praveen.paneri@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | tests/gem_bad_blit.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/tests/gem_bad_blit.c b/tests/gem_bad_blit.c index b467ba83..593167c2 100644 --- a/tests/gem_bad_blit.c +++ b/tests/gem_bad_blit.c @@ -85,6 +85,8 @@ bad_blit(drm_intel_bo *src_bo, uint32_t devid) OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((64 << 16) | 64); /* 64x64 blit */ OUT_BATCH(BAD_GTT_DEST); + if (batch->gen >= 8) + OUT_BATCH(BAD_GTT_DEST >> 32); /* Upper 16 bits */ OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(src_pitch); OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); |