summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorStuart Bennett <sb476@cam.ac.uk>2007-11-26 23:59:56 +0000
committerStuart Bennett <sb476@cam.ac.uk>2007-11-26 23:59:56 +0000
commitbeb41a3c88989b631d0fa0d358ef5a3f50ceff91 (patch)
tree5e625753d43a725986db2940995d551dfc5cf843
parent103935ba58584b83233237c29d363e046a1de27b (diff)
Fix the rest of ops2 opcodes for printing nicely
-rw-r--r--ops2.c253
1 files changed, 156 insertions, 97 deletions
diff --git a/ops2.c b/ops2.c
index ae43012..e1a3baf 100644
--- a/ops2.c
+++ b/ops2.c
@@ -347,104 +347,122 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval;
+ u32 srcval, mask;
u32 *shiftreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
} else {
- u16 srcval;
+ u16 srcval, mask;
u16 *shiftreg;
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
+ mask = (0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval;
+ u32 srcval, mask;
u32 *shiftreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
} else {
- u16 srcval;
+ u16 srcval, mask;
u16 *shiftreg;
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
+ mask = (0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval;
+ u32 srcval, mask;
u32 *shiftreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
} else {
- u16 srcval;
+ u16 srcval, mask;
u16 *shiftreg;
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
+ mask = (0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
}
break;
case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 mask;
u32 *srcreg,*shiftreg;
srcreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
+ mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
} else {
+ u16 mask;
u16 *srcreg,*shiftreg;
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
+ mask = (0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
}
break;
}
@@ -759,11 +777,12 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval | mask);
} else {
@@ -773,11 +792,12 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
+ mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, srcval | mask);
}
@@ -790,11 +810,12 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval | mask);
} else {
@@ -804,11 +825,12 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
+ mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, srcval | mask);
}
@@ -821,52 +843,56 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval | mask);
} else {
u16 srcval,mask;
u16 *shiftreg;
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
+ srcoffset = decode_rm10_address(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ bit = *shiftreg & 0xF;
+ disp = (s16)*shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset+disp);
+ mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ store_data_word(srcoffset+disp, srcval | mask);
+ }
+ break;
+ case 3: /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg,*shiftreg;
+ u32 mask;
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg |= mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ *srcreg |= mask;
+ } else {
+ u16 *srcreg,*shiftreg;
+ u16 mask;
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ bit = *shiftreg & 0xF;
+ mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
*srcreg |= mask;
}
@@ -1156,6 +1182,7 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = fetch_data_long(srcoffset);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
if (res_hi != 0) {
@@ -1175,6 +1202,7 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = fetch_data_word(srcoffset);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
res = (s16)*destreg * (s16)srcval;
if (res > 0xFFFF) {
@@ -1197,6 +1225,7 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = fetch_data_long(srcoffset);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
if (res_hi != 0) {
@@ -1216,6 +1245,7 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = fetch_data_word(srcoffset);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
res = (s16)*destreg * (s16)srcval;
if (res > 0xFFFF) {
@@ -1238,6 +1268,7 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = fetch_data_long(srcoffset);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
if (res_hi != 0) {
@@ -1257,6 +1288,7 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = fetch_data_word(srcoffset);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
res = (s16)*destreg * (s16)srcval;
if (res > 0xFFFF) {
@@ -1277,6 +1309,7 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg);
if (res_hi != 0) {
@@ -1294,6 +1327,8 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
res = (s16)*destreg * (s16)*srcreg;
if (res > 0xFFFF) {
SET_FLAG(F_CF);
@@ -1381,11 +1416,12 @@ static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval & ~mask);
} else {
@@ -1395,11 +1431,12 @@ static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
}
@@ -1412,11 +1449,12 @@ static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval & ~mask);
} else {
@@ -1426,11 +1464,12 @@ static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
}
@@ -1443,11 +1482,12 @@ static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval & ~mask);
} else {
@@ -1457,11 +1497,12 @@ static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
}
@@ -1474,9 +1515,10 @@ static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
srcreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
*srcreg &= ~mask;
} else {
@@ -1486,9 +1528,10 @@ static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
*srcreg &= ~mask;
}
@@ -2048,11 +2091,12 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval ^ mask);
} else {
@@ -2062,13 +2106,14 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
+ mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
+ store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
}
break;
case 1:
@@ -2079,11 +2124,12 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval ^ mask);
} else {
@@ -2093,13 +2139,14 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
+ mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
}
break;
case 2:
@@ -2110,11 +2157,12 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
disp = (s16)*shiftreg >> 5;
srcval = fetch_data_long(srcoffset+disp);
mask = (0x1 << bit);
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
store_data_long(srcoffset+disp, srcval ^ mask);
} else {
@@ -2124,38 +2172,41 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0xF;
disp = (s16)*shiftreg >> 4;
srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
+ mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
}
break;
case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
+ u32 *srcreg,*shiftreg;
u32 mask;
srcreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg ^= mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
+ DECODE_PRINTF2("%08x\n", mask);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ *srcreg ^= mask;
+ } else {
+ u16 *srcreg,*shiftreg;
+ u16 mask;
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ bit = *shiftreg & 0xF;
+ mask = (u16)(0x1 << bit);
+ DECODE_PRINTF2("%04x\n", mask);
+ TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
*srcreg ^= mask;
}
@@ -2309,6 +2360,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
srcval = fetch_data_long(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
@@ -2320,6 +2372,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm00_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
srcval = fetch_data_word(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
@@ -2334,6 +2387,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
srcval = fetch_data_long(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
@@ -2345,6 +2399,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm01_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
srcval = fetch_data_word(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
@@ -2359,6 +2414,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
srcval = fetch_data_long(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
@@ -2370,6 +2426,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm10_address(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
srcval = fetch_data_word(srcoffset);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
@@ -2384,6 +2441,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
srcval = *DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
@@ -2394,6 +2452,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
srcval = *DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 15; *dstreg > 0; (*dstreg)--)