diff options
author | root <airlied@linux.ie> | 2007-01-30 13:26:27 +1100 |
---|---|---|
committer | Dave Airlie <airlied@linux.ie> | 2007-01-30 13:26:27 +1100 |
commit | 54ff950abf3dfe32f90dab6ef4bb332b6f9cf4a4 (patch) | |
tree | 9efa30b5da4fdd09edaeab93dcff3e72e3bd68e3 /radeontool.c | |
parent | 31b22720305d3e892b7719ff9ab22913a53aa0b5 (diff) |
commit a bunch more nv registers
Diffstat (limited to 'radeontool.c')
-rw-r--r-- | radeontool.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/radeontool.c b/radeontool.c index 1f3f9e4..c35f619 100644 --- a/radeontool.c +++ b/radeontool.c @@ -201,7 +201,7 @@ int dump_vga_regs(int crtc) set_crtc_owner(crtc); - for (i = 0; i<26; i+=4) + for (i = 0; i<0x9f; i+=4) printf("CRTC%2d %02X\t%02X %02X %02X %02X\n", crtc, i, get_vga_crtc_reg(crtc, i), get_vga_crtc_reg(crtc, i+1), get_vga_crtc_reg(crtc, i+2), get_vga_crtc_reg(crtc, i+3)); @@ -228,6 +228,8 @@ int dump_vga_regs(int crtc) SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_FP_HTIMING); SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_FP_VTIMING); + SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_UNK35); + SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_UNK58); } void radeon_cmd_regs(void) { @@ -270,6 +272,17 @@ void radeon_cmd_regs(void) SHOW_RAMDAC_REG(NV_RAMDAC_FP_VDISP_END); SHOW_RAMDAC_REG(NV_RAMDAC_FP_VTOTAL); SHOW_RAMDAC_REG(NV_RAMDAC_FP_VCRTC); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_VSYNC_START); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_VSYNC_END); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_VVALID_START); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_VVALID_END); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_HDISP_END); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_HTOTAL); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_HCRTC); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_HSYNC_START); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_HSYNC_END); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_HVALID_START); + SHOW_RAMDAC_REG(NV_RAMDAC_FP_HVALID_END); SHOW_RAMDAC_REG(NV_RAMDAC_FP_DITHER); SHOW_RAMDAC_REG(NV_RAMDAC_FP_TEST_CONTROL); SHOW_RAMDAC_REG(NV_RAMDAC_FP_CONTROL); @@ -280,6 +293,7 @@ void radeon_cmd_regs(void) SHOW_RAMDAC0_REG(NV_RAMDAC_VPLL); SHOW_RAMDAC0_REG(NV_RAMDAC_PLL_SELECT); SHOW_RAMDAC0_REG(NV_RAMDAC_VPLL2); + SHOW_RAMDAC0_REG(NV_RAMDAC_SEL_CLK); SHOW_RAMDAC0_REG(NV_RAMDAC_NVPLL_B); SHOW_RAMDAC0_REG(NV_RAMDAC_MPLL_B); |