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authorDaniel Vetter <daniel.vetter@ffwll.ch>2018-11-01 17:41:32 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2018-11-06 19:01:36 +0100
commitf34197db9a6aefa73526c06671f27a1b10a09805 (patch)
treedf50ab781a121d075afa6c4b0241867277df1be3
parent0357ef6aa2b55f8f57fc1cc50557c0341f931a86 (diff)
drm/i915: annotate intel_atomic_commit_fence_waitmmu_notifier-checks
In i915 we also have i915_sw_fence, as some kind of super fence. Since those include dma-fences (it's the main use really, aside from chaining them for the scheduler) they're relevant for any lockdep cycles involving dma_fence. But i915_sw_fence is also really tough to properly annonate: - Most of the use (all of it in the scheduler) is entirely driven by callbacks. That creates dependency chains, but for all practical purposes we could treat that as part of the hw magic that executes requests for us. Eventually a dma_fence_signal() comes out of that, which we do annotate. - For dma-fences we only annotate cpu waits, and don't follow any of the chains going through the hardware. Since dma_fence are supposed to be ordered an always complete that should be good enough, as long as we don't accidentally deadlock on the cpu side. So treating i915_sw_fence as part of the hw magic shouldn't reduce our deadlock coverage, as long as i915_sw_fence itself doesn't deadlock. And there's lots of debug checks for that already. - There's one exception: intel_atomic_commit_fence_wait() is the only cpu wait on a i915_sw_fence we have. That one we should annotate, and annotate should be able to teach lockdep about our gpu reset vs modeset locking inversion. But in reality this is a dma-fence wait, and it using i915_sw_fence is really just an implementation detail. All other kms drivers use drm_atomic_helper_wait_for_fences() instead. - There is a i915_sw_fence_wait for normal cpu waits (the one in the modeset code is open-coded because it also waits for gpu reset wakups), but that's only used for selftests. So the simplest solution for annotating i915_sw_fence is therefore to annotate intel_atomic_commit_fence() as a dma_fence wait. Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bbf8ca21a7a2..cf9240625ae3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12747,6 +12747,7 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_stat
struct wait_queue_entry wait_fence, wait_reset;
struct drm_i915_private *dev_priv = to_i915(intel_state->base.dev);
+ dma_fence_wait_acquire();
init_wait_entry(&wait_fence, 0);
init_wait_entry(&wait_reset, 0);
for (;;) {
@@ -12764,6 +12765,7 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_stat
}
finish_wait(&intel_state->commit_ready.wait, &wait_fence);
finish_wait(&dev_priv->gpu_error.wait_queue, &wait_reset);
+ dma_fence_wait_release();
}
static void intel_atomic_cleanup_work(struct work_struct *work)