summaryrefslogtreecommitdiff
path: root/results
diff options
context:
space:
mode:
authordavej <davej>2002-10-30 14:46:31 +0000
committerdavej <davej>2002-10-30 14:46:31 +0000
commitbe1da7a3d77dda7841e0b751f697a50c0b85a760 (patch)
tree96adf0531e1e4a30d3b62f561c7f1b7805ea125a /results
parent38a08c004900ff715ce7a440a182d76724168da0 (diff)
more results
Diffstat (limited to 'results')
-rw-r--r--results/Intel/PentiumIII.txt122
1 files changed, 122 insertions, 0 deletions
diff --git a/results/Intel/PentiumIII.txt b/results/Intel/PentiumIII.txt
new file mode 100644
index 0000000..d84eca6
--- /dev/null
+++ b/results/Intel/PentiumIII.txt
@@ -0,0 +1,122 @@
+x86info v1.11. Dave Jones 2001, 2002
+Feedback to <davej@suse.de>.
+
+Found 1 CPU
+eax in: 0x00000000, eax = 00000002 ebx = 756e6547 ecx = 6c65746e edx = 49656e69
+eax in: 0x00000001, eax = 00000683 ebx = 00000002 ecx = 00000000 edx = 0383f9ff
+eax in: 0x00000002, eax = 03020101 ebx = 00000000 ecx = 00000000 edx = 0c040882
+
+Family: 6 Model: 8 Stepping: 3 Type: 0 [Pentium III (Coppermine) [cB0] Original OEM]
+Feature flags:
+ Onboard FPU
+ Virtual Mode Extensions
+ Debugging Extensions
+ Page Size Extensions
+ Time Stamp Counter
+ Model-Specific Registers
+ Physical Address Extensions
+ Machine Check Architecture
+ CMPXCHG8 instruction
+ SYSENTER/SYSEXIT
+ Memory Type Range Registers
+ Page Global Enable
+ Machine Check Architecture
+ CMOV instruction
+ Page Attribute Table
+ 36-bit PSEs
+ MMX support
+ FXSAVE and FXRESTORE instructions
+ SSE support
+
+
+Instruction TLB: 4KB pages, 4-way associative, 32 entries
+Instruction TLB: 4MB pages, fully associative, 2 entries
+Data TLB: 4KB pages, 4-way associative, 64 entries
+L2 unified cache:
+ Size: 256KB 8-way associative.
+ line size=32 bytes.
+L1 Instruction cache:
+ Size: 16KB 4-way associative.
+ line size=32 bytes.
+Data TLB: 4MB pages, 4-way associative, 8 entries
+L1 Data cache:
+ Size: 16KB 4-way associative.
+ line size=32 bytes.
+
+Number of reporting banks : 5
+
+Erk, MCG_CTL not present! :5:
+
+Bank: 0 (0x400)
+MC0CTL: 00000000 00000000 00000000 00000000
+ 01000110 01001000 00000000 00100000
+MC0STATUS: 00010000 00000000 00000000 00000000
+ 00000000 00000000 00000000 00000000
+MC0ADDR: 00000000 00000000 00000000 00000000
+ 00000000 00000000 00000000 00000000
+
+Bank: 1 (0x404)
+MC1CTL: 00000000 00000000 00000000 00000000
+ 00000000 00000000 00000000 00000001
+MC1STATUS: 00000000 00000000 00000000 00000000
+ 00000000 00000000 00000000 00000000
+MC1ADDR: 00000000 00110100 00110000 11111111
+ 00000000 00110100 00110000 11111111
+
+Bank: 2 (0x408)
+MC2CTL: 00000000 00110100 01000110 00000000
+ 00000000 00110100 01000110 00000000
+MC2STATUS: 00000000 00000000 00000000 00000000
+ 00000000 00000000 00000000 00000000
+MC2ADDR: 00000000 00110100 01000110 11111111
+ 00000000 00110100 01000110 11111111
+
+Bank: 3 (0x40c)
+MC3CTL: 00000000 00000000 00000000 00000000
+ 00000000 00000000 00000000 00000001
+MC3STATUS: 00000000 00000000 00000000 00000000
+ 00000000 00000000 00000000 00000000
+MC3ADDR: Couldn't read MSR 0x40e
+
+Bank: 4 (0x410)
+MC4CTL: 00000000 00000000 00000000 00001000
+ 00000000 00000000 00000000 00001000
+MC4STATUS: 00100010 00000000 00000000 00000000
+ 00000000 00000000 00000000 00010001
+MC4ADDR: 00000000 00110101 00100000 11111111
+ 00000000 00110101 00100000 11111111
+
+Connector type: Socket 370 (FC-PGA) or (PPGA)
+MTRR registers:
+MTRRcap (0xfe): 0x0000000000000508
+MTRRphysBase0 (0x200): 0x0000000000000006
+MTRRphysMask0 (0x201): 0x0000000ff8000800
+MTRRphysBase1 (0x202): 0x00000000fd000001
+MTRRphysMask1 (0x203): 0x0000000fff800800
+MTRRphysBase2 (0x204): 0x0000000000000000
+MTRRphysMask2 (0x205): 0x0000000000000000
+MTRRphysBase3 (0x206): 0x0000000000000000
+MTRRphysMask3 (0x207): 0x0000000000000000
+MTRRphysBase4 (0x208): 0x0000000000000000
+MTRRphysMask4 (0x209): 0x0000000000000000
+MTRRphysBase5 (0x20a): 0x0000000000000000
+MTRRphysMask5 (0x20b): 0x0000000000000000
+MTRRphysBase6 (0x20c): 0x0000000000000000
+MTRRphysMask6 (0x20d): 0x0000000000000000
+MTRRphysBase7 (0x20e): 0x0000000000000000
+MTRRphysMask7 (0x20f): 0x0000000000000000
+MTRRfix64K_00000 (0x250): 0x0606060606060606
+MTRRfix16K_80000 (0x258): 0x0606060606060606
+MTRRfix16K_A0000 (0x259): 0x0000000000000000
+MTRRfix4K_C8000 (0x269): 0x0000000000000000
+MTRRfix4K_D0000 0x26a: 0x0000000000000000
+MTRRfix4K_D8000 0x26b: 0x0000000000000000
+MTRRfix4K_E0000 0x26c: 0x0000000000000000
+MTRRfix4K_E8000 0x26d: 0x0000000000000000
+MTRRfix4K_F0000 0x26e: 0x0505050505050505
+MTRRfix4K_F8000 0x26f: 0x0505050505050505
+MTRRdefType (0x2ff): 0x0000000000000c00
+
+
+694.84 MHz processor (estimate).
+