TODO: Notes about avx 512

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+- AVX 512
+
+  - More registers, optional operands, opmasks.
+    Potential solution: encode all the additional stuff into one new operand
+
+    OPTION(k0, z, broadcast)
+
+    Another potential solution: Add pseudo-registers
+
+    	    k0m, k1m, k2m, ..., k7m
+	    k0z, k1z, k2z, ..., k7z
+
+    that corresponds to opmasks with zeroing/masking. This assumes
+    that opmasks are only used when zero/masking is also allowed, which
+    may not be true.
+
+    Another: Bite the bullet and add three new ops:
+
+    	     vaddps, zmm, k*, m/z, zmm, zmm, option
+
+  - There are additinal XMM and YMM registers as well, so we now need
+    the ability to choose EVEX encoding on the fly. The way to do this
+    is probably to introduce new optypes XMM_LO, YMM_LO, ZMM_LO(?),
+    and then change XMM to be XMM_LO | XMM_HI. Ie., similar to the
+    existing cases where some instructions can be encoded more
+    efficiently when the register is ax, in this case some
+    instructions can be encoded with VEX when the registers are
+    *mm0-*mm15
+
 - Size directives
 
   - There are a number of cases where the op size can't be inferred