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| author | Junyan He <junyan.he@linux.intel.com> | 2015-01-06 18:02:01 +0800 |
|---|---|---|
| committer | Zhigang Gong <zhigang.gong@intel.com> | 2015-01-20 16:30:54 +0800 |
| commit | 9c7d2346783638e0aa80ff8d6477e6387b12073e (patch) | |
| tree | 10924e168fc02bb171b7f5daf4b5220682f06ed5 | |
| parent | b2da846b450ab21d1eb0e20fbaf6b7581f7e033d (diff) | |
Modify the fake dst register for CMP in register allocation.
The fake dst regigster which is used to avoid the thread switch
for CMP instruction is not correct for I64 comparing.
The dst must have the same vstride as the src, so we need to
allocate a fake long type register.
Signed-off-by: Junyan He <junyan.he@linux.intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
| -rw-r--r-- | backend/src/backend/gen_reg_allocation.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/backend/src/backend/gen_reg_allocation.cpp b/backend/src/backend/gen_reg_allocation.cpp index 26078e0a..71bb8c1b 100644 --- a/backend/src/backend/gen_reg_allocation.cpp +++ b/backend/src/backend/gen_reg_allocation.cpp @@ -620,7 +620,10 @@ namespace gbe // set a temporary register to avoid switch in this block. bool isSrc = false; bool needMov = false; - this->replaceReg(selection, &insn, 0, isSrc, ir::TYPE_FLOAT, needMov); + ir::Type ir_type = ir::TYPE_FLOAT; + if (insn.src(0).isint64()) + ir_type = ir::TYPE_U64; + this->replaceReg(selection, &insn, 0, isSrc, ir_type, needMov); } // If the instruction requires to generate (CMP for long/int/float..) // the flag value to the register, and it's not a pure flag boolean, |