diff options
author | Junyan He <junyan.he@linux.intel.com> | 2015-01-19 15:32:27 +0800 |
---|---|---|
committer | Zhigang Gong <zhigang.gong@intel.com> | 2015-01-20 16:30:42 +0800 |
commit | 418ac352406ccbaaa34b3e10a9461b0159ea2eb5 (patch) | |
tree | e1c5fd776753a399471dfd9d8037c5d2ab59d5c8 | |
parent | 265b18ab819b5c89fb68d41dab0b755f87d2a130 (diff) |
Add the canHandleLong virtual function into gen encoder
This function is used to handle the common cases for
ALU1 and ALU2 operations. If native long is not supported,
this function will split the src and dst into top half
and bottom half, else it just return false.
So far, just ALU1 function will use it.
Signed-off-by: Junyan He <junyan.he@linux.intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
-rw-r--r-- | backend/src/backend/gen8_encoder.cpp | 5 | ||||
-rw-r--r-- | backend/src/backend/gen8_encoder.hpp | 2 | ||||
-rw-r--r-- | backend/src/backend/gen_encoder.cpp | 14 | ||||
-rw-r--r-- | backend/src/backend/gen_encoder.hpp | 4 |
4 files changed, 21 insertions, 4 deletions
diff --git a/backend/src/backend/gen8_encoder.cpp b/backend/src/backend/gen8_encoder.cpp index 8d4b74f2..45f3d3ec 100644 --- a/backend/src/backend/gen8_encoder.cpp +++ b/backend/src/backend/gen8_encoder.cpp @@ -413,6 +413,11 @@ namespace gbe } } + bool Gen8Encoder::canHandleLong(uint32_t opcode, GenRegister dst, GenRegister src0, GenRegister src1) + { + return false; + } + #define NO_SWIZZLE ((0<<0) | (1<<2) | (2<<4) | (3<<6)) void Gen8Encoder::alu3(uint32_t opcode, diff --git a/backend/src/backend/gen8_encoder.hpp b/backend/src/backend/gen8_encoder.hpp index e0d934fd..f9200cd0 100644 --- a/backend/src/backend/gen8_encoder.hpp +++ b/backend/src/backend/gen8_encoder.hpp @@ -63,6 +63,8 @@ namespace gbe virtual bool disableCompact() { return true; } virtual void alu3(uint32_t opcode, GenRegister dst, GenRegister src0, GenRegister src1, GenRegister src2); + virtual bool canHandleLong(uint32_t opcode, GenRegister dst, GenRegister src0, + GenRegister src1 = GenRegister::null()); }; } #endif /* __GBE_GEN8_ENCODER_HPP__ */ diff --git a/backend/src/backend/gen_encoder.cpp b/backend/src/backend/gen_encoder.cpp index d21becef..9058e2ec 100644 --- a/backend/src/backend/gen_encoder.cpp +++ b/backend/src/backend/gen_encoder.cpp @@ -488,6 +488,14 @@ namespace gbe return (GenNativeInstruction *)(&this->store.back()-1); } + bool GenEncoder::canHandleLong(uint32_t opcode, GenRegister dst, GenRegister src0, GenRegister src1) + { + /* By now, just alu1 insn will come to here. So just MOV */ + this->MOV(dst.bottom_half(), src0.bottom_half()); + this->MOV(dst.top_half(this->simdWidth), src0.top_half(this->simdWidth)); + return true; + } + INLINE void _handleDouble(GenEncoder *p, uint32_t opcode, GenRegister dst, GenRegister src0, GenRegister src1 = GenRegister::null()) { int w = p->curr.execWidth; @@ -537,9 +545,9 @@ namespace gbe GenRegister src, uint32_t condition) { if (dst.isdf() && src.isdf()) { handleDouble(p, opcode, dst, src); - } else if (dst.isint64() && src.isint64()) { // handle int64 - p->MOV(dst.bottom_half(), src.bottom_half()); - p->MOV(dst.top_half(p->simdWidth), src.top_half(p->simdWidth)); + } else if (dst.isint64() && src.isint64() + && p->canHandleLong(opcode, dst, src)) { // handle int64 + return; } else if (needToSplitAlu1(p, dst, src) == false) { if(compactAlu1(p, opcode, dst, src, condition, false)) return; diff --git a/backend/src/backend/gen_encoder.hpp b/backend/src/backend/gen_encoder.hpp index 97d62588..1a6f75c7 100644 --- a/backend/src/backend/gen_encoder.hpp +++ b/backend/src/backend/gen_encoder.hpp @@ -229,8 +229,10 @@ namespace gbe virtual bool disableCompact() { return false; } GenNativeInstruction *next(uint32_t opcode); uint32_t n_instruction(void) const { return store.size(); } - GBE_CLASS(GenEncoder); //!< Use custom allocators + virtual bool canHandleLong(uint32_t opcode, GenRegister dst, GenRegister src0, + GenRegister src1 = GenRegister::null()); + GBE_CLASS(GenEncoder); //!< Use custom allocators virtual void alu3(uint32_t opcode, GenRegister dst, GenRegister src0, GenRegister src1, GenRegister src2) = 0; }; |