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-rw-r--r--reference/vs-op-neg-int.asm53
1 files changed, 23 insertions, 30 deletions
diff --git a/reference/vs-op-neg-int.asm b/reference/vs-op-neg-int.asm
index 001aeed..b677421 100644
--- a/reference/vs-op-neg-int.asm
+++ b/reference/vs-op-neg-int.asm
@@ -1,9 +1,9 @@
; options:
; VERT: new compiler
-@in(r1.x) in0
-@in(r1.y) in1
-@in(r1.z) in2
-@in(r1.w) in3
+@in(r0.x) in0
+@in(r0.y) in1
+@in(r0.z) in2
+@in(r0.w) in3
@out(r0.x) out0
@out(r0.y) out1
@out(r0.z) out2
@@ -12,35 +12,28 @@
@out(r1.y) out5
@out(r1.z) out6
@out(r1.w) out7
-(sy)(ss)absneg.f r0.x, (neg)c0.x
-mov.f32f32 r2.x, c2.y
-mov.f32f32 r2.y, c2.y
+@const(c2.x) 0x00000000, 0x3f800000, 0x00000000, 0x00000000
+(sy)(ss)absneg.f r1.x, (neg)c0.x
+mov.f32f32 r1.y, c2.y
+mov.f32f32 r1.z, c2.y
+mov.f32f32 r2.x, c2.x
+cmps.f.eq r1.x, r1.x, c1.x
+mov.f32f32 r2.y, c2.x
mov.f32f32 r2.z, c2.x
-cmps.f.eq r0.x, r0.x, c1.x
-mov.f32f32 r2.w, c2.x
-mov.f32f32 r3.x, c2.x
-mov.f32f32 r3.y, c2.y
-cov.u32f32 r0.x, r0.x
-mov.f32f32 r3.z, c2.y
-mov.f32f32 r3.w, c2.x
-mov.f32f32 r0.w, r1.w
-mov.f32f32 r1.w, r0.x
-mov.f32f32 r0.z, r1.z
-mov.f32f32 r0.y, r1.y
-mov.f32f32 r0.x, r1.x
-cmps.f.ne r1.x, r1.w, c2.x
+mov.f32f32 r2.w, c2.y
+cov.u32f32 r1.x, r1.x
+mov.f32f32 r3.x, c2.y
+mov.f32f32 r3.y, c2.x
+nop
+cmps.f.ne r1.x, r1.x, c2.x
(rpt2)nop
-sel.b32 r1.y, r2.y, r1.x, r2.x
-sel.b32 r1.z, r2.w, r1.x, r2.z
-sel.b32 r2.x, r3.y, r1.x, r3.x
-sel.b32 r1.x, r3.w, r1.x, r3.z
-mov.f32f32 r1.w, r1.y
-mov.f32f32 r1.z, r1.z
-mov.f32f32 r1.y, r2.x
-mov.f32f32 r1.x, r1.x
+sel.b32 r1.w, r1.z, r1.x, r1.y
+sel.b32 r1.z, r2.y, r1.x, r2.x
+sel.b32 r1.y, r2.w, r1.x, r2.z
+sel.b32 r1.x, r3.y, r1.x, r3.x
end
nop
; VERT: outputs: r0.x (0:0) r1.x (5:20)
-; VERT: inputs: r1.x (0:0,cm=f,il=8,b=0)
-; VERT: 29 instructions, 0 half, 4 full
+; VERT: inputs: r0.x (0:0,cm=f,il=8,b=0)
+; VERT: 21 instructions, 0 half, 4 full