diff options
| author | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2017-10-05 15:13:19 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2017-10-12 09:17:38 +0200 |
| commit | c74ed3966e221b13bae83067f5b84f720cbc3021 (patch) | |
| tree | 5944dac3cf7385b9e1eb8d6e1c7db9eba76fa52c | |
| parent | 1789cac6dd96ee9300047029e23396409f51135a (diff) | |
radv: do not set registers for merged ES-GS on GFX9
Based on RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index f5dc26d392..626b68ad8e 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -343,8 +343,11 @@ si_emit_config(struct radv_physical_device *physical_device, radeon_set_context_reg(cs, R_028A1C_VGT_HOS_MIN_TESS_LEVEL, fui(0)); /* FIXME calculate these values somehow ??? */ - radeon_set_context_reg(cs, R_028A54_VGT_GS_PER_ES, SI_GS_PER_ES); - radeon_set_context_reg(cs, R_028A58_VGT_ES_PER_GS, 0x40); + if (physical_device->rad_info.chip_class <= VI) { + radeon_set_context_reg(cs, R_028A54_VGT_GS_PER_ES, SI_GS_PER_ES); + radeon_set_context_reg(cs, R_028A58_VGT_ES_PER_GS, 0x40); + } + radeon_set_context_reg(cs, R_028A5C_VGT_GS_PER_VS, 0x2); radeon_set_context_reg(cs, R_028A8C_VGT_PRIMITIVEID_RESET, 0x0); |