diff options
author | Ramalingam C <ramalingam.c@intel.com> | 2022-02-27 22:39:56 +0530 |
---|---|---|
committer | Ramalingam C <ramalingam.c@intel.com> | 2022-02-27 22:39:56 +0530 |
commit | 2834f0ccd3e0455def1c97552a03420053e3aa69 (patch) | |
tree | 3c83c858ea57e7e9521fa4a041a5101d39d4ba00 | |
parent | 7fe841edb370e5376bc15984accc62c32539772d (diff) |
Fix clear ccsflat-ccs-ww9.7
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_migrate.c | 34 |
2 files changed, 19 insertions, 19 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h index 166de5436c4a..237c1baccc64 100644 --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h @@ -208,8 +208,8 @@ #define XY_CTRL_SURF_COPY_BLT ((2 << 29) | (0x48 << 22) | 3) #define SRC_ACCESS_TYPE_SHIFT 21 #define DST_ACCESS_TYPE_SHIFT 20 -#define CCS_SIZE_SHIFT 8 -#define XY_CTRL_SURF_MOCS_SHIFT 25 +#define CCS_SIZE_MASK GENMASK(17, 8) +#define XY_CTRL_SURF_MOCS_MASK GENMASK(31, 25) #define NUM_CCS_BYTES_PER_BLOCK 256 #define NUM_BYTES_PER_CCS_BYTE 256 #define NUM_CCS_BLKS_PER_XFER 1024 diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c index 3f1b4919a831..9af0232458ef 100644 --- a/drivers/gpu/drm/i915/gt/intel_migrate.c +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c @@ -489,7 +489,7 @@ static bool wa_1209644611_applies(int ver, u32 size) * And CCS data can be copied in and out of CCS region through * XY_CTRL_SURF_COPY_BLT. CPU can't access the CCS data directly. * - * When we exaust the lmem, if the object's placements support smem, then we can + * When we exhaust the lmem, if the object's placements support smem, then we can * directly decompress the compressed lmem object into smem and start using it * from smem itself. * @@ -503,8 +503,11 @@ static bool wa_1209644611_applies(int ver, u32 size) static inline u32 *i915_flush_dw(u32 *cmd, u64 dst, u32 flags) { - /* Mask the 3 LSB to use the PPGTT address space */ + /* Address needs to be QWORD aligned */ + WARN(dst & 0x7, __stringify(dst & 0x7)); *cmd++ = MI_FLUSH_DW | flags; + + dst <<= 3; *cmd++ = lower_32_bits(dst); *cmd++ = upper_32_bits(dst); @@ -521,7 +524,7 @@ static u32 calc_ctrl_surf_instr_size(struct drm_i915_private *i915, int size) /* * XY_CTRL_SURF_COPY_BLT transfers CCS in 256 byte * blocks. one XY_CTRL_SURF_COPY_BLT command can - * trnasfer upto 1024 blocks. + * transfer upto 1024 blocks. */ num_blks = DIV_ROUND_UP(GET_CCS_BYTES(i915, size), NUM_CCS_BYTES_PER_BLOCK); @@ -529,19 +532,19 @@ static u32 calc_ctrl_surf_instr_size(struct drm_i915_private *i915, int size) total_size = (XY_CTRL_SURF_INSTR_SIZE) * num_cmds; /* - * We need to add a flush before and after - * XY_CTRL_SURF_COPY_BLT + * Adding a flush before and after XY_CTRL_SURF_COPY_BLT */ total_size += 2 * MI_FLUSH_DW_SIZE; + return total_size; } static u32 *_i915_ctrl_surf_copy_blt(u32 *cmd, u64 src_addr, u64 dst_addr, u8 src_mem_access, u8 dst_mem_access, int src_mocs, int dst_mocs, - u16 num_ccs_blocks) + u16 ccs_blocks) { - int i = num_ccs_blocks; + int blks_left = ccs_blocks, blks_per_copy; /* * The XY_CTRL_SURF_COPY_BLT instruction is used to copy the CCS @@ -558,24 +561,21 @@ static u32 *_i915_ctrl_surf_copy_blt(u32 *cmd, u64 src_addr, u64 dst_addr, * 256 KB of CCS represents 256 * 256 KB = 64 MB of LMEM. */ do { - /* - * We use logical AND with 1023 since the size field - * takes values which is in the range of 0 - 1023 - */ + blks_per_copy = (blks_left - 1) & 0x3FF; *cmd++ = ((XY_CTRL_SURF_COPY_BLT) | (src_mem_access << SRC_ACCESS_TYPE_SHIFT) | (dst_mem_access << DST_ACCESS_TYPE_SHIFT) | - (((i - 1) & 1023) << CCS_SIZE_SHIFT)); + FIELD_PREP(CCS_SIZE_MASK, blks_per_copy)); *cmd++ = lower_32_bits(src_addr); *cmd++ = ((upper_32_bits(src_addr) & 0xFFFF) | - (src_mocs << XY_CTRL_SURF_MOCS_SHIFT)); + FIELD_PREP(XY_CTRL_SURF_MOCS_MASK, src_mocs)); *cmd++ = lower_32_bits(dst_addr); *cmd++ = ((upper_32_bits(dst_addr) & 0xFFFF) | - (dst_mocs << XY_CTRL_SURF_MOCS_SHIFT)); + FIELD_PREP(XY_CTRL_SURF_MOCS_MASK, dst_mocs)); src_addr += SZ_64M; dst_addr += SZ_64M; - i -= NUM_CCS_BLKS_PER_XFER; - } while (i > 0); + blks_left -= blks_per_copy; + } while (blks_left > 0); return cmd; } @@ -894,7 +894,7 @@ static int emit_clear(struct i915_request *rq, u64 offset, int size, offset += (u64)rq->engine->instance << 32; - /* Clear flat css only when value is 0 */ + /* Clear CCS only when value is 0 */ ccs_ring_size = (is_lmem && !value) ? calc_ctrl_surf_instr_size(i915, size) : 0; |