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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2012-11-20 13:27:42 -0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-11-21 17:47:10 +0100
commit54075a7d75732147c32f7a99af5218f7d0f62596 (patch)
tree5bd656dfff524d17b128a39afe5a01097253f054
parent13888d78c664a1f61d7b09d282f5916993827a40 (diff)
drm/i915: make the panel fitter work on pipes B and C on Haswell
This goes on a separate patch since it won't apply on the stable trees and there's nothing using panel fitter on HSW on the older Kernels. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c2ef6cdf66c3..1e405a3b6604 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3467,7 +3467,8 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
* as some pre-programmed values are broken,
* e.g. x201.
*/
- I915_WRITE(PF_CTL(pipe), PF_ENABLE | PF_FILTER_MED_3x3);
+ I915_WRITE(PF_CTL(pipe), PF_ENABLE | PF_FILTER_MED_3x3 |
+ PF_PIPE_SEL_IVB(pipe));
I915_WRITE(PF_WIN_POS(pipe), dev_priv->pch_pf_pos);
I915_WRITE(PF_WIN_SZ(pipe), dev_priv->pch_pf_size);
}