diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2014-03-28 16:45:54 -0300 |
|---|---|---|
| committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2014-03-28 17:35:11 -0300 |
| commit | bcddd1c6d99fe3919c6a166c7722fe53d1a0189b (patch) | |
| tree | 59725ded0369004248d1835e01f07d1743c2f1be | |
| parent | 5a9ab28d77d844f81f9ab4c4dd4239f33ed67005 (diff) | |
drm/i915: fix infinite loop at gen6_update_ring_freqbdw-runtime-pm-2014-03-28
If I boot my Broadwell machine to X on a system with Mesa Gallium
llvmpipe instead of i965, then kill X and try to run pm_pc8.c, at when
we disable PC8 and call gen6_update_ring_freq(), we will get stuck on
an infinite loop because the frequencies are zero and the variables
are unsigned. This happens because we never ran any batch, so we did
not enable RC6, so the variables are zero. If I run gem_exec_nop
before running pm_pc8, everything works as expected because
gem_exec_nop makes RC6 be enabled.
This commit should prevent the infinite loop, but it is not the proper
fix to the problem.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 3dedfc2ad8ef..a1e5bb60f92e 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3529,7 +3529,8 @@ void gen6_update_ring_freq(struct drm_device *dev) * to use for memory access. We do this by specifying the IA frequency * the PCU should use as a reference to determine the ring frequency. */ - for (gpu_freq = dev_priv->rps.max_freq_softlimit; gpu_freq >= dev_priv->rps.min_freq_softlimit; + for (gpu_freq = dev_priv->rps.max_freq_softlimit; + gpu_freq >= dev_priv->rps.min_freq_softlimit && gpu_freq != 0; gpu_freq--) { int diff = dev_priv->rps.max_freq_softlimit - gpu_freq; unsigned int ia_freq = 0, ring_freq = 0; |